mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 21:11:47 +07:00
251b6fd38b
Instead of migrating meson cpu_clk to clk_regmap, like the other meson clock drivers, we take advantage of the massive rework to get rid of it completely, and solve (the first part) of the related FIXME notice. As pointed out in the code comments, the cpu_clk should be modeled with dividers and muxes it is made of, instead of one big composite clock. The cpu_clk was not working correctly to enable dvfs on meson8b. It hangs quite often when changing the cpu clock rate. This new implementation, based on simple elements improves the situation but the platform will still hang from time to time. This is not acceptable so, until we can make the mechanism around the cpu clock stable, the cpu clock subtree has been put in read-only mode, preventing any change of the cpu clock The notifier and read-write operation will be added back when we have a solution to the problem. Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> |
||
|---|---|---|
| .. | ||
| axg.c | ||
| axg.h | ||
| clk-audio-divider.c | ||
| clk-cpu.c | ||
| clk-mpll.c | ||
| clk-pll.c | ||
| clk-regmap.c | ||
| clk-regmap.h | ||
| clkc.h | ||
| gxbb-aoclk-32k.c | ||
| gxbb-aoclk.c | ||
| gxbb-aoclk.h | ||
| gxbb.c | ||
| gxbb.h | ||
| Kconfig | ||
| Makefile | ||
| meson8b.c | ||
| meson8b.h | ||