Andrey Grodzovsky 1dc904974e drm/amd/display: Per stream validate_context build v2. ... Until now new context would start as empty, then populated with exsisting pipes + new. Now we start with duplication of existing context and then add/delete from the context pipes as needed. This allows to do a per stream resource population, start discarding dc_validation_set and by this brings DC closer to to DRM. v2: Add some fixes and rebase. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2017-09-26 18:16:46 -04:00
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hw	drm/amd/display: move vm registers to hwsequencer	2017-09-26 18:16:44 -04:00
bw_fixed.h	drm/amd/dc: Add dc display driver (v2)	2017-09-26 17:01:32 -04:00
clock_source.h	drm/amd/display: add display write back(DWB)	2017-09-26 18:16:36 -04:00
compressor.h	drm/amd/display: Initial prototype of FBC implementation	2017-09-26 18:15:56 -04:00
core_status.h	drm/amd/display: Continue with stream enable if DP link training fails.	2017-09-26 18:06:58 -04:00
core_types.h	drm/amd/display: Per stream validate_context build v2.	2017-09-26 18:16:46 -04:00
custom_float.h	drm/amd/display: Enable regamma 25 segments and use double buffer.	2017-09-26 17:14:18 -04:00
dc_link_ddc.h	drm/amd/display: Roll core_link into dc_link	2017-09-26 18:15:36 -04:00
dc_link_dp.h	drm/amd/display: Rename dc_stream to dc_stream_state	2017-09-26 18:16:04 -04:00
dce_calcs.h	drm/amd/display: Flattening core_dc to dc	2017-09-26 18:16:40 -04:00
dcn_calcs.h	drm/amd/display: Flattening core_dc to dc	2017-09-26 18:16:40 -04:00
hw_sequencer.h	drm/amd/display: Flattening core_dc to dc	2017-09-26 18:16:40 -04:00
link_hwss.h	drm/amd/display: Roll core_link into dc_link	2017-09-26 18:15:36 -04:00
reg_helper.h	drm/amd/display: add line number to reg_wait timeout print	2017-09-26 18:15:11 -04:00
resource.h	drm/amd/display: Per stream validate_context build v2.	2017-09-26 18:16:46 -04:00