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a85f06badc
The "pcie_xclk" clock is not actually a clock at all, but rather a reset domain. Now that the custom Tegra module reset API has been removed, we can remove the definition of any "clocks" that existed solely to support it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com> |
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| .. | ||
| clk-audio-sync.c | ||
| clk-divider.c | ||
| clk-id.h | ||
| clk-periph-gate.c | ||
| clk-periph.c | ||
| clk-pll-out.c | ||
| clk-pll.c | ||
| clk-super.c | ||
| clk-tegra20.c | ||
| clk-tegra30.c | ||
| clk-tegra114.c | ||
| clk-tegra124.c | ||
| clk-tegra-audio.c | ||
| clk-tegra-fixed.c | ||
| clk-tegra-periph.c | ||
| clk-tegra-pmc.c | ||
| clk-tegra-super-gen4.c | ||
| clk.c | ||
| clk.h | ||
| Makefile | ||