Alex Deucher 7be89985c4 drm/amdgpu: add Green_Sardine APU flag ... Will be used for Green_Sardine which is a new APU. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-11-04 08:30:48 -05:00
..
asic_reg	drm/amdgpu: update athub interrupt harvesting handle	2020-09-22 17:37:38 -04:00
ivsrcid	drm/amdgpu: add sdma2 and sdma3 irqsrc header files for sienna_cichlid (v2)	2020-06-03 13:52:03 -04:00
amd_acpi.h
amd_pcie_helpers.h
amd_pcie.h
amd_shared.h	drm/amdgpu: add Green_Sardine APU flag	2020-11-04 08:30:48 -05:00
arct_ip_offset.h
atom-bits.h
atom-names.h
atom-types.h
atombios.h
atomfirmware.h	drm/amd/display: Read VBIOS Golden Settings Tbl	2020-08-06 16:47:13 -04:00
atomfirmwareid.h
cgs_common.h	drm/amdgpu: retire indirect mmio reg support from cgs	2020-04-09 10:43:18 -04:00
cik_structs.h
discovery.h
displayobject.h
dm_pp_interface.h
kgd_kfd_interface.h	drm next for 5.10-rc1	2020-10-15 10:46:16 -07:00
kgd_pp_interface.h	drm/amd/powerplay: add one sysfs file to support the feature to modify gfx clock on Raven/Raven2/Picasso APU.	2020-09-29 16:12:16 -04:00
navi10_enum.h
navi10_ip_offset.h
navi12_ip_offset.h
navi14_ip_offset.h
pptable.h
renoir_ip_offset.h
sienna_cichlid_ip_offset.h	drm/amdgpu: initialize IP offset for sienna_cichlid (v2)	2020-06-03 13:52:00 -04:00
soc15_hw_ip.h
soc15_ih_clientid.h	drm/amdgpu: correct SDMA3 IH clinet id for sienna_cichlid	2020-06-03 13:52:04 -04:00
v9_structs.h
v10_structs.h
vega10_enum.h
vega10_ip_offset.h
vega20_ip_offset.h
vi_structs.h