Fenghua Yu 20f0afd1fb x86/mmu: Allocate/free a PASID ... A PASID is allocated for an "mm" the first time any thread binds to an SVA-capable device and is freed from the "mm" when the SVA is unbound by the last thread. It's possible for the "mm" to have different PASID values in different binding/unbinding SVA cycles. The mm's PASID (non-zero for valid PASID or 0 for invalid PASID) is propagated to a per-thread PASID MSR for all threads within the mm through IPI, context switch, or inherited. This is done to ensure that a running thread has the right PASID in the MSR matching the mm's PASID. [ bp: s/SVM/SVA/g; massage. ] Suggested-by: Andy Lutomirski <luto@kernel.org> Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Tony Luck <tony.luck@intel.com> Link: https://lkml.kernel.org/r/1600187413-163670-10-git-send-email-fenghua.yu@intel.com		2020-09-17 20:22:15 +02:00
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api.h	x86/mmu: Allocate/free a PASID	2020-09-17 20:22:15 +02:00
internal.h	x86/mmu: Allocate/free a PASID	2020-09-17 20:22:15 +02:00
regset.h	x86: switch to ->regset_get()	2020-07-27 14:31:07 -04:00
signal.h	x86/fpu: Remove fpu->initialized usage in __fpu__restore_sig()	2019-04-09 19:27:29 +02:00
types.h	x86/fpu/xstate: Add supervisor PASID state for ENQCMD	2020-09-17 20:22:10 +02:00
xstate.h	x86/fpu/xstate: Add supervisor PASID state for ENQCMD	2020-09-17 20:22:10 +02:00