mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 08:30:52 +07:00
fcd2e0deae
Currently we are not initializing the scmi clock with discrete rates
correctly. We fetch the min_rate and max_rate value only for clocks with
ranges and ignore the ones with discrete rates. This will lead to wrong
initialization of rate range when clock supports discrete rate.
Fix this by using the first and the last rate in the sorted list of the
discrete clock rates while registering the clock.
Link: https://lore.kernel.org/r/20200709081705.46084-2-sudeep.holla@arm.com
Fixes: 6d6a1d82ea
("clk: add support for clocks provided by SCMI")
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reported-and-tested-by: Dien Pham <dien.pham.ry@renesas.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
210 lines
5.0 KiB
C
210 lines
5.0 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* System Control and Power Interface (SCMI) Protocol based clock driver
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*
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* Copyright (C) 2018 ARM Ltd.
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*/
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#include <linux/clk-provider.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/of.h>
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#include <linux/module.h>
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#include <linux/scmi_protocol.h>
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#include <asm/div64.h>
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struct scmi_clk {
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u32 id;
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struct clk_hw hw;
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const struct scmi_clock_info *info;
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const struct scmi_handle *handle;
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};
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#define to_scmi_clk(clk) container_of(clk, struct scmi_clk, hw)
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static unsigned long scmi_clk_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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int ret;
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u64 rate;
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struct scmi_clk *clk = to_scmi_clk(hw);
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ret = clk->handle->clk_ops->rate_get(clk->handle, clk->id, &rate);
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if (ret)
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return 0;
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return rate;
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}
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static long scmi_clk_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *parent_rate)
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{
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u64 fmin, fmax, ftmp;
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struct scmi_clk *clk = to_scmi_clk(hw);
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/*
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* We can't figure out what rate it will be, so just return the
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* rate back to the caller. scmi_clk_recalc_rate() will be called
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* after the rate is set and we'll know what rate the clock is
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* running at then.
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*/
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if (clk->info->rate_discrete)
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return rate;
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fmin = clk->info->range.min_rate;
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fmax = clk->info->range.max_rate;
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if (rate <= fmin)
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return fmin;
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else if (rate >= fmax)
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return fmax;
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ftmp = rate - fmin;
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ftmp += clk->info->range.step_size - 1; /* to round up */
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do_div(ftmp, clk->info->range.step_size);
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return ftmp * clk->info->range.step_size + fmin;
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}
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static int scmi_clk_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct scmi_clk *clk = to_scmi_clk(hw);
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return clk->handle->clk_ops->rate_set(clk->handle, clk->id, rate);
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}
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static int scmi_clk_enable(struct clk_hw *hw)
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{
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struct scmi_clk *clk = to_scmi_clk(hw);
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return clk->handle->clk_ops->enable(clk->handle, clk->id);
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}
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static void scmi_clk_disable(struct clk_hw *hw)
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{
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struct scmi_clk *clk = to_scmi_clk(hw);
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clk->handle->clk_ops->disable(clk->handle, clk->id);
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}
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static const struct clk_ops scmi_clk_ops = {
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.recalc_rate = scmi_clk_recalc_rate,
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.round_rate = scmi_clk_round_rate,
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.set_rate = scmi_clk_set_rate,
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/*
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* We can't provide enable/disable callback as we can't perform the same
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* in atomic context. Since the clock framework provides standard API
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* clk_prepare_enable that helps cases using clk_enable in non-atomic
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* context, it should be fine providing prepare/unprepare.
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*/
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.prepare = scmi_clk_enable,
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.unprepare = scmi_clk_disable,
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};
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static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk)
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{
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int ret;
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unsigned long min_rate, max_rate;
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struct clk_init_data init = {
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.flags = CLK_GET_RATE_NOCACHE,
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.num_parents = 0,
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.ops = &scmi_clk_ops,
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.name = sclk->info->name,
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};
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sclk->hw.init = &init;
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ret = devm_clk_hw_register(dev, &sclk->hw);
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if (ret)
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return ret;
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if (sclk->info->rate_discrete) {
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int num_rates = sclk->info->list.num_rates;
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if (num_rates <= 0)
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return -EINVAL;
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min_rate = sclk->info->list.rates[0];
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max_rate = sclk->info->list.rates[num_rates - 1];
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} else {
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min_rate = sclk->info->range.min_rate;
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max_rate = sclk->info->range.max_rate;
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}
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clk_hw_set_rate_range(&sclk->hw, min_rate, max_rate);
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return ret;
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}
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static int scmi_clocks_probe(struct scmi_device *sdev)
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{
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int idx, count, err;
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struct clk_hw **hws;
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struct clk_hw_onecell_data *clk_data;
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struct device *dev = &sdev->dev;
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struct device_node *np = dev->of_node;
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const struct scmi_handle *handle = sdev->handle;
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if (!handle || !handle->clk_ops)
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return -ENODEV;
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count = handle->clk_ops->count_get(handle);
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if (count < 0) {
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dev_err(dev, "%pOFn: invalid clock output count\n", np);
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return -EINVAL;
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}
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clk_data = devm_kzalloc(dev, struct_size(clk_data, hws, count),
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GFP_KERNEL);
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if (!clk_data)
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return -ENOMEM;
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clk_data->num = count;
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hws = clk_data->hws;
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for (idx = 0; idx < count; idx++) {
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struct scmi_clk *sclk;
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sclk = devm_kzalloc(dev, sizeof(*sclk), GFP_KERNEL);
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if (!sclk)
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return -ENOMEM;
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sclk->info = handle->clk_ops->info_get(handle, idx);
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if (!sclk->info) {
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dev_dbg(dev, "invalid clock info for idx %d\n", idx);
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continue;
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}
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sclk->id = idx;
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sclk->handle = handle;
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err = scmi_clk_ops_init(dev, sclk);
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if (err) {
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dev_err(dev, "failed to register clock %d\n", idx);
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devm_kfree(dev, sclk);
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hws[idx] = NULL;
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} else {
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dev_dbg(dev, "Registered clock:%s\n", sclk->info->name);
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hws[idx] = &sclk->hw;
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}
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}
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return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
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clk_data);
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}
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static const struct scmi_device_id scmi_id_table[] = {
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{ SCMI_PROTOCOL_CLOCK, "clocks" },
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{ },
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};
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MODULE_DEVICE_TABLE(scmi, scmi_id_table);
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static struct scmi_driver scmi_clocks_driver = {
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.name = "scmi-clocks",
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.probe = scmi_clocks_probe,
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.id_table = scmi_id_table,
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};
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module_scmi_driver(scmi_clocks_driver);
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MODULE_AUTHOR("Sudeep Holla <sudeep.holla@arm.com>");
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MODULE_DESCRIPTION("ARM SCMI clock driver");
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MODULE_LICENSE("GPL v2");
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