Marek Szyprowski 0212a0483b clk: samsung: Keep top BPLL mux on Exynos542x enabled ... BPLL clock must not be disabled because it is needed for proper DRAM operation. This is normally handled by respective memory devfreq driver, but when that driver is not yet probed or its probe has been deferred the clock might get disabled what causes board hang. Fix this by calling clk_prepare_enable() directly from the clock provider driver. Cc: stable@vger.kernel.org Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Tested-by: Lukasz Luba <lukasz.luba@arm.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200807133143.22748-1-m.szyprowski@samsung.com Fixes: 6e7674c3c6 ("memory: Add DMC driver for Exynos5422") Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>		2020-09-15 13:56:51 +02:00
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actions	clk: actions: Add Actions S500 SoC Reset Management Unit support	2020-07-21 01:50:47 -07:00
analogbits	treewide: Add SPDX license identifier - Makefile/Kconfig	2019-05-21 10:50:46 +02:00
at91	clk: at91: sama7g5: add clock support for sama7g5	2020-07-24 02:19:09 -07:00
axis	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
axs10x	clk: axs10x: use devm_platform_ioremap_resource() to simplify code	2019-10-16 16:17:50 -07:00
baikal-t1	clk: baikal-t1: remove redundant assignment to variable 'divider'	2020-06-09 13:45:37 -07:00
bcm	Merge branches 'clk-actions', 'clk-rockchip', 'clk-iproc', 'clk-intel' and 'clk-debugfs' into clk-next	2020-08-03 15:06:53 -07:00
berlin	treewide: Add SPDX license identifier - Makefile/Kconfig	2019-05-21 10:50:46 +02:00
davinci	clk: davinci: Use fallthrough pseudo-keyword	2020-07-27 15:21:31 -07:00
h8300	treewide: Add SPDX license identifier - Makefile/Kconfig	2019-05-21 10:50:46 +02:00
hisilicon	Merge branches 'clk-hisi', 'clk-amlogic', 'clk-samsung', 'clk-renesas' and 'clk-imx' into clk-next	2019-11-27 08:14:17 -08:00
imgtec	treewide: replace '---help---' in Kconfig files with 'help'	2020-06-14 01:57:21 +09:00
imx	Merge branches 'clk-fallthru', 'clk-ingenic', 'clk-tegra', 'clk-sirf' and 'clk-qoriq' into clk-next	2020-08-03 15:07:08 -07:00
ingenic	clk: X1000: Add support for calculat REFCLK of USB PHY.	2020-07-27 18:18:14 -07:00
keystone	Replace HTTP links with HTTPS ones: Common CLK framework	2020-07-10 17:15:34 -07:00
loongson1	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
mediatek	treewide: replace '---help---' in Kconfig files with 'help'	2020-06-14 01:57:21 +09:00
meson	Merge branches 'clk-https', 'clk-renesas', 'clk-kconfig', 'clk-amlogic' and 'clk-imx' into clk-next	2020-08-03 15:06:45 -07:00
microchip	clk: let init callback return an error code	2019-12-23 18:53:13 -08:00
mmp	clk: mmp: avoid missing prototype warning	2020-07-29 12:52:40 -07:00
mvebu	clk: mvebu: ARMADA_AP_CPU_CLK needs to select ARMADA_AP_CP_HELPER	2020-07-11 09:07:06 -07:00
mxs	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 159	2019-05-30 11:26:37 -07:00
nxp	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 159	2019-05-30 11:26:37 -07:00
pistachio	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 422	2019-06-05 17:37:15 +02:00
pxa	clk: pxa: fix one of the pxa RTC clocks	2019-11-13 15:01:17 -08:00
qcom	clk: qcom: gcc-sdm660: Fix up gcc_mss_mnoc_bimc_axi_clk	2020-07-27 15:16:39 -07:00
renesas	clk: renesas: cpg-mssr: Add r8a774e1 support	2020-07-13 10:36:33 +02:00
rockchip	clk: rockchip: add sclk_mac_lbtest to rk3188_critical_clocks	2020-07-22 20:05:19 +02:00
samsung	clk: samsung: Keep top BPLL mux on Exynos542x enabled	2020-09-15 13:56:51 +02:00
sifive	clk: sifive: allocate sufficient memory for struct __prci_data	2020-06-25 15:04:13 -07:00
sirf	clk: clk-atlas6: fix return value check in atlas6_clk_init()	2020-07-27 18:22:26 -07:00
socfpga	clk: socfpga: agilex: mpu_l2ram_clk should be mpu_ccu_clk	2020-06-19 19:27:33 -07:00
spear	clk: spear: Remove uninitialized_var() usage	2020-07-16 12:32:26 -07:00
sprd	This time around we have 4 lines of diff in the core framework, removing a	2020-06-10 11:42:19 -07:00
st	clk: st: Remove uninitialized_var() usage	2020-07-16 12:32:25 -07:00
sunxi	clk: sunxi: Fix incorrect usage of round_down()	2020-04-14 09:21:05 +02:00
sunxi-ng	clk: sunxi-ng: sun8i-de2: Sort structures	2020-02-12 19:01:16 +01:00
tegra	clk: tegra: pll: Improve PLLM enable-state detection	2020-07-27 18:21:17 -07:00
ti	treewide: replace '---help---' in Kconfig files with 'help'	2020-06-14 01:57:21 +09:00
uniphier	clk: uniphier: Add SCSSI clock gate for each channel	2020-01-04 23:14:22 -08:00
ux500	clk: ux500: Fix up the SGA clock for some variants	2020-01-04 23:27:15 -08:00
versatile	Replace HTTP links with HTTPS ones: Common CLK framework	2020-07-10 17:15:34 -07:00
x86	More ACPI updates for 5.9-rc1	2020-08-15 08:18:22 -07:00
zte	clk: zx296718: Don't reference clk_init_data after registration	2019-08-16 10:20:15 -07:00
zynq	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 401	2019-06-05 17:37:13 +02:00
zynqmp	This time around we have 4 lines of diff in the core framework, removing a	2020-06-10 11:42:19 -07:00
clk-asm9260.c	clk: asm9260: fix __clk_hw_register_fixed_rate_with_accuracy typo	2020-04-13 12:20:06 -07:00
clk-aspeed.c	clk: aspeed: Add RMII RCLK gates for both AST2500 MACs	2019-11-26 10:02:48 -08:00
clk-aspeed.h	clk: aspeed: Move structures to header	2019-09-06 15:17:02 -07:00
clk-ast2600.c	clk: AST2600: Add mux for EMMC clock	2020-07-11 09:15:33 -07:00
clk-axi-clkgen.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 177	2019-05-30 11:29:19 -07:00
clk-axm5516.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
clk-bd718x7.c	clk: bd718x7: Support ROHM BD71828 clk block	2020-01-24 07:22:47 +00:00
clk-bm1880.c	clk: bm1800: Remove set but not used variable 'fref'	2019-12-24 00:10:33 -08:00
clk-bulk.c	clk: Make clk_bulk_get_all() return a valid "id"	2019-09-17 13:26:31 -07:00
clk-cdce706.c	Replace HTTP links with HTTPS ones: Common CLK framework	2020-07-10 17:15:34 -07:00
clk-cdce925.c	clk: clk-cdce925: Add regulator support	2019-09-06 10:31:16 -07:00
clk-clps711x.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-composite.c	clk: composite: add _register_composite_pdata() variants	2020-01-28 13:26:48 -08:00
clk-conf.c	clk: Tag clk core files with SPDX	2018-12-11 09:57:47 -08:00
clk-cs2000-cp.c
clk-devres.c	clk: Add devm_clk_bulk_get_optional() function	2019-06-25 14:28:01 -07:00
clk-divider.c	clk: divider: Add support for specifying parents via DT/pointers	2020-01-07 23:08:02 -08:00
clk-efm32gg.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
clk-fixed-factor.c	Merge branch 'clk-parent-rewrite-1' into clk-next	2019-05-07 11:46:13 -07:00
clk-fixed-mmio.c	clk: Remove io.h from clk-provider.h	2019-05-15 13:21:37 -07:00
clk-fixed-rate.c	clk: fixed-rate: Add clk flags for parent accuracy	2020-01-06 23:07:34 -08:00
clk-fractional-divider.c	clk: Remove io.h from clk-provider.h	2019-05-15 13:21:37 -07:00
clk-fsl-sai.c	clk: fsl-sai: new driver	2020-01-28 13:26:48 -08:00
clk-gate.c	treewide: Remove uninitialized_var() usage	2020-07-16 12:35:15 -07:00
clk-gemini.c
clk-gpio.c	Replace HTTP links with HTTPS ones: Common CLK framework	2020-07-10 17:15:34 -07:00
clk-hi655x.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288	2019-06-05 17:36:37 +02:00
clk-highbank.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201	2019-05-30 11:29:52 -07:00
clk-hsdk-pll.c	CLK: HSDK: CGU: add support for 148.5MHz clock	2020-05-28 21:06:39 -07:00
clk-lochnagar.c	clk: lochnagar: Don't reference clk_init_data after registration	2019-08-16 10:20:07 -07:00
clk-max9485.c
clk-max77686.c	clk: clk-max77686: Clean clkdev lookup leak and use devm	2019-02-06 10:35:03 -08:00
clk-milbeaut.c	clk: milbeaut: Don't reference clk_init_data after registration	2019-08-16 10:20:15 -07:00
clk-moxart.c
clk-multiplier.c	clk: Remove io.h from clk-provider.h	2019-05-15 13:21:37 -07:00
clk-mux.c	clk: mux: Add support for specifying parents via DT/pointers	2020-01-06 23:10:05 -08:00
clk-nomadik.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 194	2019-05-30 11:29:22 -07:00
clk-npcm7xx.c
clk-nspire.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
clk-oxnas.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201	2019-05-30 11:29:52 -07:00
clk-palmas.c
clk-plldig.c	clk: ls1028a: fix a dereference of pointer 'parent' before a null check	2020-02-03 23:03:49 -08:00
clk-pwm.c	clk: pwm: Use 64-bit division function	2020-06-17 20:42:10 +02:00
clk-qoriq.c	clk: qoriq: add LS1021A core pll mux options	2020-07-27 18:25:17 -07:00
clk-rk808.c	- Core Frameworks	2019-07-15 20:18:40 -07:00
clk-s2mps11.c
clk-scmi.c	clk: scmi: Fix min and max rate when registering clocks with discrete rates	2020-07-13 09:40:21 +01:00
clk-scpi.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201	2019-05-30 11:29:52 -07:00
clk-si514.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157	2019-05-30 11:26:37 -07:00
clk-si544.c	clk: clk-si544: Implement small frequency change support	2019-06-27 13:45:38 -07:00
clk-si570.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157	2019-05-30 11:26:37 -07:00
clk-si5341.c	clk: clk-si5341: Add support for the Si5345 series	2020-05-28 21:00:51 -07:00
clk-si5351.c	Replace HTTP links with HTTPS ones: Common CLK framework	2020-07-10 17:15:34 -07:00
clk-si5351.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-sparx5.c	clk: sparx5: Add Sparx5 SoC DPLL clock driver	2020-07-28 18:17:56 -07:00
clk-stm32f4.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201	2019-05-30 11:29:52 -07:00
clk-stm32h7.c
clk-stm32mp1.c	clk: stm32mp1: Add ddrperfm clock	2019-04-29 11:13:23 -07:00
clk-tango4.c
clk-twl6040.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 336	2019-06-05 17:37:07 +02:00
clk-u300.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 194	2019-05-30 11:29:22 -07:00
clk-versaclock5.c	clk: vc5: use a dedicated struct to describe the output drivers	2020-07-23 15:34:21 -07:00
clk-vt8500.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282	2019-06-05 17:36:37 +02:00
clk-wm831x.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-xgene.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 156	2019-05-30 11:26:35 -07:00
clk.c	Merge branches 'clk-microchip', 'clk-mmp', 'clk-unused' and 'clk-at91' into clk-next	2020-08-03 15:07:18 -07:00
clk.h	clk: consoldiate the __clk_get_hw() declarations	2019-07-12 11:00:14 -07:00
clkdev.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
Kconfig	clk: hsdk: Fix bad dependency on IOMEM	2020-08-03 13:52:48 -07:00
Makefile	clk: sparx5: Add Sparx5 SoC DPLL clock driver	2020-07-28 18:17:56 -07:00