Commit Graph

917541 Commits

Author SHA1 Message Date
Evan Quan
7a1105bd65 drm/amd/powerplay: drop unnecessary wrappers
These APIs are used in amdgpu_smu.c only. Thus these wrappers
are unnecessary.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:18 -04:00
Evan Quan
1fdfe8cacb drm/amd/powerplay: drop dead vce powergate code
This was for Vega20. However Vega20 support is
already dropped from current swSMU.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:18 -04:00
Evan Quan
7951e7c036 drm/amd/powerplay: add error messages on some critical paths
Helpful for error diagnostic.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:18 -04:00
Evan Quan
55084d7f40 drm/amd/powerplay: forbid to use pr_err/warn/info/debug
Use dev_err/warn/info/dbg instead. They are more MGPU friendly.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:18 -04:00
Evan Quan
d9811cfc0e drm/amd/powerplay: use MGPU friendly err/warn/info/dbg messages
Use dev_err/warn/info/dbg instead of pr_err/warn/info/debug.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:18 -04:00
Prike.Liang
207f0f1357 drm/amdgpu/soc15: fix nullptr issue in soc15_read_register() for reg base accessing
The failed case is no SDMA1 IP for Renoir discovery table while in accessing SDMA1 reg base,
thus need have nullptr test for soc15_read_register invoked in MMR addres space inquire opt.

Signed-off-by: Prike.Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:18 -04:00
Dan Carpenter
d00c3d045c drm/amd/display: Fix indenting in dcn30_set_output_transfer_func()
These lines are a part of the if statement and they are supposed to
be indented one more tab.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:18 -04:00
Denis Efremov
1e814d630f drm/amd/display: Use kfree() to free rgb_user in calculate_user_regamma_ramp()
Use kfree() instead of kvfree() to free rgb_user in
calculate_user_regamma_ramp() because the memory is allocated with
kcalloc().

Signed-off-by: Denis Efremov <efremov@linux.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:17 -04:00
Denis Efremov
8425400759 drm/amd/display: Use kvfree() to free coeff in build_regamma()
Use kvfree() instead of kfree() to free coeff in build_regamma()
because the memory is allocated with kvzalloc().

Fixes: e752058b86 ("drm/amd/display: Optimize gamma calculations")
Cc: stable@vger.kernel.org
Signed-off-by: Denis Efremov <efremov@linux.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:17 -04:00
Alex Deucher
b7221f2b46 drm/amdgpu: skip BAR resizing if the bios already did it
No need to do it again.

Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:17 -04:00
Evan Quan
df06583d1d drm/amd/powerplay: use the same interval as PMFW on retrieving metrics table
Current 100ms interval makes no sense. User gets outdated
data due to this.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:17 -04:00
Evan Quan
8c68625429 drm/amd/powerplay: update how to use metrics table on Sienna Cichlid
Retrieve only those data interested instead of the whole table.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:17 -04:00
Evan Quan
cf24dd2780 drm/amd/powerplay: update how to use metrics table on Navi10
Retrieve only those data interested instead of the whole table.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:17 -04:00
Evan Quan
482191262e drm/amd/powerplay: update how to use metrics table on Arcturus
Retrieve only those interested metrics data instead of the whole
metrics table. By this, the memory copy can be dropped.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:17 -04:00
Flora Cui
e8f141f587 drm/amd/display: drop duplicated .dsc_pg_control for dcn30
There're 2 .dsc_pg_control, drop the first one.
	.dsc_pg_control = NULL,
	.dsc_pg_control = dcn20_dsc_pg_control,

Signed-off-by: Flora Cui <flora.cui@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:17 -04:00
Flora Cui
cf9f579c85 drm/amd/display: drop duplicated structure
struct gpu_info_voltage_scaling_v1_0 & gpu_info_soc_bounding_box_v1_0 is
defined in amdgpu_socbb.h

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:17 -04:00
Likun Gao
df770a0147 drm/amd/powerplay: update driver if file for sienna_cichlid
Update sienna_cichlid driver if header file to match pptable changes.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:17 -04:00
Likun Gao
e05acd78b8 drm/amd/powerplay: update powerplay table for sienna_cichlid
Update powerplay table for sienna_cichlid, add set_thermal_range and
get_max_power_limit function for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:17 -04:00
Likun Gao
6fe0c7676b drm/amd/powerplay: add smu v11_0_7 pptable
Add smu_v11_0_7_pptable.h for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:17 -04:00
Likun Gao
947c127b26 drm/amd/powerplay: move powerplay table operation out of smu_v11_0.c
move smu_v11_0_get_max_power_limit and smu_v11_0_set_thermal_range
function from smu_v11_0.c to asic specific _ppt.c to avoid powerplay
table conflict with different ASIC with smu11.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:17 -04:00
Stanley.Yang
5278a159cf drm/amdgpu: support reserve bad page for virt (v3)
v1: rename some functions name, only init ras error handler data for
    supported asic.

v2: fix potential memory leak.

Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:17 -04:00
Evan Quan
6961750f12 drm/amd/powerplay: use work queue to perform throttling logging
As IO operations(access to SMU internals) and possible sleep are
involved in throttling logging. Workqueue can handle them well.
Otherwise we may hit "scheduling while atomic" error.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:17 -04:00
Evan Quan
9b1a6a581e drm/amd/powerplay: skip BACO feature on DPMs disablement
Instead of disabling and reenabling it later.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:17 -04:00
Evan Quan
6f47116e57 drm/amd/powerplay: add firmware cleanup on sw_fini
To avoid possible memory leak.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:17 -04:00
Evan Quan
aaddad1f64 drm/amd/powerplay: move amdgpu_irq_src to the smu structure allocation
Rather than allocating it dynamically at runtime considering it is only
several bytes in size.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:17 -04:00
Evan Quan
e6f1eb4cbf drm/amd/powerplay: maximize code sharing between .hw_fini and .suspend
Thus redundant code can be dropped.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:17 -04:00
Evan Quan
a35a10d975 drm/amd/powerplay: better namings
And some minor changes as dropping unused parameter and label
internal used API as static.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:16 -04:00
Evan Quan
613e51df0b drm/amd/powerplay: sort those operations performed in hw setup
Those common operations(for all ASICs) are placed first and followed
by ASIC specific ones. While the display related are placed at the last.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:16 -04:00
Evan Quan
26ef32518a drm/amd/powerplay: maximize code sharing between .hw_init and .resume
Then redundant code can be dropped.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:16 -04:00
Evan Quan
4e8cb0c011 drm/amd/powerplay: move those operations not needed for resume out
Since smu_smc_table_hw_init() is needed for both .hw_init and .resume.
By doing this, we can drop unnecessary operations on resume.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:16 -04:00
Evan Quan
02cf91c113 drm/amd/powerplay: postpone operations not required for hw setup to late_init
So that we do not need to perform those unnecessary operations again on
resume.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:16 -04:00
Evan Quan
792f80d192 drm/amd/powerplay: clean up the overdrive settings
Eliminate the buffer allocation and drop the unnecessary
overdrive table uploading.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:16 -04:00
Evan Quan
4a13b4cefc drm/amd/powerplay: clean up the APIs for pptable setup
Combine and simplify the logics for setup pptable.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:16 -04:00
Evan Quan
12ea344941 drm/amd/powerplay: clean up the APIs for bootup clocks
Combine and simplify the logics for retrieving bootup
clocks.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:16 -04:00
Evan Quan
78eb4a3615 drm/amd/powerplay: centralize all buffer allocation in sw_init phase
To fit common design. And this can simplify the buffer deallocation.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:16 -04:00
Evan Quan
61555ccbf9 drm/amd/powerplay: implement a common API for dpms disablement
So that code can be shared between .hw_fini and .suspend.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:16 -04:00
Evan Quan
2f55c26443 drm/amd/powerplay: drop unused APIs and unnecessary checks
Minor code cleanups.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:16 -04:00
Evan Quan
3115734125 drm/amd/powerplay: eliminate asic type check
The macros check if the asic has the callback.
So no need to explicitly check.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:16 -04:00
Colin Ian King
5402eb5ee5 drm/amd/display: fix spelling mistake: "propogation" -> "propagation"
There is a spelling mistake in a dml_print message. Fix it.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:16 -04:00
Alex Deucher
3a3a720eb3 drm/amdgpu/display: use blanked rather than plane state for sync groups
We may end up with no planes set yet, depending on the ordering, but we
should have the proper blanking state which is either handled by either
DPG or TG depending on the hardware generation.  Check both to determine
the proper blanked state.

Bug: https://gitlab.freedesktop.org/drm/amd/issues/781
Fixes: 5fc0cbfad4 ("drm/amd/display: determine if a pipe is synced by plane state")
Cc: nicholas.kazlauskas@amd.com
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:16 -04:00
Nicholas Kazlauskas
4ec6c0a208 drm/amd/display: Revalidate bandwidth before commiting DC updates
[Why]
Whenever we switch between tiled formats without also switching pixel
formats or doing anything else that recreates the DC plane state we
can run into underflow or hangs since we're not updating the
DML parameters before committing to the hardware.

[How]
If the update type is FULL then call validate_bandwidth again to update
the DML parmeters before committing the state.

This is basically just a workaround and protective measure against
update types being added DC where we could run into this issue in
the future.

We can only fully validate the state in advance before applying it to
the hardware if we recreate all the plane and stream states since
we can't modify what's currently in use.

The next step is to update DM to ensure that we're creating the plane
and stream states for whatever could potentially be a full update in
DC to pre-emptively recreate the state for DC global validation.

The workaround can stay until this has been fixed in DM.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:16 -04:00
Alex Deucher
730c2eb977 drm/amdgpu/fence: use the no_scheduler flag
Rather than checking the ring type manually.  We already set
this for MES and KIQ (and a few other special cases).

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:16 -04:00
Alex Deucher
eb0b5d6fdb Revert "drm/[radeon|amdgpu]: Replace one-element array and use struct_size() helper"
This reverts commit 4541ea81ed.

This changes structs used by the hardware and breaks dpm on some cards.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:16 -04:00
Nicholas Kazlauskas
f86c9b8b56 drm/amd/display: Only actually breakpoint if DEBUG_KERNEL_DC is enabled
To match previous behavior and to not hang the kernel if someone
accidentally builds with KGDB enabled.

Fixes: 1aad707819 ("drm/amd/display: Make BREAK_TO_DEBUGGER() a debug print")

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:16 -04:00
Huang Rui
da483dd1d8 drm/amd/powerplay: use existed smu_dpm_set* interfaces to implement powergate functions
Abstract powergate_vcn/jpeg functions, using smu_dpm_set* to implement it.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:16 -04:00
Tianci.Yin
cc375d8c52 drm/amdgpu: temporarily read bounding box from gpu_info fw for navi12
The bounding box is still needed by Navi12, temporarily read it from gpu_info
firmware. Should be droped when DAL no longer needs it.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:15 -04:00
Bhawanpreet Lakha
96134346bb drm/amd/display: Add DCN3 to Kconfig
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:15 -04:00
Bhawanpreet Lakha
e77165bf7b drm/amd/display: Add DCN3 blocks to Makefile
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:15 -04:00
Alex Deucher
cb8bcc9825 drm/amdgpu/display: fix build without CONFIG_DRM_AMD_DC_DCN3_0
Need to guard some new DCN3.0 stuff.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:15 -04:00
Dmytro Laktyushkin
f0bfa78b0f drm/amd/display: fix and simplify pipe split logic for DCN3
This was done already done for other DCN blocks.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:15 -04:00