Conflicts:
drivers/mmc/host/sdhci-esdhc-imx.c
drivers/net/ethernet/freescale/fec.c
drivers/spi/spi-imx.c
drivers/tty/serial/imx.c
This resolves dependencies between the pinctrl and clock changes
in imx.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch updates following configuration:
- Update MTD specific configurations
- Enables JFFS2 FS support
- Updates 6xx defconfig, with recent changes done by Arnd in 6xx Kconfig
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Stefan Roese <sr@denx.de>
SPEAr SoCs used its own clock framework since now. From now on they will move to
use common clock framework.
This patch updates existing SPEAr machine support to adapt for common clock
framework.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
With common clock framework, it is must to call clk_{un}prepare() before/after
clk_{dis}enable. This patch fixes this for SPEAr timer.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
All SPEAr SoC's contain GPT Synthesizers. Their Fout is derived from
following equations:
Fout= Fin/((2 ^ (N+1)) * (M+1))
This patch adds in support for this type of clock.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
All SPEAr SoC's contain Fractional Synthesizers. Their Fout is derived from
following equations:
Fout = Fin / (2 * div) (division factor)
div is 17 bits:-
0-13 (fractional part)
14-16 (integer part)
div is (16-14 bits).(13-0 bits) (in binary)
Fout = Fin/(2 * div)
Fout = ((Fin / 10000)/(2 * div)) * 10000
Fout = (2^14 * (Fin / 10000)/(2^14 * (2 * div))) * 10000
Fout = (((Fin / 10000) << 14)/(2 * (div << 14))) * 10000
div << 14 is simply 17 bit value written at register.
This patch adds in support for this type of clock.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
All SPEAr SoC's contain Auxiliary Synthesizers. Their Fout is derived based on
values of eq, x and y.
Fout from synthesizer can be given from two equations:
Fout1 = (Fin * X/Y)/2 EQ1
Fout2 = Fin * X/Y EQ2
This patch adds in support for this type of clock.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
All SPEAr SoC's contain PLLs. Their Fout is derived based on following equations
- In normal mode
vco = (2 * M[15:8] * Fin)/N
- In Dithered mode
vco = (2 * M[15:0] * Fin)/(256 * N)
pll_rate = vco/2^p
vco and pll are very closely bound to each other,
"vco needs to program: mode, m & n" and "pll needs to program p",
both share common enable/disable logic and registers.
This patch adds in support for this type of clock.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
All SPEAr SoC's use ST's Timer module. This patch adds device tree probing
capability for that.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The spear/pinctrl branch has hard dependencies on both the
pinctrl branch and the clkdev branch. We merge those here
to fix it up without having to rebase a branch that has
been pulled into other stable branches already.
Conflicts:
Documentation/driver-model/devres.txt
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: netdev@vger.kernel.org
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Acked-by: David S. Miller <davem@davemloft.net>
Shawn Guo <shawn.guo@linaro.org> writes:
mxs common clk porting for v3.5. It depends on the following two branches.
[1] git://git.linaro.org/people/mturquette/linux.git clk-next
[2] http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-arm.git clkdev
As the mxs device tree conversion will constantly touch clock files,
to save the conflicts, the updated mxs/dt branch coming later will
based on this pull-request.
* 'clk/mxs' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: mxs: remove now unused timer_clk argument from mxs_timer_init
ARM: mxs: remove old clock support
ARM: mxs: switch to common clk framework
ARM: mxs: change the lookup name for fec phy clock
ARM: mxs: request clock for timer
clk: mxs: add clock support for imx28
clk: mxs: add clock support for imx23
clk: mxs: add mxs specific clocks
Includes an update to Linux 3.4-rc6
Conflicts:
drivers/clk/Makefile
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'imx-common-clk' of git://git.pengutronix.de/git/imx/linux-2.6 into next/clock
Sascha Hauer <s.hauer@pengutronix.de> writes:
ARM i.MX common clock framework support
Same as with Shawns series this one depends on:
git://git.linaro.org/people/mturquette/linux.git clk-next
http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-arm.git clkdev
* tag 'imx-common-clk' of git://git.pengutronix.de/git/imx/linux-2.6: (34 commits)
ARM i.MX: remove now unused clock files
ARM: i.MX6: implement clocks using common clock framework
ARM i.MX35: implement clocks using common clock framework
ARM i.MX5: implement clocks using common clock framework
ARM i.MX31: implement clocks using common clock framework
ARM i.MX27: implement clocks using common clock framework
ARM i.MX21: implement clocks using common clock framework
ARM i.MX1: implement clocks using common clock framework
ARM i.MX25: implement clocks using common clock framework
ARM: imx: add common clock support for clk busy
ARM: imx: add common clock support for pfd
ARM i.MX: Add common clock support for 2bit gate
ARM: imx: add common clock support for pllv3
ARM i.MX: Add common clock support for pllv2
ARM i.MX: Add common clock support for pllv1
ARM i.MX: prepare for common clock framework
ARM i.MX3: Make ccm base address a variable
ARM i.MX timer: request correct clock
ARM i.MX5: prepare gpc_dvfs_clk
rtc: imx dryice: Add missing clk_prepare
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Mike Turquette <mturquette@ti.com> has asked me to take the clock
changes through the arm-soc tree while there are still so many
inderdependencies, so this is the entire branch.
* depends/clk/clk-next: (30 commits)
clk: add a fixed factor clock
clk: mux: assign init data
clk: remove COMMON_CLK_DISABLE_UNUSED
clk: prevent spurious parent rate propagation
MAINTAINERS: add entry for common clk framework
clk: clk_set_rate() must fail if CLK_SET_RATE_GATE is set and clk is enabled
clk: Use a separate struct for holding init data.
clk: constify parent name arrays in macros
clk: remove trailing whitespace from clk.h
clk: select CLKDEV_LOOKUP for COMMON_CLK
clk: Don't set clk->new_rate twice
clk: clk-private: Add DEFINE_CLK macro
clk: clk-gate: Create clk_gate_endisable()
clk: Fix typo in comment
clk: propagate round_rate for CLK_SET_RATE_PARENT case
clk: pass parent_rate into .set_rate
clk: always pass parent_rate into .round_rate
clk: basic: improve parent_names & return errors
clk: core: copy parent_names & return error codes
clk: Constify parent name arrays
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This removes a repeated word and a repeated and incomplete line from two
pinctrl headers.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch also adds the SPDIF baud clock mux and dividers.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Having fixed factors/dividers in hardware is a common pattern, so
add a basic clock type doing this. It basically describes a fixed
factor clock using a nominator and a denominator.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Viresh Kumar <viresh.kumar@st.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
[mturquette@linaro.org: constify parent_names in static init macro]
[mturquette@linaro.org: copy/paste bug from mux in static init macro]
[mturquette@linaro.org: fix error handling in clk_register_fixed_factor]
[mturquette@linaro.org: improve division accuracy; thanks to Saravana]
Signed-off-by: Mike Turquette <mturquette@linaro.org>
The original conversion to struct clk_hw_init failed to add the pointer
assignment in clk_register_mux.
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Reported-by: Sascha Hauer <s.hauer@pengutronix.de>
Exposing this option generates confusion and incorrect behavior for
single-image builds across platforms. Enable this behavior permanently.
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Saravana Kannan <skannan@codeaurora.org>
Patch 'clk: always pass parent_rate into .round_rate' made a subtle
change to the semantics of .round_rate. It is now expected for the
parent's rate to always be passed in, simplifying the implemenation of
various .round_rate callback definitions.
However the patch also introduced a bug in clk_calc_new_rates whereby a
clock without the CLK_SET_RATE_PARENT flag set could still propagate a
rate change up to a parent clock if the the .round_rate callback
modified the &best_parent_rate value in any way.
This patch fixes the issue at the framework level (in
clk_calc_new_rates) by specifically handling the case where the
CLK_SET_RATE_PARENT flag is not set.
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
With old mxs clock support removed, the timer_clk argument of
mxs_timer_init is unused now, so remove it.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The mxs clock has been switched to common clock framework, so the old
clock support can be removed now.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
When mxs_timer_init() does not have a timer_clk passed in, it should
try to request clock from clkdev system.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
