Commit Graph

603675 Commits

Author SHA1 Message Date
Arindam Nath
fb065ce7d3 drm/amd/amdgpu: make sure VCE is disabled by default
With the current code, when we boot with the amdgpu
driver enabled and loaded, the VCE also automatically
remains enabled since bootup. This can be verified from
the output of amdgpu_pm_info. It does not matter whether
we boot into command line directly or into X, the VCE
stays enabled the entire time.

This patch addresses the issue and makes sure that
VCE is turned on only during playback, and remains
disaled otherwise.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Arindam Nath <arindam.nath@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:47 -04:00
Alex Deucher
93dcc37d2c drm/amdgpu: disable compute pipeline sync workaround when using fixed fw
No need to stall the pipe when we are using firmware with the
fix.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:46 -04:00
Nicolai Hähnle
9de06de80e drm/amdgpu/gfx8: set USER_SHADER_ARRAY_CONFIG based on disable_cu parameter
v2: do not overwrite register when bitmap is zero

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:46 -04:00
Nicolai Hähnle
324c614a81 drm/amdgpu/gfx7: set USER_SHADER_ARRAY_CONFIG based on disable_cu parameter
v2: do not overwrite register when bitmap is zero

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:45 -04:00
Nicolai Hähnle
6f8941a230 drm/amdgpu: add disable_cu parameter
This parameter will allow disabling individual CUs on module load, e.g.
amdgpu.disable_cu=2.0.3,2.0.4 to disable CUs 3 and 4 of SE2.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:44 -04:00
Chunming Zhou
8b2ac10320 drm/amdgpu: evict vram when gpu reset
On workstation cards with ECC vram, the entirety of vram is cleared to 0
on asic init to set the ECC status correctly.  On non ECC boards, I don't
think they do any explicit clearing, but the vram controller is reset
which may cause issues with the data there.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:44 -04:00
Chunming Zhou
0875dc9e80 drm/amdgpu: block scheduler when gpu reset
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:43 -04:00
Arnd Bergmann
eafc9c2704 amdgpu: use NULL instead of 0 for pointer
In the AMD powerplay driver, a pointer is checked for validity by
comparing against an integer '0', which causes a harmless warning
when building with "make W=1":

drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/processpptables.c:1502:16: error: ordered comparison of pointer with integer zero [-Werror=extra]

This changes the code to the more conventional "if (pointer)" check.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:43 -04:00
Christian König
ce64bc25ef drm/amdgpu: pipeline evictions as well
This boosts Xonotic from 38fps to 47fps when artificially limiting VRAM to
256MB for testing. It should improve all CPU bound rendering situations
where we have a lot of swapping to/from VRAM.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:42 -04:00
Christian König
281d144ddd drm/amdgpu: save the PD addr before scheduling the job
When we pipeline evictions the page directory could already be
moving somewhere else when grab_id is called.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:41 -04:00
Christian König
3ddf4ad917 drm/ttm: add the infrastructure for pipelined evictions
Free up the memory immediately, remember the last eviction for each domain and
make new allocations depend on the last eviction to be completed.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:41 -04:00
Christian König
f849c6d652 drm/ttm: simplify ttm_bo_wait
As far as I can see no need for a custom implementation any more.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:40 -04:00
Christian König
5bc730677b drm/ttm: remove TTM_BO_PRIV_FLAG_MOVING
Instead of using the flag just remember the fence of the last move operation.

This avoids waiting for command submissions pipelined after the move, but
before accessing the BO with the CPU again.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:40 -04:00
Christian König
74561cd4f1 drm/ttm: remove no_gpu_wait param from ttm_bo_move_accel_cleanup
It isn't used and not waiting for the GPU after scheduling a move is
actually quite dangerous.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:39 -04:00
Christian König
99c44632d4 drm/amdgpu: remove pre move wait
Not needed any more.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:38 -04:00
Christian König
3cabaa54e7 drm/amdgpu: sync to buffer moves before VM updates
Otherwise we could update the VM page tables while the move is only scheduled.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:38 -04:00
Christian König
61ede07055 drm/ttm: wait for BO idle after the move in ttm_bo_swapout
Final part to avoid pre move waits.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:37 -04:00
Christian König
17d33bc9d6 drm/ttm: drop waiting for idle in ttm_bo_evict.
That is unnecessary now.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:36 -04:00
Christian König
a6f76dcd02 drm/ttm: drop wait for idle in ttm_bo_move_buffer
That is unnecessary now.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:36 -04:00
Christian König
77dfc28bad drm/ttm: wait for BO idle in ttm_bo_move_memcpy
When we want to pipeline accelerated moves we need to wait in the fallback path.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:35 -04:00
Christian König
88932a7be2 drm/ttm: add wait for idle in all drivers bo_move functions
Wait for idle before moving the BO in all drivers implementing
an accelerated move function.

This should keep the current behavior when removing the pre move wait.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:35 -04:00
Christian König
1888577807 drm/ttm: remove dummy bo_move implementations
It's pointless to only call the default implementation.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:34 -04:00
Christian König
4279cb1423 drm/ttm: remove NULL checks when calling ttm_tt_destroy
The function is a no-op with a NULL pointer.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:33 -04:00
Christian König
089f16c55b drm/ttm: cleanup ttm_tt_(unbind|destroy)
ttm_tt_destroy should be the only one unbinding the object.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:33 -04:00
Eric Huang
14b3307429 drm/amdgpu: some improvement in parsing inputs
It changes the way to skip newline character and also avoids
warning message from some compiler.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:32 -04:00
Eric Huang
0a81a87c98 drm/amd/powerplay: remove useless soft pptable in Asic related backend
The soft pptable was used for re-uploading pptable as cache, but since
previous commits, the generic codes for uploading pptable are used and
backend is released during resetting powerplay. So it becomes redundance.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:09 -04:00
Eric Huang
e8c1fe9f50 drm/amd/powerplay: remove useless pp_table codes for Tonga/Fiji/Polaris10
Due to uploading pptable implementation changed, the generic codes in
previous commit have been used intead of the Asic specific codes.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:38 -04:00
Eric Huang
4dcf9e6f2e drm/amd/powerplay: add uploading pptable and resetting powerplay support
Necessary for re-initializing dpm with new pptables at runtime.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:38 -04:00
Eric Huang
76ad42c192 drm/amd/powerplay: change backend allocation to backend init
backend_init and backend_fini are paired functions, backend is freed
in backend_fini and should be allocated in backend_init.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:37 -04:00
Eric Huang
c27371b879 drm/amd/powerplay: add disable dpm tasks for Polaris10
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:37 -04:00
Eric Huang
57461af73f drm/amd/powerplay: add disable dpm tasks for Tonga
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:36 -04:00
Eric Huang
55d74fc921 drm/amd/powerplay: add function disable_dpm_tasks for Fiji
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:35 -04:00
Eric Huang
80597521e6 drm/amd/powerplay: add event task of disable dynamic state management
Add an interface to disable dpm so that we can disable dpm before
updating pptables at runtime.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:35 -04:00
Eric Huang
cf17039f48 drm/amd/powerplay: keep soft_pp_table pointer value for re-uploading
Necessary for updating pptables at runtime.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:34 -04:00
Huang Rui
50ab2533d2 drm/amdgpu: introduce a firmware debugfs to dump all current firmware versions
This patch implements the debugfs to dump all currect firmware
version:

root@jenkins-All-Series:/home/jenkins# cat /sys/kernel/debug/dri/0/amdgpu_firmware_info
VCE feature version: 0, firmware version: 0x34040300
UVD feature version: 0, firmware version: 0x01451000
MC feature version: 0, firmware version: 0x00000000
ME feature version: 37, firmware version: 0x00000093
PFP feature version: 37, firmware version: 0x000000da
CE feature version: 37, firmware version: 0x00000080
RLC feature version: 1, firmware version: 0x0000010e
MEC feature version: 37, firmware version: 0x0000029e
MEC2 feature version: 37, firmware version: 0x0000029e
SMC feature version: 0, firmware version: 0x013353e6
SDMA0 feature version: 31, firmware version: 0x00000036
SDMA1 feature version: 0, firmware version: 0x00000036

Suggested-by: Alex Deucher <Alexander.Deucher@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:33 -04:00
Huang Rui
000cab9a61 drm/amdgpu: factor out the AMDGPU_INFO_FW_VERSION case branch into amdgpu_firmware_info
The new amdgpu_firmware_info function will be used on amdgpu firmware
version debugfs.

Suggested-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:33 -04:00
Nicolai Hähnle
8db6f83bef drm/amdgpu: remove cgs_acpi_method_argument member method_length
It was redundant with data_length, and in fact set incorrectly in one case
leading to an out-of-bound read by memcpy in acpi_ut_copy_esimple_to_isimple,
reported by CONFIG_KASAN=y.

Signed-off-by: Nicolai Hähnle <Nicolai.Haehnle@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:32 -04:00
Eric Huang
840dd4c605 drm/amd/powerplay: set UVD clocks bypass mode for Polaris10
Saves power when not in use.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:32 -04:00
Christian König
a8bd3e1c71 drm/amdgpu: stop trying to schedule() with a spin held
Drop the lock before calling cancel_delayed_work_sync().

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96445

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Tested-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:31 -04:00
Alex Deucher
e70a15f556 drm/radeon/cik: fix CP jump table size
Align to the jump table offset. May fix hangs on some
asics with GFX PG enabled.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:30 -04:00
Alex Deucher
b58bc5598a drm/amdgpu/gfx7: fix CP jump table size
Align to the jump table offset.  May fix hangs on some
asics with GFX PG enabled.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:30 -04:00
Alex Deucher
07cf1a0b95 drm/amdgpu/gfx8: fix CP jump table size
Align to the jump table offset. Fixes hangs on some
systems with GFX PG enabled.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:29 -04:00
David Mao
15da301d88 drm/amd/amdgpu : adding new tracepoints to track memory information.
- adding amdgpu_cs_bo_status to track total size and
   total entry count of bo for each submission.
 - adding amdgpu_ttm_bo_move to track the bo eviction
   including the size of bo and the location before/after the move

Signed-off-by: David Mao <David.Mao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:29 -04:00
David Mao
42ffb5822b drm/amd/amdgpu : Refine tracepoints to track more information
- adding memory type, prefered heap, allowed heap, and host visible
   information to the amdgpu_bo_create tracepoint.
 - adding bo size to the amdgpu_bo_list_set tracepoint.

Signed-off-by: David Mao <David.Mao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:28 -04:00
Tom St Denis
f78c34221b drm/amdgpu/uvd6: De-numberify startup
To make the code more legible various numerical constants
have been changed to their #define'ed MASKs.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:27 -04:00
Alex Xie
2171849768 drm/amdgpu: Initialize the variables in a straight-forward way
Initialize the variable in a straight-forward way instead of
hiding the initialization inside the loop. This can also
reduce one function call.

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:27 -04:00
Alex Xie
3a6f8e0c72 drm/amdgpu: Add comment to describe the purpose of one difficult if statement
Use == instead of != in the if statement to make code easier understood

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:26 -04:00
Alex Xie
677131a16d drm/amdgpu: Change some variable names to make code easier understood
Add comment to describe some variables otherwise.

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:26 -04:00
Chunming Zhou
b314f9a997 drm/amdgpu: enable BUS master after pci reset
Re-enable bus mastering after GPU reset. We disable it
at the top of these functions, so balance them by
re-enabling it.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
eviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:25 -04:00
Chunming Zhou
89a3182737 drm/amdgpu: add return value for pci config reset
So we know whether or not the reset succeeded.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:24 -04:00