Commit Graph

639 Commits

Author SHA1 Message Date
Peter Ujfalusi
6710ea7a02 ARM: edma: Remove num_cc member from struct edma
The struct edma is allocated per CC bases so the member num_cc does not make
any sense. One CC is one CC, it does not have sub CCs.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2014-05-22 14:26:43 +05:30
Peter Ujfalusi
c3dd3389db ARM: edma: Do not change TC -> Queue mapping, leave it to default.
There is no need to change the default TC -> Queue mapping. By default the
mapping is: TC0 -> Q0, TC1 -> Q1, etc.
Changing this has no benefits at all and all the board files are just setting
the same mapping back to the HW.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2014-05-22 10:47:46 +05:30
Peter Ujfalusi
cf4afc3d2b ARM: edma: Take the number of tc from edma_soc_info (pdata)
Instead of saving the for loop length, take the num_tc value from the pdata.
In case of DT boot set the n_tc to 3 as it is hardwired in edma_of_parse_dt()
This is a temporary state since upcoming patch(es) will change how we are
dealing with these parameters.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2014-05-22 10:47:46 +05:30
Peter Ujfalusi
89df4bed0f ARM: edma: No need to clean the pdata in edma_of_parse_dt()
The pdata has been just allocated with devm_kzalloc() in
edma_setup_info_from_dt() and passed to this function.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2014-05-22 10:47:45 +05:30
Peter Ujfalusi
4416176728 ARM: edma: Clean up and simplify the code around irq request
Get the two interrupt line number at the same time by merging the two
instance of if(node){}else{} places.
replace the &pdev->dev with the already existing dev which makes it possible
to collapse lines with devm_request_irq()

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2014-05-22 10:29:27 +05:30
Linus Torvalds
200d963bf4 ARM: SoC fixes for 3.15-rc
Seems like we've had more fixes than usual this release cycle, but
 there's nothing in particular that we're doing differently. Perhaps it's
 just one of those cycles where more people are finding more regressions
 (and/or that the latency of when people actually test what's been in
 the tree for a while is catching up so that we get the bug reports now).
 
 The bigger changes here are are for TI and Marvell platforms:
 * Timing changes for GPMC (generic localbus) on OMAP causing some largeish
   DTS deltas.
 * Fixes to window allocation on PCI for mvebu touching drivers/ stuff. Patches
   have acks from subsystem maintainers where needed.
 * A fix from Thomas for a botched DT conversion in drivers/edma.
 
 There's a handful of other fixes for the above platforms as well as sunxi,
 at91, i.MX. I also included a MAINTAINER update for Broadcom, and a trivial
 move of a binding doc.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "Seems like we've had more fixes than usual this release cycle, but
  there's nothing in particular that we're doing differently.  Perhaps
  it's just one of those cycles where more people are finding more
  regressions (and/or that the latency of when people actually test
  what's been in the tree for a while is catching up so that we get the
  bug reports now).

  The bigger changes here are are for TI and Marvell platforms:
   * Timing changes for GPMC (generic localbus) on OMAP causing some
     largeish DTS deltas.
   * Fixes to window allocation on PCI for mvebu touching drivers/
     stuff.  Patches have acks from subsystem maintainers where needed.
   * A fix from Thomas for a botched DT conversion in drivers/edma.

  There's a handful of other fixes for the above platforms as well as
  sunxi, at91, i.MX.  I also included a MAINTAINER update for Broadcom,
  and a trivial move of a binding doc.

  I know you said you'd be offline this week, but I might as well post
  it for when you return.  :)"

I'm not quite offline yet.  Doing a few pulls in the last hour before my
internet goes away..

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (31 commits)
  MAINTAINERS: update Broadcom ARM tree location and add an SoC family
  ARM: dts: i.MX53: Fix ipu register space size
  ARM: dts: kirkwood: fix mislocated pcie-controller nodes
  ARM: sunxi: Enable GMAC in sunxi_defconfig
  ARM: common: edma: Fix xbar mapping
  ARM: sun7i: Fix i2c4 base address
  ARM: Kirkwood: T5325: Fix double probe of Codec
  ARM: mvebu: enable the SATA interface on Armada 375 DB
  ARM: mvebu: specify I2C bus frequency on Armada 370 DB
  ARM: mvebu: use qsgmii phy-mode for Armada XP GP interfaces
  ARM: mvebu: fix NOR bus-width in Armada XP OpenBlocks AX3 Device Tree
  ARM: mvebu: fix NOR bus-width in Armada XP DB Device Tree
  ARM: mvebu: fix NOR bus-width in Armada XP GP Device Tree
  ARM: dts: AM3517: Disable absent IPs inherited from OMAP3
  ARM: dts: OMAP2: Fix interrupts for OMAP2420 mailbox
  ARM: dts: OMAP5: Add mailbox dt node to fix boot warning
  ARM: OMAP5: Switch to THUMB mode if needed on secondary CPU
  ARM: dts: am437x-gp-evm: Do not reset gpio5
  ARM: dts: omap3-igep0020: use SMSC9221 timings
  PCI: mvebu: split PCIe BARs into multiple MBus windows when needed
  ...
2014-05-13 11:07:02 +09:00
Thomas Gleixner
cdae05a0f0 dmaengine: edma: Make reading the position of active channels work
As Joel pointed out, edma_read_position() uses memcpy_fromio() to read
the parameter ram. That's not synchronized with the internal update as
it does a byte by byte copy. We need to do a 32bit read to get a
consistent value.

Further reading destination and source is pointless. In DEV_TO_MEM
transfers we are only interested in the destination, in MEM_TO_DEV we
care about the source. In MEM_TO_MEM it really does not matter which
one you read.

Simple solution: Remove the pointers, select dest/source via a bool
and return the read value.

Remove the export of this function while at it. The only potential
user is the dmaengine and that's always builtin.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-30 10:34:39 +05:30
Thomas Gleixner
cf7eb97911 ARM: common: edma: Fix xbar mapping
This is another great example of trainwreck engineering:

commit 2646a0e529 (ARM: edma: Add EDMA crossbar event mux support)
added support for using EDMA on peripherals which have no direct EDMA
event mapping.

The code compiles and does not explode in your face, but that's it.

1) Reading an u16 array from an u32 device tree array simply does not
   work. Even if the function is named "edma_of_read_u32_to_s16_array".

   It merily calls of_property_read_u16_array. So the resulting 16bit
   array will have every other entry = 0.

2) The DT entry for the xbar registers related to xbar has length 0x10
   instead of the real length: 0xfd0 - 0xf90 = 0x40.

   Not a real problem as it does not cross a page boundary, but
   wrong nevertheless.

3) But none of this matters as the mapping never happens:

   After reading nonsense edma_of_read_u32_to_s16_array() invalidates
   the first array entry pair, so nobody can ever notice the
   braindamage by immediate explosion.

Seems the QA criteria for this code was solely not to explode when
someone adds edma-xbar-event-map entries to the DT. Goal achieved,
congratulations!

Not really helpful if someone wants to use edma on a device which
requires a xbar mapping.

Fix the issues by:

- annotating the device tree entry with "/bits/ 16" as documented in
  the of_property_read_u16_array kernel doc

- make the size of the xbar register mapping correct

- invalidating the end of the array and not the start

This convoluted mess wants to be completely rewritten as there is no
point to keep the xbar_chan array memory and the iomapping of the xbar
regs around forever. Marking the xbar mapped channels as used should
be done right there.

But that's a different issue and this patch is small enough to make it
work and allows a simple backport for stable.

Cc: stable@vger.kernel.org # v3.12+
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2014-04-29 19:33:49 +05:30
Nicolas Pitre
4530e4b6a4 ARM: 8032/1: bL_switcher: fix validation check before its activation
The switcher should not depend on MAX_CLUSTER to determine ifit should
be activated or not. In a multiplatform kernel binary it is possible to
have dual-cluster and quad-cluster platforms configured in. In that case
MAX_CLUSTER which is a build time limit should be 4 and that shouldn't
prevent the switcher from working if the kernel is booted on a b.L
dual-cluster system.

In bL_switcher_halve_cpus() we already have a runtime validation check
to make sure we're dealing with only two clusters, so booting on a quad
cluster system will be caught and switcher activation aborted.

However, the b.L switcher must ensure the MCPM layer is initialized on
the booted hardware before doing anything.  The mcpm_is_available()
function is added to that effect.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Abhilash Kesavan <kesavan.abhilash@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-04-22 22:23:59 +01:00
Peter Ujfalusi
232b223d82 dmaengine: edma: Set DMA_CYCLIC capability flag
Indicate that the edma dmaengine driver has support for cyclic mode.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Joel Fernandes <joelf@ti.com>
Reviewed-and-Tested-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-22 21:35:39 +05:30
Peter Ujfalusi
7cf2af90cd arm: common: edma: Save the number of event queues/TCs
For later use save the number of queues available for the CC.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Joel Fernandes <joelf@ti.com>
Reviewed-and-Tested-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-22 21:35:13 +05:30
Linus Torvalds
cbda94e039 ARM: SoC: driver changes
These changes are mostly for ARM specific device drivers that either
 don't have an upstream maintainer, or that had the maintainer ask
 us to pick up the changes to avoid conflicts. A large chunk of this
 are clock drivers (bcm281xx, exynos, versatile, shmobile), aside from
 that, reset controllers for STi as well as a large rework of the
 Marvell Orion/EBU watchdog driver are notable.
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Merge tag 'drivers-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver changes from Arnd Bergmann:
 "These changes are mostly for ARM specific device drivers that either
  don't have an upstream maintainer, or that had the maintainer ask us
  to pick up the changes to avoid conflicts.

  A large chunk of this are clock drivers (bcm281xx, exynos, versatile,
  shmobile), aside from that, reset controllers for STi as well as a
  large rework of the Marvell Orion/EBU watchdog driver are notable"

* tag 'drivers-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (99 commits)
  Revert "dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac."
  Revert "net: stmmac: Add SOCFPGA glue driver"
  ARM: shmobile: r8a7791: Fix SCIFA3-5 clocks
  ARM: STi: Add reset controller support to mach-sti Kconfig
  drivers: reset: stih416: add softreset controller
  drivers: reset: stih415: add softreset controller
  drivers: reset: Reset controller driver for STiH416
  drivers: reset: Reset controller driver for STiH415
  drivers: reset: STi SoC system configuration reset controller support
  dts: socfpga: Add sysmgr node so the gmac can use to reference
  dts: socfpga: Add support for SD/MMC on the SOCFPGA platform
  reset: Add optional resets and stubs
  ARM: shmobile: r7s72100: fix bus clock calculation
  Power: Reset: Generalize qnap-poweroff to work on Synology devices.
  dts: socfpga: Update clock entry to support multiple parents
  ARM: socfpga: Update socfpga_defconfig
  dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac.
  net: stmmac: Add SOCFPGA glue driver
  watchdog: orion_wdt: Use %pa to print 'phys_addr_t'
  drivers: cci: Export CCI PMU revision
  ...
2014-04-05 15:37:40 -07:00
Russell King
95959e6a06 Merge branches 'amba', 'fixes', 'misc', 'mmci', 'unstable/omap-dma' and 'unstable/sa11x0' into for-next 2014-04-04 00:33:32 +01:00
Alexander Shiyan
1ef2bf8227 ARM: 8006/1: Remove redundant code
Statements following return will never be executed.
This patch removes this code.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-03-19 20:19:01 +00:00
Dave Martin
ea36d2ab1a ARM: 7962/2: Make all mcpm functions notrace
The functions in mcpm_entry.c are mostly intended for use during
scary cache and coherency disabling sequences, or do other things
which confuse trace ... like powering a CPU down and not
returning. Similarly for the backend code.

For simplicity, this patch just makes whole files notrace.
There should be more than enough traceable points on the paths to
these functions, but we can be more fine-grained later if there is
a need for it.

Jon Medhurst:
Also added spc.o to the list of files as it contains functions used by
MCPM code which have comments comments like: "might be used in code
paths where normal cacheable locks are not working"

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-02-18 19:39:33 +00:00
Linus Walleij
9cf3138059 ARM: SP804: make Integrator/CP timer pick clock from DT
This modifies the SP804 driver so that the clock will be taken
from the device tree node for the timer.

Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Rob Herring <rob.herring@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-13 11:20:36 +01:00
Linus Torvalds
dfd10e7ae6 ARM: SoC platform changes for 3.14
New core SoC-specific changes.
 
 New platforms:
 * Introduction of a vendor, Hisilicon, and one of their SoCs with some
   random numerical product name.
 * Introduction of EFM32, embedded platform from Silicon Labs (ARMv7m, i.e. !MMU).
 * Marvell Berlin series of SoCs, which include the one in Chromecast.
 * MOXA platform support, ARM9-based platform used mostly in industrial products
 * Support for Freescale's i.MX50 SoC.
 
 Other work:
 * Renesas work for new platforms and drivers, and conversion over to
   more multiplatform-friendly device registration schemes.
 * SMP support for Allwinner sunxi platforms.
 * ... plus a bunch of other stuff across various platforms.
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Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform changes from Olof Johansson:
 "New core SoC-specific changes.

  New platforms:
   * Introduction of a vendor, Hisilicon, and one of their SoCs with
     some random numerical product name.
   * Introduction of EFM32, embedded platform from Silicon Labs (ARMv7m,
     i.e. !MMU).
   * Marvell Berlin series of SoCs, which include the one in Chromecast.
   * MOXA platform support, ARM9-based platform used mostly in
     industrial products
   * Support for Freescale's i.MX50 SoC.

  Other work:
   * Renesas work for new platforms and drivers, and conversion over to
     more multiplatform-friendly device registration schemes.
   * SMP support for Allwinner sunxi platforms.
   * ... plus a bunch of other stuff across various platforms"

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (201 commits)
  ARM: tegra: fix tegra_powergate_sequence_power_up() inline
  ARM: msm_defconfig: Update for multi-platform
  ARM: msm: Move MSM's DT based hardware to multi-platform support
  ARM: msm: Only build timer.c if required
  ARM: msm: Only build clock.c on proc_comm based platforms
  ARM: ux500: Enable system suspend with WFI support
  ARM: ux500: turn on PRINTK_TIME in u8500_defconfig
  ARM: shmobile: r8a7790: Fix I2C controller names
  ARM: msm: Simplify ARCH_MSM_DT config
  ARM: msm: Add support for MSM8974 SoC
  ARM: sunxi: select ARM_PSCI
  MAINTAINERS: Update Allwinner sunXi maintainer files
  ARM: sunxi: Select RESET_CONTROLLER
  ARM: imx: improve the comment of CCM lpm SW workaround
  ARM: imx: improve status check of clock gate
  ARM: imx: add necessary interface for pfd
  ARM: imx_v6_v7_defconfig: Select CONFIG_REGULATOR_PFUZE100
  ARM: imx_v6_v7_defconfig: Select MX35 and MX50 device tree support
  ARM: imx: Add cpu frequency scaling support
  ARM i.MX35: Add devicetree support.
  ...
2014-01-23 18:40:49 -08:00
Linus Torvalds
f341535193 Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull ARM updates from Russell King:
 "In this set, we have:
   - Refactoring of some of the old StrongARM-1100 GPIO code to make
     things simpler by Dmitry Eremin-Solenikov
   - Read-only and non-executable support for modules on ARM from Laura
     Abbot
   - Removal of unnecessary set_drvdata() calls in AMBA code
   - Some non-executable support for kernel lowmem mappings at the 1MB
     section granularity, and dumping of kernel page tables via debugfs
   - Some improvements for the timer/clock code on Footbridge platforms,
     and cleanup some of the LED code there
   - Fix fls/ffs() signatures to match x86 to prevent build warnings,
     particularly where these are used with min/max() macros
   - Avoid using the bootmem allocator on ARM (patches from Santosh
     Shilimkar)
   - Various asid/unaligned access updates from Will Deacon"

* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (51 commits)
  ARM: SMP implementations are not supposed to return from smp_ops.cpu_die()
  ARM: ignore memory below PHYS_OFFSET
  Fix select-induced Kconfig warning for ZBOOT_ROM
  ARM: fix ffs/fls implementations to match x86
  ARM: 7935/1: sa1100: collie: add gpio-keys configuration
  ARM: 7932/1: bcm: Add DEBUG_LL console support
  ARM: 7929/1: Remove duplicate SCHED_HRTICK config option
  ARM: 7928/1: kconfig: select HAVE_EFFICIENT_UNALIGNED_ACCESS for CPUv6+ && MMU
  ARM: 7927/1: dcache: select DCACHE_WORD_ACCESS for big-endian CPUs
  ARM: 7926/1: mm: flesh out and fix the comments in the ASID allocator
  ARM: 7925/1: mm: keep track of last ASID allocation to improve bitmap searching
  ARM: 7924/1: mm: don't bother with reserved ttbr0 when running with LPAE
  ARM: PCI: add legacy IDE IRQ implementation
  ARM: footbridge: cleanup LEDs code
  ARM: pgd allocation: retry on failure
  ARM: footbridge: add one-shot mode for DC21285 timer
  ARM: footbridge: add sched_clock implementation
  ARM: 7922/1: l2x0: add Marvell Tauros3 support
  ARM: 7877/1: use built-in byte swap function
  ARM: 7921/1: mcpm: remove redundant dsb instructions prior to sev
  ...
2014-01-23 18:34:03 -08:00
Will Deacon
03aa6580e3 ARM: 7921/1: mcpm: remove redundant dsb instructions prior to sev
sync_cache_w already includes a dsb, so we can just use sev() directly
then following a cache-sync.

Acked-by: Dave Martin <Dave.Martin@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-12-29 12:32:44 +00:00
Nicolas Pitre
efcfc46e8a ARM: 7918/1: clean up cache handling in core code
We have a handy macro to replace open coded __cpuc_flush_dcache_area(()
and outer_clean_range() sequences. Let's use it. No functional change.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-12-29 12:32:38 +00:00
Yijing Wang
9202174047 arm/PCI: Use dev_is_pci() to identify PCI devices
Use dev_is_pci() instead of checking bus type directly.

Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-12-11 16:53:18 -07:00
Kevin Hilman
b8969ef5cf Merge branch 'soc/sched_clock' into next/soc
From Stephen Boyd:
* soc/sched_clock:
  ARM: versatile: Switch to sched_clock_register()
  ARM: orion: Switch to sched_clock_register()
  ARM: OMAP: Switch to sched_clock_register()
  ARM: iop: Switch to sched_clock_register()
  ARM: u300: Switch to sched_clock_register()
  ARM: sa1100: Switch to sched_clock_register()
  ARM: pxa: Switch to sched_clock_register()
  ARM: OMAP2+: Switch to sched_clock_register()
  ARM: OMAP1: Switch to sched_clock_register()
  ARM: msm: Switch to sched_clock_register()
  ARM: mmp: Switch to sched_clock_register()
  ARM: IXP4xx: Switch to sched_clock_register()
  ARM: integrator: Switch to sched_clock_register()
  ARM: imx: Switch to sched_clock_register()
  ARM: davinci: Switch to sched_clock_register()
  ARM: clps711x: Switch to sched_clock_register()
  ARM: timer-sp: Switch to sched_clock_register()

Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-12-06 08:05:55 -08:00
Stephen Boyd
9b12f3a86a ARM: timer-sp: Switch to sched_clock_register()
The 32 bit sched_clock interface now supports 64 bits. Upgrade to
the 64 bit function to allow us to remove the 32 bit registration
interface. Also mark the read function notrace since we're here
and failure to do so would cause ftrace to break.

Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-11-21 15:40:59 -08:00
Linus Torvalds
e6d69a60b7 Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dma
Pull slave-dmaengine changes from Vinod Koul:
 "This brings for slave dmaengine:

   - Change dma notification flag to DMA_COMPLETE from DMA_SUCCESS as
     dmaengine can only transfer and not verify validaty of dma
     transfers

   - Bunch of fixes across drivers:

      - cppi41 driver fixes from Daniel

      - 8 channel freescale dma engine support and updated bindings from
        Hongbo

      - msx-dma fixes and cleanup by Markus

   - DMAengine updates from Dan:

      - Bartlomiej and Dan finalized a rework of the dma address unmap
        implementation.

      - In the course of testing 1/ a collection of enhancements to
        dmatest fell out.  Notably basic performance statistics, and
        fixed / enhanced test control through new module parameters
        'run', 'wait', 'noverify', and 'verbose'.  Thanks to Andriy and
        Linus [Walleij] for their review.

      - Testing the raid related corner cases of 1/ triggered bugs in
        the recently added 16-source operation support in the ioatdma
        driver.

      - Some minor fixes / cleanups to mv_xor and ioatdma"

* 'next' of git://git.infradead.org/users/vkoul/slave-dma: (99 commits)
  dma: mv_xor: Fix mis-usage of mmio 'base' and 'high_base' registers
  dma: mv_xor: Remove unneeded NULL address check
  ioat: fix ioat3_irq_reinit
  ioat: kill msix_single_vector support
  raid6test: add new corner case for ioatdma driver
  ioatdma: clean up sed pool kmem_cache
  ioatdma: fix selection of 16 vs 8 source path
  ioatdma: fix sed pool selection
  ioatdma: Fix bug in selftest after removal of DMA_MEMSET.
  dmatest: verbose mode
  dmatest: convert to dmaengine_unmap_data
  dmatest: add a 'wait' parameter
  dmatest: add basic performance metrics
  dmatest: add support for skipping verification and random data setup
  dmatest: use pseudo random numbers
  dmatest: support xor-only, or pq-only channels in tests
  dmatest: restore ability to start test at module load and init
  dmatest: cleanup redundant "dmatest: " prefixes
  dmatest: replace stored results mechanism, with uniform messages
  Revert "dmatest: append verify result to results"
  ...
2013-11-20 13:20:24 -08:00
Linus Torvalds
f47671e2d8 Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM updates from Russell King:
 "Included in this series are:

   1. BE8 (modern big endian) changes for ARM from Ben Dooks
   2. big.Little support from Nicolas Pitre and Dave Martin
   3. support for LPAE systems with all system memory above 4GB
   4. Perf updates from Will Deacon
   5. Additional prefetching and other performance improvements from Will.
   6. Neon-optimised AES implementation fro Ard.
   7. A number of smaller fixes scattered around the place.

  There is a rather horrid merge conflict in tools/perf - I was never
  notified of the conflict because it originally occurred between Will's
  tree and other stuff.  Consequently I have a resolution which Will
  forwarded me, which I'll forward on immediately after sending this
  mail.

  The other notable thing is I'm expecting some build breakage in the
  crypto stuff on ARM only with Ard's AES patches.  These were merged
  into a stable git branch which others had already pulled, so there's
  little I can do about this.  The problem is caused because these
  patches have a dependency on some code in the crypto git tree - I
  tried requesting a branch I can pull to resolve these, and all I got
  each time from the crypto people was "we'll revert our patches then"
  which would only make things worse since I still don't have the
  dependent patches.  I've no idea what's going on there or how to
  resolve that, and since I can't split these patches from the rest of
  this pull request, I'm rather stuck with pushing this as-is or
  reverting Ard's patches.

  Since it should "come out in the wash" I've left them in - the only
  build problems they seem to cause at the moment are with randconfigs,
  and since it's a new feature anyway.  However, if by -rc1 the
  dependencies aren't in, I think it'd be best to revert Ard's patches"

I resolved the perf conflict roughly as per the patch sent by Russell,
but there may be some differences.  Any errors are likely mine.  Let's
see how the crypto issues work out..

* 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (110 commits)
  ARM: 7868/1: arm/arm64: remove atomic_clear_mask() in "include/asm/atomic.h"
  ARM: 7867/1: include: asm: use 'int' instead of 'unsigned long' for 'oldval' in atomic_cmpxchg().
  ARM: 7866/1: include: asm: use 'long long' instead of 'u64' within atomic.h
  ARM: 7871/1: amba: Extend number of IRQS
  ARM: 7887/1: Don't smp_cross_call() on UP devices in arch_irq_work_raise()
  ARM: 7872/1: Support arch_irq_work_raise() via self IPIs
  ARM: 7880/1: Clear the IT state independent of the Thumb-2 mode
  ARM: 7878/1: nommu: Implement dummy early_paging_init()
  ARM: 7876/1: clear Thumb-2 IT state on exception handling
  ARM: 7874/2: bL_switcher: Remove cpu_hotplug_driver_{lock,unlock}()
  ARM: footbridge: fix build warnings for netwinder
  ARM: 7873/1: vfp: clear vfp_current_hw_state for dying cpu
  ARM: fix misplaced arch_virt_to_idmap()
  ARM: 7848/1: mcpm: Implement cpu_kill() to synchronise on powerdown
  ARM: 7847/1: mcpm: Factor out logical-to-physical CPU translation
  ARM: 7869/1: remove unused XSCALE_PMU Kconfig param
  ARM: 7864/1: Handle 64-bit memory in case of 32-bit phys_addr_t
  ARM: 7863/1: Let arm_add_memory() always use 64-bit arguments
  ARM: 7862/1: pcpu: replace __get_cpu_var_uses
  ARM: 7861/1: cacheflush: consolidate single-CPU ARMv7 cache disabling code
  ...
2013-11-14 08:51:29 +09:00
Russell King
df762eccba Merge branch 'devel-stable' into for-next
Conflicts:
	arch/arm/include/asm/atomic.h
	arch/arm/include/asm/hardirq.h
	arch/arm/kernel/smp.c
2013-11-12 10:58:59 +00:00
Linus Torvalds
21604cdcdc ARM: SoC cleanups for 3.13
This branch contains code cleanups, moves and removals for 3.13.
 
 Qualcomm msm targets had a bunch of code removal for legacy non-DT
 platforms. Nomadik saw more device tree conversions and cleanup of old
 code. Tegra has some code refactoring, etc.
 
 One longish patch series from Sebastian Hasselbarth changes the init_time
 hooks and tries to use a generic implementation for most platforms,
 since they were all doing more or less the same things.
 
 Finally the "shark" platform is removed in this release. It's been
 abandoned for a while and nobody seems to care enough to keep it
 around. If someone comes along and wants to resurrect it, the removal
 can easily be reverted and code brought back.
 
 Beyond this, mostly a bunch of removals of stale content across the
 board, etc.
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Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC cleanups from Olof Johansson:
 "This branch contains code cleanups, moves and removals for 3.13.

  Qualcomm msm targets had a bunch of code removal for legacy non-DT
  platforms.  Nomadik saw more device tree conversions and cleanup of
  old code.  Tegra has some code refactoring, etc.

  One longish patch series from Sebastian Hasselbarth changes the
  init_time hooks and tries to use a generic implementation for most
  platforms, since they were all doing more or less the same things.

  Finally the "shark" platform is removed in this release.  It's been
  abandoned for a while and nobody seems to care enough to keep it
  around.  If someone comes along and wants to resurrect it, the removal
  can easily be reverted and code brought back.

  Beyond this, mostly a bunch of removals of stale content across the
  board, etc"

* tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (79 commits)
  ARM: gemini: convert to GENERIC_CLOCKEVENTS
  ARM: EXYNOS: remove CONFIG_MACH_EXYNOS[4, 5]_DT config options
  ARM: OMAP3: control: add API for setting IVA bootmode
  ARM: OMAP3: CM/control: move CM scratchpad save to CM driver
  ARM: OMAP3: McBSP: do not access CM register directly
  ARM: OMAP3: clock: add API to enable/disable autoidle for a single clock
  ARM: OMAP2: CM/PM: remove direct register accesses outside CM code
  MAINTAINERS: Add patterns for DTS files for AT91
  ARM: at91: remove init_machine() as default is suitable
  ARM: at91/dt: split sama5d3 peripheral definitions
  ARM: at91/dt: split sam9x5 peripheral definitions
  ARM: Remove temporary sched_clock.h header
  ARM: clps711x: Use linux/sched_clock.h
  MAINTAINERS: Add DTS files to patterns for Samsung platform
  ARM: EXYNOS: remove unnecessary header inclusions from exynos4/5 dt machine file
  ARM: tegra: fix ARCH_TEGRA_114_SOC select sort order
  clk: nomadik: fix missing __init on nomadik_src_init
  ARM: drop explicit selection of HAVE_CLK and CLKDEV_LOOKUP
  ARM: S3C64XX: Kill CONFIG_PLAT_S3C64XX
  ASoC: samsung: Use CONFIG_ARCH_S3C64XX to check for S3C64XX support
  ...
2013-11-11 16:42:43 +09:00
Tushar Behera
b0ced9d220 ARM: 7874/2: bL_switcher: Remove cpu_hotplug_driver_{lock,unlock}()
Commit 6dedcca610 ("hotplug, powerpc, x86: Remove
cpu_hotplug_driver_lock())" removes the the definition of
cpu_hotplug_driver_{lock,unlock} APIs, thereby causing a build error.

Replace these calls with {lock,unlock}_device_hotplug().

Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-11-07 00:14:14 +00:00
Vinod Koul
f8d9f628e1 Merge branch 'dma_complete' into next 2013-10-31 22:36:01 +05:30
Russell King
2098990e7c Merge branch 'baserock/bjdooks/312-rc4/be/core-v3' of git://git.baserock.org/delta/linux into devel-stable
Conflicts:
	arch/arm/kernel/head.S

This series has been well tested and it would be great to get this
merged now.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-10-30 22:20:26 +00:00
Vinod Koul
db60d8da8f dmanengine: fix edma driver to not define DMA_COMPLETE
edma header defines DMA_COMPLETE, this causes issues as commit adfedd9a32 move
DMA_SUCCESS to DMA_COMPLETE. edma should properly namespace its defines and
needs a future fix

Reported-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-10-30 18:27:56 +05:30
Dave Martin
0de0d64675 ARM: 7848/1: mcpm: Implement cpu_kill() to synchronise on powerdown
CPU hotplug and kexec rely on smp_ops.cpu_kill(), which is supposed
to wait for the CPU to park or power down, and perform the last
rites (such as disabling clocks etc., where the platform doesn't do
this automatically).

kexec in particular is unsafe without performing this
synchronisation to park secondaries.  Without it, the secondaries
might not be parked when kexec trashes the kernel.

There is no generic way to do this synchronisation, so a new mcpm
platform_ops method power_down_finish() is added by this patch.

The new method is mandatory.  A platform which provides no way to
detect when CPUs are parked is likely broken.

Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-10-29 11:07:15 +00:00
Dave Martin
1e5660999a ARM: 7847/1: mcpm: Factor out logical-to-physical CPU translation
This patch factors the logical-to-physical CPU translation out of
mcpm_boot_secondary(), so that it can be reused elsewhere.

Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-10-29 11:06:34 +00:00
Michael Opdenacker
728fae6f6f ARM: 7856/1: timer-sp: remove deprecated IRQF_DISABLED
This patch proposes to remove the use of the IRQF_DISABLED flag

It's a NOOP since 2.6.35 and it will be removed one day.

Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-10-29 11:06:17 +00:00
Olof Johansson
43d93947a5 Via Paul Walmsley <paul@pwsan.com>:
Move some of the OMAP2+ CM and System Control Module direct
 register accesses into CM- and System Control
 Module-specific "drivers" underneath arch/arm/mach-omap2/.  This
 is a prerequisite for moving this code out of arch/arm/mach-omap2/ into
 drivers/.
 
 Basic test logs are available here:
 
 http://www.pwsan.com/omap/testlogs/cm_scm_cleanup_a_v3.13/20131019101809/
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Merge tag 'omap-for-v3.13/cm-scm-cleanup-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup

From Paul Walmsley <paul@pwsan.com> via Tony Lindgren:

Move some of the OMAP2+ CM and System Control Module direct
register accesses into CM- and System Control
Module-specific "drivers" underneath arch/arm/mach-omap2/.  This
is a prerequisite for moving this code out of arch/arm/mach-omap2/ into
drivers/.

Basic test logs are available here:

http://www.pwsan.com/omap/testlogs/cm_scm_cleanup_a_v3.13/20131019101809/

* tag 'omap-for-v3.13/cm-scm-cleanup-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP3: control: add API for setting IVA bootmode
  ARM: OMAP3: CM/control: move CM scratchpad save to CM driver
  ARM: OMAP3: McBSP: do not access CM register directly
  ARM: OMAP3: clock: add API to enable/disable autoidle for a single clock
  ARM: OMAP2: CM/PM: remove direct register accesses outside CM code
  + Linux 3.12-rc4

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-10-28 14:39:03 -07:00
Victor Kamensky
519ceb9fd1 ARM: mcpm: fix big endian issue in mcpm startup code
In big endian mode mcpm_entry_point is first function
that called on secondaries CPU. First it should switch
CPU into big endian code.

[ben.dooks@codethink.co.uk: merge fix patch from Victor into this]
Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Dave Martin <Dave.Martin@arm.com>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
2013-10-19 20:46:36 +01:00
Linus Torvalds
d6099aeb4a Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM fixes from Russell King:
 "Some more ARM fixes, nothing particularly major here.  The biggest
  change is to fix the SMP_ON_UP code so that it works with TI's Aegis
  cores"

* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
  ARM: 7851/1: check for number of arguments in syscall_get/set_arguments()
  ARM: 7846/1: Update SMP_ON_UP code to detect A9MPCore with 1 CPU devices
  ARM: 7845/1: sharpsl_param.c: fix invalid memory access for pxa devices
  ARM: 7843/1: drop asm/types.h from generic-y
  ARM: 7842/1: MCPM: don't explode if invoked without being initialized first
2013-10-14 10:02:23 -07:00
Andrea Adami
856337283a ARM: 7845/1: sharpsl_param.c: fix invalid memory access for pxa devices
This fixes a regression for kernels after v3.2

After commit 72662e0108
ARM: head.S: only include __turn_mmu_on in the initial identity mapping

Zaurus PXA devices call sharpsl_save_param() during fixup and hang on
boot because memcpy refers to physical addresses no longer valid if the
MMU is setup.
Zaurus collie (SA1100) is unaffected (function is called in init_machine).

The code was making assumptions and for PXA the virtual address
should have been used before.

Signed-off-by: Marko Katic <dromede@gmail.com>
Signed-off-by: Andrea Adami <andrea.adami@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-10-03 10:39:43 +01:00
Nicolas Pitre
d0cdef6e87 ARM: 7842/1: MCPM: don't explode if invoked without being initialized first
Currently mcpm_cpu_power_down() and mcpm_cpu_suspend() trigger BUG()
if mcpm_platform_register() is not called beforehand.  This may occur
for many reasons such as some incomplete device tree passed to the kernel
or the like.

Let's be nicer to users and avoid killing the kernel if that happens by
logging a warning and returning to the caller.  The mcpm_cpu_suspend()
user is already set to deal with this situation, and so is cpu_die()
invoking mcpm_cpu_die().

The problematic case would have been the B.L switcher's usage of
mcpm_cpu_power_down(), however it has to call mcpm_cpu_power_up() first
which is already set to catch an error resulting from a missing
mcpm_platform_register() call.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-10-03 10:36:37 +01:00
Joel Fernandes
6cdaca481f ARM: edma: Fix clearing of unused list for DT DMA resources
HWMOD removal for MMC is breaking edma_start as the events are being manually
triggered due to unused channel list not being clear.

The above issue is fixed by reading the "dmas" property from the DT node if it
exists and clearing the bits in the unused channel list if the dma controller
used by any device is EDMA. For this purpose we use the of_* helpers to parse
the arguments in the dmas phandle list.

Also introduced is a minor clean up of a checkpatch error in old code.

Reviewed-by: Sekhar Nori <nsekhar@ti.com>
Reported-by: Balaji T K <balajitk@ti.com>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: Nishanth Menon <nm@ti.com>
Cc: Pantel Antoniou <panto@antoniou-consulting.com>
Cc: Jason Kridner <jkridner@beagleboard.org>
Cc: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-09-30 09:30:13 -07:00
Dave Martin
d08e2e0904 ARM: bL_switcher: Add query interface to discover CPU affinities
When the switcher is active, there is no straightforward way to
figure out which logical CPU a given physical CPU maps to.

This patch provides a function
bL_switcher_get_logical_index(mpidr), which is analogous to
get_logical_index().

This function returns the logical CPU on which the specified
physical CPU is grouped (or -EINVAL if unknown).
If the switcher is inactive or not present, -EUNATCH is returned instead.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Nicolas Pitre <nico@linaro.org>
2013-09-23 18:47:31 -04:00
Dave Martin
29064b8846 ARM: bL_switcher/trace: Add kernel trace trigger interface
This patch exports a bL_switcher_trace_trigger() function to
provide a means for drivers using the trace events to get the
current status when starting a trace session.

Calling this function is equivalent to pinging the trace_trigger
file in sysfs.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
2013-09-23 18:47:31 -04:00
Dave Martin
b09bbe5b12 ARM: bL_switcher/trace: Add trace trigger for trace bootstrapping
When tracing switching, an external tracer needs a way to bootstrap
its knowledge of the logical<->physical CPU mapping.

This patch adds a sysfs attribute trace_trigger.  A write to this
attribute will generate a power:cpu_migrate_current event for each
online CPU, indicating the current physical CPU for each logical
CPU.

Activating or deactivating the switcher also generates these
events, so that the tracer knows about the resulting remapping of
affected CPUs.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
2013-09-23 18:47:30 -04:00
Dave Martin
1bfbddb6f3 ARM: bL_switcher: Basic trace events support
This patch adds simple trace events to the b.L switcher code
to allow tracing of CPU migration events.

To make use of the trace events, you will need:

CONFIG_FTRACE=y
CONFIG_ENABLE_DEFAULT_TRACERS=y

The following events are added:
  * power:cpu_migrate_begin
  * power:cpu_migrate_finish

each with the following data:
    u64     timestamp;
    u32     cpu_hwid;

power:cpu_migrate_begin occurs immediately before the
switcher-specific migration operations start.
power:cpu_migrate_finish occurs immediately when migration is
completed.

The cpu_hwid field contains the ID fields of the MPIDR.

* For power:cpu_migrate_begin, cpu_hwid is the ID of the outbound
  physical CPU (equivalent to (from_phys_cpu,from_phys_cluster)).

* For power:cpu_migrate_finish, cpu_hwid is the ID of the inbound
  physical CPU (equivalent to (to_phys_cpu,to_phys_cluster)).

By design, the cpu_hwid field is masked in the same way as the
device tree cpu node reg property, allowing direct correlation to
the DT description of the hardware.

The timestamp is added in order to minimise timing noise.  An
accurate system-wide clock should be used for generating this
(hopefully getnstimeofday is appropriate, but it could be changed).
It could be any monotonic shared clock, since the aim is to allow
accurate deltas to be computed.  We don't necessarily care about
accurate synchronisation with wall clock time.

In practice, each switch takes place on a single logical CPU,
and the trace infrastructure should guarantee that events are
well-ordered with respect to a single logical CPU.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Nicolas Pitre <nico@linaro.org>
2013-09-23 18:47:29 -04:00
Nicolas Pitre
6137eba6c2 ARM: bL_switcher: wait until inbound is alive before performing a switch
In some cases, a significant delay may be observed between the moment
a request for a CPU to come up is made and the moment it is ready to
start executing kernel code.  This is especially true when a whole
cluster has to be powered up which may take in the order of miliseconds.
It is therefore a good idea to let the outbound CPU continue to execute
code in the mean time, and be notified when the inbound is ready before
performing the actual switch.

This is achieved by registering a completion block with the appropriate
IPI callback, and programming the sending of an IPI by the early assembly
code prior to entering the main kernel code.  Once the IPI is delivered
to the outbound CPU, the completion block is "completed" and the switcher
thread is resumed.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
2013-09-23 18:47:29 -04:00
Nicolas Pitre
de885d147a ARM: mcpm: add a simple poke mechanism to the early entry code
This allows to poke a predetermined value into a specific address
upon entering the early boot code in bL_head.S.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
2013-09-23 18:47:27 -04:00
Nicolas Pitre
108a9640ab ARM: bL_switcher: synchronize the outbound with the inbound
Let's wait for the inbound CPU to come up and snoop some of the outbound
CPU cache before bringing the outbound CPU down.  That should be more
efficient than going down right away.

Possible improvements might involve some monitoring of the CCI event
counters.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
2013-09-23 18:39:56 -04:00
Dave Martin
0577fee283 ARM: bL_switcher: Add switch completion callback for bL_switch_request()
There is no explicit way to know when a switch started via
bL_switch_request() is complete.  This can lead to unpredictable
behaviour when the switcher is controlled by a subsystem which
makes dynamic decisions (such as cpufreq).

The CPU PM notifier is not really suitable for signalling
completion, because the CPU could get suspended and resumed for
other, independent reasons while a switch request is in flight.
Adding a whole new notifier for this seems excessive, and may tempt
people to put heavyweight code on this path.

This patch implements a new bL_switch_request_cb() function that
allows for a per-request lightweight callback, private between the
switcher and the caller of bL_switch_request_cb().

Overlapping switches on a single CPU are considered incorrect if
they are requested via bL_switch_request_cb() with a callback (they
will lead to an unpredictable final state without explicit external
synchronisation to force the requests into a particular order).
Queuing requests robustly would be overkill because only one
subsystem should be attempting to control the switcher at any time.

Overlapping requests of this kind will be failed with -EBUSY to
indicate that the second request won't take effect and the
completer will never be called for it.

bL_switch_request() is retained as a wrapper round the new function,
with the old, fire-and-forget semantics.  In this case the last request
will always win. The request may still be denied if a previous request
with a completer is still pending.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2013-09-23 18:39:19 -04:00
Dave Martin
491990e29f ARM: bL_switcher: Add runtime control notifier
Some subsystems will need to respond synchronously to runtime
enabling and disabling of the switcher.

This patch adds a dedicated notifier interface to support such
subsystems.  Pre- and post- enable/disable notifications are sent
to registered callbacks, allowing safe transition of non-b.L-
transparent subsystems across these control transitions.

Notifier callbacks may veto switcher (de)activation on pre notifications
only.  Post notifications won't revert the action.

If enabling or disabling of the switcher fails after the pre-change
notification has been sent, subsystems which have registered
notifiers can be left in an inappropriate state.

This patch sends a suitable post-change notification on failure,
indicating that the old state has been reestablished.

For example, a failed initialisation will result in the following
sequence:

    BL_NOTIFY_PRE_ENABLE
    /* switcher initialisation fails */
    BL_NOTIFY_POST_DISABLE

It is the responsibility of notified subsystems to respond in an
appropriate way.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Nicolas Pitre <nico@linaro.org>
2013-09-23 18:39:06 -04:00
Dave Martin
c0f4375146 ARM: bL_switcher: Add synchronous enable/disable interface
Some subsystems will need to know for sure whether the switcher is
enabled or disabled during certain critical regions.

This patch provides a simple mutex-based mechanism to discover
whether the switcher is enabled and temporarily lock out further
enable/disable:

  * bL_switcher_get_enabled() returns true iff the switcher is
    enabled and temporarily inhibits enable/disable.

  * bL_switcher_put_enabled() permits enable/disable of the switcher
    again after a previous call to bL_switcher_get_enabled().

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Nicolas Pitre <nico@linaro.org>
2013-09-23 18:38:54 -04:00
Russell King
7f63037c8f Merge branch 'iks_for_rmk' of git://git.linaro.org/people/nico/linux into devel-stable
Nicolas Pitre writes:

This is the first part of the patch series adding IKS (In-Kernel
Switcher) support for big.LITTLE system architectures.  This consists of
the core patches only.  Extra patches to come later will introduce
various optimizations and tracing support.

Those patches were posted on the list a while ago here:

   http://news.gmane.org/group/gmane.linux.ports.arm.kernel/thread=253942
2013-09-17 15:14:07 +01:00
Linus Walleij
136dfa5eda ARM: delete mach-shark
The Shark machine sub-architecture (also known as DNARD, the
DIGITAL Network Appliance Reference Design) lacks a maintainer
able to apply and test patches to modernize the architecture.

It is suspected that the current kernel, while it compiles,
does not even boot on this machine. The listed maintainer has
expressed that he will not be able to spend any time on the
maintenance for the coming year.

So let's delete it from the kernel for now. It can always be
resurrected with git revert if maintenance is resumed.

As the VIA82c505 PCI adapter was only used by this
architecture, that gets deleted too.

Cc: arm@kernel.org
Cc: Alexander Schulz <alex@shark-linux.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-17 12:34:36 +02:00
Linus Torvalds
a4ae54f90e Merge branch 'timers/core' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer code update from Thomas Gleixner:
 - armada SoC clocksource overhaul with a trivial merge conflict
 - Minor improvements to various SoC clocksource drivers

* 'timers/core' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  clocksource: armada-370-xp: Add detailed clock requirements in devicetree binding
  clocksource: armada-370-xp: Get reference fixed-clock by name
  clocksource: armada-370-xp: Replace WARN_ON with BUG_ON
  clocksource: armada-370-xp: Fix device-tree binding
  clocksource: armada-370-xp: Introduce new compatibles
  clocksource: armada-370-xp: Use CLOCKSOURCE_OF_DECLARE
  clocksource: armada-370-xp: Simplify TIMER_CTRL register access
  clocksource: armada-370-xp: Use BIT()
  ARM: timer-sp: Set dynamic irq affinity
  ARM: nomadik: add dynamic irq flag to the timer
  clocksource: sh_cmt: 32-bit control register support
  clocksource: em_sti: Convert to devm_* managed helpers
2013-09-16 16:10:26 -04:00
Linus Torvalds
ec5b103ecf Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma
Pull slave-dmaengine updates from Vinod Koul:
 "This pull brings:
   - Andy's DW driver updates
   - Guennadi's sh driver updates
   - Pl08x driver fixes from Tomasz & Alban
   - Improvements to mmp_pdma by Daniel
   - TI EDMA fixes by Joel
   - New drivers:
     - Hisilicon k3dma driver
     - Renesas rcar dma driver
  - New API for publishing slave driver capablities
  - Various fixes across the subsystem by Andy, Jingoo, Sachin etc..."

* 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (94 commits)
  dma: edma: Remove limits on number of slots
  dma: edma: Leave linked to Null slot instead of DUMMY slot
  dma: edma: Find missed events and issue them
  ARM: edma: Add function to manually trigger an EDMA channel
  dma: edma: Write out and handle MAX_NR_SG at a given time
  dma: edma: Setup parameters to DMA MAX_NR_SG at a time
  dmaengine: pl330: use dma_set_max_seg_size to set the sg limit
  dmaengine: dma_slave_caps: remove sg entries
  dma: replace devm_request_and_ioremap by devm_ioremap_resource
  dma: ste_dma40: Fix potential null pointer dereference
  dma: ste_dma40: Remove duplicate const
  dma: imx-dma: Remove redundant NULL check
  dma: dmagengine: fix function names in comments
  dma: add driver for R-Car HPB-DMAC
  dma: k3dma: use devm_ioremap_resource() instead of devm_request_and_ioremap()
  dma: imx-sdma: Staticize sdma_driver_data structures
  pch_dma: Add MODULE_DEVICE_TABLE
  dmaengine: PL08x: Add cyclic transfer support
  dmaengine: PL08x: Fix reading the byte count in cctl
  dmaengine: PL08x: Add support for different maximum transfer size
  ...
2013-09-10 13:37:36 -07:00
Joel Fernandes
96874b9a24 ARM: edma: Add function to manually trigger an EDMA channel
Manual trigger for events missed as a result of splitting a
scatter gather list and DMA'ing it in batches. Add a helper
function to trigger a channel incase any such events are missed.

Signed-off-by: Joel Fernandes <joelf@ti.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-09-04 18:38:46 +05:30
Viresh Kumar
887708f0ac ARM: timer-sp: Set dynamic irq affinity
When a cpu goes to a deep idle state where its local timer is shutdown, it
notifies the time frame work to use the broadcast timer instead.

Unfortunately, the broadcast device could wake up any CPU, including an idle one
which is not concerned by the wake up at all.

This implies, in the worst case, an idle CPU will wake up to send an IPI to
another idle cpu.

This patch fixes this for ARM platforms using timer-sp, by setting
CLOCK_EVT_FEAT_DYNIRQ feature.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-08-22 00:18:53 +02:00
Will Deacon
40a5c0b415 ARM: mcpm: use -st dsb option prior to sev instructions
In a similar manner to our spinlock implementation, mcpm uses sev to
wake up cores waiting on a lock when the lock is unlocked. In order to
ensure that the final write unlocking the lock is visible, a dsb
instruction is executed immediately prior to the sev.

This patch changes these dsbs to use the -st option, since we only
require that the store unlocking the lock is made visible.

Acked-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Dave Martin <dave.martin@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2013-08-12 12:25:45 +01:00
Nicolas Pitre
b22537c682 ARM: bL_switcher: add a simple /dev user interface for debugging purposes
Only the basic call to aid debugging.

*** NOT FOR PRODUCTION ***

Usage:

	echo <cpuid>,<clusterid> > /dev/b.L_switcher

where <cpuid> is the logical CPU number, and <clusterid> is 0 for the
first cluster and 1 for the second cluster.

Signed-off-by: nicolas Pitre <nico@linaro.org>
2013-08-05 00:13:00 -04:00
Nicolas Pitre
2726143514 ARM: bL_switcher: filter CPU hotplug requests when the switcher is active
Trying to support both the switcher and CPU hotplug at the same time
is tricky due to ambiguous semantics.  So let's at least prevent users
from messing around with those logical CPUs the switcher has removed
and those which were not active when the switcher was activated.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
2013-08-05 00:12:41 -04:00
Nicolas Pitre
38c35d4f2e ARM: bL_switcher: remove assumptions between logical and physical CPUs
Up to now, the logical CPU was somehow tied to the physical CPU number
within a cluster.  This causes problems when forcing the boot CPU to be
different from the first enumerated CPU in the device tree creating a
discrepancy between logical and physical CPU numbers.

Let's make the pairing completely independent from physical CPU numbers.

Let's keep only those logical CPUs with same initial CPU cluster to create
a uniform scheduler profile without having to modify any of the probed
topology and compute capacity data.  This has the potential to create
a non contiguous CPU numbering space when the switcher is active with
potential impact on buggy user space tools.  It is however better to fix
those tools rather than making the switcher code more intrusive.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2013-08-04 15:29:13 -04:00
Nicolas Pitre
c4821c0575 ARM: bL_switcher: add kernel cmdline param to disable the switcher on boot
By adding no_bL_switcher to the kernel cmdline string, the switcher
won't be activated automatically at boot time.  It is still possible
to activate it later with:

	echo 1 > /sys/kernel/bL_switcher/active

Signed-off-by: Nicolas Pitre <nico@linaro.org>
2013-07-30 09:02:18 -04:00
Nicolas Pitre
6b7437aed1 ARM: bL_switcher: ability to enable and disable the switcher via sysfs
The /sys/kernel/bL_switcher/enable file allows to enable or disable
the switcher by writing 1 or 0 to it respectively.  It is still enabled
by default on boot.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
2013-07-30 09:02:17 -04:00
Nicolas Pitre
ed96762e32 ARM: bL_switcher: do not hardcode GIC IDs in the code
Currently, GIC IDs are hardcoded making the code dependent on the 4+4 b.L
configuration.  Let's allow for GIC IDs to be discovered upon switcher
initialization to support other b.L configurations such as the 1+1 one,
or 2+3 as on the VExpress TC2.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
2013-07-30 09:02:16 -04:00
Nicolas Pitre
9797a0e95e ARM: bL_switcher: hot-unplug half of the available CPUs
In a regular kernel configuration, all the CPUs are initially available.
But the switcher execution model uses half of them at any time.  Instead
of hacking the DTB to remove half of the CPUs, let's remove them at
run time and make sure we still have a working switcher configuration.
This way, the same DTB can be used whether or not the switcher is used.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
2013-07-30 09:02:16 -04:00
Nicolas Pitre
c052de2693 ARM: bL_switcher: simplify stack isolation
We now have a dedicated thread for each logical CPU.  That's plenty
of stack space for our needs.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
2013-07-30 09:02:15 -04:00
Nicolas Pitre
71ce1deeff ARM: bL_switcher: move to dedicated threads rather than workqueues
The workqueues are problematic as they may be contended.
They can't be scheduled with top priority either.  Also the optimization
in bL_switch_request() to skip the workqueue entirely when the target CPU
and the calling CPU were the same didn't allow for bL_switch_request() to
be called from atomic context, as might be the case for some cpufreq
drivers.

Let's move to dedicated kthreads instead.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
2013-07-30 09:02:14 -04:00
Lorenzo Pieralisi
3f09d4799e ARM: bL_switcher: add clockevent save/restore support
Per-CPU timers that are shutdown when a CPU is switched over must be disabled
upon switching and reprogrammed on the inbound CPU by relying on the
clock events management API. save/restore sequence is executed with irqs
disabled as mandated by the clock events API.

The next_event is an absolute time, hence, when the inbound CPU resumes,
if the timer has expired the min delta is forced into the tick device to
fire after few cycles.

This patch adds switching support for clock events that are per-CPU and
have to be migrated when a switch takes place; the cpumask of the clock
event device is checked against the cpumask of the current cpu, and if
they match, the clockevent device mode is saved and it is put in
shutdown mode. Resume code reprogrammes the tick device accordingly.

Tested on A15/A7 fast models and architected timers.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Nicolas Pitre <nico@linaro.org>
2013-07-30 09:02:14 -04:00
Nicolas Pitre
1c33be5749 ARM: b.L: core switcher code
This is the core code implementing big.LITTLE switcher functionality.
Rationale for this code is available here:

http://lwn.net/Articles/481055/

The main entry point for a switch request is:

void bL_switch_request(unsigned int cpu, unsigned int new_cluster_id)

If the calling CPU is not the wanted one, this wrapper takes care of
sending the request to the appropriate CPU with schedule_work_on().

At the moment the core switch operation is handled by bL_switch_to()
which must be called on the CPU for which a switch is requested.

What this code does:

  * Return early if the current cluster is the wanted one.

  * Close the gate in the kernel entry vector for both the inbound
    and outbound CPUs.

  * Wake up the inbound CPU so it can perform its reset sequence in
    parallel up to the kernel entry vector gate.

  * Migrate all interrupts in the GIC targeting the outbound CPU
    interface to the inbound CPU interface, including SGIs. This is
    performed by gic_migrate_target() in drivers/irqchip/irq-gic.c.

  * Call cpu_pm_enter() which takes care of flushing the VFP state to
    RAM and save the CPU interface config from the GIC to RAM.

  * Modify the cpu_logical_map to refer to the inbound physical CPU.

  * Call cpu_suspend() which saves the CPU state (general purpose
    registers, page table address) onto the stack and store the
    resulting stack pointer in an array indexed by the updated
    cpu_logical_map, then call the provided shutdown function.
    This happens in arch/arm/kernel/sleep.S.

At this point, the provided shutdown function executed by the outbound
CPU ungates the inbound CPU. Therefore the inbound CPU:

  * Picks up the saved stack pointer in the array indexed by its MPIDR
    in arch/arm/kernel/sleep.S.

  * The MMU and caches are re-enabled using the saved state on the
    provided stack, just like if this was a resume operation from a
    suspended state.

  * Then cpu_suspend() returns, although this is on the inbound CPU
    rather than the outbound CPU which called it initially.

  * The function cpu_pm_exit() is called which effect is to restore the
    CPU interface state in the GIC using the state previously saved by
    the outbound CPU.

  * Exit of bL_switch_to() to resume normal kernel execution on the
    new CPU.

However, the outbound CPU is potentially still running in parallel while
the inbound CPU is resuming normal kernel execution, hence we need
per CPU stack isolation to execute bL_do_switch().  After the outbound
CPU has ungated the inbound CPU, it calls mcpm_cpu_power_down() to:

  * Clean its L1 cache.

  * If it is the last CPU still alive in its cluster (last man standing),
    it also cleans its L2 cache and disables cache snooping from the other
    cluster.

  * Power down the CPU (or whole cluster).

Code called from bL_do_switch() might end up referencing 'current' for
some reasons.  However, 'current' is derived from the stack pointer.
With any arbitrary stack, the returned value for 'current' and any
dereferenced values through it are just random garbage which may lead to
segmentation faults.

The active page table during the execution of bL_do_switch() is also a
problem.  There is no guarantee that the inbound CPU won't destroy the
corresponding task which would free the attached page table while the
outbound CPU is still running and relying on it.

To solve both issues, we borrow some of the task space belonging to
the init/idle task which, by its nature, is lightly used and therefore
is unlikely to clash with our usage.  The init task is also never going
away.

Right now the logical CPU number is assumed to be equivalent to the
physical CPU number within each cluster. The kernel should also be
booted with only one cluster active.  These limitations will be lifted
eventually.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
2013-07-30 09:02:13 -04:00
Olof Johansson
cc23ee49d3 Merge tag 'davinci-fixes-for-v3.11-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into fixes
From Sekhar Nori:
DaVinci fixes for v3.11-rc2

The pull request includes fixes for sparse warnings, defconfig changes to
enable DMA usage on peripherals and removal of a duplicated include file.

* tag 'davinci-fixes-for-v3.11-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: davinci: defconfig: enable EDMA driver
  ARM: davinci: make file local variables static
  ARM: edma: remove duplicated include from edma.c

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-07-22 19:54:21 -07:00
Wei Yongjun
30f099cd88 ARM: edma: remove duplicated include from edma.c
Remove duplicated include.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-07-16 20:36:46 +05:30
Paul Gortmaker
8bd26e3a7e arm: delete __cpuinit/__CPUINIT usage from all ARM users
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications.  For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.

After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out.  Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.

Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit  -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings.  In any case, they are temporary and harmless.

This removes all the ARM uses of the __cpuinit macros from C code,
and all __CPUINIT from assembly code.  It also had two ".previous"
section statements that were paired off against __CPUINIT
(aka .section ".cpuinit.text") that also get removed here.

[1] https://lkml.org/lkml/2013/5/20/589

Cc: Russell King <linux@arm.linux.org.uk>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2013-07-14 19:36:52 -04:00
Linus Torvalds
21884a83b2 Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer core updates from Thomas Gleixner:
 "The timer changes contain:

   - posix timer code consolidation and fixes for odd corner cases

   - sched_clock implementation moved from ARM to core code to avoid
     duplication by other architectures

   - alarm timer updates

   - clocksource and clockevents unregistration facilities

   - clocksource/events support for new hardware

   - precise nanoseconds RTC readout (Xen feature)

   - generic support for Xen suspend/resume oddities

   - the usual lot of fixes and cleanups all over the place

  The parts which touch other areas (ARM/XEN) have been coordinated with
  the relevant maintainers.  Though this results in an handful of
  trivial to solve merge conflicts, which we preferred over nasty cross
  tree merge dependencies.

  The patches which have been committed in the last few days are bug
  fixes plus the posix timer lot.  The latter was in akpms queue and
  next for quite some time; they just got forgotten and Frederic
  collected them last minute."

* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (59 commits)
  hrtimer: Remove unused variable
  hrtimers: Move SMP function call to thread context
  clocksource: Reselect clocksource when watchdog validated high-res capability
  posix-cpu-timers: don't account cpu timer after stopped thread runtime accounting
  posix_timers: fix racy timer delta caching on task exit
  posix-timers: correctly get dying task time sample in posix_cpu_timer_schedule()
  selftests: add basic posix timers selftests
  posix_cpu_timers: consolidate expired timers check
  posix_cpu_timers: consolidate timer list cleanups
  posix_cpu_timer: consolidate expiry time type
  tick: Sanitize broadcast control logic
  tick: Prevent uncontrolled switch to oneshot mode
  tick: Make oneshot broadcast robust vs. CPU offlining
  x86: xen: Sync the CMOS RTC as well as the Xen wallclock
  x86: xen: Sync the wallclock when the system time is set
  timekeeping: Indicate that clock was set in the pvclock gtod notifier
  timekeeping: Pass flags instead of multiple bools to timekeeping_update()
  xen: Remove clock_was_set() call in the resume path
  hrtimers: Support resuming with two or more CPUs online (but stopped)
  timer: Fix jiffies wrap behavior of round_jiffies_common()
  ...
2013-07-06 14:09:38 -07:00
Linus Torvalds
fb2af0020a Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM updates from Russell King:
 "This contains the usual updates from other people (listed below) and
  the usual random muddle of miscellaneous ARM updates which cover some
  low priority bug fixes and performance improvements.

  I've started to put the pull request wording into the merge commits,
  which are:

   - NoMMU stuff:

     This includes the following series sent earlier to the list:
      - nommu-fixes
      - R7 Support
      - MPU support

     I've left out the ARCH_MULTIPLATFORM/!MMU stuff that Arnd and I
     were discussing today until we've reached a conclusion/that's had
     some more review.

     This is rebased (and re-tested) on your devel-stable branch because
     otherwise there were going to be conflicts with Uwe's V7M work now
     that you've merged that.  I've included the fix for limiting MPU to
     CPU_V7.

   - Huge page support

     These changes bring both HugeTLB support and Transparent HugePage
     (THP) support to ARM.  Only long descriptors (LPAE) are supported
     in this series.

     The code has been tested on an Arndale board (Exynos 5250).

   - LPAE updates

     Please pull these miscellaneous LPAE fixes I've been collecting for
     a while now for 3.11.  They've been tested and reviewed by quite a
     few people, and most of the patches are pretty trivial.  -- Will Deacon.

   - arch_timer cleanups

     Please pull these arch_timer cleanups I've been holding onto for a
     while.  They're the same as my last posting, but have been rebased
     to v3.10-rc3.

   - mpidr linearisation (multiprocessor id register - identifies which
     CPU number we are in the system)

     This patch series that implements MPIDR linearization through a
     simple hashing algorithm and updates current cpu_{suspend}/{resume}
     code to use the newly created hash structures to retrieve context
     pointers.  It represents a stepping stone for the implementation of
     power management code on forthcoming multi-cluster ARM systems.

     It has been tested on TC2 (dual cluster A15xA7 system), iMX6q,
     OMAP4 and Tegra, with processors hitting low-power states requiring
     warm-boot resume through the cpu_resume code path"

* 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (77 commits)
  ARM: 7775/1: mm: Remove do_sect_fault from LPAE code
  ARM: 7777/1: Avoid extra calls to the C compiler
  ARM: 7774/1: Fix dtb dependency to use order-only prerequisites
  ARM: 7770/1: remove residual ARMv2 support from decompressor
  ARM: 7769/1: Cortex-A15: fix erratum 798181 implementation
  ARM: 7768/1: prevent risks of out-of-bound access in ASID allocator
  ARM: 7767/1: let the ASID allocator handle suspended animation
  ARM: 7766/1: versatile: don't mark pen as __INIT
  ARM: 7765/1: perf: Record the user-mode PC in the call chain.
  ARM: 7735/2: Preserve the user r/w register TPIDRURW on context switch and fork
  ARM: kernel: implement stack pointer save array through MPIDR hashing
  ARM: kernel: build MPIDR hash function data structure
  ARM: mpu: Ensure that MPU depends on CPU_V7
  ARM: mpu: protect the vectors page with an MPU region
  ARM: mpu: Allow enabling of the MPU via kconfig
  ARM: 7758/1: introduce config HAS_BANDGAP
  ARM: 7757/1: mm: don't flush icache in switch_mm with hardware broadcasting
  ARM: 7751/1: zImage: don't overwrite ourself with a page table
  ARM: 7749/1: spinlock: retry trylock operation if strex fails on free lock
  ARM: 7748/1: oabi: handle faults when loading swi instruction from userspace
  ...
2013-07-03 09:46:29 -07:00
Matt Porter
2646a0e52b ARM: edma: Add EDMA crossbar event mux support
EDMA supports a cross bar which provides ability
to mux additional events into physical channels
present in the channel controller.

This is required when the number of events present
in the system are more than number of available
physical channels.

Changes by Joel:
* Split EDMA xbar support out of original EDMA DT parsing patch
to keep it easier for review.
* Rewrite shift and offset calculation.

Suggested-by: Sekhar Nori <nsekhar@ti.com>
Suggested by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
[nsekhar@ti.com: fix checkpatch errors and a minor coding improvement]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-06-24 14:08:34 +05:30
Matt Porter
6cba435506 ARM: edma: Add DT and runtime PM support to the private EDMA API
Adds support for parsing the TI EDMA DT data into the required EDMA
private API platform data. Enables runtime PM support to initialize
the EDMA hwmod. Enables build on OMAP.

Changes by Joel:
* Setup default one-to-one mapping for queue_priority and queue_tc
mapping as discussed in [1].
* Split out xbar stuff to separate patch. [1]
* Dropped unused DT helper to convert to array
* Fixed dangling pointer issue with Sekhar's changes

[1] https://patchwork.kernel.org/patch/2226761/

Signed-off-by: Matt Porter <mporter@ti.com>
[nsekhar@ti.com: fix checkpatch errors, build breakages. Introduce
edma_setup_info_from_dt() as part of that effort]
Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-06-24 14:08:26 +05:30
Lad, Prabhakar
e7eff702e0 ARM: edma: Convert to devm_* api
Use devm_ioremap_resource instead of reques_mem_region()/ioremap(),
devm_request_irq() instead of request_irq() and kzalloc() calls to
devm_kzalloc().

This ensures more consistent error values and simplifies error paths.

Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
[nsekhar@ti.com: add missing err.h include]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-06-18 14:04:11 +05:30
Matt Porter
7bb5d75ce9 ARM: edma: remove unused transfer controller handlers
Fix build on OMAP, the irqs are undefined on AM33xx.
These error interrupt handlers were hardcoded as disabled
so since they are unused code, simply remove them.

Signed-off-by: Matt Porter <mporter@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-06-18 10:53:13 +05:30
Matt Porter
3ad7a42d5a ARM: davinci: move private EDMA API to arm/common
Move mach-davinci/dma.c to common/edma.c so it can be used
by OMAP (specifically AM33xx) as well.

Signed-off-by: Matt Porter <mporter@ti.com>
Acked-by: Chris Ball <cjb@laptop.org> # davinci_mmc.c
Acked-by: Mark Brown <broonie@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
[nsekhar@ti.com: dropped davinci sffsdr changes]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-06-18 10:52:03 +05:30
Stephen Boyd
38ff87f77a sched_clock: Make ARM's sched_clock generic for all architectures
Nothing about the sched_clock implementation in the ARM port is
specific to the architecture. Generalize the code so that other
architectures can use it by selecting GENERIC_SCHED_CLOCK.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
[jstultz: Merge minor collisions with other patches in my tree]
Signed-off-by: John Stultz <john.stultz@linaro.org>
2013-06-12 14:02:13 -07:00
Nicolas Pitre
6c93dd438a ARM: 7741/1: mcpm_platsmp.c: remove empty smp_init_cpus method
The smp_init_cpus method in the smp_operations structure is optional
and can be omitted entirely.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-06-05 23:58:10 +01:00
Nicolas Pitre
0305ffd753 ARM: 7740/1: MCPM: prettify debug output
The CPU and cluster numbers (MPIDR affinity levels 0 and 1) may have
at most 8 bits each.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-06-05 23:58:09 +01:00
Linus Torvalds
d21572c515 Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM fixes from Russell King:
 "A small number of fixes for stuff from the last merge window, and in
  one case (IRQ time accounting) the previous merge window."

* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
  ARM: 7720/1: ARM v6/v7 cmpxchg64 shouldn't clear upper 32 bits of the old/new value
  ARM: 7715/1: MCPM: adapt to GIC changes after upstream merge
  ARM: 7714/1: mmc: mmci: Ensure return value of regulator_enable() is checked
  ARM: 7712/1: Remove trailing whitespace in arch/arm/Makefile
  ARM: 7711/1: dove: fix Dove cpu type from V7 to PJ4
  ARM: finally enable IRQ time accounting config
2013-05-15 13:37:54 -07:00
Nicolas Pitre
9e01573b5c ARM: 7715/1: MCPM: adapt to GIC changes after upstream merge
Since commit c0114709ed ("irqchip: gic: Perform the gic_secondary_init()
call via CPU notifier") it is no longer required nor possible to call
gic_secondary_init() from platform code.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-05-10 14:44:19 +01:00
Linus Torvalds
1bf25e78af ARM: arm-soc: late cleanups
These are cleanups and smaller changes that either depend on earlier
 feature branches or came in late during the development cycle.
 We normally try to get all cleanups early, so these are the exceptions:
 
 - A follow-up on the clocksource reworks, hopefully the last time
   we need to merge clocksource subsystem changes through arm-soc.
   A first set of patches was part of the original 3.10 arm-soc cleanup
   series because of interdependencies with timer drivers now moved out
   of arch/arm.
 
 - Migrating the SPEAr13xx platform away from using auxdata for DMA
   channel descriptions towards using information in device tree,
   based on the earlier SPEAr multiplatform series
 
 - A few follow-ups on the Atmel SAMA5 support and other changes
   for Atmel at91 based on the larger at91 reworks.
 
 - Moving the armada irqchip implementation to drivers/irqchip
 
 - Several OMAP cleanups following up on the larger series already
   merged in 3.10.
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Merge tag 'cleanup-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC late cleanups from Arnd Bergmann:
 "These are cleanups and smaller changes that either depend on earlier
  feature branches or came in late during the development cycle.  We
  normally try to get all cleanups early, so these are the exceptions:

   - A follow-up on the clocksource reworks, hopefully the last time we
     need to merge clocksource subsystem changes through arm-soc.

     A first set of patches was part of the original 3.10 arm-soc
     cleanup series because of interdependencies with timer drivers now
     moved out of arch/arm.

   - Migrating the SPEAr13xx platform away from using auxdata for DMA
     channel descriptions towards using information in device tree,
     based on the earlier SPEAr multiplatform series

   - A few follow-ups on the Atmel SAMA5 support and other changes for
     Atmel at91 based on the larger at91 reworks.

   - Moving the armada irqchip implementation to drivers/irqchip

   - Several OMAP cleanups following up on the larger series already
     merged in 3.10."

* tag 'cleanup-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (50 commits)
  ARM: OMAP4: change the device names in usb_bind_phy
  ARM: OMAP2+: Fix mismerge for timer.c between ff931c82 and da4a686a
  ARM: SPEAr: conditionalize SMP code
  ARM: arch_timer: Silence debug preempt warnings
  ARM: OMAP: remove unused variable
  serial: amba-pl011: fix !CONFIG_DMA_ENGINE case
  ata: arasan: remove the need for platform_data
  ARM: at91/sama5d34ek.dts: remove not needed compatibility string
  ARM: at91: dts: add MCI DMA support
  ARM: at91: dts: add i2c dma support
  ARM: at91: dts: set #dma-cells to the correct value
  ARM: at91: suspend both memory controllers on at91sam9263
  irqchip: armada-370-xp: slightly cleanup irq controller driver
  irqchip: armada-370-xp: move IRQ handler to avoid forward declaration
  irqchip: move IRQ driver for Armada 370/XP
  ARM: mvebu: move L2 cache initialization in init_early()
  devtree: add binding documentation for sp804
  ARM: integrator-cp: convert use CLKSRC_OF for timer init
  ARM: versatile: use OF init for sp804 timer
  ARM: versatile: add versatile dtbs to dtbs target
  ...
2013-05-07 11:22:14 -07:00
Linus Torvalds
e3d98847de ARM: platform specific firmware interfaces for 3.10
Two platforms, bcm and exynos have their own firmware interfaces using
 the "secure monitor call", this adds support for those.
 
 We had originally planned to have a third set of patches in here, which
 would extend support for the existing generic "psci" call that is used
 on multiple platforms as well as Xen and KVM guests, but that ended up
 getting dropped because the patches were not ready in time.
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Merge tag 'firmware-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM platform specific firmware interfaces from Olof Johansson:
 "Two platforms, bcm and exynos have their own firmware interfaces using
  the "secure monitor call", this adds support for those.

  We had originally planned to have a third set of patches in here,
  which would extend support for the existing generic "psci" call that
  is used on multiple platforms as well as Xen and KVM guests, but that
  ended up getting dropped because the patches were not ready in time."

* tag 'firmware-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: bcm: mark bcm_kona_smc_init as __init
  ARM: bcm281xx: Add DT support for SMC handler
  ARM: bcm281xx: Add L2 cache enable code
  ARM: EXYNOS: Add secure firmware support to secondary CPU bring-up
  ARM: EXYNOS: Add IO mapping for non-secure SYSRAM.
  ARM: EXYNOS: Add support for Exynos secure firmware
  ARM: EXYNOS: Add support for secure monitor calls
  ARM: Add interface for registering and calling firmware-specific operations
2013-05-04 12:33:36 -07:00
Dave Martin
70100a0226 ARM: 7709/1: mcpm: Add explicit AFLAGS to support v6/v7 multiplatform kernels
The full mcpm layer is not likely to be relevant to v6 based
platforms, so a multiplatform kernel won't use that code if booted
on v6 hardware.

This patch modifies the AFLAGS for affected mcpm .S files to
specify armv7-a explicitly for that code.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-05-02 12:14:34 +01:00
Nicolas Pitre
a7eb7c6f9a ARM: mcpm: provide an interface to set the SMP ops at run time
This is cleaner than exporting the mcpm_smp_ops structure.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Jon Medhurst <tixy@linaro.org>
2013-04-24 10:37:03 -04:00
Nicolas Pitre
9ff221bad8 ARM: mcpm: generic SMP secondary bringup and hotplug support
Now that the cluster power API is in place, we can use it for SMP secondary
bringup and CPU hotplug in a generic fashion.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
2013-04-24 10:37:02 -04:00
Dave Martin
1ae98561b1 ARM: mcpm_head.S: vlock-based first man election
Instead of requiring the first man to be elected in advance (which
can be suboptimal in some situations), this patch uses a per-
cluster mutex to co-ordinate selection of the first man.

This should also make it more feasible to reuse this code path for
asynchronous cluster resume (as in CPUidle scenarios).

We must ensure that the vlock data doesn't share a cacheline with
anything else, or dirty cache eviction could corrupt it.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
2013-04-24 10:37:01 -04:00
Dave Martin
9762f12d3e ARM: mcpm: Add baremetal voting mutexes
This patch adds a simple low-level voting mutex implementation
to be used to arbitrate during first man selection when no load/store
exclusive instructions are usable.

For want of a better name, these are called "vlocks".  (I was
tempted to call them ballot locks, but "block" is way too confusing
an abbreviation...)

There is no function to wait for the lock to be released, and no
vlock_lock() function since we don't need these at the moment.
These could straightforwardly be added if vlocks get used for other
purposes.

For architectural correctness even Strongly-Ordered memory accesses
require barriers in order to guarantee that multiple CPUs have a
coherent view of the ordering of memory accesses.  Whether or not
this matters depends on hardware implementation details of the
memory system.  Since the purpose of this code is to provide a clean,
generic locking mechanism with no platform-specific dependencies the
barriers should be present to avoid unpleasant surprises on future
platforms.

Note:

  * When taking the lock, we don't care about implicit background
    memory operations and other signalling which may be pending,
    because those are not part of the critical section anyway.

    A DMB is sufficient to ensure correctly observed ordering if
    the explicit memory accesses in vlock_trylock.

  * No barrier is required after checking the election result,
    because the result is determined by the store to
    VLOCK_OWNER_OFFSET and is already globally observed due to the
    barriers in voting_end.  This means that global agreement on
    the winner is guaranteed, even before the winner is known
    locally.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
2013-04-24 10:37:01 -04:00
Dave Martin
7fe31d28e8 ARM: mcpm: introduce helpers for platform coherency exit/setup
This provides helper methods to coordinate between CPUs coming down
and CPUs going up, as well as documentation on the used algorithms,
so that cluster teardown and setup
operations are not done for a cluster simultaneously.

For use in the power_down() implementation:
  * __mcpm_cpu_going_down(unsigned int cluster, unsigned int cpu)
  * __mcpm_outbound_enter_critical(unsigned int cluster)
  * __mcpm_outbound_leave_critical(unsigned int cluster)
  * __mcpm_cpu_down(unsigned int cluster, unsigned int cpu)

The power_up_setup() helper should do platform-specific setup in
preparation for turning the CPU on, such as invalidating local caches
or entering coherency.  It must be assembler for now, since it must
run before the MMU can be switched on.  It is passed the affinity level
for which initialization should be performed.

Because the mcpm_sync_struct content is looked-up and modified
with the cache enabled or disabled depending on the code path, it is
crucial to always ensure proper cache maintenance to update main memory
right away.  The sync_cache_*() helpers are used to that end.

Also, in order to prevent a cached writer from interfering with an
adjacent non-cached writer, we ensure each state variable is located to
a separate cache line.

Thanks to Nicolas Pitre and Achin Gupta for the help with this
patch.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Will Deacon <will.deacon@arm.com>
2013-04-24 10:37:00 -04:00
Nicolas Pitre
7c2b860534 ARM: mcpm: introduce the CPU/cluster power API
This is the basic API used to handle the powering up/down of individual
CPUs in a (multi-)cluster system.  The platform specific backend
implementation has the responsibility to also handle the cluster level
power as well when the first/last CPU in a cluster is brought up/down.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
2013-04-24 10:36:59 -04:00
Nicolas Pitre
e8db288e05 ARM: multi-cluster PM: secondary kernel entry code
CPUs in cluster based systems, such as big.LITTLE, have special needs
when entering the kernel due to a hotplug event, or when resuming from
a deep sleep mode.

This is vectorized so multiple CPUs can enter the kernel in parallel
without serialization.

The mcpm prefix stands for "multi cluster power management", however
this is usable on single cluster systems as well.  Only the basic
structure is introduced here.  This will be extended with later patches.

In order not to complexify things more than they currently have to,
the planned work to make runtime adjusted MPIDR based indexing and
dynamic memory allocation for cluster states is postponed to a later
cycle. The MAX_NR_CLUSTERS and MAX_CPUS_PER_CLUSTER static definitions
should be sufficient for those systems expected to be available in the
near future.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
2013-04-24 10:36:59 -04:00
Rob Herring
870e2928cf ARM: integrator-cp: convert use CLKSRC_OF for timer init
Move the integrator-cp timer init to timer-sp.c and use CLKSRC_OF. There is
no reason to use the aliases, so drop them from the init code.

The integrator-cp timers are mistakenly called sp804 timers in the dts, but
in fact they are not sp804 dual timers, but single timers with the same
programming model. Fix the dts to reflect this.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-11 15:11:21 -05:00
Rob Herring
7a0eca7121 ARM: timer-sp: convert to use CLKSRC_OF init
This adds CLKSRC_OF based init for sp804 timer. The clock initialization is
refactored to support retrieving the clock(s) from the DT.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-04-11 15:11:17 -05:00
Tomasz Figa
7366b92a77 ARM: Add interface for registering and calling firmware-specific operations
Some boards are running with secure firmware running in TrustZone secure
world, which changes the way some things have to be initialized.

This patch adds an interface for platforms to specify available firmware
operations and call them.

A wrapper macro, call_firmware_op(), checks if the operation is provided
and calls it if so, otherwise returns -ENOSYS to allow fallback to
legacy operation..

By default no operations are provided.

Example of use:

In code using firmware ops:

  __raw_writel(virt_to_phys(exynos4_secondary_startup),
               CPU1_BOOT_REG);

  /* Call Exynos specific smc call */
  if (call_firmware_op(cpu_boot, cpu) == -ENOSYS)
          cpu_boot_legacy(...); /* Try legacy way */

  gic_raise_softirq(cpumask_of(cpu), 1);

In board-/platform-specific code:

  static int platformX_do_idle(void)
  {
          /* tell platformX firmware to enter idle */
          return 0;
  }

  static int platformX_cpu_boot(int i)
  {
          /* tell platformX firmware to boot CPU i */
          return 0;
  }

  static const struct firmware_ops platformX_firmware_ops = {
          .do_idle      = exynos_do_idle,
          .cpu_boot     = exynos_cpu_boot,
          /* other operations not available on platformX */
  };

  static void __init board_init_early(void)
  {
          register_firmware_ops(&platformX_firmware_ops);
  }

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-09 01:52:06 +09:00
Rob Herring
44430ec068 irqchip: Move ARM VIC to drivers/irqchip
Now that we have drivers/irqchip, move VIC irqchip to drivers/irqchip.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
2013-01-12 10:52:14 -06:00
Rob Herring
a036802913 ARM: remove mach .handle_irq for VIC users
Now that the VIC initialization sets up the handle_arch_irq pointer, we
can remove it for all machines and make it static. Move vic_handle_irq
to avoid a forward declaration.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Ryan Mallon <rmallon@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Hubert Feurstein <hubert.feurstein@contec.at>
Cc: Alessandro Rubini <rubini@unipv.it>
Cc: STEricsson <STEricsson_nomadik_linux@list.st.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-01-12 10:48:04 -06:00
Rob Herring
7fb7d8ae10 ARM: VIC: set handle_arch_irq in VIC initialization
Set handle_arch_irq to vic_handle_irq. Only the first VIC initialized can
setup the handler.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Olof Johansson <olof@lixom.net>
2013-01-12 10:47:34 -06:00
Rob Herring
cf21af5458 ARM: VIC: shrink down vic.h
Move all register defines except VIC_INT_ENABLE and VIC_INT_ENABLE_CLEAR
which are used by Samsung.

With multi irq handler, vic.h is not included in assembly any more, so
we can remove the assembly ifdefs.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Acked-by: Olof Johansson <olof@lixom.net>
2013-01-12 10:47:33 -06:00
Rob Herring
81243e444c irqchip: Move ARM GIC to drivers/irqchip
Now that we have drivers/irqchip, move GIC irqchip to drivers/irqchip. This
is necessary to share the GIC with arm and arm64.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
2013-01-12 10:47:31 -06:00
Rob Herring
1d5cc604f4 ARM: remove mach .handle_irq for GIC users
Now that the GIC initialization sets up the handle_arch_irq pointer, we
can remove it for all machines and make it static.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Anton Vorontsov <avorontsov@mvista.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-01-12 10:47:20 -06:00
Rob Herring
cfed7d6014 ARM: GIC: set handle_arch_irq in GIC initialization
Set handle_arch_irq to gic_handle_irq. Only the first GIC initialized can
setup the handler.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Olof Johansson <olof@lixom.net>
2013-01-10 11:45:48 -06:00
Rob Herring
b1cffebf10 ARM: GIC: remove direct use of gic_raise_softirq
In preparation of moving gic code to drivers/irqchip, remove the direct
platform dependencies on gic_raise_softirq. Move the setup of
smp_cross_call into the gic code and use arch_send_wakeup_ipi_mask
function to trigger wake-up IPIs.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
2013-01-10 11:45:43 -06:00
Linus Torvalds
5c49985c21 Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM fixes from Russell King.

* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
  ARM: 7616/1: cache-l2x0: aurora: Use writel_relaxed instead of writel
  ARM: 7615/1: cache-l2x0: aurora: Invalidate during clean operation with WT enable
  ARM: 7614/1: mm: fix wrong branch from Cortex-A9 to PJ4b
  ARM: 7612/1: imx: Do not select some errata that depends on !ARCH_MULTIPLATFORM
  ARM: 7611/1: VIC: fix bug in VIC irqdomain code
  ARM: 7610/1: versatile: bump IRQ numbers
  ARM: 7609/1: disable errata work-arounds which access secure registers
  ARM: 7608/1: l2x0: Only set .set_debug on PL310 r3p0 and earlier
2013-01-09 08:58:57 -08:00
Greg Kroah-Hartman
351a102dbf ARM: drivers: remove __dev* attributes.
CONFIG_HOTPLUG is going away as an option.  As a result, the __dev*
markings need to be removed.

This change removes the use of __devinit, __devexit_p, __devinitdata,
and __devexit from these drivers.

Based on patches originally written by Bill Pemberton, but redone by me
in order to handle some of the coding style issues better, by hand.

Cc: Bill Pemberton <wfp5p@virginia.edu>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-01-03 15:57:04 -08:00
Linus Walleij
5ced33bc06 ARM: 7611/1: VIC: fix bug in VIC irqdomain code
The VIC irqdomain code added in commit
07c9249f1f
"ARM: 7554/1: VIC: use irq_domain_add_simple()"

Had two bugs:

1) It didn't call irq_create_mapping() once on each
   valid irq source in the slowpath when registering
   the controller.

2) It passed a -1 as IRQ offset for the DT case, whereas
   0 should be passed as invalid IRQ instead.

Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-01-02 10:35:07 +00:00
Russell King
0fa5d3996d Merge branch 'devel-stable' into for-linus 2012-12-11 10:01:53 +00:00
Russell King
0b99cb7310 Merge branches 'cache-l2x0', 'fixes', 'hdrs', 'misc', 'mmci', 'vic' and 'warnings' into for-next 2012-12-11 00:20:18 +00:00
Will Deacon
ea3aacf5f2 ARM: 7586/1: sp804: set cpumask to cpu_possible_mask for clock event device
The SP804 driver statically initialises the cpumask of the clock event
device to be cpu_all_mask, which is derived from the compile-time
constant NR_CPUS. This breaks SMP_ON_UP systems where the interrupt
controller handling the sp804 doesn't have the irq_set_affinity callback
on the irq_chip, because the common timer code fails to identify the
device as cpu-local and ends up treating it as a broadcast device
instead.

This patch fixes the problem by using cpu_possible_mask at runtime,
which will correctly represent the possible CPUs when SMP_ON_UP is being
used.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-11-28 09:46:57 +00:00
Nicolas Pitre
384a290283 ARM: gic: use a private mapping for CPU target interfaces
The GIC interface numbering does not necessarily follow the logical
CPU numbering, especially for complex topologies such as multi-cluster
systems.

Fortunately we can easily probe the GIC to create a mapping as the
Interrupt Processor Targets Registers for the first 32 interrupts are
read-only, and each field returns a value that always corresponds to
the processor reading the register.

Initially all mappings target all CPUs in case an IPI is required to
boot secondary CPUs.  It is refined as those CPUs discover what their
actual mapping is.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Will Deacon <will.deacon@arm.com>
2012-11-19 15:44:34 +00:00
Russell King
946c59a08a ARM: vic: fix build warning caused by previous commit
07c9249f1f (ARM: 7554/1: VIC: use irq_domain_add_simple()) removed the
use of 'irq_base' but did not remove the variable itself, which causes:

arch/arm/common/vic.c: In function 'vic_of_init':
arch/arm/common/vic.c:410:6: warning: unused variable 'irq_base'

Remove this now unused variable.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-11-08 10:48:30 +00:00
Linus Walleij
07c9249f1f ARM: 7554/1: VIC: use irq_domain_add_simple()
Instead of allocating descriptors on-the-fly for the device tree
initialization case, use irq_domain_add_simple() which will take
care of this if you pass negative as the first_irq.

Alter the signature of __vic_init() to pass the first_irq as
signed so this works as expected.

Switching the VIC to use irq_domain_add_simple() also has the
upside of displaying the same WARNING when you boot with
pre-allocated descriptors on systems using SPARSE_IRQ but
yet not using device tree.

Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-10-18 11:11:16 +01:00
Russell King
b1b3f49ce4 ARM: config: sort select statements alphanumerically
As suggested by Andrew Morton:

  This is a pet peeve of mine.  Any time there's a long list of items
  (header file inclusions, kconfig entries, array initalisers, etc) and
  someone wants to add a new item, they *always* go and stick it at the
  end of the list.

  Guys, don't do this.  Either put the new item into a randomly-chosen
  position or, probably better, alphanumerically sort the list.

lets sort all our select statements alphanumerically.  This commit was
created by the following perl:

while (<>) {
	while (/\\\s*$/) {
		$_ .= <>;
	}
	undef %selects if /^\s*config\s+/;
	if (/^\s+select\s+(\w+).*/) {
		if (defined($selects{$1})) {
			if ($selects{$1} eq $_) {
				print STDERR "Warning: removing duplicated $1 entry\n";
			} else {
				print STDERR "Error: $1 differently selected\n".
					"\tOld: $selects{$1}\n".
					"\tNew: $_\n";
				exit 1;
			}
		}
		$selects{$1} = $_;
		next;
	}
	if (%selects and (/^\s*$/ or /^\s+help/ or /^\s+---help---/ or
			  /^endif/ or /^endchoice/)) {
		foreach $k (sort (keys %selects)) {
			print "$selects{$k}";
		}
		undef %selects;
	}
	print;
}
if (%selects) {
	foreach $k (sort (keys %selects)) {
		print "$selects{$k}";
	}
}

It found two duplicates:

Warning: removing duplicated S5P_SETUP_MIPIPHY entry
Warning: removing duplicated HARDIRQS_SW_RESEND entry

and they are identical duplicates, hence the shrinkage in the diffstat
of two lines.

We have four testers reporting success of this change (Tony, Stephen,
Linus and Sekhar.)

Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-10-13 17:11:28 +01:00
Arnd Bergmann
bfbad32a63 ARM: pxa: armcore: fix PCI PIO warnings
The it8152 PCI host used on the pxa/cm_x2xx machines
uses the old-style I/O window registration. This should
eventually get converted to pci_ioremap_io() but for
now, let's cast the IT8152_IO_BASE constant to an integer
type to get rid of the warnings.

Without this patch, building cm_x2xx_defconfig results in:

arch/arm/common/it8152.c: In function 'it8152_pci_setup':
arch/arm/common/it8152.c:287:18: warning: assignment makes integer from pointer without a cast [enabled by default]
arch/arm/common/it8152.c:288:16: warning: assignment makes integer from pointer without a cast [enabled by default]
arch/arm/common/it8152.c:291:17: warning: assignment makes integer from pointer without a cast [enabled by default]

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Krzysztof Halasa <khc@pm.waw.pl>
Cc: Mike Rapoport <mike@compulab.co.il>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Eric Miao <eric.y.miao@gmail.com>
2012-10-09 21:58:01 +02:00
Marek Szyprowski
dc2832e1e7 ARM: dma-mapping: add support for dma_get_sgtable()
This patch adds support for dma_get_sgtable() function which is required
to let drivers to share the buffers allocated by DMA-mapping subsystem.

Generic implementation based on virt_to_page() is not suitable for ARM
dma-mapping subsystem.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-07-30 12:25:47 +02:00
Marek Szyprowski
fdb1117325 ARM: dma-mapping: fix debug messages in dmabounce code
This patch fixes the usage of uninitialized variables in dmabounce code
intoduced by commit a227fb92 ('ARM: dma-mapping: remove offset parameter
to prepare for generic dma_ops'):
arch/arm/common/dmabounce.c: In function ‘dmabounce_sync_for_device’:
arch/arm/common/dmabounce.c:409: warning: ‘off’ may be used uninitialized in this function
arch/arm/common/dmabounce.c:407: note: ‘off’ was declared here
arch/arm/common/dmabounce.c: In function ‘dmabounce_sync_for_cpu’:
arch/arm/common/dmabounce.c:369: warning: ‘off’ may be used uninitialized in this function
arch/arm/common/dmabounce.c:367: note: ‘off’ was declared here

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2012-06-13 14:25:16 +02:00
Linus Torvalds
d484864dd9 Merge branch 'for-linus' of git://git.linaro.org/people/mszyprowski/linux-dma-mapping
Pull CMA and ARM DMA-mapping updates from Marek Szyprowski:
 "These patches contain two major updates for DMA mapping subsystem
  (mainly for ARM architecture).  First one is Contiguous Memory
  Allocator (CMA) which makes it possible for device drivers to allocate
  big contiguous chunks of memory after the system has booted.

  The main difference from the similar frameworks is the fact that CMA
  allows to transparently reuse the memory region reserved for the big
  chunk allocation as a system memory, so no memory is wasted when no
  big chunk is allocated.  Once the alloc request is issued, the
  framework migrates system pages to create space for the required big
  chunk of physically contiguous memory.

  For more information one can refer to nice LWN articles:

   - 'A reworked contiguous memory allocator':
		http://lwn.net/Articles/447405/

   - 'CMA and ARM':
		http://lwn.net/Articles/450286/

   - 'A deep dive into CMA':
		http://lwn.net/Articles/486301/

   - and the following thread with the patches and links to all previous
     versions:
		https://lkml.org/lkml/2012/4/3/204

  The main client for this new framework is ARM DMA-mapping subsystem.

  The second part provides a complete redesign in ARM DMA-mapping
  subsystem.  The core implementation has been changed to use common
  struct dma_map_ops based infrastructure with the recent updates for
  new dma attributes merged in v3.4-rc2.  This allows to use more than
  one implementation of dma-mapping calls and change/select them on the
  struct device basis.  The first client of this new infractructure is
  dmabounce implementation which has been completely cut out of the
  core, common code.

  The last patch of this redesign update introduces a new, experimental
  implementation of dma-mapping calls on top of generic IOMMU framework.
  This lets ARM sub-platform to transparently use IOMMU for DMA-mapping
  calls if one provides required IOMMU hardware.

  For more information please refer to the following thread:
		http://www.spinics.net/lists/arm-kernel/msg175729.html

  The last patch merges changes from both updates and provides a
  resolution for the conflicts which cannot be avoided when patches have
  been applied on the same files (mainly arch/arm/mm/dma-mapping.c)."

Acked by Andrew Morton <akpm@linux-foundation.org>:
 "Yup, this one please.  It's had much work, plenty of review and I
  think even Russell is happy with it."

* 'for-linus' of git://git.linaro.org/people/mszyprowski/linux-dma-mapping: (28 commits)
  ARM: dma-mapping: use PMD size for section unmap
  cma: fix migration mode
  ARM: integrate CMA with DMA-mapping subsystem
  X86: integrate CMA with DMA-mapping subsystem
  drivers: add Contiguous Memory Allocator
  mm: trigger page reclaim in alloc_contig_range() to stabilise watermarks
  mm: extract reclaim code from __alloc_pages_direct_reclaim()
  mm: Serialize access to min_free_kbytes
  mm: page_isolation: MIGRATE_CMA isolation functions added
  mm: mmzone: MIGRATE_CMA migration type added
  mm: page_alloc: change fallbacks array handling
  mm: page_alloc: introduce alloc_contig_range()
  mm: compaction: export some of the functions
  mm: compaction: introduce isolate_freepages_range()
  mm: compaction: introduce map_pages()
  mm: compaction: introduce isolate_migratepages_range()
  mm: page_alloc: remove trailing whitespace
  ARM: dma-mapping: add support for IOMMU mapper
  ARM: dma-mapping: use alloc, mmap, free from dma_ops
  ARM: dma-mapping: remove redundant code and do the cleanup
  ...

Conflicts:
	arch/x86/include/asm/dma-mapping.h
2012-05-25 09:18:59 -07:00
Linus Torvalds
9bc747bea5 arm-soc: First batch of cleanups
These cleanups are basically all over the place. The idea is to collect
 changes with minimal impact but large number of changes so we can avoid
 them from distracting in the diffstat in the other series.
 
 A significant number of lines get removed here, in particular because
 the ixp2000 and ixp23xx platforms get removed. These have never been
 extremely popular and have fallen into disuse over time with no active
 maintainer taking care of them. The u5500 soc never made it into a
 product, so we are removing it from the ux500 platform.
 
 Many good cleanups also went into the at91 and omap platforms, as has
 been the case for a number of releases.
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Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull first batch of arm-soc cleanups from Olof Johansson:
 "These cleanups are basically all over the place.  The idea is to
  collect changes with minimal impact but large number of changes so we
  can avoid them from distracting in the diffstat in the other series.

  A significant number of lines get removed here, in particular because
  the ixp2000 and ixp23xx platforms get removed.  These have never been
  extremely popular and have fallen into disuse over time with no active
  maintainer taking care of them.  The u5500 soc never made it into a
  product, so we are removing it from the ux500 platform.

  Many good cleanups also went into the at91 and omap platforms, as has
  been the case for a number of releases."

Trivial modify-delete conflicts in arch/arm/mach-{ixp2000,ixp23xx}

* tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (152 commits)
  ARM: clps711x: Cleanup IRQ handling
  ARM clps711x: Removed unused header mach/time.h
  ARM: clps711x: Added note about support EP731x CPU to Kconfig
  ARM: clps711x: Added missing register definitions
  ARM: clps711x: Used own subarch directory for store header file
  Dove: Fix Section mismatch warnings
  ARM: orion5x: ts78xx debugging changes
  ARM: orion5x: remove PM dependency from ts78xx
  ARM: orion5x: ts78xx fix NAND resource off by one
  ARM: orion5x: ts78xx whitespace cleanups
  Orion5x: Fix Section mismatch warnings
  Orion5x: Fix warning: struct pci_dev declared inside paramter list
  ARM: clps711x: Combine header files into one for clps711x-targets
  ARM: S3C24XX: Use common macro to define resources on mach-qt2410.c
  ARM: S3C24XX: Use common macro to define resources on mach-osiris.c
  ARM: EXYNOS: Adapt to cpuidle core time keeping and irq enable
  ARM: S5PV210: Use common macro to define resources on mach-smdkv210.c
  ARM: S5PV210: Use common macro to define resources on dev-audio.c
  ARM: S5PC100: Use common macro to define resources on dev-audio.c
  ARM: S5P64X0: Use common macro to define resources on dev-audio.c
  ...
2012-05-22 09:23:24 -07:00
Russell King
4175160b06 Merge branch 'misc' into for-linus
Conflicts:
	arch/arm/kernel/ptrace.c
2012-05-21 15:15:24 +01:00
Marek Szyprowski
f99d603412 ARM: dma-mapping: use alloc, mmap, free from dma_ops
This patch converts dma_alloc/free/mmap_{coherent,writecombine}
functions to use generic alloc/free/mmap methods from dma_map_ops
structure. A new DMA_ATTR_WRITE_COMBINE DMA attribute have been
introduced to implement writecombine methods.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-By: Subash Patel <subash.ramaswamy@linaro.org>
2012-05-21 15:06:22 +02:00
Marek Szyprowski
15237e1f50 ARM: dma-mapping: move all dma bounce code to separate dma ops structure
This patch removes dma bounce hooks from the common dma mapping
implementation on ARM architecture and creates a separate set of
dma_map_ops for dma bounce devices.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-By: Subash Patel <subash.ramaswamy@linaro.org>
2012-05-21 15:06:18 +02:00
Marek Szyprowski
a227fb92a0 ARM: dma-mapping: remove offset parameter to prepare for generic dma_ops
This patch removes the need for the offset parameter in dma bounce
functions. This is required to let dma-mapping framework on ARM
architecture to use common, generic dma_map_ops based dma-mapping
helpers.

Background and more detailed explaination:

dma_*_range_* functions are available from the early days of the dma
mapping api. They are the correct way of doing a partial syncs on the
buffer (usually used by the network device drivers). This patch changes
only the internal implementation of the dma bounce functions to let
them tunnel through dma_map_ops structure. The driver api stays
unchanged, so driver are obliged to call dma_*_range_* functions to
keep code clean and easy to understand.

The only drawback from this patch is reduced detection of the dma api
abuse. Let us consider the following code:

dma_addr = dma_map_single(dev, ptr, 64, DMA_TO_DEVICE);
dma_sync_single_range_for_cpu(dev, dma_addr+16, 0, 32, DMA_TO_DEVICE);

Without the patch such code fails, because dma bounce code is unable
to find the bounce buffer for the given dma_address. After the patch
the above sync call will be equivalent to:

dma_sync_single_range_for_cpu(dev, dma_addr, 16, 32, DMA_TO_DEVICE);

which succeeds.

I don't consider this as a real problem, because DMA API abuse should be
caught by debug_dma_* function family. This patch lets us to simplify
the internal low-level implementation without chaning the driver visible
API.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-By: Subash Patel <subash.ramaswamy@linaro.org>
2012-05-21 15:06:13 +02:00
Marek Szyprowski
553ac78877 ARM: dma-mapping: introduce DMA_ERROR_CODE constant
Replace all uses of ~0 with DMA_ERROR_CODE, what should make the code
easier to read.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-By: Subash Patel <subash.ramaswamy@linaro.org>
2012-05-21 15:06:12 +02:00
Russell King
c23bfc3835 ARM: PCI: provide a default bus scan implementation
Most PCI implementations perform simple root bus scanning.  Rather than
having each group of platforms provide a duplicated bus scan function,
provide the PCI configuration ops structure via the hw_pci structure,
and call the root bus scanning function from core ARM PCI code.

Acked-by: Krzysztof Hałasa <khc@pm.waw.pl>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-05-13 17:12:17 +01:00
Linus Walleij
ce94df9c09 ARM: 7395/1: VIC: use the domain mapping function to assign handlers
This removes the internal functions for assigning IRQ
handlers to each interrupt in favor of using the internal
map iterator in the irq domain code.

Cc: Will Deacon <will.deacon@arm.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Acked-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-04-25 12:57:07 +01:00
Linus Walleij
fa943bed68 ARM: 7394/1: VIC: respect list of valid sources
The current IRQ domain implementation in the VIC allocates 32
interrupts for each VIC instance no matter whether the
controller actually use all the IRQs or not. Alter this so
we only allocate a domain up until the last IRQ marked valid.

Cc: Will Deacon <will.deacon@arm.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Acked-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-04-25 12:57:07 +01:00
Arnd Bergmann
6540afeae0 First batch of AT91 cleanup for 3.5 kernel.
- The biggest improvement of this series is the ability to compile several
   AT91 SoCs in one kernel image.
   For now on it's limited to the DT-enabled boards but we can compile all
   the core together.
 - The Kconfig series is stacked before other patches as it is simple and
   non-intrusive. Its goal is to remove too restrictive dependencies on
   SoC names. This will allow to add support for newer SoC seamlessly.
 - Some very "cosmetic" Kconfig changes are also added (entry names,
   comments, etc.).
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Merge tag 'at91-3.5-cleanup' of git://github.com/at91linux/linux-at91 into next/cleanup

Nicolas Ferre <nicolas.ferre@atmel.com> writes:
 First batch of AT91 cleanup for 3.5 kernel.
 - The biggest improvement of this series is the ability to compile several
   AT91 SoCs in one kernel image.
   For now on it's limited to the DT-enabled boards but we can compile all
   the core together.
 - The Kconfig series is stacked before other patches as it is simple and
   non-intrusive. Its goal is to remove too restrictive dependencies on
   SoC names. This will allow to add support for newer SoC seamlessly.
 - Some very "cosmetic" Kconfig changes are also added (entry names,
   comments, etc.).

* tag 'at91-3.5-cleanup' of git://github.com/at91linux/linux-at91: (19 commits)
  ARM: at91: add defconfig for device tree
  ARM: at91/dt: do not specify the board any more
  ARN: at91: introduce SOC_AT91xxx define to allow to compile SoC core support
  ARM: at91: add SOC_AT91SAM9 kconfig option to factorise select
  ARM: at91: pm select memory controler at runtime
  ARM: at91: move at91_init_leds to board init
  ARM: at91: do not pin mux the UARTs in init_early
  ARM: at91: drop at91_set_serial_console
  ARM: at91: uncompress: autodetect the uart to use
  ARM: at91: uncompress Store UART address in a variable
  hwrng: Kconfig: remove dependency for atmel-rng driver
  Input: Kconfig: remove dependency for atmel_tsadcc driver
  rtc: Kconfig: remove dependency for AT91 rtc driver
  ARM: at91/Kconfig: website link for AT91SAM9G20-EK
  ARM: at91/Kconfig: add AT91SAM9x5 family to AT91_EARLY_DBGU0 entry
  ARM: at91/Kconfig: add clarifications to AT91SAM9M10G45-EK entry
  ARM: at91/Kconfig: add comment to at91sam9x5 family entry
  ARM: at91/Kconfig: change at91sam9g45 entry
  ARM: at91: change AT91 Kconfig entry comment

Also updates the cleanup branch to v3.4-rc3.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-04-22 22:28:48 +02:00
Will Deacon
34af657916 ARM: 7377/1: vic: re-read status register before dispatching each IRQ handler
handle_IRQ may briefly cause interrupts to be re-enabled during soft IRQ
processing on the exit path, leading to nested handling of VIC interrupts.

Since the current code does not re-read the VIC_IRQ_STATUS register, this
can lead to multiple invocations of the same interrupt handler and
spurious interrupts to be reported.

This patch changes the VIC interrupt dispatching code to re-read the
status register each time, avoiding duplicate invocations of the same
handler.

Acked-and-Tested-by: H Hartley Sweeten <hsweeten@visionengravers.com>

Reviewed-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-04-10 09:27:42 +01:00
Rob Herring
c65f2abf54 ARM: remove ixp23xx and ixp2000 platforms
ixp2xxx platforms have had no real changes since ~2006 and the maintainer
has said on irc that they can be removed:

13:05 < nico> do you still care about ixp2000?
13:22 < lennert> not really, no
13:58 < nico> do you think we could remove it from the kernel tree?
14:01 < lennert> go for it, and remove ixp23xx too while you're at it

Removing will help simplify ARM consolidation in general and PCI re-work
specifically.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Randy Dunlap <rdunlap@xenotime.net>
Acked-by: Lennert Buytenhek <buytenh@wantstofly.org>
2012-04-06 08:26:18 -05:00
Linus Torvalds
12679a2d7e Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-arm
Pull more ARM updates from Russell King.

This got a fair number of conflicts with the <asm/system.h> split, but
also with some other sparse-irq and header file include cleanups.  They
all looked pretty trivial, though.

* 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (59 commits)
  ARM: fix Kconfig warning for HAVE_BPF_JIT
  ARM: 7361/1: provide XIP_VIRT_ADDR for no-MMU builds
  ARM: 7349/1: integrator: convert to sparse irqs
  ARM: 7259/3: net: JIT compiler for packet filters
  ARM: 7334/1: add jump label support
  ARM: 7333/2: jump label: detect %c support for ARM
  ARM: 7338/1: add support for early console output via semihosting
  ARM: use set_current_blocked() and block_sigmask()
  ARM: exec: remove redundant set_fs(USER_DS)
  ARM: 7332/1: extract out code patch function from kprobes
  ARM: 7331/1: extract out insn generation code from ftrace
  ARM: 7330/1: ftrace: use canonical Thumb-2 wide instruction format
  ARM: 7351/1: ftrace: remove useless memory checks
  ARM: 7316/1: kexec: EOI active and mask all interrupts in kexec crash path
  ARM: Versatile Express: add NO_IOPORT
  ARM: get rid of asm/irq.h in asm/prom.h
  ARM: 7319/1: Print debug info for SIGBUS in user faults
  ARM: 7318/1: gic: refactor irq_start assignment
  ARM: 7317/1: irq: avoid NULL check in for_each_irq_desc loop
  ARM: 7315/1: perf: add support for the Cortex-A7 PMU
  ...
2012-03-29 16:53:48 -07:00
Linus Torvalds
ef08e78268 Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dma
Pull slave-dmaengine update from Vinod Koul:
 "This includes the cookie cleanup by Russell, the addition of context
  parameter for dmaengine APIs, more arm dmaengine driver cleanup by
  moving code to dmaengine, this time for imx by Javier and pl330 by
  Boojin along with the usual driver fixes."

Fix up some fairly trivial conflicts with various other cleanups.

* 'next' of git://git.infradead.org/users/vkoul/slave-dma: (67 commits)
  dmaengine: imx: fix the build failure on x86_64
  dmaengine: i.MX: Fix merge of cookie branch.
  dmaengine: i.MX: Add support for interleaved transfers.
  dmaengine: imx-dma: use 'dev_dbg' and 'dev_warn' for messages.
  dmaengine: imx-dma: remove 'imx_dmav1_baseaddr' and 'dma_clk'.
  dmaengine: imx-dma: remove unused arg of imxdma_sg_next.
  dmaengine: imx-dma: remove internal structure.
  dmaengine: imx-dma: remove 'resbytes' field of 'internal' structure.
  dmaengine: imx-dma: remove 'in_use' field of 'internal' structure.
  dmaengine: imx-dma: remove sg member from internal structure.
  dmaengine: imx-dma: remove 'imxdma_setup_sg_hw' function.
  dmaengine: imx-dma: remove 'imxdma_config_channel_hw' function.
  dmaengine: imx-dma: remove 'imxdma_setup_mem2mem_hw' function.
  dmaengine: imx-dma: remove dma_mode member of internal structure.
  dmaengine: imx-dma: remove data member from internal structure.
  dmaengine: imx-dma: merge old dma-v1.c with imx-dma.c
  dmaengine: at_hdmac: add slave config operation
  dmaengine: add context parameter to prep_slave_sg and prep_dma_cyclic
  dmaengine/dma_slave: introduce inline wrappers
  dma: imx-sdma: Treat firmware messages as warnings instead of erros
  ...
2012-03-29 15:34:57 -07:00
Linus Torvalds
0195c00244 Disintegrate and delete asm/system.h
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Merge tag 'split-asm_system_h-for-linus-20120328' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-asm_system

Pull "Disintegrate and delete asm/system.h" from David Howells:
 "Here are a bunch of patches to disintegrate asm/system.h into a set of
  separate bits to relieve the problem of circular inclusion
  dependencies.

  I've built all the working defconfigs from all the arches that I can
  and made sure that they don't break.

  The reason for these patches is that I recently encountered a circular
  dependency problem that came about when I produced some patches to
  optimise get_order() by rewriting it to use ilog2().

  This uses bitops - and on the SH arch asm/bitops.h drags in
  asm-generic/get_order.h by a circuituous route involving asm/system.h.

  The main difficulty seems to be asm/system.h.  It holds a number of
  low level bits with no/few dependencies that are commonly used (eg.
  memory barriers) and a number of bits with more dependencies that
  aren't used in many places (eg.  switch_to()).

  These patches break asm/system.h up into the following core pieces:

    (1) asm/barrier.h

        Move memory barriers here.  This already done for MIPS and Alpha.

    (2) asm/switch_to.h

        Move switch_to() and related stuff here.

    (3) asm/exec.h

        Move arch_align_stack() here.  Other process execution related bits
        could perhaps go here from asm/processor.h.

    (4) asm/cmpxchg.h

        Move xchg() and cmpxchg() here as they're full word atomic ops and
        frequently used by atomic_xchg() and atomic_cmpxchg().

    (5) asm/bug.h

        Move die() and related bits.

    (6) asm/auxvec.h

        Move AT_VECTOR_SIZE_ARCH here.

  Other arch headers are created as needed on a per-arch basis."

Fixed up some conflicts from other header file cleanups and moving code
around that has happened in the meantime, so David's testing is somewhat
weakened by that.  We'll find out anything that got broken and fix it..

* tag 'split-asm_system_h-for-linus-20120328' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-asm_system: (38 commits)
  Delete all instances of asm/system.h
  Remove all #inclusions of asm/system.h
  Add #includes needed to permit the removal of asm/system.h
  Move all declarations of free_initmem() to linux/mm.h
  Disintegrate asm/system.h for OpenRISC
  Split arch_align_stack() out from asm-generic/system.h
  Split the switch_to() wrapper out of asm-generic/system.h
  Move the asm-generic/system.h xchg() implementation to asm-generic/cmpxchg.h
  Create asm-generic/barrier.h
  Make asm-generic/cmpxchg.h #include asm-generic/cmpxchg-local.h
  Disintegrate asm/system.h for Xtensa
  Disintegrate asm/system.h for Unicore32 [based on ver #3, changed by gxt]
  Disintegrate asm/system.h for Tile
  Disintegrate asm/system.h for Sparc
  Disintegrate asm/system.h for SH
  Disintegrate asm/system.h for Score
  Disintegrate asm/system.h for S390
  Disintegrate asm/system.h for PowerPC
  Disintegrate asm/system.h for PA-RISC
  Disintegrate asm/system.h for MN10300
  ...
2012-03-28 15:58:21 -07:00
David Howells
9f97da78bf Disintegrate asm/system.h for ARM
Disintegrate asm/system.h for ARM.

Signed-off-by: David Howells <dhowells@redhat.com>
cc: Russell King <linux@arm.linux.org.uk>
cc: linux-arm-kernel@lists.infradead.org
2012-03-28 18:30:01 +01:00
Linus Torvalds
9e4db1c3ee Merge branch 'platforms' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM platform updates from Russell King:
 "This covers platform stuff for platforms I have a direct interest in
  (iow, I have the hardware).  Essentially:
   - as we no longer support any other Acorn platforms other than RiscPC
     anymore, we can collect all that code into mach-rpc.
   - convert Acorn expansion card stuff to use IRQ allocation functions,
     and get rid of NO_IRQ from there.
   - cleanups to the ebsa110 platform to move some private stuff out of
     its header files.
   - large amount of SA11x0 updates:
   - conversion of private DMA implementation to DMA engine support
     (this actually gives us greater flexibility in drivers over the old
     API.)
   - re-worked ucb1x00 updates - convert to genirq, remove sa11x0
     dependencies, fix various minor issues
   - move platform specific sa11x0 framebuffer data into platform files
     in arch/arm instead of keeping this in the driver itself
   - update sa11x0 IrDA driver for DMA engine, and allow it to use DMA
     for SIR transmissions as well as FIR
   - rework sa1111 support for genirq, and irq allocation
   - fix sa1111 IRQ support so it works again
   - use sparse IRQ support

  After this, I have one more pull request remaining from my current
  set, which I think is going to be the most problematical as it
  generates 8 conflicts."

Fixed up the trivial conflict in arch/arm/mach-rpc/Makefile as per
Russell.

* 'platforms' of git://git.linaro.org/people/rmk/linux-arm: (125 commits)
  ARM: 7343/1: sa11x0: convert to sparse IRQ
  ARM: 7342/2: sa1100: prepare for sparse irq conversion
  ARM: 7341/1: input: prepare jornada720 keyboard and ts for sa11x0 sparse irq
  ARM: 7340/1: rtc: sa1100: include mach/irqs.h instead of asm/irq.h
  ARM: sa11x0: remove unused DMA controller definitions
  ARM: sa11x0: remove old SoC private DMA driver
  USB: sa1111: add hcd .reset method
  USB: sa1111: add OHCI shutdown methods
  USB: sa1111: reorganize ohci-sa1111.c
  USB: sa1111: get rid of nasty printk(KERN_DEBUG "%s: ...", __FILE__)
  USB: sa1111: sparse and checkpatch cleanups
  ARM: sa11x0: don't static map sa1111
  ARM: sa1111: use dev_err() rather than printk()
  ARM: sa1111: cleanup sub-device registration and unregistration
  ARM: sa1111: only setup DMA for DMA capable devices
  ARM: sa1111: register sa1111 devices with dmabounce in bus notifier
  ARM: sa1111: move USB interface register definitions to ohci-sa1111.c
  ARM: sa1111: move PCMCIA interface register definitions to sa1111_generic.c
  ARM: sa1111: move PS/2 interface register definitions to sa1111p2.c
  ARM: sa1111: delete unused physical GPIO register definitions
  ...
2012-03-27 18:17:02 -07:00
Linus Torvalds
281b05392f ARM: SoC specific updates
These changes are all specific to an soc family or the code for
 one soc. Lots of work for Tegra3 this time, but also a lot of other
 platforms. There will be another (smaller) set of soc patches later in
 the merge window for stuff that has dependencies on external trees or
 that was sent just before the merge window opened.
 
 The asoc tree added a few devices to the i.mx platform, which conflict
 with other devices added in the same place here.
 
 The tegra Makefile conflicts between a number of branches, mostly because
 of changes regarding localtimer.c, which was removed in the end.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull "ARM: SoC specific updates" from Arnd Bergmann:
 "These changes are all specific to an soc family or the code for one
  soc.  Lots of work for Tegra3 this time, but also a lot of other
  platforms.  There will be another (smaller) set of soc patches later
  in the merge window for stuff that has dependencies on external trees
  or that was sent just before the merge window opened.

  The asoc tree added a few devices to the i.mx platform, which conflict
  with other devices added in the same place here.

  The tegra Makefile conflicts between a number of branches, mostly
  because of changes regarding localtimer.c, which was removed in the
  end.

  Signed-off-by: Arnd Bergmann <arnd@arndb.de>"

Fix up some trivial conflicts, including the mentioned Tegra Makefile.

* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (51 commits)
  ARM: EXYNOS: fix cycle count for periodic mode of clock event timers
  ARM: EXYNOS: add support JPEG
  ARM: EXYNOS: Add DMC1, allow PPMU access for DMC
  ARM: SAMSUNG: Correct MIPI-CSIS io memory resource definition
  ARM: SAMSUNG: fix __init attribute on regarding s3c_set_platdata()
  ARM: SAMSUNG: Add __init attribute to samsung_bl_set()
  ARM: S5PV210: Add usb otg phy control
  ARM: S3C64XX: Add usb otg phy control
  ARM: EXYNOS: Enable l2 configuration through device tree
  ARM: EXYNOS: remove useless code to save/restore L2
  ARM: EXYNOS: save L2 settings during bootup
  ARM: S5P: add L2 early resume code
  ARM: EXYNOS: Add support AFTR mode on EXYNOS4210
  ARM: mx35: Setup the AIPS registers
  ARM: mx5: Use common function for configuring AIPS
  ARM: mx3: Setup AIPS registers
  ARM: mx3: Let mx31 and mx35 enter in LPM mode in WFI
  ARM: defconfig: imx_v6_v7: build in REGULATOR_FIXED_VOLTAGE
  ARM: imx: update imx_v6_v7_defconfig
  ARM: tegra: Demote EMC clock inconsistency BUG to WARN
  ...
2012-03-27 16:14:44 -07:00
Russell King
aae528d9a8 Merge branches 'acorn', 'ebsa110' and 'sa11x0' into platforms 2012-03-25 23:57:55 +01:00
Russell King
22eeaff367 ARM: sa1111: use dev_err() rather than printk()
Use dev_err() to report device specific errors rather than printk().

Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-03-24 11:30:12 +00:00
Russell King
924e1d4910 ARM: sa1111: cleanup sub-device registration and unregistration
Move the releasing of resources out of the release function - this
allows a cleaner and more conventional arrangement of the registration
failure paths and a saner unregistration process for these devices.

Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-03-24 11:30:12 +00:00
Russell King
21d1c7702e ARM: sa1111: only setup DMA for DMA capable devices
It's pointless registering the PS/2 interfaces with the dmabounce code
when there's no DMA support for these in hardware, so only setup the
DMA masks for two subdevices which support DMA - the OHCI and SAC.

Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-03-24 11:30:12 +00:00
Russell King
09a2ba2fa0 ARM: sa1111: register sa1111 devices with dmabounce in bus notifier
Use the bus notifier to register sa1111 devices with dmabounce, rather
than after the device has been registered, potentially racing with
driver binding.

Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-03-24 11:30:12 +00:00
Russell King
07be45f57e ARM: sa1111: provide a generic way to prevent devices from registering
Some platforms don't want certain devices to be registered, because,
eg, the interface is not wired.  Provide a way for platforms to
prevent various devices from being registered via a devid bitmask in
the platform data.

Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-03-24 11:29:52 +00:00
Will Deacon
e0b823e9a5 ARM: 7318/1: gic: refactor irq_start assignment
The irq_start and hwirq_base assignment code is fairly hairy and ended
up being difficult to read following a conflict resolution for 3.2.

This patch rearranges the code slightly to make it easier to read.

Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-03-24 09:38:53 +00:00
Russell King
a1be5d6496 ARM: riscpc: move time-acorn.c to mach-rpc
Nothing but RiscPC makes use of the Acorn timekeeping code, so move
it into mach-rpc.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-03-24 09:37:30 +00:00
Linus Torvalds
475c77edf8 Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci
Pull PCI changes (including maintainer change) from Jesse Barnes:
 "This pull has some good cleanups from Bjorn and Yinghai, as well as
  some more code from Yinghai to better handle resource re-allocation
  when enabled.

  There's also a new initcall_debug feature from Arjan which will print
  out quirk timing information to help identify slow quirks for fixing
  or refinement (Yinghai sent in a few patches to do just that once the
  new debug code landed).

  Beyond that, I'm handing off PCI maintainership to Bjorn Helgaas.
  He's been a core PCI and Linux contributor for some time now, and has
  kindly volunteered to take over.  I just don't feel I have the time
  for PCI review and work that it deserves lately (I've taken on some
  other projects), and haven't been as responsive lately as I'd like, so
  I approached Bjorn asking if he'd like to manage things.  He's going
  to give it a try, and I'm confident he'll do at least as well as I
  have in keeping the tree managed, patches flowing, and keeping things
  stable."

Fix up some fairly trivial conflicts due to other cleanups (mips device
resource fixup cleanups clashing with list handling cleanup, ppc iseries
removal clashing with pci_probe_only cleanup etc)

* 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci: (112 commits)
  PCI: Bjorn gets PCI hotplug too
  PCI: hand PCI maintenance over to Bjorn Helgaas
  unicore32/PCI: move <asm-generic/pci-bridge.h> include to asm/pci.h
  sparc/PCI: convert devtree and arch-probed bus addresses to resource
  powerpc/PCI: allow reallocation on PA Semi
  powerpc/PCI: convert devtree bus addresses to resource
  powerpc/PCI: compute I/O space bus-to-resource offset consistently
  arm/PCI: don't export pci_flags
  PCI: fix bridge I/O window bus-to-resource conversion
  x86/PCI: add spinlock held check to 'pcibios_fwaddrmap_lookup()'
  PCI / PCIe: Introduce command line option to disable ARI
  PCI: make acpihp use __pci_remove_bus_device instead
  PCI: export __pci_remove_bus_device
  PCI: Rename pci_remove_behind_bridge to pci_stop_and_remove_behind_bridge
  PCI: Rename pci_remove_bus_device to pci_stop_and_remove_bus_device
  PCI: print out PCI device info along with duration
  PCI: Move "pci reassigndev resource alignment" out of quirks.c
  PCI: Use class for quirk for usb host controller fixup
  PCI: Use class for quirk for ti816x class fixup
  PCI: Use class for quirk for intel e100 interrupt fixup
  ...
2012-03-23 14:02:12 -07:00
Linus Torvalds
c207f3a431 Generialize powerpc's irq_host as irq_domain
This branch takes the PowerPC irq_host infrastructure (reverse mapping
 from Linux IRQ numbers to hardware irq numbering), generalizes it,
 renames it to irq_domain, and makes it available to all architectures.
 
 Originally the plan has been to create an all-new irq_domain
 implementation which addresses some of the powerpc shortcomings such
 as not handling 1:1 mappings well, but doing that proved to be far
 more difficult and invasive than generalizing the working code and
 refactoring it in-place.  So, this branch rips out the 'new'
 irq_domain and replaces it with the modified powerpc version (in a
 fully bisectable way of course).  It converts all users over to the
 new API and makes irq_domain selectable on any architecture.
 
 No architecture is forced to enable irq_domain, but the infrastructure
 is required for doing OpenFirmware style irq translations.  It will
 even work on SPARC even though SPARC has it's own mechanism for
 translating irqs at boot time.  MIPS, microblaze, embedded x86 and c6x
 are converted too.
 
 The resulting irq_domain code is probably still too verbose and can be
 optimized more, but that can be done incrementally and is a task for
 follow-on patches.
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Merge tag 'irqdomain-for-linus' of git://git.secretlab.ca/git/linux-2.6

Pull irq_domain support for all architectures from Grant Likely:
 "Generialize powerpc's irq_host as irq_domain

  This branch takes the PowerPC irq_host infrastructure (reverse mapping
  from Linux IRQ numbers to hardware irq numbering), generalizes it,
  renames it to irq_domain, and makes it available to all architectures.

  Originally the plan has been to create an all-new irq_domain
  implementation which addresses some of the powerpc shortcomings such
  as not handling 1:1 mappings well, but doing that proved to be far
  more difficult and invasive than generalizing the working code and
  refactoring it in-place.  So, this branch rips out the 'new'
  irq_domain and replaces it with the modified powerpc version (in a
  fully bisectable way of course).  It converts all users over to the
  new API and makes irq_domain selectable on any architecture.

  No architecture is forced to enable irq_domain, but the infrastructure
  is required for doing OpenFirmware style irq translations.  It will
  even work on SPARC even though SPARC has it's own mechanism for
  translating irqs at boot time.  MIPS, microblaze, embedded x86 and c6x
  are converted too.

  The resulting irq_domain code is probably still too verbose and can be
  optimized more, but that can be done incrementally and is a task for
  follow-on patches."

* tag 'irqdomain-for-linus' of git://git.secretlab.ca/git/linux-2.6: (31 commits)
  dt: fix twl4030 for non-dt compile on x86
  mfd: twl-core: Add IRQ_DOMAIN dependency
  devicetree: Add empty of_platform_populate() for !CONFIG_OF_ADDRESS (sparc)
  irq_domain: Centralize definition of irq_dispose_mapping()
  irq_domain/mips: Allow irq_domain on MIPS
  irq_domain/x86: Convert x86 (embedded) to use common irq_domain
  ppc-6xx: fix build failure in flipper-pic.c and hlwd-pic.c
  irq_domain/microblaze: Convert microblaze to use irq_domains
  irq_domain/powerpc: Replace custom xlate functions with library functions
  irq_domain/powerpc: constify irq_domain_ops
  irq_domain/c6x: Use library of xlate functions
  irq_domain/c6x: constify irq_domain structures
  irq_domain/c6x: Convert c6x to use generic irq_domain support.
  irq_domain: constify irq_domain_ops
  irq_domain: Create common xlate functions that device drivers can use
  irq_domain: Remove irq_domain_add_simple()
  irq_domain: Remove 'new' irq_domain in favour of the ppc one
  mfd: twl-core.c: Fix the number of interrupts managed by twl4030
  of/address: add empty static inlines for !CONFIG_OF
  irq_domain: Add support for base irq and hwirq in legacy mappings
  ...
2012-03-21 10:27:19 -07:00
Boojin Kim
b7d861d939 DMA: PL330: Merge PL330 driver into drivers/dma/
Currently there were two part of DMAC PL330 driver for
support old styled s3c-pl330 which has been merged into
drivers/dma/pl330.c driver. Actually, there is no reason
to separate them now.

Basically this patch merges arch/arm/common/pl330.c into
drivers/dma/pl330.c driver and removes useless exported
symbol, externed function and so on.

The newer pl330 driver tested on SMDKV310 and SMDK4212 boards

Cc: Jassi Brar <jassisinghbrar@gmail.com>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Boojin Kim <boojin.kim@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-03-08 17:59:28 +05:30
Arnd Bergmann
abf45ce84c Merge branch 'imx/defconfig' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc
* 'imx/defconfig' of git://git.linaro.org/people/shawnguo/linux-2.6: (2 commits)
  ARM: defconfig: imx_v6_v7: build in REGULATOR_FIXED_VOLTAGE
  ARM: imx: update imx_v6_v7_defconfig

(upadte to v3.3-rc5)
2012-02-28 12:33:46 +00:00
Bjorn Helgaas
9f786d033d arm/PCI: get rid of device resource fixups
Tell the PCI core about host bridge address translation so it can take
care of bus-to-resource conversion for us.

CC: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-02-23 20:19:01 -07:00
Myron Stowe
e23e8c0690 ARM/PCI: Remove ARM's duplicate definition of 'pcibios_max_latency'
The patch series to re-factor PCI's 'latency timer' setup (re:
http://marc.info/?l=linux-kernel&m=131983853831049&w=2) forgot to
remove the ARM specific definition of 'pcibios_max_latency' once such
had been moved into the pci core resulting in ARM related compile
errors -
  drivers/built-in.o:(.data+0x230): multiple definition of
  `pcibios_max_latency'
  arch/arm/common/built-in.o:(.data+0x40c): first defined here
  make[1]: *** [vmlinux.o] Error 1

In the series, patch 2/16 (commit 168c8619fd) converted the ARM
specific version of 'pcibios_set_master()' to a non-inlined version.
This was done in preperation for hosting it up into PCI's core, which
was done in patch 10/16 (commit 96c5590058) of the series (and
where the removal of ARM's 'pcibios_max_latency' was overlooked).

Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-02-21 09:35:32 +00:00