Commit Graph

40 Commits

Author SHA1 Message Date
Linus Torvalds
a439f8f287 ARM: 64-bit DT updates for v4.8
The 64-bit DT changes are surprisingly small this time, we only add two
 SoC platforms: the ZTE ZX296718 Set-top-box SoC and the SocioNext
 UniPhier LD11 TV SoC, each with their reference boards.
 
 There are three new machines added for existing SoC platforms:
 
 - The Marvell Armada 8040 development board is an impressive quad-core
   Cortex-A72 machine with three 10gbit ethernet interfaces
 
 - Qualcomms DragonBoard 820c single-board computer is their current
   high-end phone platform in the 96boards form factor
 
 - Rockchip: Tronsmart Orion r86 set-top-box is a popular mid-range
   Android box based on the 8-core rk3368 SoC.
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Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM 64-bit DT updates from Arnd Bergmann:
 "The 64-bit DT changes are surprisingly small this time, we only add
  two SoC platforms: the ZTE ZX296718 Set-top-box SoC and the SocioNext
  UniPhier LD11 TV SoC, each with their reference boards.

  There are three new machines added for existing SoC platforms:

   - The Marvell Armada 8040 development board is an impressive
     quad-core Cortex-A72 machine with three 10gbit ethernet interfaces

   - Qualcomms DragonBoard 820c single-board computer is their current
     high-end phone platform in the 96boards form factor

   - Rockchip: Tronsmart Orion r86 set-top-box is a popular mid-range
     Android box based on the 8-core rk3368 SoC"

* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (91 commits)
  arm64: dts: berlin4ct: Add L2 cache topology
  arm64: dts: berlin4ct: enable all wdt nodes unconditionally
  arm64: dts: berlin4ct: switch to Cortex-A53 specific pmu nodes
  arm64: dts: Add ZTE ZX296718 SoC dts and Makefile
  arm64: dts: apm: Add DT node for APM X-Gene 2 CPU clocks
  arm64: dts: apm: Add X-Gene SoC hwmon to device tree
  arm64: dts: apm: Fix interrupt polarity for X-Gene PCIe legacy interrupts
  arm64: dts: apm: Add APM X-Gene v2 SoC PMU DTS entries
  arm64: dts: apm: Add APM X-Gene SoC PMU DTS entries
  arm64: dts: marvell: enable MSI for PCIe on Armada 7K/8K
  arm64: dts: ls2080a: Add 'dma-coherent' for ls2080a PCI nodes
  arm64: dts: rockchip: add Type-C phy for RK3399
  arm64: dts: rockchip: enable the gmac for rk3399 evb board
  arm64: dts: rockchip: add the gmac needed node for rk3399
  arm64: dts: rockchip: support the pmu node for rk3399
  arm64: dts: rockchip: change all interrupts cells to 4 on rk3399 SoCs
  arm64: dts: rockchip: add the tcpc for rk3399 power domain
  arm64: dts: rockchip: add efuse0 device node for rk3399
  arm64: dts: rockchip: configure PCIe support for rk3399-evb
  arm64: dts: rockchip: add the PCIe controller support for RK3399
  ...
2016-10-07 21:32:39 -07:00
Arnd Bergmann
37179033fc Merge branch 'dt/irq-fix' into next/dt64
* dt/irq-fix:
  arm64: dts: Fix broken architected timer interrupt trigger

This resolves a non-obvious conflict between a bugfix from
v4.8 and a cleanup for the exynos7 platform.
2016-09-14 22:48:29 +02:00
Arnd Bergmann
d20ced23c7 Merge branch 'dt/irq-fix' into fixes
* dt/irq-fix:
  arm64: dts: Fix broken architected timer interrupt trigger
2016-09-14 22:47:36 +02:00
Marc Zyngier
f2a89d3b2b arm64: dts: Fix broken architected timer interrupt trigger
The ARM architected timer specification mandates that the interrupt
associated with each timer is level triggered (which corresponds to
the "counter >= comparator" condition).

A number of DTs are being remarkably creative, declaring the interrupt
to be edge triggered. A quick look at the TRM for the corresponding ARM
CPUs clearly shows that this is wrong, and I've corrected those.
For non-ARM designs (and in the absence of a publicly available TRM),
I've made them active low as well, which can't be completely wrong
as the GIC cannot disinguish between level low and level high.

The respective maintainers are of course welcome to prove me wrong.

While I was at it, I took the liberty to fix a couple of related issue,
such as some spurious affinity bits on ThunderX, and their complete
absence on ls1043a (both of which seem to be related to copy-pasting
from other DTs).

Acked-by: Duc Dang <dhdang@apm.com>
Acked-by: Carlo Caione <carlo@endlessm.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-09-14 22:47:22 +02:00
Ian Campbell
76aa759168 ARM64: dts: bcm: Use a symlink to R-Pi dtsi files from arch=arm
The ../../../arm... style cross-references added by commit 9d56c22a78
("ARM: bcm2835: Add devicetree for the Raspberry Pi 3.") do not work in the
context of the split device-tree repository[0] (where the directory
structure differs). As with commit 8ee57b8182 ("ARM64: dts: vexpress: Use
a symlink to vexpress-v2m-rs1.dtsi from arch=arm") use symlinks instead.

[0] https://git.kernel.org/cgit/linux/kernel/git/devicetree/devicetree-rebasing.git/

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Frank Rowand <frowand.list@gmail.com>
Cc: Eric Anholt <eric@anholt.net>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Lee Jones <lee@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-rpi-kernel@lists.infradead.org
Cc: arm@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-09-09 17:47:16 +02:00
Yendapally Reddy Dhananjaya Reddy
5072ed1fa2 arm64: dts: Add PWM DT node for NS2
Add device tree entry for PWM support for Broadcom Northstar 2 SoC.

Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-08-08 11:03:58 -07:00
Linus Torvalds
ed780686de ARM: 64-bit DT updates for v4.8
Just as the 32-bit contents, the 64-bit device tree branch also contains
 a number of additions this release cycle.
 
 New platforms:
  - LG LG1313
  - Mediatek MT6755
  - Renesas r8a7796
  - Broadcom 2837
 
  Other platforms with larger updates are:
  - Nvidia X1 platforms (USB 3.0, regulators, display subsystem)
  - Mediatek MT8173 (display subsystem added)
  - Rockchip RK3399 (a lot of new peripherals)
  - ARM Juno reference implementation (SCPI power domains, coresight, thermal)
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Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull 64-bit ARM DT updates from Olof Johansson:
 "Just as the 32-bit contents, the 64-bit device tree branch also
  contains a number of additions this release cycle.

  New platforms:
   - LG LG1313
   - Mediatek MT6755
   - Renesas r8a7796
   - Broadcom 2837

  Other platforms with larger updates are:
   - Nvidia X1 platforms (USB 3.0, regulators, display subsystem)
   - Mediatek MT8173 (display subsystem added)
   - Rockchip RK3399 (a lot of new peripherals)
   - ARM Juno reference implementation (SCPI power domains, coresight,
     thermal)"

* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (118 commits)
  arm64: tegra: Enable HDMI on Jetson TX1
  arm64: tegra: Add sor1_src clock
  arm64: tegra: Add XUSB powergates on Tegra210
  arm64: tegra: Add DPAUX pinctrl bindings
  arm64: tegra: Add ACONNECT bus node for Tegra210
  arm64: tegra: Add audio powergate node for Tegra210
  arm64: tegra: Add regulators for Tegra210 Smaug
  arm64: tegra: Correct Tegra210 XUSB mailbox interrupt
  arm64: tegra: Enable XUSB controller on Jetson TX1
  arm64: tegra: Enable debug serial on Jetson TX1
  arm64: tegra: Add Tegra210 XUSB controller
  arm64: tegra: Add Tegra210 XUSB pad controller
  arm64: tegra: Add DSI panel on Jetson TX1
  arm64: tegra: p2597: Add SDMMC power supplies
  arm64: tegra: Add PMIC support on Jetson TX1
  Revert "ARM64: DTS: meson-gxbb: switch ethernet to real clock"
  arm64: dts: hi6220: Add pl031 RTC support
  arm64: dts: r8a7796/salvator-x: Enable watchdog timer
  arm64: dts: r8a7796: Add RWDT node
  arm64: dts: r8a7796: Use SYSC "always-on" PM Domain
  ...
2016-08-01 18:47:01 -04:00
Florian Fainelli
b2aa1bb2be This pull request brings in the Raspberry Pi 3 DT for its arm64
support.  Note that it also merges in the ethernet DT changes so that
 the Pi3's ethernet can also get the MAC address.
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Merge tag 'bcm2835-dt-64-next-2016-07-03' into devicetree-arm64/next

This pull request brings in the Raspberry Pi 3 DT for its arm64
support.  Note that it also merges in the ethernet DT changes so that
the Pi3's ethernet can also get the MAC address.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-07-05 20:47:49 -07:00
Pramod Kumar
5f1a067bfa dt: mdio-mux: Add mdio multiplexer driver node
Add integrated MDIO multiplexer driver node which contains
two mux PCIe bus and one ethernet bus along with phys
lying on these bus.

Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-06-10 23:24:54 -07:00
Gerd Hoffmann
02d0860364 ARM: bcm2837: dt: Add the ethernet to the device trees
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2016-06-07 15:23:08 -07:00
Eric Anholt
9d56c22a78 ARM: bcm2835: Add devicetree for the Raspberry Pi 3.
While this devicetree also works for booting in 32-bit mode, it's
placed in arm64 since it's a 64-bit CPU (as suggested by Arnd).

Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stephen Warren <swarren@wwwdotorg.org> (v1)
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2016-06-07 15:21:55 -07:00
Jon Mason
5dcc9c7618 arm64: dts: NS2: Add CCI-400 PMU support
Add support to the Northstar 2 Device tree file for the ARM CCI-400 PMU.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-05-31 11:00:28 -07:00
Jon Mason
1e0fdee81e arm64: dts: NS2: Add all of the UARTs
Add all of the UARTs present on NS2 and enable them in the SVK device
tree file.  Also, do some magic to make sure that uart3 is discovered as
ttyS0 (as that is the console UART).

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-05-31 11:00:27 -07:00
Yendapally Reddy Dhananjaya Reddy
5f2fb24141 arm64: dts: Enable GPIO for Broadcom NS2 SoC
This enables the GPIO support for Broadcom NS2 SoC

Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-05-31 11:00:26 -07:00
Yendapally Reddy Dhananjaya Reddy
97b1504a30 arm64: dts: enable pinctrl for Broadcom NS2 SoC
This enables the pinctrl support for Broadcom NS2 SoC

Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-05-31 11:00:25 -07:00
Anup Patel
ac9aae00f0 arm64: dts: Add SATA3 AHCI and SATA3 PHY DT nodes for NS2
We have one dual-port SATA3 AHCI controller present in
NS2 SoC.

This patch enables SATA3 AHCI controller and SATA3 PHY
for NS2 SoC in NS2 DT.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-05-31 11:00:24 -07:00
Linus Torvalds
2ec3240fd7 ARM: 64-bit DT updates for v4.7
We continue ramping up platform support for 64-bit ARM machines,
 with 111 individual non-merge changesets touching 21 platforms.
 
 The LG1312 platform is completely new and is the first ARM
 platform by LG that we support in the mainline kernel. Two other
 SoCs got added that are updated versions of existing SoC
 families, so the port mainly consists of new dts files:
 - The Hisilicon Hip06/D03 is the latest server platform
   from Huawei/Hisilicon, and follows the Hip05/D02 platform.
 - Rockchip RK3399 follows the 32-bit RK3288 that is popular
   in low-end Chromebooks and the 64-bit RK3368 that is mainly
   found in chinese Android TV boxes.
 
 The 96Boards HiKey based on the Hisilicon Hi6220 (Kirin 620)
 gets a long-awaited overhaul with a lot of devices enabled in
 the DT, so it should be much more usable with a mainline kernel
 now. See also
 https://plus.google.com/111524780435806926688/posts/PeGb2VsNhJd
 
 A lot of work went into enabling new device drivers on existing
 machines, but we also have a couple of new commercially
 available machines:
 
 - Google Pixel C laptop based on Tegra210
 - Hardkernel Odroid C2 Based on Amlogic Meson GXBB (S905)
 - Geekbuying GeekBox based on Rockchip RK3368
 
 And finally, a couple of reference or development platforms
 that are not end-user platforms but are used for trying out
 the respective SoC platforms:
 
 - Amlogic Meson GXBB P200 and P201 development systems
 - NXP Layerscape 1043A QDS development board
 - Hisilicon Hip06 D03 server board, as mentioned above
 - LG1312 Reference Design
 - RK3399 Evaluation Board
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Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM 64-bit DT updates from Arnd Bergmann:
 "We continue ramping up platform support for 64-bit ARM machines, with
  111 individual non-merge changesets touching 21 platforms.

  The LG1312 platform is completely new and is the first ARM platform by
  LG that we support in the mainline kernel.  Two other SoCs got added
  that are updated versions of existing SoC families, so the port mainly
  consists of new dts files:

   - The Hisilicon Hip06/D03 is the latest server platform from
     Huawei/Hisilicon, and follows the Hip05/D02 platform.

   - Rockchip RK3399 follows the 32-bit RK3288 that is popular in
     low-end Chromebooks and the 64-bit RK3368 that is mainly found in
     chinese Android TV boxes.

  The 96Boards HiKey based on the Hisilicon Hi6220 (Kirin 620) gets a
  long-awaited overhaul with a lot of devices enabled in the DT, so it
  should be much more usable with a mainline kernel now.  See also

     https://plus.google.com/111524780435806926688/posts/PeGb2VsNhJd

  A lot of work went into enabling new device drivers on existing
  machines, but we also have a couple of new commercially available
  machines:

   - Google Pixel C laptop based on Tegra210
   - Hardkernel Odroid C2 Based on Amlogic Meson GXBB (S905)
   - Geekbuying GeekBox based on Rockchip RK3368

  And finally, a couple of reference or development platforms that are
  not end-user platforms but are used for trying out the respective SoC
  platforms:

   - Amlogic Meson GXBB P200 and P201 development systems
   - NXP Layerscape 1043A QDS development board
   - Hisilicon Hip06 D03 server board, as mentioned above
   - LG1312 Reference Design
   - RK3399 Evaluation Board"

* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (104 commits)
  arm64: dts: marvell: add XOR node for Armada 3700 SoC
  dt-bindings: document rockchip rk3399-evb board
  arm64: dts: rockchip: add dts file for RK3399 evaluation board
  arm64: dts: rockchip: add core dtsi file for RK3399 SoCs
  dt-bindings: rockchip-dw-mshc: add description for rk3399
  arm64: dts: marvell: Use a SoC-specific compatible for xHCI on Armada37xx
  arm64: dts: marvell: Rename armada-37xx USB node
  arm64: dts: marvell: Clean up armada-3720-db
  Documentation: arm64: Add Hisilicon Hip06 D03 dts binding
  arm64: dts: Add initial dts for Hisilicon Hip06 D03 board
  arm64: dts: hip05: Add nor flash support
  arm64: dts: hip05: fix its node without msi-cells
  arm64: dts: r8a7795: Don't disable referenced optional clocks
  arm64: dts: salvator-x: populate EXTALR
  arm64: dts: r8a7795: enable PCIe on Salvator-X
  arm64: dts: r8a7795: Add PCIe nodes
  arm64: tegra: Add IOMMU node to GM20B on Tegra210
  arm64: tegra: Add reference clock to GM20B on Tegra210
  dt-bindings: Add documentation for GM20B GPU
  dt-bindings: gk20a: Document iommus property
  ...
2016-05-18 12:58:39 -07:00
Linus Torvalds
b6ae4055f4 arm64 perf updates for 4.7
- Support for the PMU in Broadcom's Vulcan CPU
 
 - Dynamic event detection using the PMCEIDn_EL0 ID registers
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Merge tag 'arm64-perf' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 perf updates from Will Deacon:
 "The main addition here is support for Broadcom's Vulcan core using the
  architected ID registers for discovering supported events.

   - Support for the PMU in Broadcom's Vulcan CPU

   - Dynamic event detection using the PMCEIDn_EL0 ID registers"

* tag 'arm64-perf' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: perf: don't expose CHAIN event in sysfs
  arm64/perf: Add Broadcom Vulcan PMU support
  arm64/perf: Filter common events based on PMCEIDn_EL0
  arm64/perf: Access pmu register using <read/write>_sys_reg
  arm64/perf: Define complete ARMv8 recommended implementation defined events
  arm64/perf: Changed events naming as per the ARM ARM
  arm64: dts: Add Broadcom Vulcan PMU in dts
  Documentation: arm64: pmu: Add Broadcom Vulcan PMU binding
2016-05-16 17:39:29 -07:00
Ashok Kumar
713755d724 arm64: dts: Add Broadcom Vulcan PMU in dts
Add "brcm,vulcan-pmu" compatible string for Broadcom Vulcan PMU.

Signed-off-by: Ashok Kumar <ashoks@broadcom.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2016-04-25 14:11:06 +01:00
Luke Starrett
a9abb475a4 arm64: dts: NS2 secondary core enablement via PSCI
Declare PSCI-1.0 node and enable CPU_ON method via PSCI.  Spin-table
memreserve has been removed as well as syscon based reset, as PSCI-1.0
expects reset implementation in firmware.

Signed-off-by: Luke Starrett <luke.starrett@broadcom.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-04-22 12:02:28 -07:00
Anup Patel
d69dbd9f41 arm64: dts: Add ARM PL022 SPI DT nodes for NS2
We have two ARM PL022 SPI instances in NS2 SoC. On NS2 SVK,
one of the ARM PL022 SPI host has Silabs si3226x slic connected
to chip-select #0 whereas second ARM PL022 SPI host has Atmel
AT25 EEPROM connected to chip-select #0.

This patch adds ARM PL022, Silabs si3226x, and Atmel AT25
DT nodes in NS2 DT and NS2 SVK DT respectively.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-04-13 10:34:29 -07:00
Anup Patel
59a5bedead arm64: dts: Move NS2 clock DT nodes to separate DT file
For more readabilty and consistency with other Broadcom SoCs, we move
all NS2 clock DT nodes from main SoC DT file to a separate DT file.

We also update the license header in ns2.dtsi as-per new Broadcom
convention.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-04-13 10:34:29 -07:00
Anup Patel
b2f9cd4845 arm64: dts: Add maintenance interrupt for GIC in NS2 DT
The KVM ARM64 requires GIC maintenance interrupt for VGIC emulation
so this patch adds the missing "interrupts" attribute to GIC node in
NS2 DT.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-04-13 10:34:28 -07:00
Anup Patel
538fb37c13 arm64: dts: Add ARM PL330 DMA DT node for NS2
We have one ARM PL330 DMA instance with 8 channels in
NS2 SoC. Let's enable it for NS2 in NS2 DT.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Pramod KUMAR <pramodku@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-04-13 10:34:28 -07:00
Jayachandran C
e6cc3be552 arm64: dts: vulcan: Update PCI ranges
The PCI memory windows available in vulcan.dtsi are limited to 128MB
for 32-bit BARs, and 4GB for 64-bit BARs. Given the memory mapped IO
space available in arm64, these windows can be increased substantially
to support more use cases.

The change increases the 32-bit window to 256MB and the 64-bit window
to 128 GB. The firmware on vulcan boards will use these ranges as well.

PCI IO windows are not supported on Vulcan, so remove them instead of
keeping an unused value.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-03-30 00:26:16 +02:00
Linus Torvalds
915c56bc01 ARM: 64-bit DT updates for v4.6
The arm64 device tree changes make up an increasing portion of
 the overall changes, so they are kept separate from the 32-bit
 devicetree changes and from the other arm64 updates.
 
 Newly added SoCs and boards are:
  - 96Boards Husky board
  - AMD Overdrive board
  - Amlogic S905 SoC and related Tronsmart boxes
  - Annapurna Labs Alpine family and development board
  - Broadcom Vulcan servers
  - Broadcom Northstar 2 SoC
  - Marvell Armada 3700 family and development board
  - Qualcomm MSM8996 SoC
 
 Additional devices are enabled for existing platforms from
 Applied Micro, Hisilicon, Mediatek, Qualcomm, and Renesas and
 there are a couple of other updates for Rockchip, Xilinx and
 NXP/Freescale.
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Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM 64-bit DT updates from Arnd Bergmann:
 "The arm64 device tree changes make up an increasing portion of the
  overall changes, so they are kept separate from the 32-bit devicetree
  changes and from the other arm64 updates.

  Newly added SoCs and boards are:
   - 96Boards Husky board
   - AMD Overdrive board
   - Amlogic S905 SoC and related Tronsmart boxes
   - Annapurna Labs Alpine family and development board
   - Broadcom Vulcan servers
   - Broadcom Northstar 2 SoC
   - Marvell Armada 3700 family and development board
   - Qualcomm MSM8996 SoC

  Additional devices are enabled for existing platforms from Applied
  Micro, Hisilicon, Mediatek, Qualcomm, and Renesas and there are a
  couple of other updates for Rockchip, Xilinx and NXP/Freescale"

* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (102 commits)
  ARM64: dts: amlogic: Add Tronsmart Vega S95 configs
  Documentation: devicetree: amlogic: Document Tronsmart Vega S95 boards
  ARM64: dts: Prepare configs for Amlogic Meson GXBaby
  Documentation: devicetree: amlogic: Document Meson GXBaby
  devicetree: bindings: Add vendor prefix for Tronsmart
  arm64: dts: qcom: Fix MPP's function used for LED control
  arm64: dts: alpine: add the MSIX node in the Alpine v2 dtsi
  arm64: dts: add the Alpine v2 EVP
  arm64: dts: marvell: re-order Device Tree nodes for Armada AP806
  arm64: dts: marvell: update Armada AP806 clock description
  arm64: dts: marvell: add Device Tree files for Armada 7K/8K
  arm64: dts: apm: Add DT node for X-Gene v2 SLIMpro Mailbox I2C Driver
  arm64: dts: apm: Mailbox device tree node for APM X-Gene v2 platform.
  arm64: dts: apm: Add DT node for X-Gene v1 SLIMpro Mailbox I2C Driver
  arm64: dts: apm: mailbox device tree node for APM X-Gene platform.
  arm64: dts: apm: Update GPIO to control power-off on X-Gene v2 platforms
  arm64: dts: apm: Update GPIO standby controller DT node for X-Gene v2 platforms
  arm64: dts: apm: Update GPIO to control power-off on X-Gene v1 platforms
  arm64: dts: salvator-x: enable USB 2.0 Host of channel 1 and 2
  arm64: dts: salvator-x: enable usb2_phy of channel 1 and 2
  ...
2016-03-20 15:26:57 -07:00
Zi Shen Lim
5bfb388987 arm64: Broadcom Vulcan support
Add a configuration option and a device tree for Broadcom's Vulcan
ARM64 processor. vulcan.dtsi has the on-chip blocks like the PCIe
controller, GICv3 with ITS, PMU, system timer and the pl011 UART.
vulcan-eval.dts has definitions for a basic evaluation board.

Vulcan's processor cores support the ARMv8.1 instruction set and
will use "brcm,vulcan" as the compatible property. The firmware
has PSCI 0.2 support for cpu wakeup.

Signed-off-by: Zi Shen Lim <zlim@broadcom.com>
[ updated and split dts - jchandra@broadcom.com ]
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-02-20 10:42:29 -08:00
Ray Jui
fd5e5dd56a arm64: dts: Add PCIe0 and PCIe4 DT nodes for NS2
This patch enables PCIe0 and PCIe4 for NS2 by adding
appropriate DT nodes in NS2 DT.

Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-02-12 15:49:12 -08:00
Anup Patel
6e79e7cf92 arm64: dts: Add ARM SP805 watchdog DT node for NS2
We have one ARM SP805 watchdog instance on NS2 for non-secure software
hence this patch adds appropriate watchdog DT node in NS2 DT.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Pramod KUMAR <pramodku@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-02-12 15:49:06 -08:00
Anup Patel
e99df8fd2b arm64: dts: Add ARM SP804 timer DT nodes for NS2
We have four ARM SP804 dual-mode timer instances in NS2 SoC
hence this patch adds appropriate DT nodes for NS2.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Pramod KUMAR <pramodku@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-02-12 15:48:05 -08:00
Anup Patel
efc877676d arm64: dts: Add SDHCI DT node for NS2
The IPROC SDHCI driver works fine for SDIO 3.0 on NS2 so let's enable
it for NS2 SoC in NS2 DT.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Vikram Prakash <vikramp@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-02-12 15:47:29 -08:00
Jon Mason
d8bd64c151 ARM64: dts: enable clock support for Broadcom NS2
Add device tree entries for clock support for Broadcom Northstar 2 SoC

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-11-20 10:15:42 -08:00
Anup Patel
c6fe9a2edf arm64: dts: Add BRCM IPROC NAND DT node for NS2
The NAND controller on NS2 SoC is compatible with existing
BRCM IPROC NAND driver so let's enable it in NS2 DT and
NS2 SVK DT.

This patch also fixes use of node labels in ns2-svk.dts.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Reviewed-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-11-16 10:52:02 -08:00
Ray Jui
7ac674e8df arm64: dts: Add I2C nodes for NS2
This patch adds iProc I2C DT nodes for NS2 and enable them for the NS2
SVK board

Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Vikram Prakash <vikramp@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-11-16 10:52:01 -08:00
Anup Patel
e8a6e265f5 arm64: dts: Add IPROC RNG200 DT node for NS2
We have IPROC RNG200 hardware random number generation in
NS2 SoC, lets enable it for NS2 in NS2 DT.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Pramod KUMAR <pramodku@broadcom.com>
Reviewed-by: Vikram Prakash <vikramp@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-11-16 10:51:59 -08:00
Anup Patel
5b31d8759b arm64: dts: Add ARM PMUv3 DT node in NS2 DT
The NS2 SoC has Cortex-A57 CPUs which support ARM PMUv3 so,
lets enable ARM PMUv3 in NS2 DT.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Vikram Prakash <vikramp@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-11-16 10:51:58 -08:00
Anup Patel
5b467c3b2d arm64: dts: Add syscon based reboot in DT for NS2
To reset NS2, we simply have to write '0' to BIT[1] at offset 0x90
of CRMU space.

The above can be easily achieved by writing 0xfffffffd at offset 0x90
using syscon-reboot driver. We don't need to have separate driver for
rebooting NS2.

This patch enables syscon-reboot driver for NS2 using DT.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-11-16 10:51:56 -08:00
Anup Patel
6ec5f3c526 arm64: dts: Add SMMU DT node for NS2
The SMMU-500 driver is already available in Linux kernel. Let's
enable it for NS2 in DT.

This patch keeps mmu-masters attribute empty so that driver patches
can later extend this attribute when adding device DT nodes.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-11-16 10:51:54 -08:00
Anup Patel
33a93aa490 arm64: dts: Add L2-cache DT node for NS2
Recent kernels requires cache hierrachy to be defined via DT hence
this patch updates NS2 DT accordingly.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Sandeep Tripathy <tripathy@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-11-16 10:51:53 -08:00
Ray Jui
6aad8bf993 arm64: dts: Add Broadcom North Star 2 support
Add Broadcom NS2 device tree binding document. Also add initial device
tree dtsi for Broadcom North Star 2 (NS2) SoC and board support for NS2
SVK board

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-07-29 22:07:11 +02:00