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ac9aae00f0
We have one dual-port SATA3 AHCI controller present in NS2 SoC. This patch enables SATA3 AHCI controller and SATA3 PHY for NS2 SoC in NS2 DT. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> |
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Makefile | ||
ns2-clock.dtsi | ||
ns2-svk.dts | ||
ns2.dtsi | ||
vulcan-eval.dts | ||
vulcan.dtsi |