* Fix IPQ4019 i2c0 node
* Add GSBI7 on IPQ8064
* Add misc APQ8060 devices
* Fixup USB related devices on APQ8064 and MSM8974
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZQBRbAAoJEFKiBbHx2RXV3coP/R9aQZy2x4tbkEm8YuUIJbkI
Jiw3ACIw74UoAiGBJ2JqCDDBegY8ZY2x+7ttgCWrqdqT9eU8ktlw0Uy/9SitxVMD
SrM2IygKVQiIZy7xIDBAZe4+OYCJk17HJZtl6jt9IYSNTTvkot0V4pePNu6pg4sH
OIg4l6au3jT483pPu3faHzPc7NU7BECT67u3JWpJdHSIE3kXaFFySIUNK+YmR37H
hTpHxCBoIPQSc3zTzbLSYpGA46sB2eIKjk1cQpyvOrITzL+W1pRs0OSEkY7pJJPX
Mm7HfGRxL6tNHWZ6KiB8QrEx2/PemSmXVKzluebyN2a4JBrBZGhSrFagSOLoye3E
eVnOZsBQL2yosgjKEUcH+K1wRHSjgFJAcmnWaY5DQUqieAjzuHPp1Y+ePUkkB3m5
w/xEVxNVxhRp2Id4gxn52/VNbkhzh3MhPr+ILdZlGUIZPC9PGfNpoGx53/YJB2xh
ZBq3HMAR81f1tTOgRErN54Kl7R2NtXLCVTjP2gCIKRiC7QgSn64/ysWijZEA8a3O
7jyfR87LJuxQda0uOz41abyvm9cGlc2AL+kSOqWgKYNKyqNahIwCrDYtoYStGxvs
34V6lzZ4rFYP3LqP3gXAROiqp/yt6g6U0YS3YOiunYIIfZeF6FmpLuUK8YTc4EqD
5TBr7HLNEAwz2SxmpAsW
=ynzd
-----END PGP SIGNATURE-----
Merge tag 'qcom-dts-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt
Qualcomm Device Tree Changes for v4.13
* Fix IPQ4019 i2c0 node
* Add GSBI7 on IPQ8064
* Add misc APQ8060 devices
* Fixup USB related devices on APQ8064 and MSM8974
* tag 'qcom-dts-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
ARM: dts: add core I2C devices to the APQ8060 Dragonboard
ARM: dts: add GSBI8 defines to the MSM8660 family
ARM: dts: Qualcomm APQ8060 DragonBoard ALS sensor
ARM: dts: add XOADC and IIO HWMON to MSM8660/APQ8060
ARM: dts: qcom: ipq4019: fix i2c_0 node
ARM: dts: qcom: add gsbi7 serial to ipq8064 SoC device tree
ARM: dts: qcom-apq8064: Collapse usb support into one node
ARM: dts: qcom-msm8974: Add HS usb node and OTG detection mechanisms
ARM: dts: qcom: add charger otg regulator
ARM: dts: qcom: Remove s4/5vs1,2 from RPM pm8941 control
Signed-off-by: Olof Johansson <olof@lixom.net>
This removes support for the Whistler board, which only a handful of
people ever had access to and which doesn't provide any features over
other Tegra20 devices that we support.
Also this cleans up some PCI related device tree content in preparation
for a future DTC release that has additional checks for the PCI bus.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAllDkUETHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoZshD/4sRJTnD5ssHfPmERnv3ezZmKw6ej/A
lqnl29GX59JJ9EN3sbeUXvdTw0uYlAaw3UX55tfPhA57spaL/fH4GcdBnEcfaDKd
i0LhtnBCY+jopaavQHKB0fyt9U7EJyXIq8t23yR1LWINp0frEiPoQUt89ttegTPs
rJyJg//qa5egRsL1U/fN3pqqqmCQlboPOP2YLsR+D5kFShUA6qxDMWwqXKvR1V+v
QIEOCC6stUDKRosEGj4B1i9AMoi2LgSQd+dszVOZMaycnPycunQ/ozPcgN98IqDn
0m4Y2VC6ac6l4eaA9RWyZai3YMF+eK2ZWOHbtbfT9z6+NEBUJeIrG7AmSsM2TtYQ
vfCG5Tz3Ie8mgVUZ/wD+FE8aIPgVgCYYjypt0Kg/eREgiHvAeswp/N/YAGHDsiI6
tRzH+e0EDIndEyNYW7/Eb5jaJ/ueqsgLZkLIoExpvRlHmZTGCnAfWvvqnu8pVLRe
cDzbkYgop/F52IJ5iE8QqDeAY098jum9YPafDIovsZRTV6KB50DJ32LsAZPrUfCg
DhMGpAiENUkRv1hC4EWvMvg2VfecAQBnSuddNFwpmwsFcBLTsXtoDEO+61K41tym
cTfJ+Xnm6ziLvLheCEZFqWLCPyRNijrhmQ/YNiS+fatJlNUKnw2WcnGEAWkSOhhQ
DvGm2hZMJ2rzkw==
=Il+U
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.13-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
ARM: tegra: Device tree changes for v4.13-rc1
This removes support for the Whistler board, which only a handful of
people ever had access to and which doesn't provide any features over
other Tegra20 devices that we support.
Also this cleans up some PCI related device tree content in preparation
for a future DTC release that has additional checks for the PCI bus.
* tag 'tegra-for-4.13-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: dts: tegra: fix PCI bus dtc warnings
ARM: tegra: remove Whistler support
Signed-off-by: Olof Johansson <olof@lixom.net>
This tag is about bringing the EMAC support to the H3 boards.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJZQZqLAAoJEBx+YmzsjxAgyn0P/3ZYfm7/aNwEBs7OjDv9mFb+
0b7nuSd2meiGcJKZXeimrYeFEUUEgFBNB++yHXSkVOpIdgf1RGO5KrCFhqfQcpq4
uluwtpNoWHeDp5vg1Oa93gJSg31r/a/m0r+Tp+xfDShZUrJr30YSn+7XVammTJov
KW9SfX2z3re1dB1zsxojPA6CZxuUCzMBGfx/bJ8p9UqKAYdAHcKsLNSlc8ykTG3/
2FooaMn8pPfeeSq6O8HFJLSFEYc48Hkcyy6ZFDqWoUeG0gLyB8jl/5xfsEEfLllW
ljvRDT499uoRLpOS4LUMyavSZAiBvyqv2tz+8bMiHqEzTieVWS9UEKDJvsAe+7Js
jWo5EHvLay3/jRMCdIYmR2xcomiyUxEWwqiCQaNnVOiKB8b+SmznuJZhcPJeTDdD
SBjn1iTFnl60UAOJ0IKsIta9jdiJ05bmQawpEqVpMvjvDvakLqBXUVH8EDm/wBEH
T6qY33Yv7dORKEws06duB4+fpQ+T6Gmeihwuyi4t5ogDhXOMrb662uztEaUHb78Q
7DOL7hunzyhLJYFmPRo6Ot01j1K2mhuD27NbP1WiN2zSf3t0c9m0GZCS2rGfD9vV
Aw6tccyQed4w3gPxA7AZz91336tIGvMwEVkn0AR6bO0fGrceQ9V80Ff8xaZjtF14
Pjx3BTBE/9dW1pPqHJlm
=1g1O
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-h3-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner H3 changes for 4.13
This tag is about bringing the EMAC support to the H3 boards.
* tag 'sunxi-dt-h3-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: sun8i: h3: Enable EMAC with external PHY on Orange Pi Plus 2E
arm: sun8i: orangepi-zero: Enable dwmac-sun8i
ARM: sun8i: bananapi-m2-plus: Enable dwmac-sun8i
ARM: sun8i: orangepi-plus: Enable dwmac-sun8i
arm: sun8i: nanopi-neo: Enable dwmac-sun8i
arm: sun8i: orangepi-pc-plus: Set EMAC activity LEDs to active high
arm: sun8i: orangepi-2: Enable dwmac-sun8i
arm: sun8i: orangepi-one: Enable dwmac-sun8i
arm: sun8i: orangepi-pc: Enable dwmac-sun8i
arm: sun8i: sunxi-h3-h5: add dwmac-sun8i ethernet driver
arm: sun8i: sunxi-h3-h5: Add dt node for the syscon control module
ARM: sunxi: h3-h5: Convert R_CCU raw numbers to macros
Signed-off-by: Olof Johansson <olof@lixom.net>
The usual chunk of patches. The most notable improvements are the power
supplies improvements (battery and AC-IN), crypto support for the sun5i
family, HDMI support for the A10s, plus a lot of new things for the V3S and
the A83T.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJZQZJwAAoJEBx+YmzsjxAgx04QAKdl/M8KtGRCXaKC0AiAloQo
XNL1j2ylkSviQ19XP+1UjgtJq+86iNZCZ9iHegZuaHBzSP/t+8gZ8gbEexBz7lRz
ybIBRMcuMx9uO7aTKH74MGpIQWlZp6dziWbL0kDOKoIaXWyHT0/iftwuOsqDrC3H
K82pmg7OrNgmtApBDyqGMwwSLosrXuMyycsB1moyE/xbdcsKJmISJ3l9Kron8cyK
bi4CNoJ/J4Z1S6SWYUAQiRVYq8+DYz09dZgkyn4YlwRw30Sddzg11qduUVLCeYcD
BAERcJrzrHZLxOP6Cr6/5VvKDSvLN3poJXRIXRGzz7bAMVracOGIqC4PJ5bvduJ9
x0jeVPdMNNfRLXfeLFymBArGiSwfOeYcZJK4PzQx1M1mksDmFKQ9MxJwPNYhxT7I
lssOo+LRg2zdotxVd7zXNOc8FdY5zyi2ThhmUFwTDVRKnq6X+r4iyxosGOd3sPkd
/aOzyT+cdxC7vDoHfTfqRR9ZHBoLiWdD8+XBEQvjrMdENoFOaeys1aZle1/ZpR8J
O8kl6YyDxVNBxi9E8oO72DDM5U7pZYZG7XJsWnEOmTEwn1Xl6+89XQ/jvFdwHxZA
dIbchAn8gqoqe9vu9WSmBh4Tt1BIK5nI97B0KVMMeAgDx5gt7HBNKqcq1Ev34T4u
lpe4MRlx094nCukVA7Fm
=fwEx
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner DT changes for 4.13
The usual chunk of patches. The most notable improvements are the power
supplies improvements (battery and AC-IN), crypto support for the sun5i
family, HDMI support for the A10s, plus a lot of new things for the V3S and
the A83T.
* tag 'sunxi-dt-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (47 commits)
ARM: sun6i: a31s: primo81: Enable battery power supply
ARM: sun6i: a31s: primo81: Change USB OTG to OTG mode
ARM: sun8i: a83t: Add dt node for the syscon control module
ARM: sun8i: a83t: Add device node for R_PIO
ARM: sun8i: v3s: add device nodes for DE2 display pipeline
ARM: dts: sunxi: add SoC specific compatibles for the crypto nodes
ARM: sun5i: add a cryptographic engine node
ARM: sun8i: a83t: Add device node for PRCM
ARM: dts: sun8i: h3: Add initial NanoPi M1 Plus support
ARM: dts: orange-pi-zero: add node for SPI NOR
ARM: sun7i: a20: cubietruck: Tie AXP209's USB power supply to USB PHY
ARM: sun6i: a31: hummingbird: Enable AXP221's ACIN power supply
ARM: sun4i: a10: cubieboard: Enable AXP209's ACIN power supply
ARM: sun7i: a20: bananapi-m1-plus: Enable AXP209's ACIN power supply
ARM: sun7i: a20: cubieboard2: Enable AXP209's ACIN power supply
ARM: sun7i: a20: cubieboard2: Move usb_otg node for alphabetical ordering
ARM: sun8i: a83t: cubietruck-plus: Enable SPDIF output
ARM: sun8i: a83t: cubietruck-plus: Add LED device nodes
ARM: sun8i: a83t: Add device node for SPDIF transmitter
ARM: sun8i: a83t: Add device node for DMA controller
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- minor reorganization to support different busses
- add/use real clock controller
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJZQW1yAAoJEFk3GJrT+8ZloYUP/24OL8focZDhH6ehDYi3rQPb
qddthnw/dlvSX1fS1U1HYNvBzKs5yUaKLNsD4d1Zq9Ldc3eDgnss7hT3l4H+lUdK
DzxkwHhSdqwuxB/d6v2YcpP7IEUUflmKWhltr1Em7528zHTUnIbxwYt+afPYU2kb
C1HQ+M1L7ehf1w5A0MlyRTVukYKAfs8IJ7Sp2Zw/BGNH+vW11Ao83Suy45lbT6Ce
v5fiRBAAXdr0XnSF68g1/LkTN1tPy5wHDPBNCPG9lU2TUvidjOb33r2ICG8jDwna
FuHo3spLn+O02VtisDp42b6cLN2nMsyWyNObkpfvMCddR1MAn4efygVehcm568wI
qndAZJB54qcYRk5gUji1pEklqicnZXXLFZtQq0MITbBXVRXu0XapxE+sik9fOXw4
XFt5+trVbPVqJ/O2MiG12HiPSc5Wbudwen3ihqpzMKOxoKjOCEBaEiaOmQmUQ2/q
zELTcMdiYeetebAG1iLddSydmDGoru+HoPBLNAsFZ2IHv+TGtYYNcFJlnSPiApSv
rAYk5hGhubamLP9Y8UZQyeDhwFNLNIqVOJ+WZhxjAJPxMNaKZCoxkgXOiq0r+Otk
4NF3+tPrAEqMPmmUPL5ME/RQ4v2+QL8iHjXB8A1nnb62cI6jPpbYV/xmLx8Dpmkv
HWFjc+EA+tU77fqaPso8
=3gA0
-----END PGP SIGNATURE-----
Merge tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt
Amlogic 32-bit DT changes for v4.13:
- minor reorganization to support different busses
- add/use real clock controller
* tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8: add and use the real clock controller
ARM: dts: meson: Extend L2 cache controller node for Meson8 and Meson8b
ARM: dts: meson8b: inherit meson.dtsi from meson8b.dtsi
ARM: dts: meson: organize devices in their corresponding busses
Signed-off-by: Olof Johansson <olof@lixom.net>
Note that Baruch's changes are fixes that are currently included in v4.12-rc2,
but they are also included here in order to keep this tag based off v4.12-rc1.
Please pull the following:
- Rafal adds CPU and thermal zones to the Northstar (BCM5301X) Device Tree and he
also adds the MDIO controller nodes for later use by USB PHYs
- Eric adds support for the V3D engine and Ethernet switch on the Cygnus
platforms, he also adds a set of Device Tree sources and include files for the
Raspberry Pi 3 (BCM2837) to be used with the ARM/Linux kernel,
- Jon adds CPU and thermal zones to the Northstar Plus Device Tree files
- Stefan updates the Raspberry Pi DTS files with thermal trip points and zones,
adds support for the USB OTG on the Raspberry Pi Zero which includes the
proper dwc2 configuration, a generic USB PHY and finally the enabling of the
OTG controller by including the proper DTS include file
- Gerd switches the Raspberry Pi DTS files to use the SDHOST controller (faster
than the SDHCI)
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJZQEOMAAoJEIfQlpxEBwcEDh4QALPsHSHfEpMgpKAE87OWryhV
QGfPDNeSQElTNmeSfi/cytdy7yTAw/pJYsLxpyDoJ/a+Dac58Jd3gqmhSN6Gw6cd
vND9cxZ/tyadHbcqtmnse+5QO7nDH8xFwUEg3yLP50ieQ6Hlqbdv5USvKHTC1Xi3
5qXjlTTdcATRh6X+tKw8tTBOcgPPt4ZiV2Xzl59uqV468QbTZC+sh5ZskgIZBaZE
u1rfTXnEAcFT/5xle0CEFP4/yPc6gyZFdnXCQw1hmTimOUW8tlqsHI0S1CGY+pzK
nxSDOyDYHHHb0HvbJdYC22VE8CLBYIFal6W+kGxFBpP16elxTIke5N12x/xx2WFp
jCcLJj0PDdGXotaJYSHMuHTQuvKo7hOTU7oWgFHZGdTZNkMA3FWPInbT7v056SNG
TkfcC86077gaptIshNTCqZCfmm0SVd5oCSyi7kCulcS6tqKMgviaMiqlp0DLnxsO
bZpYIhdiScHheWy3tifTUBbhiGBy7R57ttMRP0oloOVT+Xgmg1/6+jaN6BLShiZp
BaOq4IoNwkSDJyVHZEMl81KHFqWN13g+P3wqnNIRpH4t94oo7uM2DXoVsVfsISY0
uQmWI07SZkw55NkCgn2bVeyzFW1RfW0vFYef9prqjfB4egKRBoZHqzMAnOeQmsMP
s5w93RzKj/o7r2CQzjzX
=aDbe
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.13/devicetree' of http://github.com/Broadcom/stblinux into next/dt
This pull request contains Broadcom ARM-based Device Tree changes for 4.13.
Note that Baruch's changes are fixes that are currently included in v4.12-rc2,
but they are also included here in order to keep this tag based off v4.12-rc1.
Please pull the following:
- Rafal adds CPU and thermal zones to the Northstar (BCM5301X) Device Tree and he
also adds the MDIO controller nodes for later use by USB PHYs
- Eric adds support for the V3D engine and Ethernet switch on the Cygnus
platforms, he also adds a set of Device Tree sources and include files for the
Raspberry Pi 3 (BCM2837) to be used with the ARM/Linux kernel,
- Jon adds CPU and thermal zones to the Northstar Plus Device Tree files
- Stefan updates the Raspberry Pi DTS files with thermal trip points and zones,
adds support for the USB OTG on the Raspberry Pi Zero which includes the
proper dwc2 configuration, a generic USB PHY and finally the enabling of the
OTG controller by including the proper DTS include file
- Gerd switches the Raspberry Pi DTS files to use the SDHOST controller (faster
than the SDHCI)
* tag 'arm-soc/for-4.13/devicetree' of http://github.com/Broadcom/stblinux:
ARM: dts: bcm2835-rpi-zero: Enable OTG mode
ARM: dts: bcm283x: Add generic USB PHY
ARM: dts: bcm283x: Add dtsi for OTG mode
ARM: dts: Cygnus: Add the ethernet switch and ethernet PHY
ARM: dts: NSP: Add Thermal Support
ARM: dts: Cygnus: Add BCM11360's V3D device
ARM: dts: BCM5301X: Specify MDIO bus in the DT
ARM: dts: BCM5301X: Add CPU thermal sensor and zone
ARM: dts: bcm283x: switch from &sdhci to &sdhost
ARM: dts: bcm283x: Add CPU thermal zone with 1 trip point
ARM: dts: Add devicetree for the Raspberry Pi 3, for arm32 (v6)
Signed-off-by: Olof Johansson <olof@lixom.net>
following (and including) the new Mali Midgard binding; a lot of
improvements for the rk3228/rk3229 socs (tsadc, operating points,
usb, clock-rates, pinctrl, watchdog); finalizing the rk1108->rv1108
rename and adc buttons for the rk3288 firefly boards.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlk5x+gQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgVOmB/sHN5YBQCwdlermcO75CiLktacneQ6qcom2
GCBHfKwXxmey7puB8cKfQ1IgvvsKmXU1+QbUDjxD13p7b139WVRM3VEokOiSR7cl
XjGFFy9u6ECfPRpJfPBN/8oENcZ1N94S3gfhCwgcF6JDkumMI4DWVTLD4lZLeIcR
LTfZMddSevITXMzrWh0+Q9/TgnJbD58x4lSxs5m85h/8JDSfqdsijs/j2HJrBHPv
01NwQBm8w6rmTNL3UGfqDeUZTnmaczXRf2sgEr5ORLln2Qn++FpUaJiRPUdtYRs7
NEWLppFQeykoxgTQnttkt8oOyaKfNS3PsvwgA7R35w5HnbEtXcDK
=b2HZ
-----END PGP SIGNATURE-----
Merge tag 'v4.13-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
A bunch of changes including mali gpu nodes for rk3288 boards
following (and including) the new Mali Midgard binding; a lot of
improvements for the rk3228/rk3229 socs (tsadc, operating points,
usb, clock-rates, pinctrl, watchdog); finalizing the rk1108->rv1108
rename and adc buttons for the rk3288 firefly boards.
* tag 'v4.13-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: enable usb for rk3229 evb board
ARM: dts: rockchip: add usb nodes on rk322x
ARM: dts: rockchip: add adc button for Firefly
ARM: dts: rockchip: enable ARM Mali GPU on rk3288-veyron
ARM: dts: rockchip: enable ARM Mali GPU on rk3288-firefly
ARM: dts: rockchip: enable ARM Mali GPU on rk3288-rock2-som
ARM: dts: rockchip: add ARM Mali GPU node for rk3288
dt-bindings: gpu: add bindings for the ARM Mali Midgard GPU
ARM: dts: rockchip: set a sane frequence for tsadc on rk322x
ARM: dts: rockchip: add operating-points-v2 for cpu on rk322x
ARM: dts: rockchip: set default rates for core clocks on rk322x
ARM: dts: rockchip: add second uart2 pinctrl on rk322x
ARM: dts: rockchip: correct rk322x uart2 pinctrl
ARM: dts: rockchip: add watchdog device node on rk322x
clk: rockchip: add clock-ids for more rk3228 clocks
clk: rockchip: add ids for camera on rk3399
ARM: dts: rockchip: fix rk322x i2s1 pinctrl error
ARM: dts: rockchip: rename RK1108-evb to RV1108-evb
ARM: dts: rockchip: rename core dtsi from RK1108 to RV1108
ARM: dts: rockchip: Setup usb vbus-supply on rk3288-rock2
Signed-off-by: Olof Johansson <olof@lixom.net>
EV3 battery support, DMA support for MUSB, and non-critical fixes to
GPIO nodes of DA850's GPIO controller and GPIO expander available on
DA850 EVM.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZOSmIAAoJEGFBu2jqvgRNFNUP/irdqTUCOPUdpHS+Qrsz1+CE
4U0VpEvFnrlRqJa97zZ1Tps71x0UFfIcVJDveY8rTGK4rMNR6pgalf8PIT+65UVi
exWxkF+OIOjqS6wKu9zN6yn8RemNViiAqtGwcoI9AUAeX+dBg7IZ58bBGAtNf0uy
5Bn99C/5jompTPUPSnZTv5ZW0BZmv8El5WUL3wQh4nT24BzfrAI0miI3d8lW5MKF
/ttkinxeFy9xZEaE+xOKkGtcg4z4JhfalEHtCQhRweE+VJJwEGwdghFs3AT3GLO8
ksRufJzB1R/KEexL9qeHWY+VXRVF1tbdzbDcdrHjqxYUlTVxda5+36NOYANzz3NT
heGXn4mAPm5YiE78ygV7dMaaSMlq6ahjmVSmGjmMvUHFSUaK4WVS8OVJxOmZhi6k
mkxaJ2PIyzFBUlpu35435VqkAc7k5EyKni+HilW5kg4a2o3K0HjS8M1tvf/CkvVk
3evOnVqHare4UajPCQiIPnbSld3fXPl/g7dxLbyXBPY1FtrWxK9Vz11TdpzkiNAy
g2TJFJSQ39lStamW3i1ZAMzej0QCQnsJnZsY7e6JHHfJBxvvKiy3pjlZqhHN7N9M
joFSwaaye05HKacLhKGkSN/NY5fPHDEixc8V1NeoqODan3XoCv6naIjAXMDObASu
vxUIUeg4o7xHjnuGgQ7h
=ZLlm
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v4.13/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt
Miscellaneous DT support updates for DA850. Includes Lego mindstorms
EV3 battery support, DMA support for MUSB, and non-critical fixes to
GPIO nodes of DA850's GPIO controller and GPIO expander available on
DA850 EVM.
* tag 'davinci-for-v4.13/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: da850-evm: fix tca6416 for use with GPIO hogs
ARM: dts: da850: Add interrupt-controller property to gpio node
ARM: dts: da850: Add CPPI 4.1 DMA to USB OTG controller
ARM: dts: da850-lego-ev3: Add node for LEGO MINDSTORMS EV3 Battery
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds support for am335x-boneblue. The rest of
the changes are for enabling features on various
devices with the git shortlog describing the changes.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlk3sEwRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXNyuRAAkj0cC0jcKs3ol7XDLaVmiO94wb8UDXHJ
/ishcgq7bQm90UDEnzPP1NiH2tM9zG62lWwc/i8H2K3nQ+/Wrscl7GTPjTF2GK4H
DSzM2+uCFFxypJZPOp536IkQA3ZqFC+/jFt2qQ/Xwg5TB8+ckJL0sQMUW9jvWVf0
RhA41xy7ibnKKGwHdvZfWUO3VHEp57dC3E8GgbQKEJiqoea5oTDH6ee2bzxnq2dC
jpKIHU0wvG0RXX04mviDxDtaFoQLNpTh1D8+vK9AFx4sU/LQzuQjsSz4jD9XSeRR
OrcVz0Ol4nk9jq54AcAkbcO2v/3Lp2SDDLVA8fo7rEkfT8EGflKLMraeOCMPMl2F
ipz26jKLB3mRGKGZEI+zR15QbQjIXp68GT3jgCJVQyIM+i/IaDEerFdPfH6OkYwv
HkKNftGN5qTT8njQw6a8IdVUbXjKjDhQtDbGjZkmYuhVEs7+W9q2GWqIGiXH8uVX
KsfP5qx/DlddHSpSx0nmFfiaannVrU2SX6viWFqlaqusf+Fw/Tdj1SfZWTKxD6/u
6t78arDFQrzWQY8lcDB/YdixGd1q0go1FmlTvGgU7ObS2lJfp4F7wxx0XHio2D5C
41GXG4JWnEv4n7uzvJgKdf1+jy/dibKnEg02YfCl0GLCo4PQNTJMkS4EQ9xlR4Ke
Dxi22SUpBFE=
=u58m
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.13/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Device tree changes for omaps for v4.13 merge window.
This adds support for am335x-boneblue. The rest of
the changes are for enabling features on various
devices with the git shortlog describing the changes.
* tag 'omap-for-v4.13/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
arm: dts: am33xx: Remove redundant interrupt-parent property
ARM: dts: bonegreen-wireless: add WL1835 Bluetooth device node
ARM: dts: AM43XX: Remove min and max voltage values for dcdc3
ARM: dts: Add am335x-boneblue
ARM: dts: twl4030: Add missing madc reference for bci subnode
ARM: dts: am43xx-clocks: Add support for CLKOUT2
ARM: dts: Configure USB host for 37xx-evm
ARM: dts: omap: Add generic compatible string for I2C EEPROM
ARM: dts: Enable earlycon stdout path for LogicPD torpedo
ARM: dts: Enable earlycon stdout path for duovero
arm: dts: boneblack-wireless: add WL1835 Bluetooth device node
ARM: dts: am571x-idk: Enable the system mailboxes 5 and 6
ARM: dts: am572x-idk: Enable the system mailboxes 5 and 6
ARM: dts: omap4-devkit8000: fix gpmc ranges property
ARM: dts: omap3: Remove 'enable-active-low' property
ARM: dts: OMAP5: uevm: add µSD card detect
ARM: dts: omap4-droid4: Add bluetooth
ARM: dts: dra7x-evm: Enable dual-role mode for USB1
ARM: dts: Use - instead of @ for DT OPP entries for TI SoCs
ARM: dts: am335x-phycore-som: fix rv4162 compatible
Signed-off-by: Olof Johansson <olof@lixom.net>
The MSI Primo81 tablet has a 3500 mAh 3.7V LiPo battery.
Enable the PMIC's battery power supply so the battery can be monitored.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Now that we have support for the AXP221 PMIC's USB VBUS detection and
DRIVEVBUS vbus control, we can use the USB OTG port in proper OTG mode.
This patch enables the aforementioned PMIC functions, adds the OTG ID
detection pin to the USB PHY node, and changes the mode of USB OTG to
"otg".
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch add the dt node for the syscon register present on the
Allwinner A83T
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
OMAP4 has AES2 instance, so add its integration data under DT.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
"aes1_fck" and "aes2_fck" are controlled by hwmod. Drop clock
entries to avoid conflicts.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
OMAP4 has a second aes module, so let's use proper name for
the first instance.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The NAS4229B and SQ201 Gemini systems have a PATA controller
which is linked to a SATA bridge in the SoC. Enable both
platforms to use the PATA/SATA devices.
Cc: John Feng-Hsin Chiang <john453@faraday-tech.com>
Cc: Greentime Hu <green.hu@gmail.com>
Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the Faraday Technology FTDMAC020 DMA controller to
the Gemini SoC DTSI file. It is only used for memcpy work so
we can activate it for all users of the chipset.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
mode, the new thermal nodes, switches to the faster sdhost controller
for MMC, and enables USB OTG mode on the Pi 0.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEE/JuuFDWp9/ZkuCBXtdYpNtH8nugFAlk/E94ACgkQtdYpNtH8
nujc6g/9HBpmIPkiK0g2pQ50BYQnxCcZDpkq4su7kj4+IVyMk/EyPlMUBFAkZGGx
zaRFbUEVGCAfZ9vJXebUc0l0x3N0DNA88L1PFkKWXt9TkrbOBnbSNMyIzJBxRs81
Ucl4h7WUox2Y3XeGluOcl/d6wMvBHNwrA+Nm46VfTX29nTu3fnL3Piq+JPRB0Q2N
I1Apt4oydTChIUY2EeM/N5FkDssMbjJqI8ZQSxRB1W6ppfOBmbyenb4Un+3NsPsX
dkozW5TseBPHKXnQDI+pPMXWgQ+GlGuceOrggsvh9X2+WcHib4R7aua5rCAZMVb5
tcUW8PmTDmSQ3YoDpAEUdK6FJipQMx8AU8v1XtZq6r1eUd9fkjvehGajjxBUNGpM
4UYbk9fFWp/vcq9ZYWEdqk0qqLu1kwv7XCzPDgYpedT/hXQbMiP0FNkU1id5js7+
3ZnfPu/58IXafPcqmHRG5txX67I+5QvktUswTAaEP6eFEV+HnE7sMfEYuIhlGUKZ
CN9mY7X90PgzjZzM0fi6UZn7ddpu4K9qqkaZxFEc2rKSdEg+oeV/HdLGFmhs2kFb
fDSoFOvsfdpypof7B6/LqhQ/4PBQeT8ZCfT3ShIhiuuTFuBSua5bw7b0D2N11w9H
JZhaZb+IaRNKT0jGsHLjvX66dk/mhxK2bk2jaZLPlhET5EnHZk4=
=2WZ2
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJZQD9RAAoJEIfQlpxEBwcEQe0QAMEP8kRwZ9T8qa/UbuDFu5Nn
tyj5xFz63Z9Tt4OcrOfezV0ehnT5qinym8zIt+0S0L9RCEafw/Ous2sMcFpC0cjH
Mnava0H9QELaE68/lZH4RqTd+zzYeJOUe9YD0YsIJ8MBfOkz62fR2mppur1b8E42
MUNGgXqCf7B6IFF+JQWVBlw7x9uiBn+mKShEY81FezQijVZOpG4Fa6R6tqeBw3J8
+t1v4H9zc41aFfYJbdnuaTIL1MU84fL0xKBRa6A1+jEP2qctik1xza84uZHip98Y
RG1SVAfvVUeWR0+RtJZqIKjfu71yFDeUkiywlspM1PfXRABm7ZQun3HvzeZcoMoF
QQ+ITPUL9+p4VVFf+Sl4C0GjOiHzpH1ah/d65uVyl2AbsOnMG+klBLmT4Em3oy/Q
8auIfXSkvmlVx0lp/hna98T2uEdG4sAs3sw4Qr+uF5qkqgr7lsjNxniNQLTE+BoO
/JqAH1E2lOA7wmgkDFBsYzkJpNi8z4uE0rKRe93CcZT69Zg4+/ZfYWU7QlTrrN3+
qnsdqq9cfjSmMoXYP2/EawcFl2Dx48BJBvd1vgULJGxpw4JEap7Wp37fUDavpCdK
GD2hXQfGTzXdZJOLEbBbxxX9zZSF0LUA+PWFSbmIf03nGy5X9Fu/XQR04NxNrSpI
HrfKxcwV02yF8jTib2i/
=HNJf
-----END PGP SIGNATURE-----
Merge tag 'bcm2835-dt-next-2017-06-12' into devicetree/next
This pull request brings in installation of the RPi3 DT in 32-bit
mode, the new thermal nodes, switches to the faster sdhost controller
for MMC, and enables USB OTG mode on the Pi 0.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The APQ8060 Dragonboard has an Atmel AT24c128 EEPROM and a
Wolfson Micro WM8903 codec connected to its GSBI8 I2C bus.
Add entries for these to the device tree. The interrupt line
from the WM8903 chip is not routed anywhere on this design
so it can not be used.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Whistler is an ancient Tegra 2 reference board. I may have been the only
person who ever used it with upstream software, and I've just recycled
the board hardware. Hence, it makes sense to remove support from software.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Since 635c21068cf ("usb: dwc2: gadget: Fix WARN_ON messages
during FIFO init") the dwc2 driver is able to handle OTG and gadget
mode for bcm2835. So enable this feature for the Raspberry Pi Zero.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
In order to use dwc2 in OTG or gadget mode the USB PHY should be
specified. Since there is no bcm283x USB PHY driver use the generic
one.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
The Raspberry Pi Zero also supports OTG mode. So provide a dtsi file
to configure the USB interface accordingly. The fifo sizes are optimized
for device endpoint 6 and 7 with the maximum of 768.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Cygnus has a single amac controller connected to the B53 switch with 2
PHYs. On the BCM911360_EP platform, those two PHYs are connected to the
external ethernet jacks.
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add thermal support via the ns-thermal driver and create a single
thermal zone for the entire SoC.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This loads the VC4 driver on the 911360_entphn platform (with the
corresponding series sent to dri-devel), which is supported by master
of the Mesa tree.
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Northstar devices have MDIO bus that may contain various PHYs attached.
A common example is USB 3.0 PHY (that doesn't have an MDIO driver yet).
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This uses CPU thermal sensor available on every Northstar chipset to
monitor temperature. We don't have any cooling or throttling so only a
critical trip was added.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The GPU has two functional clocks - GPU_CORE_GCLK and GPU_HYD_GCLK.
Both of these are mux clocks and are derived from the DPLL_CORE
H14 output clock CORE_GPU_CLK by default. These clocks can also be
be derived from DPLL_PER or DPLL_GPU.
The GPU DPLL provides the output clocks primarily for the GPU.
Configuring the GPU for different OPP clock frequencies is easier
to achieve when using the DPLL_GPU rather than the other two DPLLs
due to:
1. minimal affect on any other output clocks from these DPLLs
2. may require an impossible post-divider values on existing DPLLs
without affecting other clocks.
So, switch the GPU functional clocks to be sourced from GPU DPLL by
default. This is done using the DT standard properties "assigned-clocks"
and "assigned-clock-parents". Newer u-boots (from 2017.01 onwards) reuse
and can update these properties to choose an appropriate one-time fixed
OPP configuration as all the required ABB/AVS setup is performed within
the bootloader. Note that there is no DVFS supported for any of the
non-MPU domains. The DPLL will automatically transition into a low-power
stop mode when the associated output clocks are not utilized or gated
automatically.
This patch also sets the initial values for the DPLL_GPU outputs.
These values are chosen based on the OPP_NOM values defined as per
recommendation from design team. The DPLL locked frequency is kept
at 1277 MHz, so that the value for the divider clock, dpll_gpu_m2_ck,
can be set to 425.67 MHz for OPP_NOM.
Signed-off-by: Subhajit Paul <subhajit_paul@ti.com>
[s-anna@ti.com: revise patch description]
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The IVA DPLL in DRA7xx provides the output clocks for only the IVAHD
subsystem in DRA7xx as compared to previous OMAP generations when it
provided the clocks for both DSP and IVAHD subsystems. This DPLL is
currently not configured by older bootloaders. Use the DT standard
properties "assigned-clocks" and "assigned-clock-rates" to set the
IVA DPLL clock rate and the rates for its derivative clocks at boot
time to properly initialize/lock this DPLL and be independent of the
bootloader version. Newer u-boots (from 2017.01 onwards) reuse and
can update these properties to choose an appropriate one-time fixed
OPP configuration. The DPLL will automatically transition into a
low-power stop mode when the associated output clocks are not
utilized or gated automatically.
The reset value of the divider M2 (that supplies the IVA_GFLCK, the
functional clock for the IVAHD subsystem) does not match a specific
OPP. So, the derived output clock from this IVA DPLL has to be
initialized as well to avoid initializing these divider outputs to an
incorrect frequencies.
The OPP_NOM clock frequencies are defined in the AM572x SR2.0 Data
Sheet vB, section 5.5.2 "Voltage And Core Clock Specifications". The
clock rates are chosen based on these OPP_NOM values and defined as per
a DRA7xx PLL spec document. The DPLL locked frequency is 2300 MHz, so
the dpll_iva_ck clock rate used is half of this value. The value for the
divider clock, dpll_iva_m2_ck, has to be set to 388.333334 MHz or more
for the divider clk logic to compute the appropriate divider value for
OPP_NOM.
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DSP DPLL is a new DPLL compared to previous OMAP generations and
supplies the root clocks for the DSP processors, as well as a mux
input source for EVE sub-system (on applicable SoCs). This DPLL is
currently not configured by older bootloaders. Use the DT standard
properties "assigned-clocks" and "assigned-clock-rates" to set the
DSP DPLL clock rate and the rates for its derivative clocks at boot
time to properly initialize/lock this DPLL and be independent of the
bootloader version. Newer u-boots (from 2017.01 onwards) reuse and
can update these properties to choose an appropriate one-time fixed
OPP configuration. The DPLL will automatically transition into a
low-power stop mode when the associated output clocks are not
utilized or gated automatically.
The DSP DPLL provides two output clocks, DSP_GFCLK and EVE_GCLK. The
desired rate for DSP_GFCLK is 600 MHz (same as DSP DPLL CLKOUT frequency),
and is currently auto set due to the desired M2 divider value being the
same as reset value for the locked frequency of 600 MHz. The EVE_GCLK
however is required to be 400 MHz, so set the dpll_dsp_m3x2_ck's rate
explicitly so that the divider is set properly. The dpll_dsp_m2_ck rate
is also set explicitly to not rely on any implicit matching divider reset
values to the locked DPLL frequency.
The OPP_NOM clock frequencies are defined in the AM572x SR2.0 Data
Sheet vB, section 5.5.2 "Voltage And Core Clock Specifications". The
clock rates are chosen based on these OPP_NOM values and defined as per
a DRA7xx PLL spec document. The DPLL locked frequency is 1200 MHz, so
the dpll_dsp_ck clock rate used is half of this value.
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The IPU1 functional clock is actually the output of a mux clock,
ipu1_gfclk_mux. The mux clock is sourced by default from the
DPLL_ABE_X2_CLK, and this results in a rather odd clock frequency
(361 MHz) for the IPU1 functional clock on platforms where ABE_DPLL
is configured properly. Reconfigure the mux clock to be sourced from
CORE_IPU_ISS_BOOST_CLK (dpll_core_h22x2_ck), so that both the IPU1
and IPU2 are running from the same clock and clocked at the same
nominal frequency of 425 MHz.
This also ensures that IPU1 functional clock is always configured
properly and becomes independent of the state of the ABE DPLL on
all boards.
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The IVA DPLL is not an essential DPLL for the functionality of a
bootloader and is usually not configured (e.g. older u-boots configure
it only if CONFIG_SYS_CLOCKS_ENABLE_ALL is enabled and u-boots newer
than 2014.01 do not even have an option), and this results in incorrect
operating frequencies when trying to use a DSP or IVAHD, whose root
clocks are derived from this DPLL. Use the DT standard properties
"assigned-clocks" and "assigned-clock-rates" to set the IVA DPLL clock
rate and the rates for its derivative clocks at boot time to properly
initialize/lock this DPLL. The DPLL will automatically transition
into a low-power stop mode when the associated output clocks are
not utilized or gated automatically.
The reset values of the dividers H11 & H12 (functional clocks for DSP
and IVAHD respectively) are identical to each other, but are different
at each OPP. The reset values also do not match a specific OPP. So, the
derived output clocks from the IVA DPLL have to be initialized as well
to avoid initializing these divider outputs to incorrect frequencies.
The clock rates are chosen based on the OPP_NOM values as defined in
the OMAP5432 SR2.0 Data Manual Book vK, section 5.2.3.5 "DPLL_IVA
Preferred Settings". The recommended maximum DPLL locked frequency is
2330 MHz for OPP_NOM (value for DPLL_IVA_X2_CLK), so the dpll_iva_ck
clock rate used is half of this value. The value 465.92 MHz is used
instead of 465.9 MHz for dpll_iva_h11x2_ck so that proper divider
value can be calculated.
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The IVA DPLL is not an essential DPLL for the functionality of a
bootloader and is usually not configured (e.g. older u-boots configure
it only if CONFIG_SYS_CLOCKS_ENABLE_ALL is enabled and u-boots newer
than 2014.01 do not even have an option), and this results in incorrect
operating frequencies when trying to use a DSP or IVAHD, whose root
clocks are derived from this DPLL. Use the DT standard properties
"assigned-clocks" and "assigned-clock-rates" to set the IVA DPLL clock
rate and the rates for its derivative clocks at boot time to properly
initialize/lock this DPLL. The DPLL will automatically transition
into a low-power stop mode when the associated output clocks are
not utilized or gated automatically.
The reset values of the dividers M4 & M5 (functional clocks for DSP and
IVAHD respectively) are identical to each other, but are different at
each OPP. The reset values also do not match a specific OPP. So, the
derived output clocks from the IVA DPLL have to be initialized as well
to avoid initializing these divider outputs to incorrect frequencies.
The clock rates are chosen based on the OPP100 values as defined in the
OMAP4430 ES2.x Public TRM vAP, section "3.6.3.8.7 DPLL_IVA Preferred
Settings". The DPLL locked frequency is 1862.4 MHz (value for
DPLL_IVA_X2_CLK), so the dpll_iva_ck clock rate used is half of
this value.
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Motorola Droid 4 uses a WL1285C, so use proper compatible value.
To avoid regressions while support for the new compatible value
is added to the Linux kernel, the old compatible value is preserved
as fallback.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The Droid 4 has a isl29030 to measure ambient light (e.g. for
automatically adapting display brightness) and proximity.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The Orange Pi Plus 2E, unlike the Orange Pi PC and PC Plus which its
schematics are based on, uses an external Realtek RTL8211E PHY in
RGMII mode, with a GPIO enabling the regulator for I/O signalling
power supplies. The PHY's main power supply is enabled by the main
5V power supply.
Add the regulator and PHY nodes, and override the PHY phandle under
the EMAC node, so that the EMAC works properly on this board.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This removes the dummy clk81 gate and replaces it with the actual clock
controller's CLKID_CLK81. This will also allow us to pass the real clock
IDs to all devices where the clock is controlled by clkc in the future.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The at24 driver allows to register I2C EEPROM chips using different vendor
and devices, but the I2C subsystem does not take the vendor into account
when matching using the I2C table since it only has device entries.
But when matching using an OF table, both the vendor and device has to be
taken into account so the driver defines only a set of compatible strings
using the "atmel" vendor as a generic fallback for compatible I2C devices.
So add this generic fallback to the device node compatible string to make
the device to match the driver using the OF device ID table.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Add basic support for stm32h743i-discovery board
This board offers :
_ 2MBytes Flash
_ 1 x micro USB OTG port
_ 1 x STLink connector (micro USB)
_ 1 x micro SD card slot
_ 1 x RJ45 connector
_ 1 x RCA connector
_ 2 x Audio jack connectors (in and out)
_ 2 x speaker connectors (left and right)
_ 1 x joystick
_ 1 x DCMI connector (Digital camera interface)
_ 1 x 4 inch DSI LCD (Display Serial Interface)
_ Arduino Uno Connectors
_ 2 x PIO connectors (PMOD and PMOD+)
_ 1 x wakeup button
_ 1 x reset button
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
