Commit Graph

543 Commits

Author SHA1 Message Date
Linus Torvalds
ebcf5bb282 - Core Frameworks
- Document (kerneldoc) core mfd_add_devices() API
 
  - New Drivers
    - Add support for Altera SOCFPGA System Manager
    - Add support for Maxim MAX77650/77651 PMIC
    - Add support for Maxim MAX77663 PMIC
    - Add support for ST Multi-Function eXpander (STMFX)
 
  - New Device Support
    - Add support for LEDs to Intel Cherry Trail Whiskey Cove PMIC
    - Add support for RTC to SAMSUNG Electronics S2MPA01 PMIC
    - Add support for SAM9X60 to Atmel HLCDC (High-end LCD Controller)
    - Add support for USB X-Powers AXP 8xx PMICs
    - Add support for Integrated Sensor Hub (ISH) to ChromeOS EC
    - Add support for USB PD Logger to ChromeOS EC
    - Add support for AXP223 to X-Powers AXP series PMICs
    - Add support for Power Supply to X-Powers AXP 803 PMICs
    - Add support for Comet Lake to Intel Low Power Subsystem
    - Add support for Fingerprint MCU to ChromeOS EC
    - Add support for Touchpad MCU to ChromeOS EC
    - Move TI LM3532 support to LED
 
  - New Functionality
    - Add/extend DT support; max77650, max77620
    - Add support for power-off; max77620
    - Add support for clocking; syscon
    - Add support for host sleep event; cros_ec
 
  - Fix-ups
    - Trivial; Formatting, spelling, etc; Kconfig, sec-core, ab8500-debugfs
    - Remove unused functionality; rk808, da9063-*
    - SPDX conversion; da9063-*, atmel-*,
    - Adapt/add new register definitions; cs47l35-tables, cs47l90-tables, imx6q-iomuxc-gpr
    - Fix-up DT bindings; ti-lmu, cirrus,lochnagar
    - Simply obtaining driver data; ssbi, t7l66xb, tc6387xb, tc6393xb
 
  - Bug Fixes
    - Fix incorrect defined values; max77620, da9063
    - Fix device initialisation; twl6040
    - Reset device on init; intel-lpss
    - Fix build warnings when !OF; sun6i-prcm
    - Register OF match tables; tps65912-spi
    - Fix DMI matching; intel_quark_i2c_gpio
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Merge tag 'mfd-next-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones:
 "Core Framework:
   - Document (kerneldoc) core mfd_add_devices() API

  New Drivers:
   - Altera SOCFPGA System Manager
   - Maxim MAX77650/77651 PMIC
   - Maxim MAX77663 PMIC
   - ST Multi-Function eXpander (STMFX)

  New Device Support:
   - LEDs support in Intel Cherry Trail Whiskey Cove PMIC
   - RTC support in SAMSUNG Electronics S2MPA01 PMIC
   - SAM9X60 support in Atmel HLCDC (High-end LCD Controller)
   - USB X-Powers AXP 8xx PMICs
   - Integrated Sensor Hub (ISH) in ChromeOS EC
   - USB PD Logger in ChromeOS EC
   - AXP223 in X-Powers AXP series PMICs
   - Power Supply in X-Powers AXP 803 PMICs
   - Comet Lake in Intel Low Power Subsystem
   - Fingerprint MCU in ChromeOS EC
   - Touchpad MCU in ChromeOS EC
   - Move TI LM3532 support to LED

  New Functionality:
   - max77650, max77620: Add/extend DT support
   - max77620 power-off
   - syscon clocking
   - croc_ec host sleep event

  Fix-ups:
   - Trivial; Formatting, spelling, etc; Kconfig, sec-core, ab8500-debugfs
   - Remove unused functionality; rk808, da9063-*
   - SPDX conversion; da9063-*, atmel-*,
   - Adapt/add new register definitions; cs47l35-tables, cs47l90-tables, imx6q-iomuxc-gpr
   - Fix-up DT bindings; ti-lmu, cirrus,lochnagar
   - Simply obtaining driver data; ssbi, t7l66xb, tc6387xb, tc6393xb

  Bug Fixes:
   - Fix incorrect defined values; max77620, da9063
   - Fix device initialisation; twl6040
   - Reset device on init; intel-lpss
   - Fix build warnings when !OF; sun6i-prcm
   - Register OF match tables; tps65912-spi
   - Fix DMI matching; intel_quark_i2c_gpio"

* tag 'mfd-next-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (65 commits)
  mfd: Use dev_get_drvdata() directly
  mfd: cros_ec: Instantiate properly CrOS Touchpad MCU device
  mfd: cros_ec: Instantiate properly CrOS FP MCU device
  mfd: cros_ec: Update the EC feature codes
  mfd: intel-lpss: Add Intel Comet Lake PCI IDs
  mfd: lochnagar: Add links to binding docs for sound and hwmon
  mfd: ab8500-debugfs: Fix a typo ("deubgfs")
  mfd: imx6sx: Add MQS register definition for iomuxc gpr
  dt-bindings: mfd: LMU: Fix lm3632 dt binding example
  mfd: intel_quark_i2c_gpio: Adjust IOT2000 matching
  mfd: da9063: Fix OTP control register names to match datasheets for DA9063/63L
  mfd: tps65912-spi: Add missing of table registration
  mfd: axp20x: Add USB power supply mfd cell to AXP803
  mfd: sun6i-prcm: Fix build warning for non-OF configurations
  mfd: intel-lpss: Set the device in reset state when init
  platform/chrome: Add support for v1 of host sleep event
  mfd: cros_ec: Add host_sleep_event_v1 command
  mfd: cros_ec: Instantiate the CrOS USB PD logger driver
  mfd: cs47l90: Make DAC_AEC_CONTROL_2 readable
  mfd: cs47l35: Make DAC_AEC_CONTROL_2 readable
  ...
2019-05-14 10:39:08 -07:00
Amelie Delaunay
2e0b80ce45 dt-bindings: pinctrl: document the STMFX pinctrl bindings
This patch adds documentation of device tree bindings for the
STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-10 08:21:27 +01:00
Linus Torvalds
fe460a6df6 Pin control changes for v5.2:
Nex drivers:
 - New driver for Bitmain BM1880 pin controller
 - New driver for Mediatek MT8516
 - New driver for Cirrus Logich Lochnagar PMIC pins
 
 Updates:
 - Incremental development on Renesas SH-PFC
 - Incremental development on Intel pin controller and some
   particular updates for Cedarfork.
 - Pin configuration support in Allwinner SunXi drivers
 - Suspend/resume support in the NXP/Freescale i.MX8MQ driver
 - Support for more packaging of the ST Micro STM32
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Merge tag 'pinctrl-v5.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "It is pretty calm and chill in pin control for the moment. Just
  incremental development.

  There is an odd patch to the Super-H architecture, it's coming from
  the maintainers so should be fine.

  Summary:

  New drivers:
   - Bitmain BM1880 pin controller
   - Mediatek MT8516
   - Cirrus Logich Lochnagar PMIC pins

  Updates:
   - Incremental development on Renesas SH-PFC
   - Incremental development on Intel pin controller and some particular
     updates for Cedarfork.
   - Pin configuration support in Allwinner SunXi drivers
   - Suspend/resume support in the NXP/Freescale i.MX8MQ driver
   - Support for more packaging of the ST Micro STM32"

* tag 'pinctrl-v5.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (72 commits)
  pinctrl: mcp23s08: Do not complain about unsupported params
  pinctrl: Rework Kconfig dependency for BM1880 pinctrl driver
  MAINTAINERS: Add entry for BM1880 pinctrl
  pinctrl: Add pinctrl support for BM1880 SoC
  dt-bindings: pinctrl: Add BM1880 pinctrl binding
  pinctrl: stm32: check irq controller availability at probe
  pinctrl: mediatek: Add MT8516 Pinctrl driver
  pinctrl: zte: fix leaked of_node references
  pinctrl: intel: Increase readability of intel_gpio_update_pad_mode()
  pinctrl: intel: Retain HOSTSW_OWN for requested gpio pin
  pinctrl: pistachio: fix leaked of_node references
  pinctrl: sunxi: Support I/O bias voltage setting on H6
  pinctrl: sunxi: Prepare for alternative bias voltage setting methods
  pinctrl: st: fix leaked of_node references
  pinctrl: samsung: fix leaked of_node references
  pinctrl: stm32: align stm32mp157 pin names
  pinctrl: stm32: add package information for stm32mp157c
  pinctrl: stm32: introduce package support
  dt-bindings: pinctrl: stm32: add new entry for package information
  pinctrl: imx8mq: Add suspend/resume ops
  ...
2019-05-08 10:23:54 -07:00
Manivannan Sadhasivam
07b734fbde dt-bindings: pinctrl: Add BM1880 pinctrl binding
Add pinctrl binding for Bitmain BM1880 SoC. The SoC is not capable
of handling pinconf, thereby supporting only pinmux and this limitation
is documented.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-03 07:53:13 +01:00
Christian Lamparter
c50495aa4c dt-bindings: pinctrl: fix bias-pull,up typo
This patch fixes a shared typo in several qcom pinctrl dt-bindings.

Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-05-02 14:56:23 -05:00
Alexandre Torgue
966d9b928f dt-bindings: pinctrl: stm32: add new entry for package information
Add "st,package" entry. Possibles values are:
-STM32MP_PKG_AA for LFBGA448 (18*18) package
-STM32MP_PKG_AB for LFBGA354 (16*16) package
-STM32MP_PKG_AC for TFBGA361 (12*12) package
-STM32MP_PKG_AD for TFBGA257 (10*10) package

Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-04-23 10:46:37 +02:00
Fabien Parent
bc236d6fb5 pinctrl: mt65xx: add OF bindings for MT8516
Add binding documentation of pinctrl-mt65xx for MT8516 SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-04-08 22:43:30 +02:00
Christina Quast
5490c77d59 dt-bindings: pinctrl: imx7d: Fix PAD_CTL_DSE_X*
In the iMX7d datasheet, the PAD_CTL_DSE_X* values are different from
the documentation.

Changes since v2:
* Changed patch title to 'dt-bindings: pinctrl: imx7d:'

Signed-off-by: Christina Quast <cquast@hanoverdisplays.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-04-08 14:07:52 +02:00
Zhiyong Tao
9f325c9837 pinctrl: mt8183: add DT binding document
The commit adds mt8183 compatible node in binding document.

Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-04-08 11:20:28 +02:00
Charles Keepax
e3097b6b2e pinctrl: lochnagar: Add initial binding documentation
Lochnagar is an evaluation and development board for Cirrus
Logic Smart CODEC and Amp devices. It allows the connection of
most Cirrus Logic devices on mini-cards, as well as allowing
connection of various application processor systems to provide a
full evaluation platform. This driver supports the board
controller chip on the Lochnagar board.

Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-04-04 12:08:21 +07:00
Jonathan Neuschäfer
dcab77888d dt-bindings: pinctrl: Document the i.MX50 IOMUXC binding
AFAICS from the i.MX50 Reference Manual, the i.MX50 IOMUXC works the
same as the one in i.MX51, so I copied fsl,imx51-pinctrl.txt and changed
the text to imx50.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Cc: Dong Aisheng <dong.aisheng@linaro.org>
Cc: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-02-21 13:37:19 +01:00
Claudiu Beznea
5e07a82064 dt-bindings: add documentation for slew rate
Add documentation for slew rate.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-02-08 13:07:25 +01:00
Claudiu Beznea
fde84f194a dt-bindings: add bindings for SAM9X60
Add device tree binding for SAM9X60 pin controller.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-02-08 13:06:40 +01:00
Claudiu Beznea
1d741f2e97 dt-bindings: add documentation for banks
Add documentation for at91 pin controller banks.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-02-08 13:06:16 +01:00
Linus Walleij
67e436ffd6 Merge branch 'ib-qcom-spmi' of /home/linus/linux-gpio into devel 2019-01-28 14:31:13 +01:00
Bai Ping
c1c9d41319 dt-bindings: imx: Add pinctrl binding doc for imx8mm
Add binding doc imx8mm pinctrl driver.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
Acked-by: Aisheng Dong <aisheng.dong@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-01-28 14:11:05 +01:00
Linus Walleij
fe4a6485b8 Merge branch 'ib-meson-fixes' into devel 2019-01-22 10:55:07 +01:00
Jerome Brunet
cf892f38e8 dt-bindings: pinctrl: meson: update register descriptions
like pull-enable, pull should be optional has this region is available on
every controllers. Also, the g12a feature a new region "ds" for the
drive-strength

All this region thing is one big mess. I suspect that there is only one
big GPIO region with holes in it. All registers between the current
regions reads '0' so it is probably just spare space to handle more pins.

Since we need to continue to handle the existing controllers, switching to
one single region now would not simplify things. However, if more
organisation layouts and features keep on being added, we may have to look
at this again

Fixes: 3cd3c83f67 ("pinctrl: Add compatibles for Amlogic Meson G12A pin controllers")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-01-21 14:49:22 +01:00
Brian Masney
697818f383 dt-bindings: pinctrl: qcom-pmic-gpio: add qcom,pmi8998-gpio binding
Add support for the PMI8998 GPIO variant to the Qualcomm PMIC GPIO
binding document.

Signed-off-by: Brian Masney <masneyb@onstation.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-01-21 13:49:06 +01:00
Gregory CLEMENT
3fbb9a8d79 pinctrl: dt-bindings: Fix the armada-37xx documentation
While it was possible to configure the PCIe1 Wakeup pin, it was missing
in the bidding, let's document it.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Tested-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-01-11 09:53:59 +01:00
Marek Behún
823868fcea pinctrl: armada-37xx: Correct mpp definitions
This is a cleanup and fix of the patch by Ken Ma <make@marvell.com>.

Fix the mpp definitions according to newest revision of the
specification:
  - northbridge:
    fix pmic1 gpio number to 7
    fix pmic0 gpio number to 6
  - southbridge
    split pcie1 group bit mask to BIT(5) and  BIT(9)
    fix ptp group bit mask to BIT(11) | BIT(12) | BIT(13)
    add smi group with bit mask BIT(4)

[gregory: split the pcie group in 2, as at hardware level they can be
configured separately]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Tested-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-01-11 09:53:47 +01:00
Alexandre Belloni
da801ab56a pinctrl: ocelot: add MSCC Jaguar2 support
Jaguar2 has the same register layout as Ocelot but it has 64 pins, meaning
that there are 2 registers instead of one.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-21 11:50:48 +01:00
Rafał Miłecki
2ae80900f2 dt-bindings: pinctrl: bcm4708-pinmux: rework binding to use syscon
As pointed by Rob, CRU is a kind of block that can't be guaranteed to
have everything exposed as subnodes. It's a set of various registers
that aren't tied to any single device. It could be described much more
accurately as MFD (Multi-Function Device).

Some hardware blocks may indeed want to access a register or two of the
CRU which requires describing it as the "syscon".

While at it replace exmple node name with the standard "pinctrl" (also
pointed out by Rob).

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-21 11:44:06 +01:00
Maxime Ripard
b766470b87 dt-bindings: pinctrl: sunxi: Add supply properties
The pinctrl node can have multiple regulators for each of its GPIO banks.
Add the property descriptions.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-21 11:04:16 +01:00
Shawn Guo
89444dad60 dt-bindings: pinctrl: fix qcom-pmic-gpio for pms405
Rather than gpio1-gpio11 for pms405, there are 12 GPIOs for pms405.
But gpio1, gpio9 and gpio10 are not available.  Fix the bindings doc
to make it correct for pms405.

Fixes: ed80f6eb79 ("dt-bindings: pinctrl: qcom-pmic-gpio: Add pms405 support")
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-11-26 09:12:08 +01:00
Linus Walleij
84d49fff23 pinctrl: sh-pfc: Updates for v4.21
- Fix VIN (Video IN) versioned groups on R-Car V2H, H3, and M3-W,
   - Add I2C[0-3], DU1, VIN, QSPI1, and SDHI pin groups on RZ/G1C,
   - Add audio, SDHI, VIN, HSCIF, and CAN(FD) support on R-Car E3,
   - Add QSPI pin groups on R-Car V3M and V3H,
   - Add VIN and CAN(FD) pin groups on R-Car M3-N,
   - Add I2C[035] pin groups on R-Car H3 and M3-W,
   - Add pinctrl and GPIO support for the new RZ/A2M (R7S9210) SoC,
   - Small cleanups,
   - Maintainership updates.
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Merge tag 'sh-pfc-for-v4.21-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: sh-pfc: Updates for v4.21

  - Fix VIN (Video IN) versioned groups on R-Car V2H, H3, and M3-W,
  - Add I2C[0-3], DU1, VIN, QSPI1, and SDHI pin groups on RZ/G1C,
  - Add audio, SDHI, VIN, HSCIF, and CAN(FD) support on R-Car E3,
  - Add QSPI pin groups on R-Car V3M and V3H,
  - Add VIN and CAN(FD) pin groups on R-Car M3-N,
  - Add I2C[035] pin groups on R-Car H3 and M3-W,
  - Add pinctrl and GPIO support for the new RZ/A2M (R7S9210) SoC,
  - Small cleanups,
  - Maintainership updates.
2018-11-25 23:53:01 +01:00
Mesih Kilinc
bbeb6a6ded dt-bindings: pinctrl: Add Allwinner suniv F1C100s pinctrl
Add compatible string for Allwinner suniv F1C100s SoC's pinctrl.

Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-11-25 13:47:55 +01:00
Chris Brandt
94693b7b83 dt-bindings: pinctrl: Add RZ/A2 pinctrl and GPIO
Add device tree binding documentation and header file for Renesas R7S9210
(RZ/A2) SoCs.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-11-23 09:29:24 +01:00
Ryder Lee
757bd6d536 dt-bindings: pinctrl: update bindings for MT7629 SoC
This updates bindings for MT7629 pinctrl driver.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Sean Wang <sean.wang@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-11-19 15:40:27 +01:00
Saravanan Sekar
ba54e3005d dt-bindings: pinctrl: Add bindings for Actions Semi S700 SoC
Add pinctrl and pio bindings for Actions Semi S700 SoC.

Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Signed-off-by: Saravanan Sekar <sravanhome@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-11-19 14:11:58 +01:00
Benjamin Gaignard
c43f666af0 dt-bindings: pinctrl: stm32: Document hwlocks properties
Add hwlocks as optional property

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-11-19 13:16:34 +01:00
Manivannan Sadhasivam
95d2f00657 dt-bindings: pinctrl: Add devicetree bindings for MT6797 SoC Pinctrl
Add devicetree bindings for Mediatek MT6797 SoC Pin Controller.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-11-15 11:03:56 +01:00
A.s. Dong
0934eec7bc dt-bindings: pinctrl: imx7ulp: back to imx legacy binding for consistency
We already had an earlier conclusion that all new i.MX Socs will keep
using the legacy i.MX Pinctrl bindings instead of generic pin config.
However, MX7ULP generic pin config binding support has already been in
tree before that time. Per SoC maintainers' suggestions, in order to
get a better consistency for all i.MX devices, we'd like to go back to
imx legacy binding for MX7ULP as well.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: linux-gpio@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-11-09 10:49:03 +01:00
Rafał Miłecki
93d39737b2 dt-bindings: pinctrl: bcm4708-pinmux: improve example binding
Broadcom SoC pins are controlled using CRU ("Clock and Reset Unit" or
"Central Resource Unit") registers. There are more CRU registers and
functions so CRU should be represented as a separated block in DT.

Moreover CRU is a sub-block of DMU ("Device Management Unit") so that
one should also get its own node.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-16 09:43:34 +02:00
Linus Walleij
b0b378acde pinctrl: sh-pfc: Updates for v4.20 (take three)
- Add support for the new RZ/N1D (R9A06G032) and RZ/N1S (R9A06G033)
     SoCs,
   - Add INTC-EX pin groups on R-Car E3.
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Merge tag 'sh-pfc-for-v4.20-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: sh-pfc: Updates for v4.20 (take three)

  - Add support for the new RZ/N1D (R9A06G032) and RZ/N1S (R9A06G033)
    SoCs,
  - Add INTC-EX pin groups on R-Car E3.
2018-10-10 11:15:33 +02:00
Rafał Miłecki
3f9f82b3ff dt-bindings: pinctrl: document Broadcom Northstar pin mux controller
Northstar has mux controller just like Northstar Plus and Northstar2.
It's a bit different though (different registers & pins) so it requires
its own binding.

It's needed to allow other block bindings specify required mux setup.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-10 09:16:00 +02:00
Craig Tatlor
73ae1462b7 dt-bindings: pinctrl: qcom: Add SDM660 pinctrl binding
Add the binding for the TLMM pinctrl block found in the SDM660 platform.

Signed-off-by: Craig Tatlor <ctatlor97@gmail.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-03 08:58:07 +02:00
Phil Edworthy
d6381fbbf2 dt-bindings: pinctrl: renesas,rzn1-pinctrl: documentation
The Renesas RZ/N1 device family PINCTRL node description.

Based on a patch originally written by Michel Pollet at Renesas.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-10-02 12:16:39 +02:00
Linus Walleij
18887f31df pinctrl: sh-pfc: Updates for v4.20 (take two)
- Add MSIOF pin groups on R-Car E3 and D3,
   - Add support for the new RZ/G1N (R8A7744) and RZ/G2E (R8A774C0) SoCs,
   - Add I2C4, DU0, QSPI0, SDHI2, and USB pin groups on RZ/G1C,
   - Convert to SPDX license identifiers,
   - Small cleanups.
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Merge tag 'sh-pfc-for-v4.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: sh-pfc: Updates for v4.20 (take two)

  - Add MSIOF pin groups on R-Car E3 and D3,
  - Add support for the new RZ/G1N (R8A7744) and RZ/G2E (R8A774C0) SoCs,
  - Add I2C4, DU0, QSPI0, SDHI2, and USB pin groups on RZ/G1C,
  - Convert to SPDX license identifiers,
  - Small cleanups.
2018-10-01 13:21:58 +02:00
Bjorn Andersson
9d8ea6beac dt-bindings: pinctrl: qcom: Add QCS404 pinctrl binding
Add the binding for the TLMM pinctrl block found in the QCS404 platform.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-09-26 09:43:01 +02:00
Vinod Koul
ed80f6eb79 dt-bindings: pinctrl: qcom-pmic-gpio: Add pms405 support
Add support for the PMS405 GPIO support to the Qualcomm PMIC GPIO
binding.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-09-26 09:29:03 +02:00
Fabrizio Castro
c382e8ba7c dt-bindings: pinctrl: sh-pfc: Document r8a774c0 PFC support
Document PFC support for the R8A774C0 SoC.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-09-19 17:27:53 +02:00
Biju Das
a6a7d2c2dc dt-bindings: pinctrl: sh-pfc: Document r8a7744 PFC support
Document PFC support for the RZ/G1N (R8A7744) SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-09-19 17:26:18 +02:00
Linus Walleij
2e38b882b9 pinctrl: sh-pfc: Updates for v4.20
- Add SATA and audio pin groups on R-Car M3-N,
   - Add EtherAVB pin groups on RZ/G1C,
   - Add PWM and display (DU) pin groups on R-Car E3,
   - Add support for the new RZ/G2M (r8a774a1) SoC.
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Merge tag 'sh-pfc-for-v4.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: sh-pfc: Updates for v4.20

  - Add SATA and audio pin groups on R-Car M3-N,
  - Add EtherAVB pin groups on RZ/G1C,
  - Add PWM and display (DU) pin groups on R-Car E3,
  - Add support for the new RZ/G2M (r8a774a1) SoC.
2018-08-31 15:42:33 +02:00
Linus Walleij
5624bf9635 Merge branch 'ib-ingenic' into devel 2018-08-29 14:10:34 +02:00
Paul Cercueil
890e48be8d dt-bindings: pinctrl: Update pinctrl-ingenic for JZ4725B and GPIO merge
The pinctrl-ingenic driver now supports the JZ4725B SoC.

Furthermore, the gpio-ingenic driver was dropped and the pinctrl-ingenic
driver is now responsible for providing the GPIO functionality.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-08-29 13:35:14 +02:00
Yixun Lan
3cd3c83f67 pinctrl: Add compatibles for Amlogic Meson G12A pin controllers
Add new compatible name for Amlogic's Meson-G12A pin controllers,
add a dt-binding header file which document the detail pin names.

Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-08-29 10:34:53 +02:00
Tomer Maimon
d0e4e8f0d6 dt-binding: pinctrl: Add NPCM7xx pinctrl and GPIO documentation
Added device tree binding documentation for Nuvoton BMC
NPCM750/730/715/705 pinmux and GPIO controller.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-08-29 09:56:25 +02:00
Biju Das
8f9a1acd8c dt-bindings: pinctrl: sh-pfc: Document r8a774a1 PFC support
Document PFC support for the R8A774A1 SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-08-28 11:28:37 +02:00
Linus Torvalds
532c2b926d - New Drivers
- Add Cirrus Logic Madera Codec (CS47L35, CS47L85 and CS47L90/91) driver
    - Add ChromeOS EC CEC driver
    - Add ROHM BD71837 PMIC driver
 
  - New Device Support
    - Add support for Dialog Semi DA9063L PMIC variant to DA9063
    - Add support for Intel Ice Lake to Intel-PLSS-PCI
    - Add support for X-Powers AXP806 to AXP20x
 
  - New Functionality
    - Add support for USB Charging to the ChromeOS Embedded Controller
    - Add support for HDMI CEC to the ChromeOS Embedded Controller
    - Add support for HDMI CEC to Intel HDMI
    - Add support for accessory detection to Madera devices
    - Allow individual pins to be configured via DT' wlf,csnaddr-pd
    - Provide legacy platform specific EEPROM/Watchdog commands; rave-sp
 
  - Fix-ups
    - Trivial renaming/spelling fixes; cros_ec, da9063-*
    - Convert to Managed Resources (devm_*); da9063-*, ti_am335x_tscadc
    - Transition to helper macros/functions; da9063-*
    - Constify; kempld-core
    - Improve error path/messages; wm8994-core
    - Disable IRQs locally instead of relying on USB subsystem; dln2
    - Remove unused code; rave-sp
    - New exports; sec-core
 
  - Bug Fixes
    - Fix possible false I2C transaction error; arizona-core
    - Fix declared memory area size; hi655x-pmic
    - Fix checksum type; rave-sp
    - Fix incorrect default serial port configuration: rave-sp
    - Fix incorrect coherent DMA mask for sub-devices; sm501
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Merge tag 'mfd-next-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones:
 "New Drivers:
   - Add Cirrus Logic Madera Codec (CS47L35, CS47L85 and CS47L90/91) driver
   - Add ChromeOS EC CEC driver
   - Add ROHM BD71837 PMIC driver

  New Device Support:
   - Add support for Dialog Semi DA9063L PMIC variant to DA9063
   - Add support for Intel Ice Lake to Intel-PLSS-PCI
   - Add support for X-Powers AXP806 to AXP20x

  New Functionality:
   - Add support for USB Charging to the ChromeOS Embedded Controller
   - Add support for HDMI CEC to the ChromeOS Embedded Controller
   - Add support for HDMI CEC to Intel HDMI
   - Add support for accessory detection to Madera devices
   - Allow individual pins to be configured via DT' wlf,csnaddr-pd
   - Provide legacy platform specific EEPROM/Watchdog commands; rave-sp

  Fix-upsL
   - Trivial renaming/spelling fixes; cros_ec, da9063-*
   - Convert to Managed Resources (devm_*); da9063-*, ti_am335x_tscadc
   - Transition to helper macros/functions; da9063-*
   - Constify; kempld-core
   - Improve error path/messages; wm8994-core
   - Disable IRQs locally instead of relying on USB subsystem; dln2
   - Remove unused code; rave-sp
   - New exports; sec-core

  Bug Fixes:
   - Fix possible false I2C transaction error; arizona-core
   - Fix declared memory area size; hi655x-pmic
   - Fix checksum type; rave-sp
   - Fix incorrect default serial port configuration: rave-sp
   - Fix incorrect coherent DMA mask for sub-devices; sm501"

* tag 'mfd-next-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (60 commits)
  mfd: madera: Add register definitions for accessory detect
  mfd: sm501: Set coherent_dma_mask when creating subdevices
  mfd: bd71837: Devicetree bindings for ROHM BD71837 PMIC
  mfd: bd71837: Core driver for ROHM BD71837 PMIC
  media: platform: cros-ec-cec: Fix dependency on MFD_CROS_EC
  mfd: sec-core: Export OF module alias table
  mfd: as3722: Disable auto-power-on when AC OK
  mfd: axp20x: Support AXP806 in I2C mode
  mfd: axp20x: Add self-working mode support for AXP806
  dt-bindings: mfd: axp20x: Add "self-working" mode for AXP806
  mfd: wm8994: Allow to configure CS/ADDR Pulldown from dts
  mfd: wm8994: Allow to configure Speaker Mode Pullup from dts
  mfd: rave-sp: Emulate CMD_GET_STATUS on device that don't support it
  mfd: rave-sp: Add legacy watchdog ping command translation
  mfd: rave-sp: Add legacy EEPROM access command translation
  mfd: rave-sp: Initialize flow control and parity of the port
  mfd: rave-sp: Fix incorrectly specified checksum type
  mfd: rave-sp: Remove unused defines
  mfd: hi655x: Fix regmap area declared size for hi655x
  mfd: ti_am335x_tscadc: Fix struct clk memory leak
  ...
2018-08-20 15:38:44 -07:00