This patch adds support for TI divider clock binding, which simply uses
the basic clock divider to provide the features needed.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
This is a multipurpose clock node, which contains support for multiple
sub-clocks. Uses basic composite clock type to implement the actual
functionality, and TI specific gate, mux and divider clocks.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
TI clk driver now routes some of the basic clocks through own
registration routine to allow autoidle support. This routine just
checks a couple of device node properties and adds autoidle support
if required, and just passes the registration forward to basic clocks.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
The OMAP clock driver now supports DPLL clock type. This patch also
adds support for DT DPLL nodes.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Document the multimedia clock controller found on Qualcomm devices
Cc: <devicetree@vger.kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Document the global clock controller found on Qualcomm devices.
Cc: <devicetree@vger.kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
If max77686 chip is instantiated from device tree, it is desirable to
have an OF clock provider to allow device tree based look-up of clocks.
This patch adds OF clock provider registration to the clk-max77686
driver.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
The AudioSS block on Exynos 5420 has an additional clock gate for the
ADMA bus clock.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
There is no gate for the PCM clock input to the AudioSS block, so
the parent of sclk_pcm is div_pcm0. Add a clock ID for it so that
we can reference it in device trees.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
This allows the input clocks to the Exynos AudioSS block to be
specified via device-tree bindings. Default names will be used
when an input clock is not given.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Adds gate clock for MDMA0 on Exynos5250 SoC. This is needed to ensure
that the clock is enabled when MDMA0 is used on systems on which
firmware gates the clockby default.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
[t.figa: Updated patch description.]
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
This patch adds support for the external clock outputs on the
Allwinner A20 SoC. The clock outputs are similar to "module 0"
type clocks, with different offsets and widths for clock factors.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Emilio López <emilio@elopez.com.ar>
This commit implements support for the "module 0" type of clocks, as
used by MMC, IR, NAND, SATA and other components.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Acked-by: Mike Turquette <mturquette@linaro.org>
This commit implements PLL5 and PLL6 support on the sunxi clock driver.
These PLLs use a similar factor clock, but differ on their outputs.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Acked-by: Mike Turquette <mturquette@linaro.org>
This commit adds gating support to PLL1 on the clock driver. This makes
the PLL1 implementation fully compatible with PLL4 as well.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
This patch adds support for accuracy retrieval on fixed clocks.
It also adds a new dt property called 'clock-accuracy' to define the clock
accuracy.
This can be usefull for oscillator (RC, crystal, ...) definitions which are
always given an accuracy characteristic.
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Add support for using emev2 SMU clocks with DT
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJSt40hAAoJENfPZGlqN0++JzgP/1E4U6AovB3HxLUvyp6nT4oW
xwkPRfAMxiZRWuEi8QnZSBa6XxrAyublAisuZ+5QXFbQDwAbLpPuX/eNZ5sThCqp
L4/msoptAUVWk2fiHx/wiTxJBhBH+loDkShAq6SooqGrSg1oP7uhq2WJrhK60XHx
GTUgLFDSr7Cjm9yznOYKn74iYiWh5ywv0rIqnpbdjd098Fwv0lC0YcLKq4eXS8+u
CBzYgkaezZ1YDs/rsvGiyJPvHhmUnDQ+mo9fMoYSKZ+IR0RWc84vH+5aWuZ8qYZB
AtuQSpJxBD6BFRuR+JDNSH1fAnzTyEDZasyEB8mxr3n8qnE1MKkhcxiLbuHUWVeu
pVj7dShut+8ovPOMGiaJ4k32D6aQlnSMx99fmxBscBNXcs9dyCJxztpPLMc09Et9
HhMKwmfhzHTyEbfLRAr7zVARcyjjWAd1OnoDVINWB1FBxJH9rMSNeBIjqIphm/Cm
H/z1n+Z+DVexClvpayona2eL/TEFmPefPKCXl5cjCmUOwJsyZ7UPmCxMA6srBh6F
wYH2zQT5GfbqDx8643RWXxIovTkUPsiiWR4tIydjB9fCV+pg/ZGkKxnzq4nsAkl1
zY7S5SeYYYSMhRngIBsHpXY9JWItdLVw3vC9yybk+OXm/Q+cXIn/DBcIQsDzdAcQ
EcmF19/7VTKoeluK99zH
=NhhY
-----END PGP SIGNATURE-----
Merge tag 'renesas-clock-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into clk-next-shmobile2
Renesas ARM based SoC Clock updates for v3.14
Add support for using emev2 SMU clocks with DT
In some use cases Zynq's FPGA clocks are used as static clock
generators for IP in the FPGA part of the SOC for which no Linux driver
exists and would control those clocks. To avoid automatic
gating of these clocks in such cases a new property - fclk-enable - is
added to the clock controller's DT description to accomodate such use
cases. It's value is a bitmask, where a set bit results in enabling
the corresponding FCLK through the clkc.
FPGA clocks are handled following the rules below:
If an FCLK is not enabled by bootloaders, that FCLK will be disabled in
Linux. Drivers can enable and control it through the CCF as usual.
If an FCLK is enabled by bootloaders AND the corresponding bit in the
'fclk-enable' DT property is set, that FCLK will be enabled by the clkc,
resulting in an off by one reference count for that clock. Ensuring it
will always be running.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Pull networking fixes from David Miller:
1) Revert CHECKSUM_COMPLETE optimization in pskb_trim_rcsum(), I can't
figure out why it breaks things.
2) Fix comparison in netfilter ipset's hash_netnet4_data_equal(), it
was basically doing "x == x", from Dave Jones.
3) Freescale FEC driver was DMA mapping the wrong number of bytes, from
Sebastian Siewior.
4) Blackhole and prohibit routes in ipv6 were not doing the right thing
because their ->input and ->output methods were not being assigned
correctly. Now they behave properly like their ipv4 counterparts.
From Kamala R.
5) Several drivers advertise the NETIF_F_FRAGLIST capability, but
really do not support this feature and will send garbage packets if
fed fraglist SKBs. From Eric Dumazet.
6) Fix long standing user triggerable BUG_ON over loopback in RDS
protocol stack, from Venkat Venkatsubra.
7) Several not so common code paths can potentially try to invoke
packet scheduler actions that might be NULL without checking. Shore
things up by either 1) defining a method as mandatory and erroring
on registration if that method is NULL 2) defininig a method as
optional and the registration function hooks up a default
implementation when NULL is seen. From Jamal Hadi Salim.
8) Fix fragment detection in xen-natback driver, from Paul Durrant.
9) Kill dangling enter_memory_pressure method in cg_proto ops, from
Eric W Biederman.
10) SKBs that traverse namespaces should have their local_df cleared,
from Hannes Frederic Sowa.
11) IOCB file position is not being updated by macvtap_aio_read() and
tun_chr_aio_read(). From Zhi Yong Wu.
12) Don't free virtio_net netdev before releasing all of the NAPI
instances. From Andrey Vagin.
13) Procfs entry leak in xt_hashlimit, from Sergey Popovich.
14) IPv6 routes that are no cached routes should not count against the
garbage collection limits. We had this almost right, but were
missing handling addrconf generated routes properly. From Hannes
Frederic Sowa.
15) fib{4,6}_rule_suppress() have to consider potentially seeing NULL
route info when they are called, from Stefan Tomanek.
16) TUN and MACVTAP have had truncated packet signalling for some time,
fix from Jason Wang.
17) Fix use after frrr in __udp4_lib_rcv(), from Eric Dumazet.
18) xen-netback does not interpret the NAPI budget properly for TX work,
fix from Paul Durrant.
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (132 commits)
igb: Fix for issue where values could be too high for udelay function.
i40e: fix null dereference
xen-netback: fix gso_prefix check
net: make neigh_priv_len in struct net_device 16bit instead of 8bit
drivers: net: cpsw: fix for cpsw crash when build as modules
xen-netback: napi: don't prematurely request a tx event
xen-netback: napi: fix abuse of budget
sch_tbf: use do_div() for 64-bit divide
udp: ipv4: must add synchronization in udp_sk_rx_dst_set()
net:fec: remove duplicate lines in comment about errata ERR006358
Revert "8390 : Replace ei_debug with msg_enable/NETIF_MSG_* feature"
8390 : Replace ei_debug with msg_enable/NETIF_MSG_* feature
xen-netback: make sure skb linear area covers checksum field
net: smc91x: Fix device tree based configuration so it's usable
udp: ipv4: fix potential use after free in udp_v4_early_demux()
macvtap: signal truncated packets
tun: unbreak truncated packet signalling
net: sched: htb: fix the calculation of quantum
net: sched: tbf: fix the calculation of max_size
micrel: add support for KSZ8041RNLI
...
Add a driver for SILabs 570, 571, 598, 599 programmable oscillators.
The devices generate low-jitter clock signals and are reprogrammable via
an I2C interface.
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Device tree clock binding document for EMMA Mobile EV2 SMU,
And Common clock framework based implementation of it.
Following nodes are defined to describe clock tree.
- renesas,emev2-smu
- renesas,emev2-smu-clkdiv
- renesas,emev2-smu-gclk
These bindings are designed manually based on
19UH0037EJ1000_SMU : System Management Unit User's Manual
So far, reparent is not implemented, and is fixed to index #0.
Clock tree description is not included, and should be provided
by device-tree.
Signed-off-by: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
MSTP clocks are gate clocks controlled through a register that handles
up to 32 clocks. The register is often sparsely populated.
Those clocks are found on Renesas ARM SoCs.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
DIV6 clocks are divider gate clocks controlled through a single
register. The divider is expressed on 6 bits, hence the name, and can
take values from 1/1 to 1/64.
Those clocks are found on Renesas ARM SoCs.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
The R-Car Gen2 SoCs (R8A7790 and R8A7791) have several clocks that are
too custom to be supported in a generic driver. Those clocks can be
divided in two categories:
- Fixed rate clocks with multiplier and divisor set according to boot
mode configuration
- Custom divider clocks with SoC-specific divider values
This driver supports both.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Commit 89ce376c6b (drivers/net: Use of_match_ptr() macro in smc91x.c)
added minimal device tree support to smc91x, but it's not working on
many platforms because of the lack of some key configuration bits.
Fix the issue by parsing the necessary configuration like the
smc911x driver is doing. As most smc91x users seem to use 16-bit
access, let's default to that if no reg-io-width is specified.
Cc: Nicolas Pitre <nico@fluxnic.net>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: netdev@vger.kernel.org
Cc: devicetree@vger.kernel.org
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
DDR3A/B, ARM and PA PLL controllers have clkod register bits for
configuring postdiv values. So use it instead of using fixed
post dividers for these pll controllers. Assume that if fixed-postdiv
attribute is not present, use clkod register value for pistdiv.
Also update the Documentation of bindings to reflect the same.
Cc: Mike Turquette <mturquette@linaro.org
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
When booted with device tree, we may still have platform data passed
as auxdata. For am3517 this is needed for passing the interrupt_enable
and interrupt_disable callbacks that access the omap system control module
registers. These callback functions will eventually go away when we have
a separate system control module driver.
Some of the things that are currently passed as platform data we don't need
to set up as device tree properties as they are always the same on am3517.
So let's use a new compatible flag for those so we can get those from
the device tree match data.
Also note that we need to fix setting of phy_dev to NULL instead of an empty
string as the code later on uses that to find the first phy on the mdio bus.
This seems to have been caused by 5d69e0076a (net: davinci_emac: switch to
new mdio).
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Another batch of fixes for ARM SoCs for 3.13. The diffstat is large,
mostly because of:
- Another set of fixes to fix regressions caused by moving OMAP from board
files to DT. Tony thinks this was the last major set of fixes, with
maybe just a few small patches to follow.
- More fixes for Marvell platforms, most dealing with misdescribed PCIe
hardware, i.e. incorrect number of busses on some SoCs, etc. The line
delta adds up due to various ranges moving around when this is fixed.
But there's also:
- Some smaller tweaks to defconfigs to make more boards bootable in my
test setup for better coverage.
- There are also a few other smaller fixes, a short series for at91, a couple
of reverts for ux500, etc.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJSnsLnAAoJEIwa5zzehBx3wzIP/0CmvZtGwhz2edhHK4k1iiqT
fqZl74aLrm6dHm41jvyr3lDcWkc+uFHP7HUDfCtA/y6iEjy2sOd8fQyTro+i6qnO
5wbTuyi4byHeBtKhIzrxG87Rny65i5MwszTtpCoNR166HGTP/M2lC2M0Qy44l+DD
3eRjpQ62ehlJ7jxtBDG8+9F22vaiDpy2R1hoGUtaOHZrG9j1Nlo19fjCVwVjq8f3
Varv3tKCEALmoMh4Dd+nqP62SFvMeve5z0NIcFTdXuqkGNCT1Cn4JSBr66JfzoMy
yqzewtZueb3oQQEpbPEWeuEikHiP2IdmHtp/8YrQMO8Q8/HOiusadV2spdx4z8ID
GdAjt4tlq36A5LOeP6o2vXg7UZ5T/14hFOodai0Avr6w5/xNvFUPOI0u5SABPjfA
bAjrtMl6iZUMhkuXxUNidrGWE+Juo+uJG0bLo9ikwu2vCi4LwzIrrMDeIfiLDQdy
fDFFZiihGBUui5sMqTE8OHTVMockrtAIUjGDAvnZ6nLF+Lpr5WRpIrUHgQKG4zyE
e6s5c6uzMlaSFzO7MFgznCnS6gxtolN0xH6d2CtkJGSUDC6soAb4hPNPHjWV6zFG
pfr8lfG8I88H0OBGNIYAQm3//bEj54awU3qQDtckVVwxWSjx56gR2VMQWZ+k0X8P
VyMIJx38II5EfwlP16hp
=PljB
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Another batch of fixes for ARM SoCs for 3.13. The diffstat is large,
mostly because of:
- Another set of fixes to fix regressions caused by moving OMAP from
board files to DT. Tony thinks this was the last major set of
fixes, with maybe just a few small patches to follow.
- More fixes for Marvell platforms, most dealing with misdescribed
PCIe hardware, i.e. incorrect number of busses on some SoCs, etc.
The line delta adds up due to various ranges moving around when
this is fixed.
But there's also:
- Some smaller tweaks to defconfigs to make more boards bootable in
my test setup for better coverage.
- There are also a few other smaller fixes, a short series for at91,
a couple of reverts for ux500, etc"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (39 commits)
arm: dts: socfpga: Change some clocks of gate-clk type to perip-clk
arm: socfpga: Enable ARM_TWD for socfpga
ARM: multi_v7_defconfig: enable SDHCI_BCM_KONA and MMC_BLOCK_MINORS=16
ARM: sunxi_defconfig: enable NFS, TMPFS, PRINTK_TIME and nfsroot support
ARM: multi_v7_defconfig: enable network for BeagleBone Black
ARM: dts: Fix the name of supplies for smsc911x shared by OMAP
ARM: OMAP2+: Powerdomain: Fix unchecked dereference of arch_pwrdm
ARM: dts: omap3-beagle: Add omap-twl4030 audio support
ARM: dts: omap4-sdp: Fix pin muxing for wl12xx
ARM: dts: omap4-panda-common: Fix pin muxing for wl12xx
ARM: at91: fixed unresolved symbol "at91_pm_set_standby" when built without CONFIG_PM
ARM: at91: add usart3 alias to dtsi
ARM: at91: sama5d3: reduce TWI internal clock frequency
mmc: omap: Fix I2C dependency and make driver usable with device tree
mmc: omap: Fix DMA configuration to not rely on device id
ARM: dts: omap3-beagle: Fix USB host on beagle boards (for 3.13)
ARM: dts: omap3-igep0020: name twl4030 VPLL2 regulator as vdds_dsi
ARM: dts: AM33XX IGEP0033: add USB support
ARM: dts: AM33XX BASE0033: add 32KBit EEPROM support
ARM: dts: AM33XX BASE0033: add pinmux and user led support
...
Enable common clock driver of Hi3620 SoC. clkgate-seperated driver is
used to support the clock gate that enable/disable/status registers
are seperated.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
From Tony Lindgren:
Some omap related fixes that have come up with people moving to device
tree only based booting for omap2+.
The series contains a handful of fixes for the igep boards as they were
one of the first omap3 boards to jump over completely to device tree
based booting. So these can be considered regressions compared to
booting igep in legacy mode with board files in v3.12.
Also included are few other device tree vs legacy booting regressions:
- yet more missing omap3 .dtsi entries that have showed up booting
various boards with device tree only
- n900 eMMC device tree fix
- fixes for beagle USB EHCI
- two fixes to make omap2420 MMC work
As we're moving omap2+ to be device tree only for v3.14, I'd like to
have v3.13 work equally well for legacy based booting and device tree
based booting. So there will be likely few more device tree related
booting patches trickling in.
This series also includes a regression fix for the omap timer posted
mode that may wrongly stay on from the bootloader for some SoCs.
* tag 'omap-for-v3.13/fixes-against-rc1-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
mmc: omap: Fix I2C dependency and make driver usable with device tree
mmc: omap: Fix DMA configuration to not rely on device id
ARM: dts: omap3-beagle: Fix USB host on beagle boards (for 3.13)
ARM: dts: omap3-igep0020: name twl4030 VPLL2 regulator as vdds_dsi
ARM: dts: AM33XX IGEP0033: add USB support
ARM: dts: AM33XX BASE0033: add 32KBit EEPROM support
ARM: dts: AM33XX BASE0033: add pinmux and user led support
ARM: dts: AM33XX BASE0033: add pinmux and hdmi node to enable display
ARM: dts: omap3-igep0020: Add pinmuxing for DVI output
ARM: dts: omap3-igep0020: Add pinmux setup for i2c devices
ARM: dts: omap3-igep: Update to use the TI AM/DM37x processor
ARM: dts: omap3-igep: Add support for LBEE1USJYC WiFi connected to SDIO
ARM: dts: omap3-igep: Fix bus-width for mmc1
ARM: OMAP2+: dss-common: change IGEP's DVI DDC i2c bus
ARM: OMAP2+: Disable POSTED mode for errata i103 and i767
ARM: OMAP2+: Fix eMMC on n900 with device tree
ARM: OMAP2+: Add fixed regulator to omap2plus_defconfig
ARM: OMAP2+: Fix more missing data for omap3.dtsi file
Signed-off-by: Olof Johansson <olof@lixom.net>
re-format and re-word the device tree binding documentation for MPC8xxx
and compatibles, reference the common document for interrupt controllers
and remove outdated duplicate SoC specific information
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <Pawel.Moll@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: <devicetree@vger.kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Gerhard Sittig <gsi@denx.de>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
This binding shouldn't exist; Tegra20 has two forms of SPI controller
that are documented separately in nvidia,tegra20-sflash.txt and
nvidia,tegra20-slink.txt.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
This patch fix typo of property name from 'pullup-uV' to 'pullup-uv'.
The ntc_thermistor.c use 'pullup-uv' when parsing dt data.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Adding Global Mixed-mode Technology Inc. to the list
of devicetree vendor prefixes.
Signed-off-by: Wei Ni <wni@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
phy-supply is an optional property of the fec driver, so add it to the binding
documentation.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
The binding and support for omap5-mpu which has a cortex-a15
smp core, gic and integrated L2 cache has been existing for sometime.
So Documenting the missing binding here.
Cc: Benoit Cousson <bcousson@baylibre.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
The required properties are not named "div" and "mult",
but rather "clock-div" and "clock-mult".
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Some features can be configured by the companion I2C chips,
which may not be available at the probe time. Fix the issue
by returning -EPROBE_DEFER when the MMC controller slots
are not configured.
While at it, let's also add minimal device tree support so
omap24xx platforms can use this driver without legacy mode
since we claim to support device tree for mach-omap2 based
systems.
Although adding the minimal device tree support is not strictly
a fix, it does remove one of the last blockers for dropping a
bunch of legacy platform data for mach-omap2.
Cc: linux-mmc@vger.kernel.org
Acked-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Mostly bugfixes and a few small code removals. Worth pointing out is:
- A handful of more fixes to get DT enablement working properly on OMAP,
finding new breakage of things that don't work quite right yet without
the traditional board files. I expect a bit more of this to come in this
release as people test on their hardware.
- Implementation of power_down_finish() on vexpress, to make kexec work and
to stop the MCPM core to produce a warning (the warning was new to 3.13-rc1).
- A handful of minor fixes for various platforms.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJSlPDhAAoJEIwa5zzehBx31dkP/RyP/esMHSBO5k36eB5V35HP
/XcexbgnnH4tDVIKl28qH4/AjkT+09uNZ/QQpbshwmEHw1X5i+Dz455suBCdP0T7
D+dHy/YCMDuMD7ow0OXWyyL9XbILV5VuBUogrdMN/RhzW2gIvIJRuHztKBQcU8sw
L94OIPjlKX/YFrswuy0LXiIZt2Y2k3zFVFCwcxIpTB4F1avYj7luZjSX6y469TEB
JyqfO+hooU/qtuc1pKTnBzKxVI7IVae3bberDhZCCKsAxP1/c5rSMy+nf60rqB4O
nkT09sAr1SBVp6kB4Ql2yHGiZ5ozxSJbMQpx1v73wnS09wL9RXwR1GZPrNcDW90l
qwergTrBxhYdzWyNAf/87DmQhB+Xf7kGqtUuRHleuuFhBOU29qR8oXQ6WMRkzHn9
ZTSRZ99l5a3Aul8w+sEWzOKDdZfhycMsBNzWH8xpzR1fgH4N9GRJlSlqkWdrVGca
QBNiC5bmtPpMgAHSkqK0Zu3rog83NX9NxcXG15FVEah7J4Q/VT/x51AIh0uSRBf0
35lY86R79SQ3FYYyHhl2pyAw8nhY2EmofGSG2WJ+qfZ9TgDSDFdwA0hz2fp9nwFc
Lwb3zGUEyGwgJ4I/n/cDGBfY2CsJuTEcDtB4sW1Vw4GrzMQvc43SWly6e5+RSAgq
reP23wcD4/YKev7//zzI
=zdhe
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Mostly bugfixes and a few small code removals. Worth pointing out is:
- A handful of more fixes to get DT enablement working properly on
OMAP, finding new breakage of things that don't work quite right
yet without the traditional board files. I expect a bit more of
this to come in this release as people test on their hardware.
- Implementation of power_down_finish() on vexpress, to make kexec
work and to stop the MCPM core to produce a warning (the warning
was new to 3.13-rc1).
- A handful of minor fixes for various platforms"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: bcm2835: add missing #xxx-cells to I2C nodes
ARM: dts: Add max77686 RTC interrupt to cros5250-common
ARM: vexpress/TC2: Implement MCPM power_down_finish()
ARM: tegra: Provide dummy powergate implementation
ARM: omap: fix warning with LPAE build
ARM: OMAP2+: Remove legacy omap4_twl6030_hsmmc_init
ARM: OMAP2+: Remove legacy mux code for display.c
ARM: OMAP2+: Fix undefined reference to set_cntfreq
gpio: twl4030: Fix passing of pdata in the device tree case
gpio: twl4030: Fix regression for twl gpio output
ARM: OMAP2+: More randconfig fixes for reconfigure_io_chain
ARM: dts: imx6qdl: disable spdif "rxtx5" clock option
ARM: dts: Fix omap2 specific dtsi files by adding the missing entries
ARM: OMAP2+: Fix GPMC and simplify bootloader timings for 8250 and smc91x
i2c: omap: Fix missing device tree flags for omap2
