Commit Graph

98 Commits

Author SHA1 Message Date
Dmitry Osipenko
1dac1827e2 ARM: dts: tegra30: Add IOMMU nodes to Host1x and its clients
Enable IOMMU support for Host1x and its clients.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-05-04 17:20:44 +02:00
Dmitry Osipenko
55f939c2eb ARM: tegra: Add video decoder node on Tegra30
Add device tree node for the Video Decoder Engine found on Tegra30 SoC's.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08 14:59:47 +01:00
Dmitry Osipenko
ea8570362a ARM: tegra: Add IRAM node on Tegra30
IRAM is a static RAM that consists of four contiguous 64 KiB blocks,
it is currently used to store CPU resume code, utilized by the video
decoder engine and could be used as a general-purpose fast memory.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08 14:59:14 +01:00
Greg Kroah-Hartman
b24413180f License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.

By default all files without license information are under the default
license of the kernel, which is GPL version 2.

Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier.  The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.

This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.

How this work was done:

Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
 - file had no licensing information it it.
 - file was a */uapi/* one with no licensing information in it,
 - file was a */uapi/* one with existing licensing information,

Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.

The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne.  Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.

The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed.  Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.

Criteria used to select files for SPDX license identifier tagging was:
 - Files considered eligible had to be source code files.
 - Make and config files were included as candidates if they contained >5
   lines of source
 - File already had some variant of a license header in it (even if <5
   lines).

All documentation files were explicitly excluded.

The following heuristics were used to determine which SPDX license
identifiers to apply.

 - when both scanners couldn't find any license traces, file was
   considered to have no license information in it, and the top level
   COPYING file license applied.

   For non */uapi/* files that summary was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0                                              11139

   and resulted in the first patch in this series.

   If that file was a */uapi/* path one, it was "GPL-2.0 WITH
   Linux-syscall-note" otherwise it was "GPL-2.0".  Results of that was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0 WITH Linux-syscall-note                        930

   and resulted in the second patch in this series.

 - if a file had some form of licensing information in it, and was one
   of the */uapi/* ones, it was denoted with the Linux-syscall-note if
   any GPL family license was found in the file or had no licensing in
   it (per prior point).  Results summary:

   SPDX license identifier                            # files
   ---------------------------------------------------|------
   GPL-2.0 WITH Linux-syscall-note                       270
   GPL-2.0+ WITH Linux-syscall-note                      169
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause)    21
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)    17
   LGPL-2.1+ WITH Linux-syscall-note                      15
   GPL-1.0+ WITH Linux-syscall-note                       14
   ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause)    5
   LGPL-2.0+ WITH Linux-syscall-note                       4
   LGPL-2.1 WITH Linux-syscall-note                        3
   ((GPL-2.0 WITH Linux-syscall-note) OR MIT)              3
   ((GPL-2.0 WITH Linux-syscall-note) AND MIT)             1

   and that resulted in the third patch in this series.

 - when the two scanners agreed on the detected license(s), that became
   the concluded license(s).

 - when there was disagreement between the two scanners (one detected a
   license but the other didn't, or they both detected different
   licenses) a manual inspection of the file occurred.

 - In most cases a manual inspection of the information in the file
   resulted in a clear resolution of the license that should apply (and
   which scanner probably needed to revisit its heuristics).

 - When it was not immediately clear, the license identifier was
   confirmed with lawyers working with the Linux Foundation.

 - If there was any question as to the appropriate license identifier,
   the file was flagged for further research and to be revisited later
   in time.

In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.

Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights.  The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.

Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.

In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.

Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
 - a full scancode scan run, collecting the matched texts, detected
   license ids and scores
 - reviewing anything where there was a license detected (about 500+
   files) to ensure that the applied SPDX license was correct
 - reviewing anything where there was no detection but the patch license
   was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
   SPDX license was correct

This produced a worksheet with 20 files needing minor correction.  This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.

These .csv files were then reviewed by Greg.  Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected.  This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.)  Finally Greg ran the script using the .csv files to
generate the patches.

Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-02 11:10:55 +01:00
Rob Herring
508d690e94 ARM: dts: tegra: fix PCI bus dtc warnings
dtc recently added PCI bus checks. Fix these warnings.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-06-13 16:49:57 +02:00
Mirza Krak
5e35c1f037 ARM: tegra: Add Tegra30 GMI support
Add a device node for the GMI controller found on Tegra30.

Signed-off-by: Mirza Krak <mirza.krak@gmail.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Colibri T20/T30 on EvalBoard V3.x and GMI-Memory Board
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-07 13:53:42 +01:00
Jon Hunter
e7d9b2709a ARM: tegra: Correct interrupt type for ARM TWD
The ARM TWD interrupt is a private peripheral interrupt (PPI) and per
the ARM GIC documentation, whether the type for PPIs can be set is
IMPLEMENTATION DEFINED. For Tegra20/30 devices the PPI type cannot be
set and so when we attempt to set the type for the ARM TWD interrupt it
fails. This has gone unnoticed because it fails silently and because we
cannot re-configure the type it has had no impact. Nevertheless fix the
type for the TWD interrupt so that it matches the hardware configuration.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-04-12 17:10:26 +02:00
Ralf Ramsauer
e10982487d ARM: tegra: Fix copy/paste typo in several DTS includes
The comment about the 8250 vs. APB DMA-enabled UART devices that was
added for Tegra20 and Tegra30 in commit b6551bb933 ("ARM: tegra: dts:
add aliases and DMA requestor for serial controller") introduced a typo
that has since spread to various other DTS include files. Fix all
occurrences of this typo.

Signed-off-by: Ralf Ramsauer <ralf@ramses-pyramidenbau.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
[treding@nvidia.com: amend subject, add commit message]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-04-12 17:09:29 +02:00
Linus Torvalds
c0d6fe2f01 ARM: DT updates for v4.4
As usual, this is the massive branch we have for each release. Lots of
 various updates and additions of hardware descriptions on existing hardware,
 as well as the usual additions of new boards and SoCs.
 
 This is also the first release where we've started mixing 64- and 32-bit
 DT updates in one branch.
 
 (Specific details on what's actually here and new is pretty easy to tell
 from the diffstat, so there's little point in duplicating listing it here.)
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWQT2WAAoJEIwa5zzehBx37tgQAIBe5eDJFXFihTlyOQ2plL3q
 vVH4OCzXIHELfM1J8CGZNah1wCQqNOts8RAmDCzxr+zSYuLOwJOEDZ6NKmErMxl0
 NTj3+BsqKO3NRym970ofPqU9JRLQmpZ8K7dzk8Nwj2+r1WZHFu/j6Jv44n/Ns0lw
 7+wxnG322lTm7SnvALCMD5lD4Y7VpThooWy5SdFtRoAetn+cLbVCJIeeQvO6Vxkp
 NooeJR0t2e8cpbAND5Jwu6eeWRcIbrvgjYDe0omhrIY05i9yNvIsC2HuQFGjF43z
 p2CnQvcKnhOXTZw3yse1Fx5igA7jqwVjjC/lVeDyxhusAtLpmuB6qbSaj7DpqkSQ
 nJxX1d49WKm68K+aknmee1kYRrvc4DE/kORI4IxXnsVNMu16ifTVLnxKgUhwzukb
 eZdTP6rsqgNozaYvh0k1vfSFd+CNSkBg+E9nrI3tU95yo3LOIhobVBCvBcWlmUvQ
 JdavRztqosChjIx3a9i1eCNKJtCg9p4m+gWjUqVVWsxBHe/3HojzjZnsBSynIQMA
 uGIVm0TKhNl1Svxl3oJo9257UCUK7+5PqJHK9IHrcWDULYx05JGSjuZcyvNS6Fo+
 u1DMf0ud4gXJYhecFBa7b3zRjk5YxptgCCTjeEEOTUJbbhZqDjGFZlNuFi6dmqD3
 ILJ2QMe/DGiPIlUmCfsx
 =qY1q
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Olof Johansson:
 "As usual, this is the massive branch we have for each release.  Lots
  of various updates and additions of hardware descriptions on existing
  hardware, as well as the usual additions of new boards and SoCs.

  This is also the first release where we've started mixing 64- and
  32-bit DT updates in one branch.

  (Specific details on what's actually here and new is pretty easy to
  tell from the diffstat, so there's little point in duplicating listing
  it here)"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (499 commits)
  ARM: dts: uniphier: add system-bus-controller nodes
  ARM64: juno: disable NOR flash node by default
  ARM: dts: uniphier: add outer cache controller nodes
  arm64: defconfig: Enable PCI generic host bridge by default
  arm64: Juno: Add support for the PCIe host bridge on Juno R1
  Documentation: of: Document the bindings used by Juno R1 PCIe host bridge
  ARM: dts: uniphier: add I2C aliases for ProXstream2 boards
  dts/Makefile: Add build support for LS2080a QDS & RDB board DTS
  dts/ls2080a: Add DTS support for LS2080a QDS & RDB boards
  dts/ls2080a: Update Simulator DTS to add support of various peripherals
  dts/ls2080a: Remove text about writing to Free Software Foundation
  dts/ls2080a: Update DTSI to add support of various peripherals
  doc: DTS: Update DWC3 binding to provide reference to generic bindings
  doc/bindings: Update GPIO devicetree binding documentation for LS2080A
  Documentation/dts: Move FSL board-specific bindings out of /powerpc
  Documentation: DT: Add entry for FSL LS2080A QDS and RDB boards
  arm64: Rename FSL LS2085A SoC support code to LS2080A
  arm64: Use generic Layerscape SoC family naming
  ARM: dts: uniphier: add ProXstream2 Vodka board support
  ARM: dts: uniphier: add ProXstream2 Gentil board support
  ...
2015-11-10 15:06:26 -08:00
Thierry Reding
4f1d841475 ARM: tegra: Comment out gpio-ranges properties
While the addition of these properties is technically correct it unveils
a bug with deferred probe. The problem is that the presence of the gpio-
range property causes the gpio-tegra driver to defer probe (it needs the
pinctrl driver to be ready). That's technically correct, but it causes a
couple of issues:

  - The keyboard on Chromebooks stops working. The reason for that is
    that the gpio-tegra device has not registered an IRQ domain by the
    time the EC SPI device is registered, hence the interrupt number
    resolves to 0. This is technically a bug in the SPI core, since it
    should really resolve the interrupt at probe time and defer if the
    IRQ domain isn't available yet. This is similar to what's done for
    I2C and platform device already.

  - The gpio-tegra device deferring probe means that it is moved to the
    end of the dpm_list. This list defines the suspend/resume order for
    devices. However the core lacks a way to move all users of the
    gpio-tegra device to the end of the dpm_list at the same time. This
    in turn results in a subtle bug on Jetson TK1, where the gpio-keys
    device is used to expose the power key as input. The power key is a
    convenient way to wake the system from suspend. Interestingly, the
    gpio-keys device ends up getting probed at a point after gpio-tegra
    has been probed successfully from having been deferred earlier. As
    such the driver doesn't need to defer the probe itself, and hence
    the device isn't moved to the end of the dpm_list. This causes the
    gpio-tegra device to be suspended before gpio-keys, which in turn
    leaves gpio-keys unable to wake the system from suspend.

There are patches in the works to fix both of the above issues, but they
are too involved to make it into v4.3, so in the meantime let's fix the
regressions by commenting out the gpio-ranges properties until the fixes
have landed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-10-15 17:58:43 +02:00
Marcel Ziswiler
d8b316b250 ARM: tegra: Whitespace clean-up for Tegra20/30/124
There were a few cases of eight spaces being used instead of a tab
character plus one case of using two spaces after an equal sign instead
of just one which this patch fixes.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-09-15 11:22:32 +02:00
Tomeu Vizoso
17cdddf0fb ARM: tegra: Add gpio-ranges property
Specify how the GPIOs map to the pins in Tegra SoCs, so the dependency is
explicit.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-21 18:44:28 +02:00
Nicolas Chauvet
0d5ccb38d1 ARM: tegra: Fix AHB base address on Tegra20, Tegra30 and Tegra114
Current base address is wrong by 0x04 bytes for AHB bus device as shown
in dmesg:

	tegra-ahb 6000c004.ahb: incorrect AHB base address in DT data - enabling workaround

To correct old DTBs, commit ce7a10b0ff ("ARM: 8334/1: amba: tegra-ahb:
detect and correct bogus base address") checks for the low bit of the
base address and removes theses 0x04 bytes at runtime.

This patch fixes the original DTS, so upstream version doesn't need the
workaround of the base address.

As both addresses are valid, this patch doesn't break compatibility.

Tested on tegra20-paz00 (aka ac100).

Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-21 18:44:28 +02:00
Marcel Ziswiler
cbee2613fb ARM: tegra: Add Tegra30 HDA support
Add a device node for the HDA controller found on Tegra30.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-05-05 14:04:01 +02:00
Marc Zyngier
870c81a41f ARM: tegra: update DTs to expose legacy interrupt controller
Describe the legacy interrupt controller in every tegra DTSI files,
and make it the parent of most interrupts.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1426088583-15097-5-git-send-email-marc.zyngier@arm.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2015-03-15 00:40:46 +00:00
Thierry Reding
2cda1880f8 ARM: tegra: Fix unit address for Cortex-A9 TWD timer
The Cortex-A9 TWD timer has registers at address 0x50040600, but the
unit address was 50004600, most likely a typo.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-09 11:45:15 +01:00
Linus Torvalds
205dc205ed ARM: SoC DT updates for 3.19, part 2
This is a follow-up to the early ARM SoC DT changes, with additional
 content that has external dependencies:
 
 * The Tegra IOMMU DT support depends on changes from the iommu
   tree, plus the contents of the arm-soc drivers branch
 * The MVEBU PHY support depends on changes from the phy tree
 * The AT91 DT support depends on changes from the RTC and
   DMA-slave trees
 
 All of these changes just enable additional devices for
 existing platforms.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIVAwUAVJCffWCrR//JCVInAQISCw//ZW3Eob5CuUHFsSuGYAu9v+coYJ5Dvqaq
 vnpIx5m5uAycC0vi5VpPb8TnoamXIdJs0YiBeb/4ofZkYaqnjh0blZUyepV6FVAP
 BLBqphlH2Aqxaqsr5Z5FhS9Wcd4VYbmyD698AUfC4bQQtQqB4uIVcGVXagnFTWH/
 SlbV2zbIlzUrc/rthXjVYhAopVWXAwPJ6xSJjBunFDLuoDsi9nWTNyMLQgGEd2wo
 QnMmrBKLJLCm0zriotsxYdM98aJdHji98Agh2SbGy1jVnQhcUb5M2f79oMm7TlVY
 BC6tvwbqvqQU6YMown0GGnIBX8U75oPKD/rcnSGPLRlrxigqo+SzZCTZouDIsiha
 5c0FSNK/kFgR4aSOGqtN+mdQ/jHyrhiM9koUJ+0c5B1kch4H+uejYL1udGM3p2MO
 VPzVeNiD2QotVHB+RNZkFIcnkLDVY2vyB4qluAHtqvFjRW2qs/2NlqTL6QBDt7s4
 Zdmjl67hhnI08a0XZs1d4hJFVvUH6lgxg6t6tNshu8zxQyE53V67Icj0husXNf0K
 BnnrMIqT8UcLO//JOBomL49bOTGQd3vxtHx7mE1zZmNsgYh4iyCFJH43PyoSkSbc
 z5yjbTDCtnOG3bTCK2g+ojVDh11o1a4xwCF8U7PSck5XuX8W8GPqPO0GZc1v9DXk
 gx+2WwdvImA=
 =2PWh
 -----END PGP SIGNATURE-----

Merge tag 'dt2-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC DT updates part 2 from Arnd Bergmann:
 "This is a follow-up to the early ARM SoC DT changes, with additional
  content that has external dependencies:

   - The Tegra IOMMU DT support depends on changes from the iommu tree,
     plus the contents of the arm-soc drivers branch
   - The MVEBU PHY support depends on changes from the phy tree
   - The AT91 DT support depends on changes from the RTC and DMA-slave
     trees

  All of these changes just enable additional devices for existing
  platforms"

* tag 'dt2-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: tegra: Enable IOMMU for display controllers on Tegra124
  ARM: tegra: Enable IOMMU for display controllers on Tegra114
  ARM: tegra: Enable IOMMU for display controllers on Tegra30
  ARM: tegra: Add memory controller support for Tegra124
  ARM: tegra: Add memory controller support for Tegra114
  ARM: tegra: Add memory controller support for Tegra30
  ARM: tegra: Add APB_MISC_GP as a MIPI pad control bank
  ARM: mvebu: add PHY support to the dts for the USB controllers on Armada 375
  ARM: mvebu: add Device Tree description of USB cluster controller on Armada 375
  ARM: at91/dt: at91sam9g45: add ISI node
  ARM: at91/dt: enable the RTT block on the at91sam9m10g45ek board
  ARM: at91/dt: enable the RTT block on the sam9g20ek board
  ARM: at91/dt: add GPBR nodes
  ARM: at91/dt: add RTT nodes to at91 dtsis
  ARM: at91/dt: at91sam9rl: add rtc
  ARM: at91: fix GPLv2 wording
  ARM: at91/dt: sama5d4: add DMA support
  ARM: at91/dt: sama5d4: use macro instead of numeric value
2014-12-16 14:26:26 -08:00
Thierry Reding
6d9adf6f00 ARM: tegra: Enable IOMMU for display controllers on Tegra30
Add iommus properties to the device tree nodes for the two display
controllers found on Tegra30. This will allow the display controllers to
map physically non-contiguous buffers to I/O virtual contiguous address
spaces so that they can be used for scan-out.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-12-04 16:16:14 +01:00
Thierry Reding
a9fe468f1b ARM: tegra: Add memory controller support for Tegra30
Collapses the old memory-controller and IOMMU device tree nodes into a
single node to more accurately describe the hardware.

While this is an incompatible change there are no users of the IOMMU on
Tegra, even though a driver has existed for some time.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-12-04 16:16:13 +01:00
Olof Johansson
c4574aa00e ARM: dts: tegra: move serial aliases to per-board
There are general changes pending to make the /aliases/serial* entries
number the serial ports on the system. On Tegra, so far the ports have
been just numbered dynamically as they are configured so that makes them
change.

To avoid this, add specific aliases per board to keep the old numbers.
This allows us to change the numbering by default on future SoCs while
keeping the numbering on existing boards.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:58:52 +01:00
Thierry Reding
b10231344f ARM: tegra: Add device tree nodes for flow controller
These nodes are required so that the flow controller driver can obtain
the I/O memory region from device tree rather than hard-coding it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-08-26 11:47:21 -06:00
Linus Torvalds
44c916d58b ARM: SoC cleanups for 3.17
This merge window brings a good size of cleanups on various
 platforms. Among the bigger ones:
 
 * Removal of Samsung s5pc100 and s5p64xx platforms. Both of these have
   lacked active support for quite a while, and after asking around nobody
   showed interest in keeping them around. If needed, they could be
   resurrected in the future but it's more likely that we would prefer
   reintroduction of them as DT and multiplatform-enabled platforms
   instead.
 * OMAP4 controller code register define diet. They defined a lot of registers
   that were never actually used, etc.
 * Move of some of the Tegra platform code (PMC, APBIO, fuse, powergate)
   to drivers/soc so it can be shared with 64-bit code. This also converts them
   over to traditional driver models where possible.
 * Removal of legacy gpio-samsung driver, since the last users have been
   removed (moved to pinctrl)
 
 Plus a bunch of smaller changes for various platforms that sort of
 dissapear in the diffstat for the above. clps711x cleanups, shmobile
 header file refactoring/moves for multiplatform friendliness, some misc
 cleanups, etc.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.14 (GNU/Linux)
 
 iQIcBAABAgAGBQJT5DYPAAoJEIwa5zzehBx37egQAIiatNiLLqZnfo3rwGADRz/a
 POfPovktj68aPcobyzoyhFtToMqGvi9PpysyFTIQD2HJFG+5BtiIAuqtg0875zDe
 EpBWgsfugrm0YktJWAtUerj60oAmNPbKfaEm1cOOWuM2lb2mV+QkRrwSTAgsqkT7
 927BzMXKKBRPOVLL0RYhoF8EXa0Eg8kCqAHP8fJrzVYkRp+UrZJDnGiUP1XmWJN+
 VXQMu5SEjcPMtqT7+tfX455RfREHJfBcJ1ZN/dPF8HMWDwClQG0lyc6hifh1MxwO
 8DjIZNkfZeKqgDqVyC17re7pc7p8md5HL8WXbrKpK0A9vQ5bRexbPHxcwJ1T/C2Y
 465H+st5XXbuzV1gbMwjK1/ycsH0tCyffckk8Yl/2e1Fs7GgPNbAELtTdl+5vV1Y
 xmDXkyo/9WlRM3LQ23IGKwW7VzN86EfWVuShssfro0fO7xDdb4OOYLdQI+4bCG+h
 ytQYun1vU32OEyNik5RVNQuZaMrv2c93a3bID4owwuPHPmYOPVUQaqnRX/0E51eA
 aHZYbk2GlUOV3Kq5aSS4iyLg1Yj+I9/NeH9U+A4nc+PQ5FlgGToaVSCuYuw4DqbP
 AAG+sqQHbkBMvDPobQz/yd1qZbAb4eLhGy11XK1t5S65rApWI55GwNXnvbyxqt8x
 wpmxJTASGxcfuZZgKXm7
 =gbcE
 -----END PGP SIGNATURE-----

Merge tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC cleanups from Olof Johansson:
 "This merge window brings a good size of cleanups on various platforms.
  Among the bigger ones:

   - Removal of Samsung s5pc100 and s5p64xx platforms.  Both of these
     have lacked active support for quite a while, and after asking
     around nobody showed interest in keeping them around.  If needed,
     they could be resurrected in the future but it's more likely that
     we would prefer reintroduction of them as DT and
     multiplatform-enabled platforms instead.

   - OMAP4 controller code register define diet.  They defined a lot of
     registers that were never actually used, etc.

   - Move of some of the Tegra platform code (PMC, APBIO, fuse,
     powergate) to drivers/soc so it can be shared with 64-bit code.
     This also converts them over to traditional driver models where
     possible.

   - Removal of legacy gpio-samsung driver, since the last users have
     been removed (moved to pinctrl)

  Plus a bunch of smaller changes for various platforms that sort of
  dissapear in the diffstat for the above.  clps711x cleanups, shmobile
  header file refactoring/moves for multiplatform friendliness, some
  misc cleanups, etc"

* tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (117 commits)
  drivers: CCI: Correct use of ! and &
  video: clcd-versatile: Depend on ARM
  video: fix up versatile CLCD helper move
  MAINTAINERS: Add sdhci-st file to ARCH/STI architecture
  ARM: EXYNOS: Fix build breakge with PM_SLEEP=n
  MAINTAINERS: Remove Kirkwood
  ARM: tegra: Convert PMC to a driver
  soc/tegra: fuse: Set up in early initcall
  ARM: tegra: Always lock the CPU reset vector
  ARM: tegra: Setup CPU hotplug in a pure initcall
  soc/tegra: Implement runtime check for Tegra SoCs
  soc/tegra: fuse: fix dummy functions
  soc/tegra: fuse: move APB DMA into Tegra20 fuse driver
  soc/tegra: Add efuse and apbmisc bindings
  soc/tegra: Add efuse driver for Tegra
  ARM: tegra: move fuse exports to soc/tegra/fuse.h
  ARM: tegra: export apb dma readl/writel
  ARM: tegra: Use a function to get the chip ID
  ARM: tegra: Sort includes alphabetically
  ARM: tegra: Move includes to include/soc/tegra
  ...
2014-08-08 11:00:26 -07:00
Peter De Schrijver
155dfc7b54 soc/tegra: Add efuse and apbmisc bindings
Add efuse and apbmisc bindings for Tegra20, Tegra30, Tegra114 and
Tegra124.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-07-17 14:36:10 +02:00
Tuomas Tynkkynen
308efde202 ARM: tegra: Add resets & has-utmi-pad-registers flag to all USB PHYs
Add new properties to all of the Tegra PHYs that are now required
according to the binding.

In order to stay compatible with old device trees, the USB drivers
will still function without these reset properties but with the old,
potentially buggy behaviour.

Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-07-09 16:25:46 -07:00
Olof Johansson
414c8385c5 ARM: tegra: device tree changes for 3.15
This enables:
 * host1x and eDP support on Tegra124.
 * LCD panel support for a few Tegra20 devices and Venice2.
 * Enables power down, SPI flash, and USB on Venice2.
 * Documents which Dalmore revision is supported.
 * Adds an I2C bus mux to Cardhu.
 
 Additionally, Tegra124 is converted to use #address-cells=<2> since the
 HW suports more than 32-bits of address space, and various cleanups are
 included.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.14 (GNU/Linux)
 
 iQIcBAABAgAGBQJTGiq1AAoJEMzrak5tbycxM48P/17/DY8vXhIGs7/BW0StsMOV
 kr333+12dxBQB0kftHoOtTv4/WutV4jjKAJm+pRBdu/yJ2on9FKKu11Q3r5EjI/B
 9GDk5JSyHRkSIFdzPx4f0QskklmDqJuXD+MNfiQIGC2pv/WQotLUd6rJLcVWE/bk
 8oVFg4b1kAFB2RKqwMywOMPh3X5A6xQKz/yCNLbEYsQXk9p9Iri/nX0Wq6dNVVP/
 qjbll69anJ4IjhCJO4ndrGPWob2GTQpB5a5YGl+0sSZGUEzX/dsCJRgKRrP/JjeC
 mZDWEqRTkqs2g8ZdNdseqMEgW9aksGAT57UCHbVMEd+1szY9RXB2kbvlPdUaU2XL
 oPQpF0dvh3/i/227vvgI8dK4Vo56TPvVWdyztZS1mHL59ouAR6CajRgAQP4Ra6Ug
 4qNJt/CKqm1lRO4eDXgDwt7zL+vP3bL4Mpcc7mN3d45iTz4uRN0KFoUbz/B++Mii
 20+Y5Qn1mZr6CukPcUcT1bivQR42DPQslidaEruaamoBg6Fnn+yNr3KhKcRwS4Xs
 4LuW6D4Bi+DIFwztCtQYf7pkuVHziQGUc1LnAQPqXYurMKVvnjbSjSXCxUsclkUT
 W6gaqZ9QKdjlELuuz97eO866uodZpHNZVxBlnuSaTpHZexRIkLWRHTUUFPtlL+AR
 MJW+8QCUrR08we1WmjlC
 =cniI
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-3.15-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt

Merge "ARM: tegra: device tree changes for 3.15" from Stephen Warren:

This enables:
- host1x and eDP support on Tegra124.
- LCD panel support for a few Tegra20 devices and Venice2.
- Enables power down, SPI flash, and USB on Venice2.
- Documents which Dalmore revision is supported.
- Adds an I2C bus mux to Cardhu.

Additionally, Tegra124 is converted to use #address-cells=<2> since the
HW suports more than 32-bits of address space, and various cleanups are
included.

* tag 'tegra-for-3.15-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (21 commits)
  ARM: dts: tegra: add PCIe interrupt mapping properties
  ARM: tegra: use 2 address cells for Tegra124 DT
  ARM: tegra: Rename as3722 node to pmic
  ARM: tegra: Fix whitespace around '='
  ARM: tegra: Enable USB on Venice2
  ARM: tegra: Add Tegra124 USB support
  ARM: tegra: Enable eDP for Venice2
  ARM: tegra: Add Tegra124 eDP support
  ARM: tegra: Add Tegra124 host1x support
  ARM: tegra: Hook up SDMMC3 power-supply on Venice2
  ARM: tegra: Overhaul Venice2 regulators
  ARM: tegra: Combine VBUS enable pins into one node
  ARM: tegra: Use "disabled" for status property
  ARM: tegra: add SPI flash to Venice2 DT
  ARM: tegra: enable PCA9546 on Cardhu
  ARM: tegra: enable LCD panel on Ventana
  ARM: tegra: enable LCD panel on Seaboard
  ARM: tegra: add system-power-controller property for PMIC node
  ARM: tegra: document which Dalmore revisions are supported
  ARM: tegra: Properly sort clocks property
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2014-03-20 14:40:56 -07:00
Lucas Stach
97070bd44b ARM: dts: tegra: add PCIe interrupt mapping properties
Those are defined by the common PCI binding.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-03-06 10:37:24 -07:00
Thierry Reding
688b56b485 ARM: tegra: Add head numbers to display controllers
The number of the head specifies the index of the display controller
unit and is required to properly configure outputs so that they receive
video data from the correct source.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2014-02-18 16:29:38 -08:00
Thierry Reding
da45d738c5 ARM: tegra: Properly sort clocks property
Other files and nodes list the resets property after the clocks property
so do the same here for consistency.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-02-05 09:49:16 -07:00
Eric Brower
fd6441ec0f ARM: tegra: modify Tegra30 USB2 default phy_type to UTMI
Modify Tegra30 default USB2 phy_type to UTMI; this matches
power-on-reset defaults and is expected to be the common case.

The current implementation is likely an incorrect
carry-over from Tegra20, where USB2 does default to ULPI.

Signed-off-by: Eric Brower <ebrower@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-20 09:48:56 -07:00
Laxman Dewangan
a47c662aad ARM: tegra: convert dts files of Tegra30 platforms to use pinctrl defines
Use Tegra pinconrol dt-binding macro to set the values of different pinmux
properties of Tegra30 platforms.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:20 -07:00
Stephen Warren
58ecb23f64 ARM: tegra: add missing unit addresses to DT
DT node names should include a unit address iff the node has a reg
property. For Tegra DTs at least, we were previously applying a different
rule, namely that node names only needed to include a unit address if it
was required to make the node name unique. Consequently, many unit
addresses are missing. Add them.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:16 -07:00
Stephen Warren
74511c4bef ARM: tegra: remove legacy DMA entries from DT
Now that all Tegra drivers have been converted to use DMA APIs which
retrieve DMA channel information from standard DMA DT properties, we can
remove all the legacy DT DMA-related properties.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2013-12-11 16:45:02 -07:00
Stephen Warren
2bd541ffaa ARM: tegra: remove legacy clock entries from DT
Now that all Tegra drivers have been converted to use the common reset
framework, we can remove all the legacy DT clocks/clock-names entries for
"clocks" that were only used with the old custom Tegra module reset API.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2013-12-11 16:44:55 -07:00
Stephen Warren
034d023f67 ARM: tegra: update DT files to add DMA properties
This patch switches the Tegra DT files to use the standard DMA DT bindings
rather than custom properties. Note that the legacy properties are not yet
removed; the drivers must be updated to use the new properties first.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2013-12-11 16:42:38 -07:00
Stephen Warren
3393d42205 ARM: tegra: update DT files to add reset properties
An earlier patch updated the Tegra DT bindings to require resets and
reset-names properties to be filled in. This patch updates the DT files
to include those properties.

Note that any legacy clocks and clock-names entries that are replaced by
reset properties are not yet removed; the drivers must be updated to use
the new resets and reset-names properties first.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-11 16:42:32 -07:00
Stephen Warren
d8f64797c5 ARM: tegra: add missing clock documentation to DT bindings
Many of the Tegra DT binding documents say nothing about the clocks or
clock-names properties, yet those are present and required in DT files.
This patch simply updates the documentation file to match the implicit
definition of the binding, based on real-world DT content.

All Tegra bindings that mention clocks are updated to have consistent
wording and formatting of the clock-related properties.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
2013-12-11 16:41:55 -07:00
Thierry Reding
c71d39090e ARM: tegra: Use symbolic names for gr3d clocks
Commit 05849c9381 (ARM: tegra30: convert
device tree files to use CLK defines) updated the Tegra30 device tree to
use symbolic clock names but forgot to update this node.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-10-17 11:42:47 -06:00
Thierry Reding
05465f4e25 ARM: tegra: Mark Tegra30 display controller compatible with Tegra20
The display controller found on Tegra30 SoCs is backwards-compatible
with the one on Tegra20 SoCs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-10-17 11:30:42 -06:00
Tuomas Tynkkynen
cc34c9f79c ARM: tegra: add USB DT entries for Tegra30
Add device tree entries for the 3 USB controllers and PHYs and
enable the third controller on Cardhu and Beaver boards.

Fix VBUS regulator entries on Beaver. The GPIO pins were wrong.
Also, internal pullups need to be enabled on those pins.

Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-08-13 12:40:47 -06:00
Jay Agarwal
d7283c11f7 ARM: dts: tegra: Increase prefetchable PCI memory space
Instead of evenly splitting the 512 MiB area between prefetchable and
non-prefetchable memory spaces, increase the prefetchable memory space
to 384 MiB while at the same time decreasing the non-prefetchable memory
space to 128 MiB. This is a more useful default as most PCIe devices
require more prefetchable than non-prefetchable memory.

Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-08-12 14:20:43 -06:00
Thierry Reding
e07e3dbd9c ARM: tegra: Add Tegra30 PCIe support
Add the top-level pcie-controller node for the Tegra30 SoC. Tegra30 has
three root ports that can use different lane layouts.

Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-08-12 14:19:30 -06:00
Hiroshi Doyu
05849c9381 ARM: tegra30: convert device tree files to use CLK defines
Use the Tegra30 CAR binding header (tegra30-car.h) to replace magic
numbers in the device tree. For example,

-               clocks = <&tegra_car 28>;
+               clocks = <&tegra_car CLK_HOST1X>;

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
[swarren, updated since tegra30-car.h moved for consistency]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:13:50 -06:00
Stephen Warren
6cecf916b9 ARM: tegra: convert device tree files to use IRQ defines
Use the GIC and standard IRQ binding defines in all IRQ specifiers.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:13:50 -06:00
Stephen Warren
3325f1bcd0 ARM: tegra: convert device tree files to use GPIO defines
Use TEGRA_GPIO() macro to name all GPIOs referenced by GPIO properties,
and some interrupts properties. Use standard GPIO flag defines too.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:13:49 -06:00
Stephen Warren
1bd0bd499d ARM: tegra: use #include for all device trees
Replace /include/ (dtc) with #include (C pre-processor) for all Tegra DT
files, so that gcc -E handles the entire include tree, and hence any of
those files can #include some other file e.g. for constant definitions.

This allows future use of #defines and header files in order to define
names for various constants, such as the IDs and flags in GPIO
specifiers. Use of those features will increase the readability of the
device tree files.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:13:49 -06:00
Arnd Bergmann
535409d9b3 ARM: tegra: device tree changes
This branch contains the majority of the device tree changes for Tegra.
 Highlights include:
 
 * Many changes for Tegra114, and the Dalmore board, to enable pinctrl,
   SDHCI/MMC, PWM, DMA, I2C, KBC, SPI, battery, regulators.
 * Adding or enabling suspend wakeup sources on many boards, and adding
   suspend timing parameters, to support the system suspend patches.
 * Adding clocks to the audio-related nodes, so that in 3.11, the audio
   driver can pull these clocks from device tree rather than hard-coding
   clock names.
 * Some small DT fixes/cleanup.
 
 This branch is based on the previous clk pull request.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJRXv7mAAoJEMzrak5tbycxfzIQAMPNW66IgtRLDKat5R2ixBqp
 2LE4qQnndwYvql54WeIHCHPm71mO0E6oOtss+0jmDh0nmeQ0D0CzxCrV1JjbFNJK
 Eo9ayRdujCrYn3V3ru6k4NyVZa3keupCVKTJRwxGxRYqwXBxFLBPhzBiHhBoOi9W
 lJZNUQ+MRa4YpTQgUa9xmVwHaPJZMoWs1WQwJMllFyWABTlP+/y3JmfyqQ0A+CGF
 myToy57ZN6YDAoWxNw+dixRW7O0wk4kweVZuf3s+/Sg0FxuJL+FZgtPVD8DeeFxz
 zhROxF2Cy75V9Z+48cECbjm0HxqBZAhkkomTOpL6eSMw61DCr4OzWLEi6A7ILO/Y
 02kRDqbQ/IRL4Di7nvoKhY6wLg3AdZXyvZkf+W0bLu19WrHbah7ruba/9uTA72ZI
 W7gx3QYKRrCvJOFNkeIHO84Lp7FEV60L/GYQgWXHTwozxP9PLmqg4bRSLX20rhPD
 3Vi9zjpRJ9C2GstljVr+aORRn4A1QbWciYAkv2CCIIrh0xwm8YSclgWiTf95AVka
 xmPp3fwhc3VZLGHhD1wpT5UJnzzZekBQzP0+QF6K+nSp7TMtPrTFuWwMCJybq463
 vjagS6m7DDXNCTvJee+D/3dHkeDCgIPGGr0LbjopxB/FKsCevZWFOtNCJxkbi+t6
 ojwrLwqs++Yq59pBFvee
 =avad
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-3.10-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt2

From Stephen Warren <swarren@wwwdotorg.org>:

ARM: tegra: device tree changes

This branch contains the majority of the device tree changes for Tegra.
Highlights include:

* Many changes for Tegra114, and the Dalmore board, to enable pinctrl,
  SDHCI/MMC, PWM, DMA, I2C, KBC, SPI, battery, regulators.
* Adding or enabling suspend wakeup sources on many boards, and adding
  suspend timing parameters, to support the system suspend patches.
* Adding clocks to the audio-related nodes, so that in 3.11, the audio
  driver can pull these clocks from device tree rather than hard-coding
  clock names.
* Some small DT fixes/cleanup.

This branch is based on the previous clk pull request.

* tag 'tegra-for-3.10-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (25 commits)
  clk: tegra: Fix cdev1 and cdev2 IDs
  ARM: dts: tegra: add the PM configurations of PMC
  ARM: tegra: add non-removable and keep-power-in-suspend property for MMC
  ARM: tegra: whistler: add wakeup source for KBC
  ARM: tegra: add power gpio keys to DT
  ARM: tegra: keep power on to SD slot on Dalmore
  ARM: tegra: add clocks property to AC'97 sound nodes
  ARM: tegra: add clocks property to sound nodes
  ARM: tegra: dalmore: add fixed regulator node
  ARM: tegra: dalmore: add TPS65090 node
  ARM: tegra: dalmore: add cpu regulator node
  ARM: tegra: Add sbs-battery node to Dalmore
  ARM: tegra: add DT binding for i2c-tegra
  ARM: tegra: add SPI nodes to Tegra114 DT
  ARM: tegra: add KBC nodes to Tegra114 DT
  ARM: tegra: add aliases and DMA requestor for serial nodes of Tegra114
  ARM: tegra: add I2C nodes to Tegra114 DT
  ARM: tegra: add APB DMA nodes to Tegra114 DT
  ARM: tegra: add PWM nodes to Tegra114 DT
  ARM: tegra: fix the status of PWM DT nodes
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-09 17:53:08 +02:00
Arnd Bergmann
f8da810cbb Merge branch 'tegra/clk' into next/dt2
This is a dependency for the tegra/dt branch.

Conflicts:
	drivers/clocksource/tegra20_timer.c

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-09 17:52:43 +02:00
Andrew Chew
b69cd984ef ARM: tegra: fix the status of PWM DT nodes
We should be defining the PWM nodes with status as "disabled" in the
chip-specific dtsi file, since we don't know whether specific boards
will use the PWM or not. This patch fixes the PWM node status for
Tegra20 and Tegra30.

Also fixed the one user of PWM, which is the Tegra20 medcom-wide board,
so that PWM is set to "okay" in the board-specific dts file.

Signed-off-by: Andrew Chew <achew@nvidia.com>
[swarren: in medcom-wide: fixed node sort order, removed duplicate pwm:
label, fixed syntax error]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 17:17:40 -06:00
Stephen Warren
8aa15d82df Merge branch 'for-3.10/soc' into for-3.10/clk 2013-04-04 16:08:06 -06:00
Joseph Lo
7021d12205 ARM: tegra: add clock source of PMC to device trees
Adding the bindings of the clock source of PMC in DT.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-03 14:29:56 -06:00