Commit Graph

68 Commits

Author SHA1 Message Date
Heiko Stuebner
a8f0fa2764 ARM: dts: rockchip: fix missing usbphy unit-names
The usbphy subnodes do have a reg property but no unitname, add them.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring <robh@kernel.org>
2016-04-06 16:13:07 -07:00
Heiko Stuebner
95cface95b ARM: dts: rockchip: fix rk3288 power-domain unit names
The power-domain sub-nodes do have reg properties, but so far are
missing the expected unit names. So add the missing ones.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring <robh@kernel.org>
2016-04-06 16:12:59 -07:00
John Keeping
1946a201b3 ARM: dts: rockchip: add mipi_dsi to VIO power domain on rk3288
The MIPI controllers are part of the VIO power domain so add the
necessary property to indicate this for the controller we support.

Signed-off-by: John Keeping <john@metanate.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-03-27 00:54:13 +01:00
John Keeping
57dcfa5613 ARM: dts: rockchip: fix audio interrupts on rk3288
These must be translated from the values in the TRM by subtracting 32,
which has not been done.  The SPDIF interrupt is also off-by-one.

Signed-off-by: John Keeping <john@metanate.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-03-27 00:54:13 +01:00
John Keeping
5415ba4065 ARM: dts: rockchip: fix MIPI interrupt on rk3288
This isn't currently used by the driver but the correct value is 19
since DSIHOST0 is 51 in the TRM and the GIC offset requires 32 to be
subtracted.

Signed-off-by: John Keeping <john@metanate.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-03-27 00:54:13 +01:00
Masahiro Yamada
2ef7d5f342 ARM, ARM64: dts: drop "arm,amba-bus" in favor of "simple-bus"
The compatible string "simple-bus" is well defined in ePAPR, while
I see no documentation for the "arm,amba-bus" arnywhere in ePAPR or
Documentation/devicetree/.

DT is also used by other projects than Linux kernel.  It is not a
good idea to rely on such an unofficial binding.

This commit
  - replaces "arm,amba-bus" with "simple-bus"
  - drops "arm,amba-bus" where it is used along with "simple-bus"

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2016-03-12 17:40:34 -08:00
Addy Ke
e7d6c9b116 ARM: dts: rockchip: Add arm, pl330-broken-no-flushp quirk for rk3288 platform
Pl330 integrated in rk3288 platform doesn't support
DMAFLUSHP function. So we add arm,pl330-broken-no-flushp quirk
for it.

Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Sonny Rao <sonnyrao@chromium.org>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-02-09 08:41:02 +01:00
Heiko Stuebner
0ace8217c2 ARM: dts: rockchip: add clock-cells for usb phy nodes
Add the #clock-cells properties for the usbphy nodes as they
provide the pll-clocks now.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-01-25 15:05:46 +01:00
Sjoerd Simons
df5ea01598 ARM: dts: rockchip: Assign RK3288 EDP_24M input centrally
The EDP 24M clock can be fed either by an SoC internal fixed clock or
from an external IC. Change the default parent to the internal clock in
the main rk3288 dtsi, to ensure (by default) it gets setup with a
non-orphaned clock (hardware defaults to the externa clock).

This prevents potential issues when the clock framework get support for
deferring on orphaned clocks, while specific boards can always change
the parent clock if an external input is preferred.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-01-25 14:47:36 +01:00
Chris Zhong
cab6f070ab ARM: dts: rockchip: add rk3288 mipi_dsi nodes
Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl
output port nodes.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-01-24 23:28:23 +01:00
Olof Johansson
84658cbde8 Another new soc - the rk3228 quad-core cortex-a7, a new rk3036 board,
support for the efuses on Rockchip socs and some improvements for
 rk3288 regulators.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJWd0xyAAoJEPOmecmc0R2B71UIAJu6jDdfk5kmYzyXjBloBNwd
 PVRojGzVjCwCiVKX7GWINSf3D7dTKeYUwVs9uouVW4Q/iIk/l4Iq46+yg20ZODNM
 3haS2hwztRPEKeU+0qhYdoJf2cWOKzk0RP90umTMMVt2xnqbQCBFAW4NuE4DBLHe
 5o7R99ORKHi+IjBaI6Wtk1JoRNNkyYIDW6eLC9mxAJs32mr1ee45uidhPBD+VX+n
 1nf/yUPs6bc1yPyNhFN49AywYvjg02y96/4ER6bBtOcEw91uDc0ld0M10H/mvujT
 B+w8U6xBUWulUU53MS8aVKDZ+bp4o6YZZbIq/FJtaz3c+bhj8Rjl4UnlZh+gaiA=
 =Zp6y
 -----END PGP SIGNATURE-----

Merge tag 'v4.5-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Another new soc - the rk3228 quad-core cortex-a7, a new rk3036 board,
support for the efuses on Rockchip socs and some improvements for
rk3288 regulators.

* tag 'v4.5-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: add the kylin board for rk3036
  ARM: dts: rockchip: add the sdio/sdmmc node for rk3036
  ARM: dts: rockchip: fix the pinctrl bias settings for rk3036
  ARM: dts: rockchip: add eFuse node for rk3188 SoCs
  ARM: dts: rockchip: add eFuse node for rk3066a SoCs
  ARM: dts: rockchip: add eFuse config of rk3288 SoC
  ARM: dts: rockchip: add rk3228-evb board
  ARM: dts: rockchip: add core rk3228 dtsi
  clk: rockchip: Add the clock ids of rk3288 eFuses
  ARM: dts: rockchip: Fix typo in rk3288 sdmmc card detect pin name
  ARM: dts: rockchip: fix voltage ranges for rk3288-evb-act8846 board
  ARM: dts: rockchip: move the public part to rk3288-evb common
  ARM: dts: rockchip: add 2 regulators for rk3288-evb-act8846
  ARM: dts: rockchip: correct the name of REG8 for rk3288-evb-act8846
  clk: rockchip: add dt-binding header for rk3228
  clk: rockchip: add id for mipidsi sclk on rk3288

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-12-22 13:07:11 -08:00
ZhengShunQian
8818555964 ARM: dts: rockchip: add eFuse config of rk3288 SoC
This patch add the eFuse dt config of rk3288 SoC.

Signed-off-by: ZhengShunQian <zhengsq@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-12-12 20:15:23 +01:00
Arnd Bergmann
e9093d045a First round of arm devicetree changes.
Among the bigger changes are two new Veyron boards, support for
 the dual-core cortex-a7 rk3036 soc and addition of support for
 the crypto engine of the rk3288. Smaller changes include some
 IR receivers, updates of thermal settings more reflecting real-
 life and testing-results.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJWYetUAAoJEPOmecmc0R2B4goIAIiVjdbuetKLxeEqDWmEdCnI
 AKlV+IM1CWt8ib2k5bCoaYmWwtujY6m/2oHhbJklHgv3+K32lltwgZMJPeJu7xi3
 C02HCdq6DydsCb2154giKOXj+SMsNZ/c38Gk1sDFFPQCcwfgT9Hg+7HOXCim2Ac8
 C/Ewi7z6bZKzkvwy28KrQVPDub2DB/JQAGp8DP9hfK9k23PtaQRoLhTExj68O6JK
 rRjB67hb1+xdKgf8ujXevIYvoacO1odW4fLnB7KC4ei/O2XycKK/4ohzrENe/zJ6
 Y2wYnb1YGiLtjgx0DlpbPvaCE6/UyX+ZhVC4kUiB937/x1ZpCZX9ttLMT91gKx8=
 =F0Xt
 -----END PGP SIGNATURE-----

Merge tag 'v4.5-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Merge "rockchip dts32 changes for 4.5" from Heiko Stuebner:

First round of arm devicetree changes.
Among the bigger changes are two new Veyron boards, support for
the dual-core cortex-a7 rk3036 soc and addition of support for
the crypto engine of the rk3288. Smaller changes include some
IR receivers, updates of thermal settings more reflecting real-
life and testing-results.

* tag 'v4.5-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: add gpio-ir-receiver to the R89 board
  ARM: dts: rockchip: add touchscreen node to veyron minnie
  ARM: dts: rockchip: add veyron-mickey board
  ARM: dts: rockchip: add veyron-brain board
  ARM: dts: rockchip: make sure edp_24m is associated to xin24m on veyron
  ARM: dts: rockchip: override thermal settings on veyron-speedy
  ARM: dts: rockchip: update the thermal management on rk3288
  ARM: dts: rockchip: Add Crypto node for rk3288
  ARM: dts: rockchip: add rk3036-evb board
  ARM: dts: rockchip: add core rk3036 dtsi
  clk: rockchip: add dt-binding header for rk3036
  clk: rockchip: add an id for rk3288 crypto clk
  ARM: dts: rockchip: Add IR receiver to RK3288 Radxa Rock 2 Square
  ARM: dts: rockchip: add channels properties for i2s
  ARM: dts: rockchip: set system-power-controller property on rk3288-rock2
  ARM: dts: rockchip: Setup rk3066/rk3188 ethernet0 alias for u-boot
  ARM: dts: rockchip: Setup rk3288 ethernet0 alias for u-boot
2015-12-12 00:26:26 +01:00
Matthias Brugger
d59df5d1cd ARM: dts: rockchip: Fix typo in rk3288 sdmmc card detect pin name
The card detect pin is currently called sdmcc-cd.
This patch fixes the typo and renames the pin to sdmmc-cd.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-12-12 00:05:44 +01:00
Zain Wang
c2cb616129 ARM: dts: rockchip: Add Crypto node for rk3288
Add Crypto node for rk3288 including crypto controller and dma clk.

Signed-off-by: Zain Wang <zain.wang@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-11-27 18:13:30 +01:00
Sugar Zhang
e241657de0 ARM: dts: rockchip: add channels properties for i2s
add playback and capture properties to compatible various chips.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-11-20 16:34:02 +01:00
Sjoerd Simons
85ef8d611f ARM: dts: rockchip: Setup rk3288 ethernet0 alias for u-boot
Add an ethernet0 alias for the RK3288 mac interface so
that u-boot can find the device-node and fill in the mac address on
boards that support a wired network interface.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-11-19 05:54:58 +01:00
Caesar Wang
784359b824 ARM: dts: rockchip: Add OTP gpio pinctrl to rk3288 tsadc node
Add the "init" anf "sleep" pinctrl as the OTP gpio state.
We need the OTP pin is gpio state before resetting the TSADC controller,
since the tshut polarity will generate a high signal.

"init" pinctrl property is defined by Doug's Patch[0].

Patch[0]:
https://patchwork.kernel.org/patch/7454311/

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-11-19 05:50:42 +01:00
Linus Torvalds
c0d6fe2f01 ARM: DT updates for v4.4
As usual, this is the massive branch we have for each release. Lots of
 various updates and additions of hardware descriptions on existing hardware,
 as well as the usual additions of new boards and SoCs.
 
 This is also the first release where we've started mixing 64- and 32-bit
 DT updates in one branch.
 
 (Specific details on what's actually here and new is pretty easy to tell
 from the diffstat, so there's little point in duplicating listing it here.)
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWQT2WAAoJEIwa5zzehBx37tgQAIBe5eDJFXFihTlyOQ2plL3q
 vVH4OCzXIHELfM1J8CGZNah1wCQqNOts8RAmDCzxr+zSYuLOwJOEDZ6NKmErMxl0
 NTj3+BsqKO3NRym970ofPqU9JRLQmpZ8K7dzk8Nwj2+r1WZHFu/j6Jv44n/Ns0lw
 7+wxnG322lTm7SnvALCMD5lD4Y7VpThooWy5SdFtRoAetn+cLbVCJIeeQvO6Vxkp
 NooeJR0t2e8cpbAND5Jwu6eeWRcIbrvgjYDe0omhrIY05i9yNvIsC2HuQFGjF43z
 p2CnQvcKnhOXTZw3yse1Fx5igA7jqwVjjC/lVeDyxhusAtLpmuB6qbSaj7DpqkSQ
 nJxX1d49WKm68K+aknmee1kYRrvc4DE/kORI4IxXnsVNMu16ifTVLnxKgUhwzukb
 eZdTP6rsqgNozaYvh0k1vfSFd+CNSkBg+E9nrI3tU95yo3LOIhobVBCvBcWlmUvQ
 JdavRztqosChjIx3a9i1eCNKJtCg9p4m+gWjUqVVWsxBHe/3HojzjZnsBSynIQMA
 uGIVm0TKhNl1Svxl3oJo9257UCUK7+5PqJHK9IHrcWDULYx05JGSjuZcyvNS6Fo+
 u1DMf0ud4gXJYhecFBa7b3zRjk5YxptgCCTjeEEOTUJbbhZqDjGFZlNuFi6dmqD3
 ILJ2QMe/DGiPIlUmCfsx
 =qY1q
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Olof Johansson:
 "As usual, this is the massive branch we have for each release.  Lots
  of various updates and additions of hardware descriptions on existing
  hardware, as well as the usual additions of new boards and SoCs.

  This is also the first release where we've started mixing 64- and
  32-bit DT updates in one branch.

  (Specific details on what's actually here and new is pretty easy to
  tell from the diffstat, so there's little point in duplicating listing
  it here)"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (499 commits)
  ARM: dts: uniphier: add system-bus-controller nodes
  ARM64: juno: disable NOR flash node by default
  ARM: dts: uniphier: add outer cache controller nodes
  arm64: defconfig: Enable PCI generic host bridge by default
  arm64: Juno: Add support for the PCIe host bridge on Juno R1
  Documentation: of: Document the bindings used by Juno R1 PCIe host bridge
  ARM: dts: uniphier: add I2C aliases for ProXstream2 boards
  dts/Makefile: Add build support for LS2080a QDS & RDB board DTS
  dts/ls2080a: Add DTS support for LS2080a QDS & RDB boards
  dts/ls2080a: Update Simulator DTS to add support of various peripherals
  dts/ls2080a: Remove text about writing to Free Software Foundation
  dts/ls2080a: Update DTSI to add support of various peripherals
  doc: DTS: Update DWC3 binding to provide reference to generic bindings
  doc/bindings: Update GPIO devicetree binding documentation for LS2080A
  Documentation/dts: Move FSL board-specific bindings out of /powerpc
  Documentation: DT: Add entry for FSL LS2080A QDS and RDB boards
  arm64: Rename FSL LS2085A SoC support code to LS2080A
  arm64: Use generic Layerscape SoC family naming
  ARM: dts: uniphier: add ProXstream2 Vodka board support
  ARM: dts: uniphier: add ProXstream2 Gentil board support
  ...
2015-11-10 15:06:26 -08:00
Alexandru M Stan
f71ddc5873 ARM: dts: rockchip: Add drive/sample clocks for rk3288 dw_mmc devices
The drive/sample clocks can be phase shifted.  The drive clock
could be used in a future patch to adjust hold times.  The sample
clock is used for tuning.

Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-10-26 16:00:12 +01:00
Sjoerd Simons
874e568e50 ARM: dts: rockchip: Add SPDIF transceiver for RK3288
Add the SPDIF transceiver controller definition and pin setup for RK3288
SoCs

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-10-13 10:59:06 +02:00
Caesar Wang
b63af764ca ARM: dts: rockchip: add the support power-domain node on RK3288 SoCs
We can add more domains node in the future.
This patch add the needed clocks into power-controller.
As the discuess about all the device clocks being listed in
the power-domains itself.

There are several reasons as follows:

Firstly, the clocks need be turned off to save power when
the system enter the suspend state. So we need to enumerate
the clocks in the dts. In order to power domain can turn on and off.

Secondly, the reset-circuit should reset be synchronous on RK3288,
then sync revoked. So we need to enable clocks of all devices.
In other words, we have to enable the clocks before you operate them
if all the device clocks are included in someone domians.

Thirdly, as the chip designs for PM hardhare. we need turn on the noc
clocks, if we are operating the "pd_vio" domain to enter the idle status.
The device's clock be included in domains that needed turn on if do that.

The clocks in the dts are needed to enable before you want to happy work.
At the moment, This patch is very good work for PM hardware.

Also, we can add these clocks in the future if we have some hidden clocks.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Michael Turquette <mturquette@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>

[add necessary power-domain properties to keep drm subsys working]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-10-08 22:41:11 +02:00
Douglas Anderson
e61ccb12d3 ARM: dts: rockchip: Add the hdmi-ddc pinctrl settings for rk3288
The pins for i2c5 can either be configured as "I2C5" which means that
they're controlled by the normal RK3288 I2C controller or as "EDP / HDMI
I2C".  It's unclear why EDP is referenced here since apparently setting
the mux to this position enables I2C communication using the dw_hdmi
block with a patch like <https://patchwork.kernel.org/patch/7098101/>.

There appear to be some reasons why using the builtin I2C controller in
dw_hdmi is better than using the normal RK3288 I2C controller, so boards
based on rk3288 might eventually want to use this pinmux if it's known
to work.

Once driver support in dw_hdmi lands, boards would use this by selecting
this pinctrl for the HDMI block and then _not_ specifying a ddc-i2c-bus
and _not_ setting the status to "okay" for i2c5 (which uses the same
pins).

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-10-08 22:37:42 +02:00
Alexandru M Stan
8915f36441 ARM: dts: rockchip: pull up cts lines on rk3288
The flow control lines from a user accessible UART are optional,
the user might not have anything connected to those pins.
In order to prevent random interrupts happening and noise affecting
the cts pin should be pulled up.

Note that the default state for that pin on the rk3288 is pulled up,
so this patch merely restores them.

This is similar to what we're already doing with the RX pin,
so it should be safe. At worst it might be a slightly higher power usage
(through ~50 kohms) when the cts is low.

Suggested-by: Neil Hendin <nhendin@chromium.org>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-10-08 22:37:16 +02:00
Heiko Stuebner
b21bcfc9fd ARM: dts: rockchip: reserve unusable memory region on rk3288
The all current Rockchip SoCs supporting 4GB of ram have problems accessing
the memory region 0xfe000000~0xff000000. This also seems to includes the
rk3368 arm64 soc.

All current code handling dma memory oddities I could find, seem to involve
soc-specific code (zone-dma or so) while this issue is shared between arm32
and arm64 socs from Rockchip, which would need to have this described in
the soc devicetree on both socs.

Limiting the dma-zone alone also does not solve the issue and as the
dma-masks need to be a power-of-two in the kernel, the next lower dma-mask
brings memory usable for dma down to 2GB.

So as a stop-gap block off the affected region to prevent its use by
devices with 4GB of memory, like some recent Chromebooks.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
2015-08-08 12:28:54 +02:00
Heiko Stuebner
4863dcd394 ARM: dts: rockchip: add rk3288 arm-pmu irq affinity
The rk3288 uses spi irqs for the arm-pmu on individual cpu cores, so needs
the affinity to them defined.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Sonny Rao <sonnyrao@chromium.org>
2015-07-16 22:22:47 +02:00
Heiko Stuebner
1a1b698b11 ARM: dts: rockchip: fix rk3288 watchdog irq
The watchdog irq is actually SPI 79, which translates to the original
111 in the manual where the SPI irqs start at 32.
The current dw_wdt driver does not use the irq at all, so this issue
never surfaced. Nevertheless fix this for a time we want to use the irq.

Fixes: 2ab557b72d ("ARM: dts: rockchip: add core rk3288 dtsi")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
2015-07-06 00:46:20 +02:00
Romain Perier
e6b54649ad ARM: dts: rockchip: Add STMMAC reset signal in GMAC interface for rk3288
Which fixes warning "no reset control found" by the same time

Signed-off-by: Romain Perier <romain.perier@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-07-06 00:46:19 +02:00
Heiko Stuebner
b177250620 ARM: dts: rockchip: relicense rk3288.dtsi under GPLv2/X11
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.

The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3288.dtsi to this combination.

CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Doug Anderson <dianders@chromium.org>
Acked-by: Sonny Rao <sonnyrao@chromium.org>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Caesar Wang <caesar.wang@rock-chips.com>
Acked-by: Lin Huang <hl@rock-chips.com>
Acked-by: Chris Zhong <zyw@rock-chips.com>
Acked-by: Jianqun Xu<jay.xu@rock-chips.com>
Acked-by: Daniel Kurtz <djkurtz@chromium.org>
Acked-by: Roger Chen <roger.chen@rock-chips.com>
Acked-by: Yunzhi Li <lyz@rock-chips.com>

on behalf of Rockchip
Acked-by: Eddie Cai <eddie.cai@rock-chips.com>
2015-05-15 12:25:51 +02:00
Yunzhi Li
cabd2ea216 ARM: dts: rockchip: add properties for dwc2 usb otg controller
Add properties for dwc2 usb device controller according to
Documentation/devicetree/bindings/usb/dwc2.txt

Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-04-27 18:37:14 +02:00
Sonny Rao
f18407800e ARM: dts: rockchip: Enable Cortex-A12 HW PMU events on rk3288
This adds the dts node for the PMU with the correct PMUIRQ interrupts
for each core.

Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-04-27 09:27:41 +02:00
Linus Torvalds
5c73cc4b6c ARM: DT updates for v4.1
As always, this tends to be one of our bigger branches. There are lots of
 updates this release, but not that many jumps out as something that needs
 more detailed coverage. Some of the highlights are:
 
 - DTs for the new Annapurna Labs Alpine platform
 - More graphics DT pieces falling into place on Exynos, bridges, clocks.
 - Plenty of DT updates for Qualcomm platforms for various IP blocks
 - Some churn on Tegra due to switch-over to tool-generated pinctrl data
 - Misc fixes and updates for Atmel at91 platforms
 - Various DT updates to add IP block support on Broadcom's Cygnus platforms
 - More updates for Renesas platforms as DT support is added for various IP
   blocks (IPMMU, display, audio, etc).
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVNzKFAAoJEIwa5zzehBx3JtEP/1g89CW7iZHAUyIiC+jtgqck
 ASoplr13DLD0HWjjWITX3zm7J/iY57YjEv14tHH/xmrh5YCCZ+mRLqiD/Plnv0Zv
 JdJRRJv/NMnMlu/tA1aBO326JOt2Vw+3YngmYayDpoRzVifx2YTJLbu2difa+6rM
 vN6FpOE6U5jkvM16+gqxKxyx0tGIQz9cTn+9q2V1fDS++vZ2VvqfB5pTNul3BKAF
 OVCNFJ/EUE9EPMPbmgDjYmNE/POj64kF32n7NBEQz2Z+nwDNxDAecfF356hV7o5g
 JsFLNK+4c2QQqBL775xzCf5kK+n/V2cFEpDica+hU70AdWsjdAlUFrbOsWGUJLRi
 4Blrv8GRxEKeOCs8AFKYCM+z3zf2ais7JMteD2VW26ywCwpUt+QEZTUVHRHU3NYQ
 BMI7uyTGIH2GyLyS+Av3vikza8IbDIwlYuuDpXhCJSXXgKSnbzCrpjkhyGLccBJR
 k3qgUwPJVw9hP1qaaNgvb7p9oNhTP2yLl3fQ68WqI7QWIupW0/s12INhzFFgt6zU
 Nzcx010ku9yMeMMGtfiNgA3cMln+Ysfs1UIUOMQ36zP1PCtHJkZgwtZzTsBE4A04
 KqmiLL/+7qsconEhEanmDzTpeXiNzERnOKSSqVN7Fwp89GEFJLrWpHSXI+8SBTHC
 fB54LRTNYdlcoN0QshcT
 =wqhB
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Olof Johansson:
 "As always, this tends to be one of our bigger branches.  There are
  lots of updates this release, but not that many jumps out as something
  that needs more detailed coverage.  Some of the highlights are:

   - DTs for the new Annapurna Labs Alpine platform

   - more graphics DT pieces falling into place on Exynos, bridges,
     clocks.

   - plenty of DT updates for Qualcomm platforms for various IP blocks

   - some churn on Tegra due to switch-over to tool-generated pinctrl
     data

   - misc fixes and updates for Atmel at91 platforms

   - various DT updates to add IP block support on Broadcom's Cygnus
     platforms

   - more updates for Renesas platforms as DT support is added for
     various IP blocks (IPMMU, display, audio, etc)"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (231 commits)
  ARM: dts: alpine: add internal pci
  Revert "ARM: dts: mt8135: Add pinctrl/GPIO/EINT node for mt8135."
  ARM: mvebu: use 0xf1000000 as internal registers on Armada 370 DB
  ARM: dts: qcom: Add idle state device nodes for 8064
  ARM: dts: qcom: Add idle states device nodes for 8084
  ARM: dts: qcom: Add idle states device nodes for 8974/8074
  ARM: dts: qcom: Update power-controller device node for 8064 Krait CPUs
  ARM: dts: qcom: Add power-controller device node for 8084 Krait CPUs
  ARM: dts: qcom: Add power-controller device node for 8074 Krait CPUs
  devicetree: bindings: Document qcom,idle-states
  devicetree: bindings: Update qcom,saw2 node bindings
  dt-bindings: Add #defines for MSM8916 clocks and resets
  arm: dts: qcom: Add LPASS Audio HW to IPQ8064 device tree
  arm: dts: qcom: Add APQ8084 chipset SPMI PMIC's nodes
  arm: dts: qcom: Add 8x74 chipset SPMI PMIC's nodes
  arm: dts: qcom: Add SPMI PMIC Arbiter nodes for APQ8084 and MSM8974
  arm: dts: qcom: Add LCC nodes
  arm: dts: qcom: Add TCSR support for MSM8960
  arm: dts: qcom: Add TCSR support for MSM8660
  arm: dts: qcom: Add TCSR support for IPQ8064
  ...
2015-04-22 09:09:46 -07:00
Alexandru M Stan
54b0bc6025 ARM: dts: rockchip: disable gmac by default in rk3288.dtsi
This block should not be enabled by default or else if the kconfig is set,
it will try to load/probe even if there's no phy connected.

Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-03-14 19:35:26 +01:00
Yunzhi Li
f6db7029bb ARM: dts: rockchip: add rk3288 usb PHY
This patch adds a device_node for RK3288 SoC usb phy. It also
defines the phy to be used by three usb controllers: usb_host0/1
and usb_otg.

Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Tested-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-02-23 10:12:30 +01:00
Linus Torvalds
a233bb742a ARM: SoC DT updates
DT changes continue to be the bulk of our merge window contents.
 
 We continue to have a large set of changes across the board as new platforms
 and drivers are added.
 
 Some of the new platforms are:
 - Alphascale ASM9260
 - Marvell Armada 388
 - CSR Atlas7
 - TI Davinci DM816x
 - Hisilicon HiP01
 - ST STiH418
 
 There have also been some sweeping changes, including relicensing of DTS
 contents from GPL to GPLv2+/X11 so that the same files can be reused in
 other non-GPL projects more easily. There's also been changes to the
 DT Makefile to make it a little less conflict-ridden and churny down
 the road.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJU4u0bAAoJEIwa5zzehBx3XFQP+wbVDp39ay3SRanFWeXqhfTe
 6jRsYrOcq6BN/b1NugjD+yKIYp2MQhwlXbMmj/1vnmJ3XSY25ZMLlgs0/vsNk7W2
 5e0xySwdhd1DjsajhZyN+5gUgqcTgOof/V+CbEUkijDDJ9v/WJbGZrpCHDz+UVTh
 dG9p1vrKoxDELAVbnp9muKZPlaQkAM60zJcHNJw9bJB5M0RCx4XFwPZc1cDLIsIZ
 lK/uYpKsgvgrGw5QuCtEK1/NkqLkBqgBfVg6xq0VB6OCYetqpxqs7kSZjnncIhQc
 PvxShsIJzb/dgfk7xBVb1+4Jfe5L/4poFwS69QuBlr/wiwc7wrhv37edgkyDlclS
 aj5xfOIhQdDaTkknFVs4QEkGAFg/lnTZnmiNiQdlsmDHqbWdTEELKShdVeMO7Zsg
 6bPdDipA2jsQ86UWNwucis8QulzVTuyNuU+Mlrxp73b76+hKXLkbYcZ51FJ/xMD8
 wLpCGqtc9Quirdb7Wy7XiVfesv3lKfDmzZB/6ZJ6zfadDvsqJPxAjNTA8VYZ9YeT
 EyW4K6CMOa5v+sLmIQUsAjKCYaul3PVDCi4voQjpS1ZtPLw+WN3zqX5XZZDT9Ll2
 D1ycmInp/40KsQgjV36u1NlIKMM+oaUJaSzaSPGdgj3Zcw0YZi8O+h0m6iHrlzUB
 uGFufsLKmcOFY/sLwprt
 =XEw1
 -----END PGP SIGNATURE-----

Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC DT updates from Olof Johansson:
 "DT changes continue to be the bulk of our merge window contents.

  We continue to have a large set of changes across the board as new
  platforms and drivers are added.

  Some of the new platforms are:
   - Alphascale ASM9260
   - Marvell Armada 388
   - CSR Atlas7
   - TI Davinci DM816x
   - Hisilicon HiP01
   - ST STiH418

  There have also been some sweeping changes, including relicensing of
  DTS contents from GPL to GPLv2+/X11 so that the same files can be
  reused in other non-GPL projects more easily.  There's also been
  changes to the DT Makefile to make it a little less conflict-ridden
  and churny down the road"

* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (330 commits)
  ARM: dts: Add PPMU node for exynos4412-trats2
  ARM: dts: Add PPMU node for exynos3250-monk and exynos3250-rinato
  ARM: dts: Add PPMU dt node for exynos4 and exynos4210
  ARM: dts: Add PPMU dt node for exynos3250
  ARM: dts: add mipi dsi device node for exynos4415
  ARM: dts: add fimd device node for exynos4415
  ARM: dts: Add syscon phandle to the video-phy node for Exynos4
  ARM: dts: Add sound nodes for exynos4412-trats2
  ARM: dts: Fix CLK_MOUT_CAMn parent clocks assignment for exynos4412-trats2
  ARM: dts: Fix CLK_UART_ISP_SCLK clock assignment in exynos4x12.dtsi
  ARM: dts: Add max77693 charger node for exynos4412-trats2
  ARM: dts: Switch max77686 regulators to GPIO control for exynos4412-trats2
  ARM: dts: Add suspend configuration for max77686 regulators for exynos4412-trats2
  ARM: dts: Add Maxim 77693 fuel gauge node for exynos4412-trats2
  ARM: dts: am57xx-beagle-x15: Fix USB2 mode
  ARM: dts: am57xx-beagle-x15: Add extcon nodes for USB
  ARM: dts: dra72-evm: Add extcon nodes for USB
  ARM: dts: dra7-evm: Add extcon nodes for USB
  ARM: dts: rockchip: move the hdmi ddc-i2c-bus property to the actual boards
  ARM: dts: rockchip: enable vops and hdmi output on rk3288-firefly and -evb
  ...
2015-02-17 09:36:52 -08:00
Heiko Stuebner
c25d8cbcd8 ARM: dts: rockchip: move the hdmi ddc-i2c-bus property to the actual boards
Currently the hdmi driver is using one of the soc i2c busses for ddc probing
and while documentation always specifies i2c5 as hdmi-i2c it could very well
be any other bus as well.

Therefore this is a property of the board and should be specified there.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-01-30 00:10:59 +01:00
Heiko Stuebner
39d05162a5 ARM: dts: rockchip: add rk3288 watchdog clock
Add the clock property for the watchdog on rk3288 socs.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
2015-01-28 11:02:07 +01:00
Daniel Lezcano
e48cc181bf ARM: dts: rockchip: Add rockchip timer node for rk3288
The rk3288 board uses the architected timers and these ones are shutdown when
the cpu is powered down. There is a need of a broadcast timer in this case to
ensure proper wakeup when the cpus are in sleep mode and a timer expires.

Add the timer node for the broadcast timer.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-01-25 21:40:25 +01:00
Andy Yan
d5a1df48d0 ARM: dts: rockchip: add rk3288 hdmi nodes
Add an hdmi node, and also add hdmi endpoints to vopb and vopl
output port nodes.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Tested-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-01-22 22:17:42 +01:00
Daniel Kurtz
a29cb8c45d ARM: dts: rockchip: Add rk3288 vop and display-subsystem
Add devicetree nodes for rk3288 VOP (Video Output Processors), and the
top level display-subsystem root node.

Later patches add endpoints (eDP, HDMI, LVDS, etc) that attach to the
VOPs' output ports.

Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Mark yao <mark.yao@rock-chips.com>
Reviewed-by: Stephane Marchesin <marcheu@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-01-22 22:17:37 +01:00
Roger Chen
3d3fb74afc ARM: dts: rockchip: add gmac info for rk3288
add gmac info in rk3288.dtsi for GMAC driver

changes since v2:
1. add drive-strength in the pinctrl settings

Signed-off-by: Roger Chen <roger.chen@rock-chips.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-12-31 19:14:18 -05:00
Chris Zhong
eecfe981ce ARM: dts: rockchip: add RK3288 suspend support
add pmu sram node for suspend, add global_pwroff pinctrl.
The pmu sram is used to store the resume code.
global_pwroff is held low level at work, it would be pull to high
when entering suspend. reference this in the board DTS file since
some boards need it.

Signed-off-by: Tony Xie <xxx@rock-chips.com>
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-12-31 16:18:49 +01:00
Addy Ke
f74ba117da ARM: dts: rockchip: set dw_mmc max-freq 150Mhz
All of mmc controllers include SDMMC, SDIO0, SDIO1, and EMMC on RK3288
are limited to 150Mhz. It was mainly caused by two reasons:
- RK3288's IO pad(except DDR IO pad) is generic, which can only support
  the max of 150Mhz.
- Mmc controller was designed at 150Mhz, and the pressure test by IC team
  was based on this freequency point.

Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-12-21 14:20:03 +01:00
Sonny Rao
e2405a59e5 ARM: dts: rk3288: add arm,cpu-registers-not-fw-configured
This will enable use of physical arch timers on rk3288, where each
core comes out of reset with a different virtual offset.  Using
physical timers will help with SMP booting on coreboot and older
u-boot and should also allow suspend-resume and cpu-hotplug to work on
all firmwares.

Firmware which does initialize the cpu registers properly at boot and
cpu-hotplug can remove this property from the device tree.

Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2014-12-05 10:27:16 -08:00
Olof Johansson
08bcc754c3 Revert "ARM: dts: rockchip: temporarily disable smp on rk3288"
We now have the physical-timers patches lined up as a dependency in this same
branch, so we can revert the temporary disablement.

This reverts commit b77d43943e.

Signed-off-by: Olof Johansson <olof@lixom.net>
2014-12-04 23:34:06 -08:00
Caesar Wang
b67d6bc388 ARM: dts: rockchip: add main thermal info to rk3288
If for some reason we are unable to shut it down in orderly fashion
(kernel is stuck holding a lock or similar), then hardware TSHUT will
reset it.

If the temperature is over 95C over a period of time the thermal shutdown
of the tsadc is invoked with can either reset the entire chip via the CRU,
or notify the PMIC via a GPIO. This should be set in the specific board.

Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com>
Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-11-25 00:31:26 +01:00
Heiko Stuebner
b77d43943e ARM: dts: rockchip: temporarily disable smp on rk3288
Stock firmware on rk3288 does not initizalize the CNTVOFF registers
of the architected timer correctly. This introduces issues with the
newly added SMP support for rk3288, resulting in rcu stalls due to
differing timer values per core.

There exist preliminary and tested patches for u-boot for this problem,
but there are a minority of boards using other bootloaders like coreboot.

There also is currently a second solution for miss-initialized architected
timers in the works:
- clocksource: arch_timer: Fix code to use physical timers when requested
- clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers

Therefore disable smp on rk3288 again till these are finalized, also
allowing coreboot-based boards to boot again.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-11-22 16:23:28 +01:00
Daniel Kurtz
7cae068bb1 ARM: dts: rk3288: add VOP iommu nodes
Add device nodes for the VOP iommus.
Device nodes for other iommus will be added in later patches.

The iommu nodes use the #iommu-cells property as described in:
  Documentation/devicetree/bindings/iommu/iommu.txt

Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Simon Xue <xxm@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-11-05 21:29:23 +01:00
Kever Yang
044542af53 ARM: dts: rockchip: add reset for CPU nodes
This patch add reset for CPU nodes to use the reset controller.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-11-02 14:47:04 +01:00
Kever Yang
1123d412bb ARM: dts: rockchip: add intmem node for rk3288 smp support
This patch add intmem node des which is needed by platsmp.c

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-11-02 14:45:50 +01:00