Commit Graph

27071 Commits

Author SHA1 Message Date
Muhammad Falak R Wani
a280a42aa3 drm/amd/amdgpu : Remove unused variable
Remove unused variable 'ret', and directly return 0.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Muhammad Falak R Wani <falakreyaz@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-18 09:22:17 -04:00
Muhammad Falak R Wani
0e2b854ed4 drm/amd/amdgpu : Remove unused variable
Remove unused variable 'ret', and directly return 0.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Muhammad Falak R Wani <falakreyaz@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-18 09:22:12 -04:00
Muhammad Falak R Wani
d05f2c7aeb drm/amd/amdgpu/cz_dpm: Remove unused variable
Remove unused variable 'ret' from functions where it
was not used anyway, and directly return 0.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Muhammad Falak R Wani <falakreyaz@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-18 09:22:07 -04:00
Muhammad Falak R Wani
734711b71d drm/amd/amdgpu : Remove unused variable
Remove unused variable 'ret', and directly return 0.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Muhammad Falak R Wani <falakreyaz@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-18 09:21:52 -04:00
Muhammad Falak R Wani
a7aabcc8a5 drm/amd/powerplay: use ARRAY_SIZE() to calculate array size.
It is preferred to use ARRAY_SIZE() for size calculation, instead
using sizeof(array)/sizeof(*array). It makes the code more readable.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Muhammad Falak R Wani <falakreyaz@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-16 12:17:25 -04:00
tom will
484f689fc9 drm/amdgpu: fix array out of bounds
When the initial value of i is greater than zero,
it may cause endless loop, resulting in array out
of bounds, fix it.

This is a port of the radeon fix to amdgpu.

Signed-off-by: tom will <os@iscas.ac.cn>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-16 10:31:07 -04:00
tom will
a8efd58815 drm/radeon: fix array out of bounds
When the initial value of i is greater than zero,
it may cause endless loop, resulting in array out
of bounds, fix it.

Signed-off-by: tom will <os@iscas.ac.cn>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-16 10:25:13 -04:00
Eric Huang
e2ed8a132a drm/amd/powerplay: fix a bug on updating sclk for Tonga
Update sclk smc table rather than mclk smc table for sclk updates.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-13 15:32:36 -04:00
Eric Huang
bd6080d662 drm/amd/powerplay: fix a bug on updating sclk for Fiji
Update sclk smc table rather than mclk smc table for sclk updates.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-13 15:32:29 -04:00
Rex Zhu
d573de2d00 drm/amdgpu: create fence slab once when amdgpu module init.
This avoids problems with multiple GPUs.  For example,
if the first GPU failed before amdgpu_fence_init() was
called, amdgpu_fence_slab_ref is still 0 and it will
get decremented in amdgpu_fence_driver_fini().  This
will lead to a crash during init of the second GPU since
amdgpu_fence_slab_ref is not 0.

v2: add functions for init/exit instead of
    moving the variables into the driver.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-13 14:30:22 -04:00
Rex Zhu
8b41e7a03a drm/amd/powerplay: move asic unrelated function to hwmgr.c.
It's generic and used by multiple asics.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-13 14:26:42 -04:00
Rex Zhu
2dcbffad94 drm/amd/powerplay: fix NULL point check error
&& was used instead of ||

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-13 14:26:11 -04:00
Rex Zhu
9ab9cf058a drm/amd/powerplay: SCLK will have a big drop with low VDDC when PPlib was enabled.
SMC uses CurrSclkPllRange structure to keep track of what range of
PLL SCLK is sitting on.  Driver overwrites this value to 0 because
it's part of DPM table and driver doesn't program this.
This change will set this field to 0xFF every time there's a
init SMC table call.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-13 14:24:51 -04:00
Harish Kasiviswanathan
f4833c4fd4 drm/amdgpu: Encapsulate some VM table update parameters (v2)
Bundle some VM table parameters into amdgpu_vm_update_params structure,
so that number of function parameters can be reduced. Only structural
change, no logic change.

v2: agd: squash in fix from Harish

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:53:54 -04:00
Marek Olšák
f84e63f2ff drm/amdgpu: fix TC cache flushing
TC_WB_ACTION must be set according to the docs

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:51:15 -04:00
Huang Rui
b4eeed590d drm/amd/powerplay: rewrite pp_sw_init to make code readable
Actually, pp_sw_init executes pptable_init and backend_init orderly if
they are initialized successfully. So rewrite it to make code more
readable.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:30:33 -04:00
Alex Deucher
67b1fcc9ac drm/amdgpu/dce11: fix audio offset for asics with >7 audio pins
Missing offset in the audio offset array.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:30:33 -04:00
Christian König
758ac17f96 drm/amdgpu: fix and cleanup user fence handling v2
We leaked the BO in the error pass, additional to that we only have
one user fence for all IBs in a job.

v2: remove white space changes

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:30:32 -04:00
Christian König
d88bf583bd drm/amdgpu: move VM fields into job
They are the same for all IBs.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:30:31 -04:00
Christian König
92f250989b drm/amdgpu: move the context from the IBs into the job
We only have one context for all IBs.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:30:31 -04:00
Christian König
f153d2867b drm/amdgpu: move context switch handling into common code v2
It was a source of bugs to repeat that in each IP version.

v2: rename parameter

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:30:30 -04:00
Christian König
9f8fb5a2b3 drm/amdgpu: move preamble IB handling into common code
This fixes the handling which was completely broken when you
ad more than one preamble IB.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:30:30 -04:00
Chunming Zhou
914f9e18c8 drm/amdgpu/gfx7: fix pipeline sync
Need to wait on the fence as well.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:30:29 -04:00
Sonny Jiang
8e008dd70e amdgpu/uvd: separate context buffer from DPB
Updated to handle latest UVD ucode.

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:30:12 -04:00
Christian König
aa3b73f67b drm/amdgpu: use fence_context to judge ctx switch v2
Use of the ctx pointer is not safe, because they are likely already
be assigned to another ctx when doing comparing.

v2: recreate from scratch, avoid all unnecessary changes.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:27 -04:00
Tom St Denis
822b2cef4d drm/amd/amdgpu: Added more named DRM info messages for debugging
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:26 -04:00
Tom St Denis
88a907d67c drm/amd/amdgpu: Add name field to amd_ip_funcs (v2)
Add name that we can print out in kernel messages
to aid in debugging.

v2: drop DAL changes for upstream

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:26 -04:00
Alex Deucher
cb9e59d7e9 drm/amdgpu: Support DRM_MODE_PAGE_FLIP_ASYNC (v2)
When this flag is set, we program the hardware to execute the flip
during horizontal blank (i.e. for the next scanline) instead of during
vertical blank (i.e. for the next frame).

Ported from radeon commit:
drm/radeon: Support DRM_MODE_PAGE_FLIP_ASYNC

v2: drop DAL change for upstream

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:25 -04:00
Alex Deucher
a71dd89759 drm/amdgpu/dce11: don't share PLLs on Polaris
They are part of the phy so you can't share them.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:25 -04:00
Nils Wallménius
438498a862 drm/amdgpu: Drop unused parameter for *get_sleep_divider_id_from_clock
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:24 -04:00
Nils Wallménius
354ef928a0 drm/amdgpu: Simplify calculation in *get_sleep_divider_id_from_clock
a / (1 << b) is equivalent to a >> b for unsigned values

Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:23 -04:00
Nils Wallménius
9887e425f9 drm/amdgpu: Use max macro in *get_sleep_divider_id_from_clock
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:23 -04:00
Nils Wallménius
859b8b6a27 drm/amd/powerplay: Use defined constants for minium engine clock
Replacing magic numbers in calculation of sleep divider id for fiji
and polaris.

Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:22 -04:00
Alex Deucher
f9fbac64eb drm/amdgpu: add missing licenses on a couple of files
Noticed by n1s on IRC.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:22 -04:00
Alex Deucher
7dae69a290 drm/amdgpu: fetch cu_info once at init
Fetch this info once at init and just store the results
for future requests.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:21 -04:00
Christian König
edf600dac6 drm/amd: cleanup remaining spaces and tabs v2
This is the result of running the following commands:
find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/[ \t]\+$//' {} \;
find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/[ \t]\+$//' {} \;
find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/ \+\t/\t/' {} \;
find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/ \+\t/\t/' {} \;

v2: drop changes to DAL and internal headers

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:20 -04:00
Christian König
b1c8a81fdd drm/amdgpu: remove define for reserved client ID
Just set it to zero instead.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:20 -04:00
Christian König
79aa03893d drm/amdgpu: remove owner cleanup v2
The client ID is now unique, so no need to resert the owner fields any more.

v2: remove unused variables as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:19 -04:00
Christian König
0ea54b9b6c drm/amdgpu: make the VMID owner always 64bit
Otherwise we could (in theory) run into problems on 32bit systems.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:18 -04:00
Christian König
4d9c514d8c drm/amdgpu: two minor 80 char fixes
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:18 -04:00
Monk Liu
794ff5710e drm/amdgpu: hdp flush&inval should always do
This fixes Tonga vm-fault issue when running disaster
(a multiple context GL heavy tests),
We should always flush & invalidate hdp no matter vm
used or not.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-05-11 12:31:17 -04:00
Tom St Denis
f0f3a8fbdb drm/amd/amdgpu: Enable CG for UVD6 on Carrizo
Tested via vdpau/mpv.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:17 -04:00
Chunming Zhou
fe70766487 drm/amdgpu: add pipeline sync for compute job
hardware ring is async processed, the job is executed in parallel.
In some case, this will result vm fault, like jobs with different vmids.

This works around a CPC hw issue which will eventually be fixed in fw.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:16 -04:00
Monk Liu
c5637837ba drm/amdgpu: keep vm in job instead of ib (v2)
ib.vm is a legacy way to get vm, after scheduler
implemented vm should be get from job, and all ibs
from one job share the same vm, no need to keep ib.vm
just move vm field to job.

this patch as well add job as paramter to ib_schedule
so it can get vm from job->vm.

v2: agd: sqaush in:
drm/amdgpu: check if ring emit_vm_flush exists in vm flush

No vm flush on engines that don't support VM.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=95195

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:16 -04:00
Chunming Zhou
1f207f81e3 drm/amdgpu: make vmid owner be client_id
Using the pointer is not adequate.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:15 -04:00
Chunming Zhou
031e2983e8 drm/amdgpu: add client id for every vm
This adds a unique id for each vm client so we can
properly track them.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:14 -04:00
Chunming Zhou
444066b915 drm/amdgpu: fix wrong release of vmid owner
The release of the vmid owner was not handled
correctly.  We need to take the lock and walk
the lru list.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:14 -04:00
Dave Airlie
2e726dc4b4 MT8173 DRM support
- device tree binding documentation for all MT8173 display
   subsystem components
 - basic mediatek-drm driver for MT8173 with two optional,
   currently fixed output paths:
 - DSI encoder support for DSI and (via bridge) eDP panels
 - DPI encoder support for output to HDMI bridge
 - necessary clock tree changes for the DPI->HDMI path
 - export mtk-smi functions used by mediatek-drm
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJXMDw/AAoJEFDCiBxwnmDrw7oP/iIJNcj24JokDlRIFmVQIA+A
 /mLpvZcTgfCx3mZLSFG4N5VfB8CTg0/o2tj3e0C+GcVFWBbLpPemXR8gFxxdjeL2
 TfmO73TVZjdcf3u6kSqBRLxEn1nbzYeZwcWKzsxgjts5Vo0vHnC3R2l2VCGPl8ay
 9drqbFhOxGlGpkIia35z0mLb5dIJLQF6qkC5gFkTwY6ZKIV623/W8MQRbAU0wwwf
 NSAPwjEszFtFHDM2YIbROpEbFtmCpz6yZdblDARUbnK6mw6PW1g+FOrV+BiJWtzE
 A6c9FEKfSD3tExjH1DbsXx6jEIPjZ/wM979IrPU5kxOm6CuRAHa8KaRT6HraM8K4
 CPYolbkg1rPOERIG5EOV0Cu7Fcpx6hB9eyp8m4cINw907+govMc1kDdsYv+U19tz
 ALkZ9qs3py4tv0Zo12LoXfLUfqGLzMPwP/BTgGpeL8sJiq4KYpXlp5IIDCYbis9d
 UBuozAzrF8pDsE9XHZ98LEE+mlsVVbItavY3+2JqlRcfZS5THTUoBDCVLGPtSR9g
 IS9giTOQeEX/8vXCrz6rAQNHwCWo+7gwBPCMH0Drak+1WsetYbC+Xe8q3bCYQqXg
 4/z2AgE5O4vqVxWSuGGn8FsLmdu9wiNNND+k22Igq1hkBNGFjMthvDeIcIDNUYsX
 jWJtVZuK1jn6cbFhOmUe
 =vcoi
 -----END PGP SIGNATURE-----

Merge tag 'mediatek-drm-2016-05-09' of git://git.pengutronix.de/git/pza/linux into drm-next

MT8173 DRM support

- device tree binding documentation for all MT8173 display
  subsystem components
- basic mediatek-drm driver for MT8173 with two optional,
  currently fixed output paths:
- DSI encoder support for DSI and (via bridge) eDP panels
- DPI encoder support for output to HDMI bridge
- necessary clock tree changes for the DPI->HDMI path
- export mtk-smi functions used by mediatek-drm

* tag 'mediatek-drm-2016-05-09' of git://git.pengutronix.de/git/pza/linux:
  clk: mediatek: remove hdmitx_dig_cts from TOP clocks
  clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output
  clk: mediatek: make dpi0_sel propagate rate changes
  drm/mediatek: Add DPI sub driver
  drm/mediatek: Add DSI sub driver
  drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.
  dt-bindings: drm/mediatek: Add Mediatek display subsystem dts binding
  memory: mtk-smi: export mtk_smi_larb_get/put
2016-05-10 15:01:47 +10:00
Dave Airlie
bafb86f5bc Linux 4.6-rc7
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJXL7HfAAoJEHm+PkMAQRiGYe8IAJBGaPUq38EJh2YOV+AQf9v6
 t/alhwB3DUE1E0zjLy7I7JJ+xDXtKjZh9fS6OFuIS8Q3RIrBteIJ/oH8TPpt7yZ/
 SnP6rYPvYD6CImTyrh7+ORL/udEwJX8+YqFYAgUAq167gvpDjYj8r26VzdIaIN4/
 oBbL8NrQNWfODieywYyhUoitVhwMz09zmBfLtGVks4vd2jUJk2Fdd9cOtGV5tRfk
 DPndPgyQtbr8W0mKovV8sT9WkQeV5TsUr4MLgf7hjnAGYQ8+0KamkzzVVLBeBiiw
 uazyrOCFkddZp+N7KbmbOmazV/yULRuLGgDjVKazoCsOaKOvoGCzrCk7daOPy6Q=
 =CegX
 -----END PGP SIGNATURE-----

Merge tag 'v4.6-rc7' into drm-next

Merge this back as we've built up a fair few conflicts, and I have
some newer trees to pull in.
2016-05-09 13:49:56 +10:00
Dave Airlie
ba391646d0 drm/amdgpu: fix build on aarch64.
Same fix went in previously for some other files.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-05-09 10:30:42 +10:00