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drm/amd/powerplay: fix a bug on updating sclk for Tonga

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Update sclk smc table rather than mclk smc table for sclk updates.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Eric Huang 2016-05-12 14:41:04 -04:00 committed by Alex Deucher
parent bd6080d662
commit e2ed8a132a
1 changed files with 1 additions and 1 deletions
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drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
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@ -5445,7 +5445,7 @@ static int tonga_populate_and_upload_sclk_mclk_dpm_levels(struct pp_hwmgr *hwmgr
}
if (data->need_update_smu7_dpm_table & (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK)) {
result = tonga_populate_all_memory_levels(hwmgr);
result = tonga_populate_all_graphic_levels(hwmgr);
PP_ASSERT_WITH_CODE((0 == result),
"Failed to populate SCLK during PopulateNewDPMClocksStates Function!",
return result);