- A correction on mmdc_pmu_write_accesses event definition.
- Add new axi_id perf command to support MMDC filter memory usage
profiling.
- Set correct SPI chip_select in platform device registration, so that
spi-imx driver code can be improved to use chip_select directly for
harwdare setup instead of indirectly via the cs_gpio mapping array.
- Disable APIS bus supervisor protect for i.MX25, since the default
configuration doesn't work for a few peripherals accessed through
SDMA.
- Add compatible check for the secondary generation of I2SE i.MX28
Duckbill board support.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJY64oDAAoJEFBXWFqHsHzO0OcH+wadr5A/YJBUnFqJeQKxaOPU
rZBb0alc4+YLY5OAJ7kj/KFaO9YYDn+Y6N3bwcuHyQ93UZ5xmXWyFAmRJuknDBsj
uH/9a/HwmWNt1XjD8dMw8jVH6/uU4EK02SDwve+GDjl46tS45JISYWLlCfzW1ORt
WCD656/+mnvvWNMFk0l8A6u557PjCuy/z/Eq+CLXzPom72WpTmJMKSicooeWCjCN
2JqvNE1B5ny8QRspgo+1QukoTE3LqbTtPjXdhW3+Xr4R93e46/eKEQ4bCCygcp3O
0DcleV8TqwUXnKGnt/LDoD+fHUjmFFbEWKSYwmo/nlLH7ftRfDUyeZgeFaDzVsQ=
=Ha8G
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
i.MX SoC changes for 4.12:
- A correction on mmdc_pmu_write_accesses event definition.
- Add new axi_id perf command to support MMDC filter memory usage
profiling.
- Set correct SPI chip_select in platform device registration, so that
spi-imx driver code can be improved to use chip_select directly for
harwdare setup instead of indirectly via the cs_gpio mapping array.
- Disable APIS bus supervisor protect for i.MX25, since the default
configuration doesn't work for a few peripherals accessed through
SDMA.
- Add compatible check for the secondary generation of I2SE i.MX28
Duckbill board support.
* tag 'imx-soc-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: mxs: add support for I2SE Duckbill 2 boards
ARM: i.MX25: globally disable supervisor protect
ARM: imx: set correct chip_select in platform setup
ARM: imx: Add AXI address filter support for MMDC profiling
ARM: imx: Fix mmdc_pmu_write_accesses event definition
Signed-off-by: Olof Johansson <olof@lixom.net>
A bunch of clean up for Alpine device trees, nothing fancy.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCgAGBQJY8R9iAAoJEFxNi8it27zYMTMP/1SE9M1Gy5nngeTxVTJeTvbf
vTElGQ6FzV9HBkL88b3+fVcUWh0YTlffzUWE7cfPPOaaXkImYRF+7QrL8zht9nS8
SIIjS1j/wVBm0Zl4/vuYiMZJR0CJOLypFV8ELb24Xj96Mt7idUHGZNL4T8ygCd8W
HoKNDhpstg7rHPJFjjDM6OanQbhTJIpxfkKbBNfe+wg1e9O3Jj082ldOFU9jkS6D
wTu8XFYo+YnbIrK+K4HuK2V0sawOPK9ga0/+6K9TChN20pO/dsphlMpkL1VPc7Vf
lK3Mt3eeR9GOCQvIh4gzcPjcJGtlWbjlvCsLsb7oXP9s1CxxcbGfRgYevIj7S2Lw
M/gG0oi2BcdRjx9oc+H0OZYGAcWHMUyCJH6JHYzDi9NKl6hfvbJc/eS6f1c6S4ie
boDmBuaVp6N2k7jKtW3D49CEWX4XYgx2weuA/b/fjKyFzcPXCJ+Z/N+506KH9ByR
D4um8m6IGeeubALSVh9URkKT/YQDpa8+szGMNDJwN5eyr50rTp1ETSmL4O+stFIX
5qLMdDXMLtmiOQ5qbrKsz4ip3SJMTLvnknbfiCN7EHxs7Tmorth7q1PUoCgsAWHn
zFaDlhuHvWmCGshRqFYf+iVpPXD+UZHiHztggXFZ3YafQjfG8iwJw7OlvTcMpWGB
u5IlWBm1qM+ynQAhy6mK
=aD3G
-----END PGP SIGNATURE-----
Merge tag 'alpine-dt-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/atenart/linux into next/dt
Alpine DT changes for 4.12
A bunch of clean up for Alpine device trees, nothing fancy.
* tag 'alpine-dt-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/atenart/linux:
ARM: dts: alpine: add valid clock-frequency values
ARM: dts: alpine: add spaces before the uart node units.
ARM: dts: alpine: remove 0x's from the uart1 node unit address
ARM: dts: alpine: fix PCIe node name
Signed-off-by: Olof Johansson <olof@lixom.net>
Use label for USB and SATA nodes on Armada 38x
-----BEGIN PGP SIGNATURE-----
iIEEABECAEEWIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWO+kqSMcZ3JlZ29yeS5j
bGVtZW50QGZyZWUtZWxlY3Ryb25zLmNvbQAKCRALBhiOFHI71V2vAJ47Vu37Pig3
Quq7c68ByWMNhRv0IgCgpJOKmYRrcibw/AbrHIh6ZZUoN7g=
=AtGR
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-4.12-3' of git://git.infradead.org/linux-mvebu into next/dt
mvebu dt for 4.12 (part 3)
Use label for USB and SATA nodes on Armada 38x
* tag 'mvebu-dt-4.12-3' of git://git.infradead.org/linux-mvebu:
ARM: dts: armada-38x: label USB and SATA nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
Updates to the device tree to include upstreamed drivers:
- SPI flash controller
- Watchdog
- ADC
In addition we describe some of the clocks so that upstream kernels can
boot on hardware.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJY7ZDwAAoJEGt2WQeBR3CeYSkP/2l1HHYbBkIr7778RkHVbnMj
LWVAqg9z/PpwMdv5PLER56FtkczxxVsR0zpKIgeX9aRY5VGZdtxSw4lDWvIj6XWu
VQNxQtwT+BzybPKgrACaz5GIct8JxnE/7cdvpVTaFJB+wgNXcIUNwkoXMse+GE94
vWuMNKwJhv5aLpoSfgMpcVIx83ZfAzEj1J1ZQ0IvRAnctypZRhvZKSwlIifJmDId
UVAzQN9Vd53jJpwZaWtZcfBRRY/oY+KlxLFqrPO3MfxM6DMv7/88/zRbS47DkDsZ
l+wfb5f+OvpUos6UbQWItrJv02a6tkgDZNHzLQ38QRCXn5k/FBDCsYj/v09dInqD
NIo+0crqgZBf26vZps729H3HxlIBJgrDtkFiAaSUSbHgChm9eXMiZFJoqdLt/6hs
kJsnqLTDHnqYX/cZKq6w9xlKBHoH9lI4lbhV1O8Mr2AFtLNbBkIOQMboQfvpjpgW
Dm1KdHZm4tAS/mOBvPwu3lTT/WPPwby7Gno5dkNMtG4HTyf773Q//bC6PsVmO9hd
VQjwrdvBVZYGqXJfMw03zhj6eAS23PkyuU99BsK2JETj3f2fxrqCFdc43aH04uMW
371yLBI9l7Et2WC+JMsPm5UW5P6yKwlPdYLRr5xJPM3YjoV2zklf0ACi4rEL7Kxp
XFQaJ0nRKyCGx0y6O5Zr
=bGNK
-----END PGP SIGNATURE-----
Merge tag 'aspeed-4.12-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into next/dt
Aspeed devicetree updates for 4.12
Updates to the device tree to include upstreamed drivers:
- SPI flash controller
- Watchdog
- ADC
In addition we describe some of the clocks so that upstream kernels can
boot on hardware.
* tag 'aspeed-4.12-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
arm: dts: aspeed: Describe ADCs for AST2400/AST2500
ARM: dts: aspeed: romulus: Add UART1
ARM: dts: aspeed: Update watchdog compatible strings
ARM: dts: aspeed: Add a fastread property
ARM: dts: aspeed: Add SPI controller bindings to Romulus
ARM: dts: aspeed: Make G4 clocks fixed
ARM: dts: aspeed: Make G5 clocks fixed
ARM: dts: aspeed: add SPI controller bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
to configure various devices:
- Enable DCAN on am57xx-idk
- Enable CPSW ethernet0 and 1 on am335x-icev2
- Non-critical fix for droid 4 PMIC interrupt triggering
- Stop disabling SRAM and GPMC on droid 4
- Configure CPCAP PMIC related devices on droid 4 for ADC, charger
and USB PHY. The charger and USB PHY drivers are still being
discussed, but the binding for them has been acked by Rob and
Sebastian so they should be safe to merge together with the ADC
driver in Linux next that they depend on
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAljruX4RHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXM16g/8DeQMUItFTVrUBfvlHYAakL3hCJKGJQoU
8vL+4N6oGhPzFje65ifX90GuPidKJDffkExbzBZn5K1JapuuafQDZ75QyxkM2tx2
fESMgKNpXe78K+0GQ3sLESB6DQMQCai6H3XUKjXKi/dcG3NG6J9BQJJXdM2jFLsT
OxIDVtHmwAJwx/BclmjCPsAKZVW/3HiqMXoiovXb0aQQXNjBqlmhBQUL+YO8Kxwq
VOlGhsxzHPubAEv98VQeTUpZR4G+1JljmDP4UW4H2HHdWMzNvZIyd7Tk/6Tr+ek1
GPr89zm9QqpvzVXvLqwRG27EF9EpYbMbcrUn+02YV6Z0Wrbh6m6Hm0fg3nqGrkdC
l4DG0SExzGzi/Vxgfw71JyXcyEabF4gOMMLGcVFcAA/83PaRFB5kFENOW0gMLQ5e
9G6zesj/0ET7m/qMAVcExA+gREXOjCswc3twrYx9vYeS03Ma4Jzg7pzmS+Af+Wcn
leNviCjVb4aArBAxvEEId0ajVicftc0by61HviRacm1TUL4Gh0mvyJtN3sjRD+8w
dFSFVzGpBs9WQWuf82OVss1c4vLN/0I6sTa3RQT2PNUBAA+4GFFWJxrlDTXH8+tp
oN2Ubc9JKt8hPJUY3AeXgC35kqloTUIPJARhIbmjeWKTJ1h/FXHBVEEyp3ut/vuE
7/oCbfeW7k0=
=Jna8
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.12/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Second set of devicetree changes for omaps for v4.12 merge window
to configure various devices:
- Enable DCAN on am57xx-idk
- Enable CPSW ethernet0 and 1 on am335x-icev2
- Non-critical fix for droid 4 PMIC interrupt triggering
- Stop disabling SRAM and GPMC on droid 4
- Configure CPCAP PMIC related devices on droid 4 for ADC, charger
and USB PHY. The charger and USB PHY drivers are still being
discussed, but the binding for them has been acked by Rob and
Sebastian so they should be safe to merge together with the ADC
driver in Linux next that they depend on
* tag 'omap-for-v4.12/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap4-droid4: Add CPCAP PMIC OTG PHY configuration
ARM: dts: omap4-droid4: Add CPCAP PMIC battery charger configuration
ARM: dts: omap4-droid4: Add CPCAP PMIC ADC configuration
ARM: dts: omap4-droid4: Stop disabling SRAM and GPMC
ARM: dts: omap4-droid4: Fix interrupt triggering for cpcap
ARM: dts: am335x-icev2: Add CPSW ethernet0 and ethernet1
ARM: dts: am57xx-idk: Add DCAN support
Signed-off-by: Olof Johansson <olof@lixom.net>
- New board support: I2SE's i.MX28 Duckbill-2 boards, Gateworks Ventana
i.MX6 GW5903/GW5904, Zodiac Inflight Innovations RDU2 board, Engicam
i.CoreM6 Quad/Dual OpenFrame modules, Boundary Device i.MX6 Quad Plus
SOM.
- Improve compatible string for i.MX50 eSDHC, i.MX7S SRC devices and
i.MX6SX UART device.
- Add interrupts for switch and PHY devices on VF610 ZII Devel C board.
- Add LVDS, LCD backlight, touchscreen and SAI2 support for i.MX6
icore, geam, and isiot boards.
- A series from Lucas Stach to improve i.MX6Q Plus device tree and add
PRE/PRG devices.
- A series from Stefan Agner to update imx7-colibri device tree
regarding to display, PMIC/regulator support.
- Fix PCI bus DTC warnings seen with the latest compiler.
- Set default phy_type and dr_mode for i.MX25 USBOTG port.
- A couple of small improvements on i.MX25 pin function DT header.
- Add audio support for imx6q-cm-fx6 board using Wolfson wm8731 codec
which is muxed to SSI2 device.
- Other random updates, small fixes and trivial cleanups.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJY65XcAAoJEFBXWFqHsHzO0goH/jVVtrnkbfzjEZ+jSU30XY+L
8kR/R+5+PgT3LXZ/U3ZHWqbLOrYtnsmqUjA4loaRwTfyMEPnkRx86XUE86U/xfVy
FuWhFuQ/lLDyfon/CvrEXQ73+CTq8Q5PBqKefg9twi5fNkN2wRqVCD5i4cVgxMpi
KF6DchLv0eW2Zn6fYySf4zNcOIvbkma/qn/Ju2kZEP6TKadIgYvX5Tcw47d2fKsv
E5vypBXdWlNV4SzZyAm4CS9X3pjIQa8zIXHyJAeiqBY/2H7u6z/UvOqnRt0RFnX5
eaVtHF2DwuC9DyjyNVBK1Fhi/7++nnmbLRvBK9G4LBZNmIbcWJEVMHsQcsDQ2h8=
=hpdP
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
i.MX device tree updates for 4.12:
- New board support: I2SE's i.MX28 Duckbill-2 boards, Gateworks Ventana
i.MX6 GW5903/GW5904, Zodiac Inflight Innovations RDU2 board, Engicam
i.CoreM6 Quad/Dual OpenFrame modules, Boundary Device i.MX6 Quad Plus
SOM.
- Improve compatible string for i.MX50 eSDHC, i.MX7S SRC devices and
i.MX6SX UART device.
- Add interrupts for switch and PHY devices on VF610 ZII Devel C board.
- Add LVDS, LCD backlight, touchscreen and SAI2 support for i.MX6
icore, geam, and isiot boards.
- A series from Lucas Stach to improve i.MX6Q Plus device tree and add
PRE/PRG devices.
- A series from Stefan Agner to update imx7-colibri device tree
regarding to display, PMIC/regulator support.
- Fix PCI bus DTC warnings seen with the latest compiler.
- Set default phy_type and dr_mode for i.MX25 USBOTG port.
- A couple of small improvements on i.MX25 pin function DT header.
- Add audio support for imx6q-cm-fx6 board using Wolfson wm8731 codec
which is muxed to SSI2 device.
- Other random updates, small fixes and trivial cleanups.
* tag 'imx-dt-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (56 commits)
ARM: dts: imx6q-utilite-pro: add hpd gpio
ARM: dts: imx6qp-sabresd: Set reg_arm regulator supply
ARM: dts: imx6qdl-sabresd: Set LDO regulator supply
ARM: dts: imx: add Gateworks Ventana GW5903 support
ARM: dts: i.MX25: add AIPS control registers
ARM: dts: imx7-colibri: add Carrier Board 3.3V/5V regulators
ARM: dts: imx7-colibri: remove 1.8V fixed regulator
ARM: dts: imx7-colibri: allow to disable Ethernet rail
ARM: dts: imx7-colibri: fix PMIC voltages
ARM: dts: imx7-colibri: use OF graph to describe the display
ARM: dts: imx6qp-nitrogen6_som2: add Quad Plus variant of the SOM
ARM: dts: imx6q-icore: Add touchscreen node
ARM: dts: vf610-zii-dev-rev-b: change switch2 label
ARM: dts: imx6ul-[geam|isiot]: Add sai2 node
ARM: dts: imx6ul-isiot-common: Add touchscreen node
ARM: dts: imx6ul-isiot: Add i2c nodes
ARM: dts: imx6ul-isiot: Add imx6ul-isiot-common.dtsi
ARM: dts: imx6ul-isiot: Add backlight support for lcdif
ARM: dts: imx6ul-geam: Add backlight support for lcdif
ARM: dts: imx6: add ZII RDU2 boards
...
Signed-off-by: Olof Johansson <olof@lixom.net>
board, the phyCORE som and its PCM-947 carrier board from Phytec.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAljpQsEQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgSw5CACTf+7cvykZ3aKvtfo76yacC84mSMdLFOQl
IPkQBX6cV2CEes8xoKjsHXwvYgpgX6Jz58S86ATfi+h3uMu4l7dld+yMaipTcZp/
ROCtf16r+sjq3kndDGoqSFyq5+YZ2En+mz+86YDdEYS3vZvASp+gSVRkn7NUPlrU
+O2Wb8mdY+Hl8XYSZcsmQ7zNjxw/G9pyqVly0/3aSuHRVAbtn4KyunbfkhHdK4LJ
NOFji0t+FIXEr8FNBpiRFnIQ19KILzWmrIr5c92Tz+t11R8+wSIwITYpsAomwVqO
QWtI1alwusJHY2MwdLXlFtBAW3BwsTt72gasl6AigpvYIP0AxKna
=R6eU
-----END PGP SIGNATURE-----
Merge tag 'v4.12-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Support for the usb-sata controller on the rock2 and another new rk3288
board, the phyCORE som and its PCM-947 carrier board from Phytec.
* tag 'v4.12-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Add support for PCM-947 carrier board
dt-bindings: Document Phytec phyCORE-RK3288 RDK
ARM: dts: rockchip: Add support for phyCORE-RK3288 SoM
ARM: dts: rockchip: Enable sata support on rock2 square
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Enhancements to PCIe nodes on Exynos5440.
2. Fix thermal values on some of Exynos5420 boards like Odroid XU3.
3. Add proper clock frequency properties to DSI nodes.
4. Fix watchdog reset on Exynos4412.
5. Fix watchdog infinite interrupt in soft mode on Exynos4210,
Exynos5440, S3C64xx and S5Pv210.
6. Enable watchdog on Exynos4 and S3C SoCs.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJY6Ow8AAoJEME3ZuaGi4PXC3oP/ixi10/3kHhv7T99hg+QCRtt
DQ58Kbt5d0mIzpX3Dp+iMi4B9sTNOxEUR3S8Qh9olftvdV3QIhgfDZKNDKXmnMkm
1saqHAqhF+dONtiXEyts0Xy8Ex4IfGPnaV8sZMW471Vmkz6zPWxhL44vE5JHVuPb
Ef4/8+AOM1VO2xP5gQojZrN9JnFF7YaAKJB5M8pMIXJ5uZ2AR/f86+o58z7BsHY0
1mwo1Hdv9IO3ebizlhr2Y9NT8ut2Ox0/f9yMe/VG8QPMsNcvwtHqLeCx6FoKEQxG
MuxPFxp6QVW/QxfJiOtXxae8X3c//o++DKEuSeETz/3T23rGTNfDnI/iJJ7FvMzZ
5pqtyL7pPbtKAnF1dh85+4FV6qM7+FC4PvhkbC41i6FZhqlGOkqtm5Oc+4Mra/vg
ogLTKDqRxH86egzjmOtXDRnN3zKG3id0b/KUwEl5NLMO+ydsDoWVJffsjPZ8qtGL
Ah/QE/zPXVmebdhvd3NC/Ph1eGWxaFe/P3EsUfZ85GYhrYCFFMgW6QdIzpJI8qS1
1Ahp/8JOY/j05I1gKADqxKh1cX+VRuvAFwLJVgqD05dVVL5egnDbYQjFuWlu+Ygx
vdm9wOKlRjWF4uP3RsR7RVERThxCVZ1KViIwwMsX5/bF2PM+rYOVtJVgwHDILdbr
PpcWjKEdULekliIc+LkY
=QHlh
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Samsung DeviceTree ARM update for v4.12:
1. Enhancements to PCIe nodes on Exynos5440.
2. Fix thermal values on some of Exynos5420 boards like Odroid XU3.
3. Add proper clock frequency properties to DSI nodes.
4. Fix watchdog reset on Exynos4412.
5. Fix watchdog infinite interrupt in soft mode on Exynos4210,
Exynos5440, S3C64xx and S5Pv210.
6. Enable watchdog on Exynos4 and S3C SoCs.
* tag 'samsung-dt-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: add HDMI controller phandle to exynos4.dtsi
ARM: dts: s5pv210: Fix infinite interrupt in soft mode
ARM: dts: s3c64xx: Fix infinite interrupt in soft mode
ARM: dts: exynos: Fix infinite interrupt in soft mode on Exynos4210 and Exynos5440
ARM: dts: exynos: Enable watchdog on all Exynos4 boards
ARM: dts: s3c64xx: Enable watchdog on all S3C64xx boards
ARM: dts: exynos: Fix watchdog reset on Exynos4412
ARM: dts: exynos: Add the burst and esc clock frequency properties to DSI node
ARM: dts: exynos: Do not ignore real-world fuse values for thermal zone 0 on Exynos5420
ARM: dts: exynos: Add phy-pcie node for pcie to Exynos5440
Signed-off-by: Olof Johansson <olof@lixom.net>
Use disk-activity trigger for armada-385-linksys
Keep dts alphabetically ordered for clearfog (Armada 388)
-----BEGIN PGP SIGNATURE-----
iIEEABECAEEWIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWOgNoSMcZ3JlZ29yeS5j
bGVtZW50QGZyZWUtZWxlY3Ryb25zLmNvbQAKCRALBhiOFHI71V3cAJ9gBnFQKIkt
jDbi9jpxM7vxznt0VgCgnnYcZsFjE7jFAxs+w4KDVd3jYo8=
=XQtw
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-4.12-2' of git://git.infradead.org/linux-mvebu into next/dt
mvebu dt for 4.12 (part 2)
Use disk-activity trigger for armada-385-linksys
Keep dts alphabetically ordered for clearfog (Armada 388)
* tag 'mvebu-dt-4.12-2' of git://git.infradead.org/linux-mvebu:
ARM: dts: armada-385-linksys: disk-activity trigger for all
ARM: dts: clearfog: keep dts alphabetically ordered
Signed-off-by: Olof Johansson <olof@lixom.net>
Corrections:
* Correct clock frequency of X2 DU clock input for r8a7791/koelsch board
* Correct Z clock for r8a7792 SoC
* Correct parent of SSI[0-9] clocks for r8a779[013] SoCs
* Correct ethernet clock parent on r7s72100 SoC
* Correct DU clock for r8a7794/silk board
Cleanups:
* Drop _clk suffix from external CAN clock node name on r8a779[01] SoCs
Enhancements:
* Enable rtc r7s72100/genmai board
* Add Z2 clock for r8a7794 SoC
* Add DU clock for r8a7794 SoC
* Add power-domains to SDHI for r8a7794 and r7s72100 SoCs
* Add reset control properties for r8a774[35] SoCs
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJY57Z+AAoJENfPZGlqN0++410QALS78C/4O3vVj3AXABGTnQBc
B0cIlfmw1plyx1g0GhZJZYfZ/8bDjdw4yhu7xz0pttWSyfNZpYS7TMf2Uyf6bWtx
lMP3N7HYX12y4d/TKmg/w8zNT/P5sBSuAcDwlbRMAKVJer0ztECHmPLawJesF6Vw
2n0VZZpi1A9n4riJukigbiFkRPNjmQAIDB3Rx1afXeyVtUVwImvBb3vJoZHaYJ+T
MWaUQ4N+ve22HNm6k8UxJqglDxf9GO5k+SXppPwqUsZlHF41nuR5zWOWxUQl5SCQ
G2OQGLcR0iXPcuiFbb3DScuVtwXlm8AgZNOEOGssukC7JkwTFvwHJWMXFBt4ZlPS
yDFxTcCqyUtI4NbcsLO3eIEddzG+07V5UwWQw82LXktY2/rYn0I2jgcoAPh6zVou
gkA68FaMZSp2WYMfd9EdppyrxaLGbSSi/g3BQnV3HJgYjGqwtb7QSRVM2tmeMEnp
RTrAnmTYfRPm04FYyBlwmw7YaDiia5MHp4f45B2mWcXBDlYqepvxDHCyj1lX2ySL
/QmVPGrQGSWEgbLhB1kKzSpI90zZBJMzNWE7GaYhb5dXZW2SpjkcpzhHxLtB2BLR
xIHIlQ+RHiS0fOPFll3/wfvGDoN1H+P6nh1kz0BJFeQ7ph9iNNVnD9QOaXqePKqL
rlbJMygQXSAQ6A8lNrS0
=N8Dk
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt2-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Second Round of Renesas ARM Based SoC DT Updates for v4.12
Corrections:
* Correct clock frequency of X2 DU clock input for r8a7791/koelsch board
* Correct Z clock for r8a7792 SoC
* Correct parent of SSI[0-9] clocks for r8a779[013] SoCs
* Correct ethernet clock parent on r7s72100 SoC
* Correct DU clock for r8a7794/silk board
Cleanups:
* Drop _clk suffix from external CAN clock node name on r8a779[01] SoCs
Enhancements:
* Enable rtc r7s72100/genmai board
* Add Z2 clock for r8a7794 SoC
* Add DU clock for r8a7794 SoC
* Add power-domains to SDHI for r8a7794 and r7s72100 SoCs
* Add reset control properties for r8a774[35] SoCs
* tag 'renesas-dt2-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (22 commits)
ARM: dts: r8a7791: Drop _clk suffix from external CAN clock node name
ARM: dts: r8a7790: Drop _clk suffix from external CAN clock node name
ARM: dts: genmai: Enable rtc and rtc_x1 clock
ARM: dts: rskrza1: add rtc DT support
ARM: dts: rskrza1: set rtc_x1 clock value
ARM: dts: r7s72100: add rtc to device tree
ARM: dts: r7s72100: add RTC_X clock inputs to device tree
ARM: dts: r7s72100: add rtc clock to device tree
ARM: dts: koelsch: Correct clock frequency of X2 DU clock input
ARM: dts: r8a7794: Add Z2 clock
ARM: dts: r8a7792: Correct Z clock
ARM: dts: r8a7793: Correct parent of SSI[0-9] clocks
ARM: dts: r8a7791: Correct parent of SSI[0-9] clocks
ARM: dts: r8a7790: Correct parent of SSI[0-9] clocks
ARM: dts: r7s72100: fix ethernet clock parent
ARM: dts: silk: Correct clock of DU1
ARM: dts: alt: Correct clock of DU1
ARM: dts: r8a7794: Correct clock of DU1
ARM: dts: r8a7794: Add DU1 clock to device tree
ARM: dts: r7s72100: add power-domains to sdhi
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- A series from Lucas Stach which partly rewrites the imx gpc driver
to support multiple power domains, and moves the related code from
imx platform into drivers folder.
- A series from Dong Aisheng which fixes the issues with Lucas' code
changes and improves things.
- Add workaround for i.MX6QP hardware erratum ERR009619 that is PRE
clocks may be stalled during the power up sequencing of the PU power
domain.
- Add imx-gpcv2 driver to support power domains managed by GPCv2 IP
block found on i.MX7 series of SoCs.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJY6zd4AAoJEFBXWFqHsHzODtoH/jwTFRhAhfKG2wfplkP+U4HT
gijXHDybebRGll2voGAL7YX7GPhLcy0NSGdiK/ckTtHlvR4E2uxcwaIwzXIE1CTb
MXfv7p+3FXhjcqgbvl122hnLAMWOYjcbH3tFzBy1jlpGp9oEmHx4OtpdlgyD5GJ7
+En6aDtbU0g8aJg9ldZfO8iSAJz1CAqpap+FRjpcPX4xXflOQwQfxJNWuDeg75k6
U3zB2r+lbmjIfohUHWAnHsU2Jf4WPrBrjVsj/1YsiE5rMNPfxAEPYSQJAumG7JtO
qTPWf3qJnSyrWBscPRR3Fs//11IgXZXSCWBPBZjng0ELFS3Rkdvp87etjZraSjU=
=Sypm
-----END PGP SIGNATURE-----
Merge tag 'imx-drivers-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers
i.MX drivers updates for 4.12:
- A series from Lucas Stach which partly rewrites the imx gpc driver
to support multiple power domains, and moves the related code from
imx platform into drivers folder.
- A series from Dong Aisheng which fixes the issues with Lucas' code
changes and improves things.
- Add workaround for i.MX6QP hardware erratum ERR009619 that is PRE
clocks may be stalled during the power up sequencing of the PU power
domain.
- Add imx-gpcv2 driver to support power domains managed by GPCv2 IP
block found on i.MX7 series of SoCs.
* tag 'imx-drivers-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: gpc: add workaround for i.MX6QP to the GPC PD driver
dt-bindings: imx-gpc: add i.MX6 QuadPlus compatible
soc: imx: gpc: add defines for domain index
soc: imx: Add GPCv2 power gating driver
dt-bindings: Add GPCv2 power gating driver
soc: imx: gpc: remove unnecessary readable_reg callback
dt-bindings: imx-gpc: correct the DOMAIN_INDEX using
soc: imx: gpc: keep PGC_X_CTRL name align with reference manual
soc: imx: gpc: fix comment when power up domain
soc: imx: gpc: fix imx6sl gpc power domain regression
soc: imx: gpc: fix domain_index sanity check issue
soc: imx: gpc: fix the wrong using of regmap cache
soc: imx: gpc: fix gpc clk get error handling
soc: imx: move PGC handling to a new GPC driver
dt-bindings: add multidomain support to i.MX GPC DT binding
Signed-off-by: Olof Johansson <olof@lixom.net>
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJY52LfAAoJEEEQszewGV1zXCsP/A3A+ZdgJ5Y8A5sN58v1F8mN
cEPjDj3pvA+YGtIk3EGFhKGqeREMYV+9m2VENdDlM2hKt7PYZ9js4VguKw/SWcvK
vEf1UaTAACjtX3hsBU09oNBBKcju5Mz1Kd6aC7p9WktE4lEHqq0S3j98psvGZmlP
H1mW5tC0eF3KHHiIPe30rCniWnAubWacos/y34t+e/bYm942OwmpjwOpli2TNok5
oIDi3c+84X3yL1gZ37z3UAxgPRDgQ1sZf04H4QUoeuHyKGu+olgeKK5uvsclFBS2
FrtL78IS9IqP4bIc67i+pj9/Idw18KWnXwdNDDajEKWlHcmqGPkpjRD2AyAvGw6K
3VNH+mpYlIEIuA+MZowVfXuIXr5iG3NkBKBndpcl4Pu8H/hNBFw3bb4J6IK8Jmbh
VhZVgUXDaOb/3qBWV8h5nVzi5dSMchCnMO0xuCTgzZIs6IEHr6XGk2oq50vBevkN
skJpRp9fHkdSOiG2r7PW8UoDjULxEq+1REg9p7urJsbgkAaGAozuaXJRq8+smHsy
Vv4QczFWi9/ygEvbYJ5ZhpzLz3Wo30vKsWCfm9+9D97fHQPwAhywf61O4tWJBLwp
7Xm+ozOmbd5KQ+PdN+j0vz3IXccxD9Zs67j12TgxO9gzzz1VvNdTPywDOzDawmeI
2oHs7RnHy9LDhNW3HNQy
=012f
-----END PGP SIGNATURE-----
Merge tag 'arm-to-clk-icst' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/drivers
This moves the ICST helper library from arch/arm to drivers/clk
* tag 'arm-to-clk-icst' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM/clk: move the ICST library to drivers/clk
ARM: plat-versatile: remove stale clock header
Signed-off-by: Olof Johansson <olof@lixom.net>
to update to use new ti-cpufreq driver, the rest is just
to enable drivers found on various devices:
- Update to use ti-cpufreq driver that we now have
- Enable SATA for ti81xx as a loadable module
- Enable Ethernet PHY for DP83848
- Enable modem related modules for PPP, QMI and USB ACM
as loadable modules
- Enable droid 4 related drivers as lodable modules except
for PMIC and regulator so eMMC can be used for root
-----BEGIN PGP SIGNATURE-----
iQJEBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAljrt8gRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXPp6g/2MhQ+ho4WZeborGINGhvKLV9feIGLyd1s
Dgt8Ex1ilRBh79t1W3c+tWAk0VcP//LuRi0ZIE5DAby9QoSB54WYJLMAI8uhsvIh
vke753kZYeZx/eycsV/lI0cM9HRkQsCOecVjsYNtc1/sM2rfWvE3ajA+b6EzHbRX
RR2Zp/OZDOuL+T7B1agc9N1bPEKg7ZRVavOtS8IyZFo+/wt/ffJp5Fg+Ebarc+zr
xqzXzdKvFTCZ+u+HWudZmPzp+2t0y2OEcbXbZO5bB8fOQsxqb6B7/7utfYhPN6W2
eQQCN4D1Gfu9egeAv/iQi5eCFvqFs9kngDx+HXAe4ZB6Ai4BEAP0ph6QHBgE87UR
8iv9r29h6FIqGoUw+Ua8tQjMDgmUC6fUD32V7PUuqBHzE2q0whRPfEZrjGzEtApj
Upsi+NNudlctFA4h1v4CBN1Weykc2dSlYZJTJfN7tTa4fwk37nMaDZSdH56iWeLD
DY5/GSooUnGh4y1OvFsFOL+ZsW/Y+GB1eebf6VfmypthuX6Fe4J5nd731dywyZ4d
QatVTC9RYnN0HDR+imOLMm0OMGKz70t1fYkZjhTmBRPd/imNxoRlrtx11Wdz8Hey
XgHD+YnvAZrhBf32nutxuufu+fUvKaUMMDHQzx4RTDtxSXO+QvkvbqeBBCCfXuWh
s/BNNIfZuQ==
=4IRe
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.12/defconfig-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/defconfig
Defconfig updates for omaps for v4.12 merge window. Mostly
to update to use new ti-cpufreq driver, the rest is just
to enable drivers found on various devices:
- Update to use ti-cpufreq driver that we now have
- Enable SATA for ti81xx as a loadable module
- Enable Ethernet PHY for DP83848
- Enable modem related modules for PPP, QMI and USB ACM
as loadable modules
- Enable droid 4 related drivers as lodable modules except
for PMIC and regulator so eMMC can be used for root
* tag 'omap-for-v4.12/defconfig-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: omap2plus_defconfig: Enable droid 4 devices
ARM: omap2plus_defconfig: Add QMI, ACM and PPP as loadable modules
ARM: omap2plus_defconfig: Enable TI Ethernet PHY
ARM: omap2plus_defconfig: enable ahci-dm816 module
ARM: omap2plus_defconfig: Enable support for ti-cpufreq
Signed-off-by: Olof Johansson <olof@lixom.net>
- Enable MAX11801 and HID_MULTITOUCH touch drivers.
- Enable SMSC_PHY driver, as imx6sl-evk board has a LAN8720A ethernet
phy supported by it.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEbBAABAgAGBQJY65FXAAoJEFBXWFqHsHzOyfYH9A3tKXcNwIUJhzfpLI9FTi4h
1w3j1dJO0hzj8Apd+7o7bJWXLDsNGAs0We8sYeZWjeyOol2wMt6Lc4LrSrn9lQhp
LlLzEKeqiX4UI+Az6YCv5AG8XefCUtb3w5zK2nQkC8w3Ge4fs1l7X9mJCMpRYtPQ
D3rqcksRKoAAVXmaO3d1MHNi2lycVUVdxHW/z7S68oeL6gqEAXC07op9in4TJCaY
zwIvXxuLta1GQszwPGUFRXIb70OhLbJ48433gUZDLLuItlgFAmIEAn9nzFXN3q3p
dpuEeYKSD0IeJZqIkLzaBZ3OCm4/gNrbsduSzmihZSm9W03mJAOoqgnqQBbfTA==
=5aru
-----END PGP SIGNATURE-----
Merge tag 'imx-defconfig-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/defconfig
i.MX defconfig updates for 4.12:
- Enable MAX11801 and HID_MULTITOUCH touch drivers.
- Enable SMSC_PHY driver, as imx6sl-evk board has a LAN8720A ethernet
phy supported by it.
* tag 'imx-defconfig-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx_v6_v7_defconfig: Select SMSC_PHY
ARM: imx_v6_v7_defconfig: Select hid-multitouchdriver
ARM: imx_v6_v7_defconfig: Select max11801_ts touchscreen driver
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Enable DYNAMIC_DEBUG because it is useful for debugging.
2. Increase CMA memory region to allow handling H.264 1080p videos.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJY6OzmAAoJEME3ZuaGi4PXUgIQAJsHVe6PQpRkSumBxhHf12ex
GhCNkERibshTLKo/qpEtKR3hYsUpITD6UxJ9izuAkM8oyFL0RMG54WECL7ZYQNAo
JnNZJV7Vy4v0gVPI7LtA2KetR8aDcVJN0qUn9FrLAVyiX1rfZ/8w/1+Z7D9HhKSj
IIThGIxP5lHZnGla9vCU4h5HCn2DXbm94PHidLluSpY8zQ41dgSGQ4mEEkzZGbSX
KLvzXB6KJU/54nb4GLXqOQjrqTwjt9iFp55dZ/zZIm8gatxNf+Hh2pJ64ksYIpFI
oN2+INKE2EsK2TSoxUHMbiCR2xjCIMmqa2botrmgRKKvp52b97/8L8U8Dn3oL+R0
GAhIBINCCP2WKeoBEgqTK+8ChshEDYe0EYJDxUFHBEoheENpEEyjuvuPDLve1p9D
oLbFVLilA2MzYjPTqrl5tMjrjII6Fgs7lNPRSSalGKZYIiFlLndQ1EL7D6f+feCn
7MOhgEe3HcjLnMgNJv/0QAgRdw8yFoGAFj9tq81EMMaFEngGNU5Nvaw3YcNyzRyK
ZTTe14XIOMzhFsbVFKkkSXD7gWLOkwZXRtWKhkeDcezd1CXUqtL6gMnKL2TzAjJI
q4zKe3OX55TQlUt/AYB39x2vTxDqbz+PmXSKuo9WjqvfR2UvCELuZHYfZm3at05Z
nDU1cav4C7F2kr3ixcZG
=ScYV
-----END PGP SIGNATURE-----
Merge tag 'samsung-defconfig-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/defconfig
Samsung defconfig ARM update for v4.12:
1. Enable DYNAMIC_DEBUG because it is useful for debugging.
2. Increase CMA memory region to allow handling H.264 1080p videos.
* tag 'samsung-defconfig-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: exynos_defconfig: Increase CONFIG_CMA_SIZE_MBYTES to 96
ARM: exynos_defconfig: Enable DYNAMIC_DEBUG and get rid of old ext3
Signed-off-by: Olof Johansson <olof@lixom.net>
* Enable QCOM remoteproc and related drivers
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJY5tgAAAoJEFKiBbHx2RXVGloP/1Vx72WxIvYBoF2jkP5cEdqn
PJXS5Gsd8x3K9acf0Rnf8Q2Z29Qd0HK7zNmiIcTpNgIK6fnaSxVcJ4DOUMt3D01+
N30IPRKMXq3vVQwibFlFS6Lap6T1brNqPC3kL4PA1jzS5CVcs2LvjCfWr4K8KdJR
bNxZURa3wxsZ9Km/bELv1bkIAwX/JYWZ6nkulTp7oF3C3+Q4d8V+KpaX2/hJ9ej+
sdlDjL2+LgRN+V5cE3eTX2Qud/sf4QZj9v5RH2oY7Qy2fmmK1oad1wL/QoxUmKYZ
JmQNoukCD2c/7rukjWq1/ijYCLIptxkKuRWjFxVRBFQ7jefvem9BCDhuoARj/H+N
J655f9yxfSRLTJ4nzrn/YbBJBfrNkFtMqdVNkcLVXsqiQ5sWlsjX9/QRz2BVB4i+
4paMaP5ilBleI+v4oQcN+9adG439vgz2639jYhgoVFWrAzZ9LnsW9NDD5Os3arUa
GIeJSEkrDJOocb5hvuTm+8nmaoQSo/p5FnRM4v/t9AXi7ntx0BztIvBXJ8SYS7Ve
lgxf+KVgH98Iyi+wteRcl/AA/oP53HPEXJkkzDSh9LardXZrTr2MgTaZIV5mtTEH
QJP0O692wGo7/MZnqfidR7VZAAO7SjOgk0UUO9WyCaM6sYtF377J78Ptmxjy4k2V
kAYSct6bEY+6dSfP2oBh
=Ma84
-----END PGP SIGNATURE-----
Merge tag 'qcom-defconfig-for-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/defconfig
Qualcomm ARM Based defconfig Updates for v4.12
* Enable QCOM remoteproc and related drivers
* tag 'qcom-defconfig-for-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
ARM: qcom_defconfig: Enable Qualcomm remoteproc and related drivers
Signed-off-by: Olof Johansson <olof@lixom.net>
This contains PMC support for Tegra186 as well as a proper driver for
the flow controller found on SoCs up to Tegra210. This also turns the
fuse driver into an explicitly non-modular driver.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAljmx1ITHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoWt2D/9hNQqNgxW+6QOq3EuxWHDPs6hWOHRy
v13TM7cQg7Qc6zXnmc+SzEp5eT7+GbNNgtrQ7ukfzKPeDwbPXf+NwsprS+STayvF
dxqtcem/6tID3WJxzYJRJY3d8hH3BCvQhJf+uF8V2za1F/f4f6mHDtUboPVO2LIa
L4IdtXQEwoVyPdnH2GDdKG6uOHnufBLVsS+DFXWeuY/nPiTgFcBQAgOuNwFZK1/V
FisKON2QIg0yh6Y7UjDGh5X9ODR2OC+9g1kGV7hY3tlvz/JovZxc8CPnQsPg2QR7
1heGwNTHEOkAeClvRdAr+guV1wDvY4vA+2U1XeQeSLg3gq4lIfRKp8+xrwfnkyS+
rmllTA/85LCiTO9slKoSdv6vSSgb7K549z/dYdIqwDTPU0GE1xzFF4DTvs2OwmtF
y4ziCDM+6H1EgesZDcVZikVFjof+q8h2j1FEsloe6HjmhcJ42lQWRLFbEPk1XMec
cWNynVMjRxaQP/8cJTHYpnpa6e6/Eqv1GhWYWl+9yqodJhBJtrzPZLaGKfYiaG2R
QcG48WsBGDtV5zYKUEG5/LKNWaFvcAjhfi9JXh44FMBlBNZ+EyWThJPTvL06glk4
SKaBx69Ft5fOHlIQG9/lT+u0RmLmmMkSNHeW/Zh9s08xeJhK3lHLnpT8s6kDxui5
Nhid59CnZh8SnQ==
=n4aM
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.12-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
soc/tegra: Core SoC changes for v4.12-rc1
This contains PMC support for Tegra186 as well as a proper driver for
the flow controller found on SoCs up to Tegra210. This also turns the
fuse driver into an explicitly non-modular driver.
* tag 'tegra-for-4.12-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: Add initial flowctrl support for Tegra132/210
soc/tegra: flowctrl: Add basic platform driver
soc/tegra: Move Tegra flowctrl driver
ARM: tegra: Remove unnecessary inclusion of flowctrl header
soc: tegra: make fuse-tegra explicitly non-modular
soc/tegra: Fix link errors with PMC disabled
soc/tegra: Implement Tegra186 PMC support
Signed-off-by: Olof Johansson <olof@lixom.net>
H5 patches for 4.12, which are mostly related to reworking the H3 DTSI to
be usable on the arm64 H5 DTSI, that shares almost everything with the H3
but the CPU cores.
We then have patches to support the H5 boards on top.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJY5guIAAoJEBx+YmzsjxAgCOAP/izjrX7AD/lxwAQ1BtfIuNcK
rSpQ4TjF7hO1r0pN1XoIs538U5uYWiBPhpoL+bxu9cdv33i1jojM6MFMAGfyWES4
bjEHU/dI6zBGeJ/icwSEjP1Wl6N+h6eZwzJ01VQsdc91RZXXqgT2xCVXGIJDtuTw
H/+iwvpF6ZqyTFXzhhx8YH7Aqn0X9+nuy6WALyr7d4awa7uLw0QL54Lr3gJWaGvm
Si/o8SjZU6pLF3KyDlcOwlDem+YD6ghH+eZXa1323xoctPQRuFZTiinnolhxJWFc
w+yhK6PtfR8CJ/WlfEEtMjjYQxeefr6MCQjaPjrY67YwE61PlcOZADAB77DujZ/2
Na47Olqp7vJ1yg19X5W/GlxfWa9P0H0VuRE8ZPMfZXGIHFBTgjHuE+pGds38IDvd
Zr0z/fX9WjTUDK9qFD9JHDL9FAJo7gjNGMMMiUvEjR8xpTJhhmAeAzpgZj+Aa78f
ZOYzu8J1xYf2yT/Xj/lDz7FHcWJEc89go9fX+lc8ILaFcXYvokqjfGnD6+ODf0FW
sO54p1OhjEt8yIEnH2js9C+YCIsuMeZ6e6fHjfp/uVVLPb94fhXKSQGYKRmXPJkK
gEdd2OS+I+diM0BAd2mKRlr57mEoPtkl07yx2E2eqCjIG/8wBN0C76KM9p0yPWof
YAaV+iAHOdsvT43alrXp
=ilmt
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-h5-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt64
Allwinner H5 DT changes for 4.12
H5 patches for 4.12, which are mostly related to reworking the H3 DTSI to
be usable on the arm64 H5 DTSI, that shares almost everything with the H3
but the CPU cores.
We then have patches to support the H5 boards on top.
* tag 'sunxi-dt-h5-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: sunxi: h3/h5: switch apb0-related clocks to r_ccu
arm64: allwinner: h5: enable USB OTG on Orange Pi PC 2 board
arm64: allwinner: h5: add support for the Orange Pi PC 2 board
arm64: allwinner: h5: add Allwinner H5 .dtsi
ARM: sunxi: h3/h5: add usb_otg and OHCI/EHCI for usbc0 on H3/H5
arm: sun8i: h3: split Allwinner H3 .dtsi
arm: sun8i: h3: correct the GIC compatible in H3 to gic-400
arm: sun8i: h3: drop pinctrl-a10.h inclusion for H3 DTSI
arm: sun8i: h3: drop skeleton.dtsi inclusion in H3 DTSI
Signed-off-by: Olof Johansson <olof@lixom.net>
H3 patches for 4.12, which are mostly related to reworking the H3 DTSI to
be usable on the arm64 H5 DTSI, that shares almost everything with the H3
but the CPU cores.
We also have some new device addition (USB, mostly) that would conflict
otherwise.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJY5gm5AAoJEBx+YmzsjxAg3R0QAISn8cFytu1xYAdVRsIz+xsU
4B1X9XFpGj0W9gWCco+6+LHwRyKSAsnGZ1djGNvvbsPiHIUCOHh7BArPBncRcV+B
Whiuzbt0zhAjFdHGK9LiiouxpsvfSC5oa2o4erN19+PSbDUCL+zdz8KHs8Zi/Cn5
sJWY6TZocRprSf4oxrsXFbG6Wt0gtO9/tyrqFs5prY5ZEGxcEAC/0XiMBem7UBx/
dqGkM7kPzd9qNq9YjTikjoeDQh+kJn0aNj8IKmb6ubS+XLcRCNQL2vuPaygr6+RA
JBn2QXiBCwwqADmhwboBBuBqDtAQAKOVKxXW6qsb4sw6BQMTCqsRrbvYIOnw0L4v
wWfikT8E5zEO0g1163Mo2Tt2OtmfUp5mF1T+xktiz8RWm9XV3bHMXpk2v337ZaBY
5m5gUoHj2GJdl6uinsOBLB0RNM5b0Ijp4OEPKIEALOflBWQgbZSRqpKr8dx9Ik5x
FAyP9xle8VMP2cVXwAqVC3IfnnbI25fuW+nOuSmt5a1f49vWVC2X0VAPivGHxgYH
hJ+kZnzQJliAP1/xeHfIndvQ86fYykJ3uZMPxJsb5AbZalxNMhqUe1h2OeTwaChU
CnNzgfAZA0Yha3le6IdPqjZJsfBOaLflha3Ie6sftymgYyhDXLm/QrUU2Fu4W1yj
dfslnt3VEfTHZGSb6F0L
=zcf9
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-h3-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner H3 DT changes for 4.12
H3 patches for 4.12, which are mostly related to reworking the H3 DTSI to
be usable on the arm64 H5 DTSI, that shares almost everything with the H3
but the CPU cores.
We also have some new device addition (USB, mostly) that would conflict
otherwise.
* tag 'sunxi-dt-h3-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: sun8i: h2+: enable USB OTG for Orange Pi Zero board
ARM: sun8i: h3: enable USB OTG on Orange Pi One
ARM: sunxi: h3/h5: add usb_otg and OHCI/EHCI for usbc0 on H3/H5
arm: sun8i: h3: split Allwinner H3 .dtsi
arm: sun8i: h3: correct the GIC compatible in H3 to gic-400
arm: sun8i: h3: drop pinctrl-a10.h inclusion for H3 DTSI
arm: sun8i: h3: drop skeleton.dtsi inclusion in H3 DTSI
Signed-off-by: Olof Johansson <olof@lixom.net>
As usual a number of changes, among which:
- All the sun5i DTSI has been reworked based on the new documentation and
the IPs that are actually found in all those SoCs. Part of that rework
also brought the GR8 DTSI to include sun5i.dtsi
- Mali devfreq and thermal throttling support on the A33
- AC power supplies for the AXP209 and AXP22X PMIC
- CAN support for the A20
- CPUFreq-based thermal throttling for the A33
- New board: NanoPi NEO Air
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJY5f8GAAoJEBx+YmzsjxAgvskQALR+tdfifBibZjtGsY/U/RXn
AlnjH+epI0lIhaIpz59U6MQvejaw16UmMgJylauUDE4V21Vavzj2hmy4kpdkmHHX
Etw7iih7vynTTBBNCsUt0chsVom7UrP54PtGY6jrhkwEC2Xz9O+1kjeEpMVvIQEp
ErqFD9ibbmmjtdro2kliLRVQRyr5zwWKQ9IkWo3wTOUbJYl+d533Y+aAG7nzil3A
ZEBmFtjXKiVojGvQiLIJXtaP9eASO1OwSUqYJ1F17NcCWbf5clhu3cddZMRNfv6Z
CZqPU+Cm2cxSKEIGRTXQM3sWeLOQRGhQZIzFVYcHj2Rj8pC5Gq1SmTU4SBjC6plY
G/r12UoVfsiswq/+p/Gz4iHHqz4lqjbBhiU4y7jzirJ3z8N21rvOwQ6Fe7ujSqWo
fVbLk1rE0wrGAk8Y+YHJgXVT3CDBKHD/xfGmLaCiBKxQt19a1coc7SvZuMTj2013
PPYoIixJwyUbQhOCjTnwtNP0T7JHpUsjDF2R+Rig2pUflSc3kH/Wn9OJBpL5SiEI
a/Owv+OsyXUjsKf2ekga+5Y8e7e5nQ//nadvgo3/Kwh8diRyAz5tRtRdHqTN+/ho
bzF9EgzfMTn7sZufRHqcgimYdh6mBjFn5yyNSeqBuT5NpGRFbo/zlKrFwgmKYdwg
/8mUPwxAtaMCTtZCd40W
=m9vZ
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner DT changes for 4.12
As usual a number of changes, among which:
- All the sun5i DTSI has been reworked based on the new documentation and
the IPs that are actually found in all those SoCs. Part of that rework
also brought the GR8 DTSI to include sun5i.dtsi
- Mali devfreq and thermal throttling support on the A33
- AC power supplies for the AXP209 and AXP22X PMIC
- CAN support for the A20
- CPUFreq-based thermal throttling for the A33
- New board: NanoPi NEO Air
* tag 'sunxi-dt-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (38 commits)
ARM: sun8i: sina33: add highest OPP of CPUs
ARM: sun8i: a33: Add devfreq-based GPU cooling
ARM: sun8i: a33: add CPU thermal throttling
ARM: sun8i: a33: add thermal sensor
ARM: dts: sun7i: fix device node ordering
ARM: dts: sun4i: fix device node ordering
ARM: dts: sun7i: Add can0_pins_a pinctrl settings
ARM: dts: sun7i: Add CAN node
ARM: dts: sun4i: Add can0_pins_a pinctrl settings
ARM: dts: sun4i: Add CAN node
ARM: sun7i: cubietruck: enable ACIN und USB power supply subnode
ARM: dts: sun5i: Add interrupt for display backend
dt-bindings: display: sun4i: Add display backend interrupt to device tree binding
ARM: dts: sun7i: Use axp209.dtsi on A20-OLinuXino-Micro
ARM: dts: sun6i: sina31s: Enable SPDIF out
ARM: sun8i: sina33: add cpu-supply
ARM: sun8i: a33: add all operating points
ARM: sun5i: chip: enable ACIN power supply subnode
ARM: dts: sun8i: sina33: enable ACIN power supply subnode
ARM: dtsi: axp22x: add AC power supply subnode
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Some patches to enable new modules in the defconfig.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJY5f2NAAoJEBx+YmzsjxAgnwsP/2BFWtQrxSlAKvPCHzbHdP82
HOEBeK/gbBffV3ceumgxDgFqKtMFVDPNlpba9QkrOCS7mSE7qM/BZvdBzszrJfGF
5zyNls5rS7Bh3XYkrg2szcETNuWKKLBiGjmkSOp5qrPYS83Nqnn6ynIjOQzJ9/7j
OKXdCnnCBOEq6NL+h++EwmoyQtjEkAEwKWuwsQwK8I18tuk4BGnxxewP2DpZKgsS
MD+UMYAoINMbk6Uo0jORDjjKpx/MCUo4AleE878inACY2bhc9vK8f+eILF2VLz6/
QSRqwvwu79B+2AOMb+R3Z+/d6SnN3YkkW+wkc6K0qA+yLoeGRmbFimezx2dO21tW
ErSOlELEEiCSJzJWiiocFOtDlC39rP+3pRbMcZ63YlrFBIxQkz8KQgWiwxZgwJ3H
W3ZhnN8foR3iE4NcOe5TRZ7oeSWH6pUa6DkD2P6nG0aNSa/v7qWQ0lpu0YngUnH3
ZFoaFcBHT8aiKCauepUU+yfwZZxu84+OKuznXsSd/BngCgVlsXI2qIK1dWEWawNl
pKeeRhmoZKz2Sc9EmLpBEjE2yKuwEZfwPVB4hsULge8TKSxJ01VJMZduoyL6XI4n
QAbROCZRokMuVBbEOeTTH2exmZvRuLqpiYdXa7cJ/OYPRi00E9gC577vEJ5kNOMW
9DRcXS0xPEQh9Kftqi7o
=a4lF
-----END PGP SIGNATURE-----
Merge tag 'sunxi-defconfig-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/defconfig
Allwinner defconfig changes for 4.12
Some patches to enable new modules in the defconfig.
* tag 'sunxi-defconfig-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: multi_v7_defconfig: Switch AXP20x driver from module to built-in
ARM: multi_v7_defconfig: Enable AC100 RTC driver
ARM: multi_v7_defconfig: Switch sunxi RSB driver from module to built-in
ARM: sunxi_defconfig: Enable AC100 RTC driver
Signed-off-by: Olof Johansson <olof@lixom.net>
A change to our MAINTAINERS entry to reflect the new git tree, and a select
in our KConfig option to enable the device frequency scaling.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJY5fsEAAoJEBx+YmzsjxAg2qgP/389RRpT2R2PLcKJrCplRwNF
jppDhK5RIreUpvDAvSVJaWgprrqfrfmMt3CNN/TXXQpVsVK/UccURjK9XhwSiZvc
fjAnje7aciZt74Cdydk3HE0keFxIN4wOP+qizWK6/1Pkm2VbuQsJ/n4GGAaWxpsL
cH3ImjbcvxEaW1Q8kwsAFaFAXaSnc/s4DsZ4Rq622Byt42RciuhQEglKrg+FadNZ
oVm8RlFthl1sw/Cg4Cq5lL6iaKlZsyQDUPXYa1AjZ1d9fMQXgRLFlEany8XGruDZ
i6ZLm1a/ap4Uux/Q8d/J8uNGMIvksVskOsMcir+E4qrsJMC3VWSwf2tnuTZKiZ9u
NetftCY75lGbxWJ1o0hZJAQyh7BU3M+6Ad2odvsUrnRBtu5vhJv/4dxTXWq4srjn
Fd7eA8qTEh60CQUGsW179kkWdAhfw9lNZbIDQqfcU6eoPqjdLa+w+NyPBcgvTvMW
wcUYSKjKXNBhPmyEe3soMSJrGEoDCyRo5NuanSqZq3MSYXZWft41h5rI0LXgQZ29
PsQjP/k311ENlx9kT47gRmQbTeZby15LahJS/g1iYoareM1d3l+E48nIWTNPKJzO
X3jKL6u4lCd6Sc6GnDUbyvAbnZ6UETmjQ+Jd6dzGqijFVBXW3G5b4ZFT7vmuhmUA
M34xfu0ypdfrtAk80sVn
=jcLc
-----END PGP SIGNATURE-----
Merge tag 'sunxi-core-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/soc
Allwinner core changes for 4.12
A change to our MAINTAINERS entry to reflect the new git tree, and a select
in our KConfig option to enable the device frequency scaling.
* tag 'sunxi-core-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
MAINTAINERS: Update the Allwinner sunXi entry
ARM: sunxi: Select PM_OPP
Signed-off-by: Olof Johansson <olof@lixom.net>
- Clean-up:
- Add clock/memory nodes
- Add labels for CPU nodes
- Remove unused unit names and reg
- Remove unused skeleton.dtsi
- Add support for PMU
- Add QSPI for sodia board
- Add Reset controller for Arria10
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJY5QMGAAoJEBmUBAuBoyj0jnoQAI/2crSgCDlXacGwoKMDKcg7
xHerNEAICuR3NS+vQcqFkik3I2D6bYjGA49JWD9WtiMWfiNJ3v7ytPN3IGMPmCjm
uJUg4F0AZ3gwTec0K8UrCSud9FHBvZ41K6RMNpTLAUGJwktpvZpcZZCXL34K+j0N
etekZ/Xt7IkuF2eOOiR45dEZwKJzx6Vqkm+tA2z72fNIqrTWItiJdFkH89Wmxghf
IqcjlegLU9B3WdUqoPWOS1nZPkjVSEso4bBZGZCUH0hN3j4mLzZ1kRVICFtFY/BB
P/TRSIfNaUkPq6kXsbCW8I2Qi3+vPubpZYx0GevEYp5oQbZSQlf/oKPpOTAwAxLr
0FRQ8jQJzwfasuLsrsn2MEG5UwcaXmu7xziR78hd4ncepipdzQzTFhO4cCRx1PXI
qi068+8PpoeStoMaRzQDPUnkGE1OM0nD5FDOIs7xZtjE3tscax2rSnI5NU9/aYcw
fwgRpyXIomRM4aDes/4nIajm9rhJLecrMRcBHLM/eoQWIMGBue4CTlGxKQ/dqqyq
IxrG64g2Aye9fE9wg3Bt5RoDTYxnPnYp8L/J6+FNWtfXAV3sbbGJxxPyntVJYZLI
nIOsFXWAgRw/bZl1QDnp3N2UbD3v/430xLASlrlmUVD4KWQ5Unel0Ui2K5BthvMM
F1iwwShISYT8Z4SCiYiN
=EeLo
-----END PGP SIGNATURE-----
Merge tag 'socfpga_dts_for_v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt
SoCFPGA DTS updates for v4.12
- Clean-up:
- Add clock/memory nodes
- Add labels for CPU nodes
- Remove unused unit names and reg
- Remove unused skeleton.dtsi
- Add support for PMU
- Add QSPI for sodia board
- Add Reset controller for Arria10
* tag 'socfpga_dts_for_v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: dts: socfpga: Add Devkit A10-SR Reset Controller
ARM: dts: socfpga: sodia: enable qspi
ARM: dts: socfpga: Add support for PMU
ARM: dts: socfpga: Add labels for CPU nodes
ARM: dts: socfpga: Do not include skeleton.dtsi
ARM: dts: socfpga: Remove unit name for LEDs in EBV SOCrates
ARM: dts: socfpga: Remove unneeded reg from stmpe_touchscreen
ARM: dts: socfpga: Remove unneeded unit names
ARM: dts: socfpga: Add unit name to memory nodes
ARM: dts: socfpga: Add unit name to clock nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
PATA driver for DaVinci.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJY40AiAAoJEGFBu2jqvgRND2oP/0uNqSrsb2DY0A+6mfNwoZDZ
eADrj3HLoQf7tmsSIBwwB1QfMlFt4C+aGkZGzm3uhaNMTPUoLtje31/l1GpAkqrp
BqUz86DGOWva5fXTaWHS/K2Lu9VObDzdr3BxJFwmSG2xbbhnIej0kMtO7VvgOwae
aklZqkEas/nMQbgl5M4xVUTv6eabSXPLYH8fCfegTq+FODdicrAb/NSp8o6Vstcp
IaDsug/Hv+tGkQHr8bydvWGotFW3fAqKHfoy0uSs9lqIFspVabryeIhBKkoE8IuX
0eBjBbKCi2vKrJMCuJisiJqJHQzVJ/FJY7+ezTJexMp0cczYQ7oxfOTSXe2aJlBi
nOmo7aMJp1yGBrV5ZTv948IGNCCyxr3aVibNJog7WslL2U1PXoXOWr37H3hTrxqH
clMFO66xA8km1Q5RXLH2eKcYMvrnQsc2vt0y5oILuOjXgmiFWRsCdmM0JrHbipgS
n3skQJXp60WvJZyP3VruNqLo+EojhdWIZ/kyWI5ds9VIIhT61k4cT32P4C8TMh2o
viGSa3jMTkFmErJpazXtepnfkeUkWbBQsYd+3s5o3d5H4GcaWHqQkWGqX+wWKsxE
EHBvUUK88y3dtwaTPFrUyCjQdcbFI65OFBVdH2lBhYaxb+gadDxMOtcrUpr6BPh/
OqR2qjy8teu2GHmT0N+X
=hjLw
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v4.12/defconfig-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/defconfig
Shift to the newly introduced PalmChip
PATA driver for DaVinci.
* tag 'davinci-for-v4.12/defconfig-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci_all_defconfig: convert to use libata PATA
Signed-off-by: Olof Johansson <olof@lixom.net>
Highlights:
----------
- Enable I2C
- Add config fragment for RAM start point
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJY4mdrAAoJEH+ayWryHnCFqIMP/2QvZiqnYx1zHa6x4OLJBOX+
Ffe72KU8Pn0UBu4FYIT5YGLQvqtY9JH2wqxOb+vAPepJPqMcIQJEIjbrVYKTSfnM
b+SQBsL+v6q9LcTKtaLDsNWU+RgFwlWAC0ICRFzxYztlnv8Km4XcTfqxzicy9o+6
HKIoFsBuZHp1POxLA5YtpT3k0CUirH/mE17HmEFnyXIhNWuMvLZkX7CwBrHU4UFz
iFjPTHA35qKFYx2P0ZP/DCCghz+A1mnBINM5QUhG8bhXK/ENmHqMhfGO/a1NXBmD
ombojWcqSIOKdpv3ezwLJNYVjnqFyL95RbhAoqscO1aQPwdQ+PsFRNCfKbYLNG8l
TZL1tT7bSQoSLq+wSKHOGCAdPRItjvNGu889IJbAFPdfQZj3UDtiNF5K3/iIPxoa
YAgI0yGJ+/bFliT9/UD0E7IhI56YNaeexG9i5A764EG4dywAe1KcJY7xddEp8dJD
4frYDwkWPLKL0f6t8xA1Q5C2qCCgIU5qqJfvU8hxCpLCcItuzBhyO8AW/fI+Gs5R
yEOxwRG2rePzx6XQCrM9ObxDasucl4fYxhtbiFYNY5CLFMYWLsM0ez1Varhvxg7s
HpsrD49wpmkDb52ALtilXd886kx95v22ayDbGQtrrrQKzIH61TZ0TgnmOwkbeJOb
qZM/CB64kd2QFix/JLH2
=DGsD
-----END PGP SIGNATURE-----
Merge tag 'stm32-defconfig-for-v4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/defconfig
STM32 defconfig updates for v4.12, round 1.
Highlights:
----------
- Enable I2C
- Add config fragment for RAM start point
* tag 'stm32-defconfig-for-v4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
ARM: configs: Add new config fragment to change RAM start point
ARM: configs: stm32: Add I2C support
Signed-off-by: Olof Johansson <olof@lixom.net>
Highlights:
----------
- ADD RTC support on STM32F746 MCU
- Enable RTC on STM32F746 Eval board
- Enable clocks on STM32F746 MCU
- Enable DMA, pwm1 and pwm3 on STM32F429I Eval
- Add support of STM32H743 MCU and his Eval board
- Enable USB HS and FS on STM32F469 Disco board
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJY4n6WAAoJEH+ayWryHnCFaXYQAKmOBcBrU2RiZt/tn02lhEJI
/BKTjFUBg9CCSMqT8xJvDtCJ3YLUwxqo4HhkvKnTZh7AQ1mSTdVScKrB0Le83271
IOoAFBmCZCn9ShSgclBPiold1q5i7g/hZRagQwNwXHdQXt8GZxhpVzaYgZj7EtQ4
B5ikmQCT9KagPSiY4M6X1pzRPRmqcN6alAYsIO8SoHrFpBXm8/TWqspn5pPhojIM
4oWbGEwAxLR4J86TA2Eu+Yp/8FvGX8+W59tFbarlBPloKueHADZ72MfrTZ72vXf6
y4s4JGctDOiLqRFBR6Pp3i8/F4d2pxtd7GsWHR12Mw8lQGHHkKZWs20vri+s6HiT
qkjKWXdV4mwYis4vUB997NOYClbqTbURcUt7uRvFrDXD2gg3TnRGkP5WynEX8njS
cnRhJ+1rS3iC2rvNtRGE9aadRRtxXVqVQ1HA2EeBeNGpVgFFPbdhPpt2ZDhC2PLf
FRYQnxxVAngionqxNGytwKTHXSsVYufMINPyUZWxqUXN083+HAWemJCUTd6cC1ia
I781iAjQDWyQzrG8jQtsEXPT2rSdrouVzu0CG642EDuU81CkAWz8vBkrjPj9m+9g
fcd8RhRQTvcz0rePNBq/OLRojA7bVsDBBikAJJh6tCnwil8oJlaJ5DSbORe8J8Ez
DlOoNIKk1byGfN6LrxKz
=l7eq
-----END PGP SIGNATURE-----
Merge tag 'stm32-dt-for-v4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/dt
STM32 DT updates for v4.12, round 1
Highlights:
----------
- ADD RTC support on STM32F746 MCU
- Enable RTC on STM32F746 Eval board
- Enable clocks on STM32F746 MCU
- Enable DMA, pwm1 and pwm3 on STM32F429I Eval
- Add support of STM32H743 MCU and his Eval board
- Enable USB HS and FS on STM32F469 Disco board
* tag 'stm32-dt-for-v4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
dt-bindings: Document the STM32 USB OTG DWC2 core binding
ARM: dts: stm32: Enable USB HS in FS mode (embedded phy) on stm32f429-disco
ARM: dts: stm32: Enable USB FS on stm32f469-disco
ARM: dts: stm32: Add USB FS support for STM32F429 MCU
ARM: dts: stm32: Add STM32H743 MCU and STM32H743i-EVAL board
ARM: dts: stm32: Enable pwm1 and pwm3 on stm32f429i-eval
ARM: dts: stm32: Enable dma by default on stm32f4 adc
ARM: dts: stm32: enable RTC on stm32746g-eval
ARM: dts: stm32: Add RTC support for STM32F746 MCU
ARM: dts: stm32: set HSE_RTC clock frequency to 1 MHz on stm32f746
dt-bindings: mfd: Add STM32F7 RCC numeric constants into DT include file
ARM: dts: stm32: Enable clocks for STM32F746 MCU
Signed-off-by: Olof Johansson <olof@lixom.net>
The phy is necessary for the dwc2 controllers driving the usb ports
on all arm32 Rockchip socs. Both the dwc2 as well as usb downstream
drivers (mass-storage as well as usb networking) are already built-in,
so only the phy is missing to allow booting from usb-devices without
to much hassle.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch fixes the following set of warnings on vexpress platforms:
sysreg@010000 simple-bus unit address format error, expected "10000"
sysctl@020000 simple-bus unit address format error, expected "20000"
i2c@030000 simple-bus unit address format error, expected "30000"
aaci@040000 simple-bus unit address format error, expected "40000"
mmci@050000 simple-bus unit address format error, expected "50000"
kmi@060000 simple-bus unit address format error, expected "60000"
kmi@070000 simple-bus unit address format error, expected "70000"
uart@090000 simple-bus unit address format error, expected "90000"
uart@0a0000 simple-bus unit address format error, expected "a0000"
uart@0b0000 simple-bus unit address format error, expected "b0000"
uart@0c0000 simple-bus unit address format error, expected "c0000"
wdt@0f0000 simple-bus unit address format error, expected "f0000"
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
When switching rotary controlelr from plain IRQ number to IRQ resource, I
messed up the syntax.
Fixes: d422be5f62 ("Input: eeti_ts - expect platform code to set ... ")
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
We can declare it <linux/pci.h> even on platforms where it isn't going to
be defined. There's no need to have it littered through the various
<asm/pci.h> files.
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Again, a batch that's been sitting a couple of weeks, mostly because I
anticipated a bit more material but it didn't show up -- which is good.
These are all your garden variety fixes for ARM platforms. Most visible issue
fixed here is probably the SMP reset issue on OMAP, the rest are minor stuff.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJY877PAAoJEIwa5zzehBx3TaUQAKtE8CSmvdWIk5grVb4MBDfF
rXQ2R7WJF17LtVhIGwz9BPCQXMK+/XcSuXZ8bvUIoMsmOFXutDao7m7COD0z4aNo
CPWk7ceQRzIWvsmturla6aYGmpAbWzdDgQj61LnaFbQrzmJOHVvcJN685+L5NGkZ
8GBrzNmrvVkWz5N+msnrZRIcKpSqGCXrkjUU1EfHgUgNNdTf6BQRQSzVEYBtILEb
9bC3WdS1fosmSdbsBjcxHsAtWMyO64KqhA691+gGTR93wyOuCRgqv+/ucoFB1oi+
yjuhUVHW7Y5/8KOi67+97PwoKpZYpUFHge1/5iPbgEN6SqhOLzPAALGCKT4ONEQz
KmLl//kX1IJZTD/87OegSLDbpS7h2sRYS7FpwgAa1kyYYOHdsZsECzKfhEvgZNHX
Gtl2XLmtELM9quKQ2X8xWvjU5grfSLkng9OhDJ6ZCFhGddvjtHegq8J5diFyq281
qf4n/Gp/OLC9IoPUyZefn5ya77K8UZPNppqtiWTBbT1IuXWbPUVPKmZoCpq3Qwu+
2fdcFa3sIfpzDg9vkTszFAUCFkRqH5Jzy8BfNIQtfSq+pxwyIRWh88a5CV2RvYFB
uHSt5B88YR2PwoyhV2oFpYNkx3vVu9g+A35ClzIRTLhSMi+Ngh2+DcppHY+LficP
m9Hes98dZOv92JgiSaoQ
=C+Hz
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Again, a batch that's been sitting a couple of weeks, mostly because
I anticipated a bit more material but it didn't show up -- which is
good.
These are all your garden variety fixes for ARM platforms.
The most visible issue fixed here is probably the SMP reset issue on
OMAP, the rest are minor stuff"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
arm64: allwinner: a64: add pmu0 regs for USB PHY
ARM: OMAP2+: omap_device: Sync omap_device and pm_runtime after probe defer
reset: add exported __reset_control_get, return NULL if optional
ARM: orion5x: only call into phylib when available
ARM: omap2+: Revert omap-smp.c changes resetting CPU1 during boot
ARM: dts: am335x-evmsk: adjust mmc2 param to allow suspend
ARM: dts: ti: fix PCI bus dtc warnings
ARM: dts: am335x-baltos: disable EEE for Atheros 8035 PHY
ARM: dts: OMAP3: Fix MFG ID EEPROM
ARM: sun8i: a33: add operating-points-v2 property to all nodes
ARM: sun8i: a33: remove highest OPP to fix CPU crashes
Without this fix we can get PM related warnings for devices that
use deferred probe. If necessary, this fix can wait for the
v4.12 merge window no problem.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAljruuwRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXMWBBAA0kYBB9IA+OinjpgLBB9ltKX21HBXKAHn
JCiygnR6KzDxnBzsPJk0v0GfRq7FixsEbstyDqfGXDpK5pOFTlgffGFeaMLQt+jU
4PcjLtiXklS9j3jJyUS7SAAjh5sPmR8v5q+NO0ELGi5H2q3c7J7X7VojD9LCB9gm
z/4t133EEPwRdTUghoqxTaB+11ROrbctr0eZUNIafytxsnX4kkpcVGuQxRBu740j
rLXxd3lIJbqasJHj+4v/IkE5CT61OslqEEA8QDaP1oK4d6M4+JVGCBAPXIl6AZ1b
vQEjUl1YMgU1QeF/cnQwf6n6fM1DqhjbdySotDRDlZvWExexTG1BXBcKr1mATfNp
zSGJuAne/zG0AHcqfpTZD3VWbrO1iGw5RmifwwtcmbsAmKu6K7ezMx2QO4L8VBma
N407KOdhcnzsGQnTn3iQNwK36b/lc6ph1DA02TeS41vYB6MBrIp7uugP30k7eOf2
Smv3LClY0H9+db9/IMDyuap8Os3QlGEwXwnVyC67TE3dRP3Js5r7Fm3i9WGmV5Oy
5pU79OXMYzphKUd/11QUSnQUO+SMNH7/fU/dSeqLQMfwe2a5oY4FDuM5Y8uFDoZ7
2KPGLEGWFmn8kxuZvBw/nHiwPexe3y91dIfvA+S7kTQnqFGmM0IzlkMnfcZeV5Zu
AaRkd2G7654=
=07Xj
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.11/fixes-rc6-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Regression fix for omap interconnect code for deferred probe.
Without this fix we can get PM related warnings for devices that
use deferred probe. If necessary, this fix can wait for the
v4.12 merge window no problem.
* tag 'omap-for-v4.11/fixes-rc6-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: omap_device: Sync omap_device and pm_runtime after probe defer
ARM: omap2+: Revert omap-smp.c changes resetting CPU1 during boot
ARM: dts: am335x-evmsk: adjust mmc2 param to allow suspend
ARM: dts: ti: fix PCI bus dtc warnings
ARM: dts: am335x-baltos: disable EEE for Atheros 8035 PHY
ARM: dts: OMAP3: Fix MFG ID EEPROM
Signed-off-by: Olof Johansson <olof@lixom.net>
Conflicts were simply overlapping changes. In the net/ipv4/route.c
case the code had simply moved around a little bit and the same fix
was made in both 'net' and 'net-next'.
In the net/sched/sch_generic.c case a fix in 'net' happened at
the same time that a new argument was added to qdisc_hash_add().
Signed-off-by: David S. Miller <davem@davemloft.net>
Remove ADC channels that are not available by default on the sama5d3_xplained
board (resistor not populated) in order to not create confusion.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Cc: <stable@vger.kernel.org> # 3.16+
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The voltage reference for the ADC is not 3V but 3.3V since it is connected to
VDDANA.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Cc: <stable@vger.kernel.org> # 3.16+
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The envelope detector can analyze 6 different signals, selectable with a
mux controlled by three gpio pins.
Signed-off-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
as well as fixups of the clock-ids on rk3368 timers, which were unused
and completely wrong (more and differently named timers).
Also there is one new clock on rk3328 using the muxgrf type, a fix for
pll enablement which should wait for the pll to lock before continuing,
some more critical clocks and the rename of the rk1108 to rv1108, as the
soc seems to have been using a preliminary name before its actual release.
The plan is to have the driver changes (pinctrl, clk) go through the
respective maintainer trees and once everything landed in mainline do
the rename of the devicetree files. With the dts-include change in the
clock rename, we also keep everything compiling and thus bisectability.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAljY7X0QHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgRKaCACXoa3hjtS3CSqyJZQyMPPQ0Oda7bblrubR
CE4GmuoZTnX/mUENFEmY7R+k0Np7b6ijPgdiFNpeZo0bpXAdi6bNjerG/QdRPV/P
yP9usSk/8Tx/kY7vnSNTve5QiIJDUoWKGY8fn7ped+GmM7Qeb3/QbWR4N/fL4vVD
nSZnKDO7yGMxLqWL0/QzZyiLzXl1ViEkPWFTedMf3cm0A48p8M/K5jinfMvl9I+o
6e2TIsc2zn6vRKuoGhjqcaRxhtRRV9c2O8wVAcA6BLo/kk3pA9ZTU3QJPsqEcN6A
BTbANYfXiQF6i+Xp1YJHcE2lNQ/sWZOTQtLqY9SL5WzMETMTETT5
=In5R
-----END PGP SIGNATURE-----
Merge tag 'v4.12-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Pull rockchip clk driver updates from Heiko Stuebner:
General rockchip clock changes for 4.12. Contains some new clock-ids
as well as fixups of the clock-ids on rk3368 timers, which were unused
and completely wrong (more and differently named timers).
Also there is one new clock on rk3328 using the muxgrf type, a fix for
pll enablement which should wait for the pll to lock before continuing,
some more critical clocks and the rename of the rk1108 to rv1108, as the
soc seems to have been using a preliminary name before its actual release.
The plan is to have the driver changes (pinctrl, clk) go through the
respective maintainer trees and once everything landed in mainline do
the rename of the devicetree files. With the dts-include change in the
clock rename, we also keep everything compiling and thus bisectability.
* tag 'v4.12-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: add pll_wait_lock for pll_enable
clk: rockchip: rename RK1108 to RV1108
dt-bindings: rk1108-cru: rename RK1108 to RV1108
clk: rockchip: mark some rk3368 core-clks as critical
clk: rockchip: export SCLK_TIMERXX id for timers on rk3368
clk: rockchip: describe clk_gmac using the new muxgrf type on rk3328
clk: rockchip: add clock ids for timer10-15 of RK3368 SoCs
clk: rockchip: fix up rk3368 timer-ids
clk: rockchip: add rk3328 clk_mac2io_ext ID
clk: rockchip: Set "ignore unused" for PMU M0 clocks on rk3399
We found out that HW checksum generation only works from AST2500
onward. This disables it on AST2400 and removes the "no-hw-checksum"
properties in the device-trees. The problem we had wasn't related
to NC-SI.
Also rework the logic testing for that property so it can be used
to disable HW checksum generation and checking regardless of whether
NC-SI is used or not in case other variants out there need this.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
We test for aspeed chips to handle a couple of special cases,
but we do that by checking the machine type which isn't right.
Instead check the actual device compatible property. This also
updates the dtsi files for the aspeed SoC to match.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Recently most nodes got labels to make them referenceable. The USB 3.0
nodes as well as the nodes for the SATA controllers were left out,
rectify the omission.
The labels "sataX" are already used by some boards for the SATA ports,
therefore use "ahciX" to label the SATA controller nodes.
To avoid potential confusion by labeling an USB3.0 controller "usb2" use
usb3_X as labels. This also coincides with the node names themselves
(usb@xxxxx vs usb3@xxxxx).
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The CPPI 4.1 DMA in USB subsystem shares its clock with the
USB OTG, and most of the time, the clock will be enabled by
USB. But during the init of the DMA, USB is not enabled
(waiting for DMA), and then we must enable the DMA clock
before doing anything.
Add clock for the CPPI 4.1 DMA engine.
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
[nsekhar@ti.com: minor commit message tweaks]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We only need to have MFD_CPCAP and CPCAP_REGULATOR as built-in to
be able to mount root on the eMMC. And then POWER_RESET_GPIO
is good to have built-in. The rest of the devices can be loadable
modules.
This gets various devices such as regulators, touchscreen, power
button, HDMI audio, LEDs, RTC, and ADC working.
Note that omapdrm needs to be configured manually as we're still
using omapfb by default.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add the new hdmi phandle to exynos4.dtsi. This phandle is needed by the
s5p-cec driver to initialize the CEC notifier framework.
Tested with my Odroid U3.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
CC: linux-samsung-soc@vger.kernel.org
CC: devicetree@vger.kernel.org
CC: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
To use CEC notifier sti CEC driver needs to get phandle
of the hdmi device.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
CC: Patrice CHOTARD <patrice.chotard@st.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Move all the EDAC core functionality behind CONFIG_EDAC and get rid of
that indirection. Update defconfigs which had it.
While at it, fix dependencies such that EDAC depends on RAS for the
tracepoints.
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Chris Metcalf <cmetcalf@mellanox.com>
Cc: linux-edac@vger.kernel.org
The Duckbill devices are small, pen-drive sized boards based on
NXP's i.MX28 SoC. While the initial variants (Duckbill series)
were equipped with a micro SD card slot only, the latest generation
(Duckbill 2 series) have an additional internal eMMC onboard.
To distinguish between both generations, a new device tree
compatible string was introduced. To get the MAC address fixup
applied, we need to check for this new string here, too.
Signed-off-by: Michael Heimpold <michael.heimpold@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The hpd pin of the second hdmi connector of the Utilite Pro is wired
up to a gpio pin of the SoC. Reflect this in the device tree.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On imx6qp-sabresd LDO_ARM is connected to a different PMIC output than
the other imx6qdl-sabresd boards.
Setting cpu0 arm-supply to sw2_reg is wrong, this must have mistakenly
slipped out of the vendor tree where this is are used for LDO bypass.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Setting the supply is optional but beneficial, it will cause PMIC
voltages to be dynamically changed with cpu frequency.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The i.MX25 contains two AHB to IP bridges (AIPS), each of which has a set of
control registers. Add the memory regions for the control registers to
the Device Tree.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Model the Carrier Board power distribution by adding a fixed 3.3V
and 5V regulator. The 3.3V regulator is connected to the backlight
as well as the display supply. The 5V regulator is used to supply
USB VBUS.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The ADC is directly supplied by the PMIC 1.8V rail, remove the
superfluous fixed regulator.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The regulator-always-on property on the Ethernet rail prevents Linux
from disabling the rail when Ethernet is shut down (suspend or simply
link down). With this change the regulator framework will disable the
rail when the Ethernet PHY is not used, saving power especially on
carrier board not using Ethernet.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fix wrong voltage of PWR_EN_+V3.3 rail. The error had no noticeable
effect since no consumer explicitly requested a specific voltage.
Also use round voltages as it is common in other device trees.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
To make use of the new eLCDIF DRM driver OF graph description is
required. Describe the display using OF graph nodes.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Rename the switch2@0 label of the switch2 node to switch@0 to respect
the general unit@address DTS rule, and be consistent with the other
switch nodes of the DTS file.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for i2c nodes i2c1 and i2c2 on Is.IoT MX6UL
eMMC variant boards.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
lcdif nodes are differ wrt specific LCD connected on Is.IoT MX6UL
module, so create separate file 'imx6ul-isiot-common.dtsi' for common
lcdif node structure and include the same on respective dts.
More common nodes will add in future patches.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch add support for lcdif backlight on Is.IoT MX6UL
variant boards.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch add support for lcdif backlight on GEAM6UL
variant boards.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds support for the Zodiac Inflight Innovations RDU2 board,
which has both a Quad and a QuadPlus variant.
The board supports different panels, with the bootloader patching
in the correct compatible, depending on the hardware configuration.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Tested-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the DT nodes for the Prefetch Resolve Gaskets found on i.MX6QP
and hook them up to the assigned IPU nodes.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the DT nodes for the Prefetch Resolve Engines found on i.MX6QP.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The pinfunc definitions are ordered by mux_reg and so automatically by
conf_reg, too. PAD_TDO is the only pad that has a conf_reg but no
mux_reg. Put it to the place where it its in the order of conf_regs
instead of the top.
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This was introduced in commit 18e2b50407 ("ARM: dts: imx25-pinfunc:
more defines").
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
System Reset Controller in i.MX7 doesn't have any commonality with IP
block found in i.MX5 and i.MX6 SoC families. Given that and the new
upstream driver for i.MX7 variant (see
https://lkml.org/lkml/2017/2/21/466) remove "fsl,imx51-src" from
compatibility string.
Cc: yurovsky@gmail.com
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.CoreM6 Quad/Dual OpenFrame modules are "system on modules plus
openframe display carriers" which are good solution for develop
user friendly graphic user interface.
General features:
CPU NXP i.MX6Q rev1.2 at 792 MHz
RAM 1GB, 32, 64 bit, DDR3-800/1066
NAND SLC,512MB
LVDS Display TFT 12.3" industrial, 1280x480 resolution
Backlight LED backlight, brightness 350 Cd/m2
Power supply 15 to 30 Vdc
Cc: Domenico Acri <domenico.acri@engicam.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.CoreM6 Quad/Dual OpenFrame modules are "system on modules plus
openframe display carriers" which are good solution for develop
user friendly graphic user interface.
General features:
CPU NXP i.MX6Q rev1.2 at 792 MHz
RAM 1GB, 32, 64 bit, DDR3-800/1066
NAND SLC,512MB
LVDS Display TFT 10.1" industrial, 1280x800 resolution
Backlight LED backlight, brightness 350 Cd/m2
Power supply 15 to 30 Vdc
Cc: Domenico Acri <domenico.acri@engicam.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx7d-sdb has a mickro bus connector that can be connected to a
Sensirion SHT11 click board (temperature and humidity sensor):
https://shop.mikroe.com/click/sensors/sht1x
Add a new device tree file to describe such hardware.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The PHYs embedded in the switch direct there interrupts through the
switch interrupt controllers. Now that devel C has its switch
interrupts connected to the SoC, the PHY interrupts can be used by
phylib. Explicitly include MDIO nodes in the switch device tree nodes,
and link the PHY interrupts back to the switch interrupt
controller. Also, link the ports to the PHYs on the MDIO bus.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The devel B and devel C board use the same GPIO lines for interrupts
from the two switches. Move the pinmux nodes from devel B into the
shared .dtsi file, and wire up the interrupts on devel C.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
UART on i.MX6SX (like all other i.MX6 SoC variants) has the same
programming model as the 'imx6q-uart' type, so add it to the compatible
UART string.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Change the maxium spi clock frequency from 20MHz to 10MHz to meet the
operation voltage range requirement recommended in AT25 datasheet.
Signed-off-by: Ken Lin <yungching0725@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to the reference manuals, both imx50/imx53 SOC seem to share
the same eSDHC controller, especially the section on "Multi-block Read"
mentioned in commit 361b848202 ("mmc: sdhci-esdhc-imx: fix multiblock
reads on i.MX53") is identical for both SOC.
Hence, let imx50 use imx53-esdhc.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Reference them by handle and remove the changed clocks that are copied
from the downstream DT and are not part of the mainline binding.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Referencing the node by handle make the QP DT more resilent against
changes of the base DT. Also remove the duplicated reg property, it's
not needed as it the same as in the base DT, just the compatible is
actually different.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
By using the handle, we can avoid some duplication of the base DT
and so avoid any maintenance overhead in the QP DT if the referenced
node changes.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
All currently supported i.MX25-based machines use phy_type = "utmi" and
dr_mode = "otg". So this seems to be a sensible default.
This also doesn't hurt out-of-tree machines because up to now they had
to specify these two properties in the machine.dts which still takes
precedence by just overwriting the defaults added here.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This machine is based on I2SE's Duckbill 2 board and is sold as part
of I2SE's PLC Bundle for IoT. This is a development kit for Homeplug
Green PHY based powerline products based on Qualcomms QCA7000 chip.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This machine is based on I2SE's Duckbill 2 board and features a
EnOcean daugther board based on the popular TCM310 chipset.
This product is intended to be used for e.g. home automation purposes.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This machine is based on I2SE's Duckbill 2 board and features a
RS-485 daugther board. This device is intended to be used for
e.g. home automation purposes.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This machine is an USB pen drive sized development board,
based on NXP's i.MX28 CPU. In contrast to the previous
model "Duckbill", the "Duckbill 2" series has internal
eMMC storage.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Pull ARM fixes from Russell King:
"A number of ARM fixes:
- prevent oopses caused by dma_get_sgtable() and declared DMA
coherent memory
- fix boot failure on nommu caused by ID_PFR1 access
- a number of kprobes fixes from Jon Medhurst and Masami Hiramatsu"
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: 8665/1: nommu: access ID_PFR1 only if CPUID scheme
ARM: dma-mapping: disallow dma_get_sgtable() for non-kernel managed memory
arm: kprobes: Align stack to 8-bytes in test code
arm: kprobes: Fix the return address of multiple kretprobes
arm: kprobes: Skip single-stepping in recursing path if possible
arm: kprobes: Allow to handle reentered kprobe on single-stepping
Now that we support both timers and PMU reporting interrupts
to userspace, we can advertise this support.
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
When not using an in-kernel VGIC, but instead emulating an interrupt
controller in userspace, we should report the PMU overflow status to
that userspace interrupt controller using the KVM_CAP_ARM_USER_IRQ
feature.
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
If you're running with a userspace gic or other interrupt controller
(that is no vgic in the kernel), then you have so far not been able to
use the architected timers, because the output of the architected
timers, which are driven inside the kernel, was a kernel-only construct
between the arch timer code and the vgic.
This patch implements the new KVM_CAP_ARM_USER_IRQ feature, where we use a
side channel on the kvm_run structure, run->s.regs.device_irq_level, to
always notify userspace of the timer output levels when using a userspace
irqchip.
This works by ensuring that before we enter the guest, if the timer
output level has changed compared to what we last told userspace, we
don't enter the guest, but instead return to userspace to notify it of
the new level. If we are exiting, because of an MMIO for example, and
the level changed at the same time, the value is also updated and
userspace can sample the line as it needs. This is nicely achieved
simply always updating the timer_irq_level field after the main run
loop.
Note that the kvm_timer_update_irq trace event is changed to show the
host IRQ number for the timer instead of the guest IRQ number, because
the kernel no longer know which IRQ userspace wires up the timer signal
to.
Also note that this patch implements all required functionality but does
not yet advertise the capability.
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
We have 2 modes for dealing with interrupts in the ARM world. We can
either handle them all using hardware acceleration through the vgic or
we can emulate a gic in user space and only drive CPU IRQ pins from
there.
Unfortunately, when driving IRQs from user space, we never tell user
space about events from devices emulated inside the kernel, which may
result in interrupt line state changes, so we lose out on for example
timer and PMU events if we run with user space gic emulation.
Define an ABI to publish such device output levels to userspace.
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
We now return HVC_STUB_ERR when a stub hypercall fails, but we
leave whatever was in r0 on success. Zeroing it on return seems
like a good idea.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Nobody is using __hyp_get_vectors anymore, so let's remove both
implementations (hyp-stub and KVM).
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
When the compressed image needs to be relocated to avoid being
overwritten by the decompression process, we need to relocate
the hyp vectors as well so that we can find them once the
decompression has taken effect.
For that, we perform the following calculation:
u32 v = __hyp_get_vectors();
v += offset;
__hyp_set_vectors(v);
But we're guaranteed that the initial value of v as returned by
__hyp_get_vectors is always __hyp_stub_vectors, because we have
just set it by calling __hyp_stub_install.
So let's remove the use of __hyp_get_vectors, and directly use
__hyp_stub_vectors instead.
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Instead of trying to compare the value given by __hyp_get_vectors(),
which doesn't offer any real guarantee to be the stub's address, use
HVC_RESET_VECTORS to make sure we're in a sane state to reinstall
KVM across PM events.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
With __cpu_reset_hyp_mode having become fairly dumb, there is no
need for kvm_get_idmap_start anymore.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
__cpu_reset_hyp_mode doesn't need to be passed any argument now,
as the hyp-stub implementations are self-contained, and is now
reduced to just calling __hyp_reset_vectors(). Let's drop the
wrapper and use the stub hypercall directly.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Should kvm_reboot() be invoked while guest is running, an IPI
wil be issued, forcing the guest to exit and HYP being reset to
the stubs. We will then try to reenter the guest, only to get
an error (HVC_STUB_ERR).
This patch allows this case to be gracefully handled by exiting
the run loop.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Another missing stub hypercall is HVC_SOFT_RESTART. It turns out
that it is pretty easy to implement in terms of HVC_RESET_VECTORS
(since it needs to turn the MMU off).
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
We are now able to use the hyp stub to reset HYP mode. Time to
kiss __kvm_hyp_reset goodbye, and use __hyp_reset_vectors.
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
We now have a full hyp-stub implementation in the KVM init code,
but the main KVM code only supports HVC_GET_VECTORS, which is not
enough.
Instead of reinventing the wheel, let's reuse the init implementation
by branching to the idmap page when called with a hyp-stub hypercall.
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Now that we have an infrastructure to handle hypercalls in the KVM
init code, let's implement HVC_GET_VECTORS there.
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
In order to restore HYP mode to its original condition, KVM currently
implements __kvm_hyp_reset(). As we're moving towards a hyp-stub
defined API, it becomes necessary to implement HVC_RESET_VECTORS.
This patch adds the HVC_RESET_VECTORS hypercall to the KVM init
code, which so far lacked any form of hypercall support.
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Let's define a new stub hypercall that resets the HYP configuration
to its default: hyp-stub vectors, and MMU disabled.
Of course, for the hyp-stub itself, this is a trivial no-op.
Hypervisors will have a bit more work to do.
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Define a standard return value to be returned when a hyp stub
call fails.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
The KVM code needs to be able to compute the address of
symbols in its idmap page (the equivalent of a virt_to_idmap()
call). Unfortunately, virt_to_idmap is slightly complicated,
depending on the use of arch_phys_to_idmap_offset or not, and
none of that is readily available at HYP.
Instead, expose a single kimage_voffset variable which contains the
offset between a kernel VA and its idmap address, enabling the
VA->IDMAP conversion. This allows the KVM code to behave similarily
to its arm64 counterpart.
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
It is not really obvious why the restart address should be in r3
when communicated to the hyp-stub. r1 should be perfectly adequate,
and consistent with the rest of the code.
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
cpu_v7_reset() now takes a second parameter indicating whether
we should reboot in HYP or not. Update the documentation to
reflect this.
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
The conversion of the HYP stub ABI to something similar to arm64
left the KVM code broken, as it doesn't know about the new
stub numbering. Let's move the various #defines to virt.h, and
let KVM use HVC_GET_VECTORS.
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
When we soft-reboot (eg, kexec) from one kernel into the next, we need
to ensure that we enter the new kernel in the same processor mode as
when we were entered, so that (eg) the new kernel can install its own
hypervisor - the old kernel's hypervisor will have been overwritten.
In order to do this, we need to pass a flag to cpu_reset() so it knows
what to do, and we need to modify the kernel's own hypervisor stub to
allow it to handle a soft-reboot.
As we are always guaranteed to install our own hypervisor if we're
entered in HYP32 mode, and KVM will have moved itself out of the way
on kexec/normal reboot, we can assume that our hypervisor is in place
when we want to kexec, so changing our hypervisor API should not be a
problem.
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Improve the hyp-stub ABI to allow it to do more than just get/set the
vectors. We follow the example in ARM64, where r0 is used as an opcode
with the other registers as an argument.
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Instead of considering that a CP15 accessor has failed when
returning false, let's consider that it is *always* successful
(after all, we won't stand for an incomplete emulation).
The return value now simply indicates whether we should skip
the instruction (because it has now been emulated), or if we
should leave the PC alone if the emulation has injected an
exception.
Reviewed-by: Christoffer Dall <cdall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reads from write-only system registers are generally confined to
EL1 and not propagated to EL2 (that's what the architecture
mantates). In order to be sure that we have a sane behaviour
even in the unlikely event that we have a broken system, we still
handle it in KVM. Same goes for write to RO registers.
In that case, let's inject an undef into the guest.
Reviewed-by: Christoffer Dall <cdall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
We don't have to save/restore the VMCR on every entry to/from the guest,
since on GICv2 we can access the control interface from EL1 and on VHE
systems with GICv3 we can access the control interface from KVM running
in EL2.
GICv3 systems without VHE becomes the rare case, which has to
save/restore the register on each round trip.
Note that userspace accesses may see out-of-date values if the VCPU is
running while accessing the VGIC state via the KVM device API, but this
is already the case and it is up to userspace to quiesce the CPUs before
reading the CPU registers from the GIC for an up-to-date view.
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
In order to perform an operation on a gpa range, we currently iterate
over each page in a user memory slot for the given range. This is
inefficient while dealing with a big range (e.g, a VMA), especially
while unmaping a range. At present, with stage2 unmap on a range with
a hugepage backed region, we clear the PMD when we unmap the first
page in the loop. The remaining iterations simply traverse the page table
down to the PMD level only to see that nothing is in there.
This patch reworks the code to invoke the callback handlers on the
biggest range possible within the memory slot to to reduce the number of
times the handler is called.
Cc: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <cdall@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Fix build of the board code for orion5x when some parts are configured
as module.
-----BEGIN PGP SIGNATURE-----
iIEEABECAEEWIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWOZCvyMcZ3JlZ29yeS5j
bGVtZW50QGZyZWUtZWxlY3Ryb25zLmNvbQAKCRALBhiOFHI71T0FAKCSnAXO/JTf
qi3kMJf02SqH4zzMvwCfUvomlQrn7uQlmmzy7NkKvDdJgHY=
=gps1
-----END PGP SIGNATURE-----
Merge tag 'mvebu-fixes-4.11-1' of git://git.infradead.org/linux-mvebu into fixes
mvebu fixes for 4.11 (part 1)
Fix build of the board code for orion5x when some parts are configured
as module.
* tag 'mvebu-fixes-4.11-1' of git://git.infradead.org/linux-mvebu:
ARM: orion5x: only call into phylib when available
Signed-off-by: Olof Johansson <olof@lixom.net>
Two fixes for the recent A33 cpufreq support, and one to fix a missing
register in the A64 USB PHY node.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJY5e/6AAoJEBx+YmzsjxAgzZcQALIDcB8ZnbHib3NjHJUFYqLI
k2P32R93xCf1hiUhvhMB97dZNgOXqx4nyO2OabrUr9K++6ZNt7p+lIp1lnmNWnG1
Ali6xu02UHLGHlBjqePYc5FbNbpIOa+0TkiOYvqo6CmLycsjvcbb5Ia3dAILyR/K
NgkdGcsHV96EH4gPNzqchtaqBL/cTidHUZiIZv9Zg5zaSerRYG078VPSQ/qcA/sx
ji/JWta/hAGHpignUzXM9dkaw2a11LEOh7YWU78WPAjRZbidgo7d3Tw7wuvE5+hd
bUVG+T91Im3QEvOixaduw8gZ7R5345gQP2OFnm7eRRXnbQEx242z7lRnRwD/xor+
IHYDj+Psbspeaw1oR3KrVk76neCAOHnb9O8pIXu5eHrMwB34kgUNkRx/0wuvRzu8
fkwPtn403hzJdZa81OUGw3x8x1SndXgWPg2ez7z7Y2HjBF3U1585TvckWNrh+Xib
2dT2PLY7GKwCehAR/dAr/RY4jT95nZC6nfDTRkCchv4HOnSOTLr5W2jlhuwhmuMi
mcbIYhJrWRMZfe+3mg983g5DL4Z6k3lnn+Wv6AInk1TrP4TVsmgdmuCcyx116AsY
ikCtk2SMG6QYUiy2XV5mKokaf+ex2ms0qvEJQestx3yXtU3IXOuI2qqdbTPb8XQS
XsyqK7bEgpmLUe1y3W+z
=lFNZ
-----END PGP SIGNATURE-----
Merge tag 'sunxi-fixes-for-4.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into fixes
Allwinner fixes for 4.11, bis
Two fixes for the recent A33 cpufreq support, and one to fix a missing
register in the A64 USB PHY node.
* tag 'sunxi-fixes-for-4.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: allwinner: a64: add pmu0 regs for USB PHY
ARM: sun8i: a33: add operating-points-v2 property to all nodes
ARM: sun8i: a33: remove highest OPP to fix CPU crashes
Signed-off-by: Olof Johansson <olof@lixom.net>
Its value has never changed; we might as well make it part of the ABI instead
of using the return value of KVM_CHECK_EXTENSION(KVM_CAP_COALESCED_MMIO).
Because PPC does not always make MMIO available, the code has to be made
dependent on CONFIG_KVM_MMIO rather than KVM_COALESCED_MMIO_PAGE_OFFSET.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
Remove code from architecture files that can be moved to virt/kvm, since there
is already common code for coalesced MMIO.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
[Removed a pointless 'break' after 'return'.]
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
The clocksource and the sched_clock provided by the arm_global_timer
are quite unstable because their rates depend on the cpu frequency.
On the other side, the arm_global_timer has a higher rating than the
rockchip_timer, it will be selected by default by the time framework
while we want to use the stable rockchip clocksource.
Let's disable the arm_global_timer in order to have the rockchip
clocksource selected by default.
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
The patch add two timers to all rk3188 based boards.
The first timer is from alive subsystem and it act as a backup
for the local timers at sleep time. It act the same as other
SoC rockchip timers already present in kernel.
The second timer is from CPU subsystem and act as replacement
for the arm-global-timer clocksource and sched clock. It run
at stable frequency 24MHz.
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Property set to '"rockchip,rk3228-timer", "rockchip,rk3288-timer"'
to match devicetree bindings.
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Suggested-by: Heiko Stübner <heiko@sntech.de>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
This moves the ICST clock divider helper library from
arch/arm/common to drivers/clk/versatile so it is maintained
with the other clock drivers.
We keep the structure as a helper library intact and do not
fuse it with the clk-icst.c Versatile ICST clock driver: there
may be other users out there that need to use this library for
their clocking, and then it will be helpful to keep the
library contained. (The icst.[c|h] files could just be moved
to drivers/clk/lib or a similar location to share the library.)
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
All the Versatile platforms (Integrator, Versatile, RealView
Versatile Express) have been migrated to use the drivers/clk
subsystem. Clean out this header that is not referenced
anywhere anymore.
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Moxa Art interrupt controller is very very likely just an instance
of the Faraday FTINTC010 interrupt controller from Faraday Technology.
An indication would be its close association with the FA526 ARM core
and the fact that the register layout is the same.
The implementation in irq-moxart.c can probably be right off replaced
with the irq-ftintc010.c driver by adding a compatible string, selecting
this irqchip from the machine and run.
As a bonus we have an irqchip driver supporting high/low and
rising/falling edges for the Moxa Art, and shared code with the Gemini
platform.
Acked-by: Olof Johansson <olof@lixom.net>
Tested-by: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
- LPC Host Controller
- Pulse Width Modulation and Tachometer
- Analog to Digital converter
These three new drivers for the Aspeed SoCs will appear in 4.12. This
defconfig is based on next-20170406.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Developers can develop and users can test with this config against an
OpenBMC userspace. It turns off debugging features to ensure network
performance is high.
Tested-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
