We call usb_phy_init() from dwc3_core_init() during
probe, so adding usb_phy_shutdown() to dwc3_core_exit()
while removing the device so we don't keep PHYs
turned on, consuming power, unnecessarily.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
If a USB transfer has already been started, meaning
we have already issued StartTransfer command to that
particular endpoint, DWC3_EP_BUSY flag has also
already been set.
When we try to cancel this transfer which is already
in controller's cache, we will not receive XferComplete
event and we must clear DWC3_EP_BUSY in order to allow
subsequent requests to be properly started.
The best place to clear that flag is right after issuing
DWC3_DEPCMD_ENDTRANSFER.
Cc: stable@vger.kernel.org # v3.4 v3.5 v3.6
Reported-by: Moiz Sonasath <m-sonasath@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This resolves the merge problems with:
drivers/usb/dwc3/gadget.c
drivers/usb/musb/tusb6010.c
that had been seen in linux-next.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Some much needed changes for our dwc3 driver. First there's a
rework on the ep0 handling due to some Silicon issue we uncovered
which affects all users of this IP core (there's a missing
XferNotReady(DATA) event in some conditions). This issue which
show up as a SETUP transfers which wouldn't complete ever and
we would fail TD 7.06 of the Link Layer Test from USB-IF and
Lecroy's USB3 Exerciser.
We also fix a long standing bug regarding EP0 enable sequencing
where we weren't setting a particular bit (Ignore Sequence
Number). Since we never saw any problems caused by that, it
didn't deserve being sent to stable tree.
On this pull request we also fix Burst Size initialization which
should be done only in SuperSpeed and we were mistakenly setting
Burst Size to the maximum value on non-SuperSpeed mode. Again,
since we never saw any problems caused by that, we're not sending
this patch to stable.
There's also a memory ordering fix regarding usage of bitmaps in
dwc3 driver.
You will also find some sparse warnings fix, a fix for missed
isochronous packets when the endpoint is already busy, and a
fix for synchronization delay on dwc3_stop_active_transfer().
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Merge tag 'dwc3-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
usb: dwc3: patches for v3.7 merge window
Some much needed changes for our dwc3 driver. First there's a
rework on the ep0 handling due to some Silicon issue we uncovered
which affects all users of this IP core (there's a missing
XferNotReady(DATA) event in some conditions). This issue which
show up as a SETUP transfers which wouldn't complete ever and
we would fail TD 7.06 of the Link Layer Test from USB-IF and
Lecroy's USB3 Exerciser.
We also fix a long standing bug regarding EP0 enable sequencing
where we weren't setting a particular bit (Ignore Sequence
Number). Since we never saw any problems caused by that, it
didn't deserve being sent to stable tree.
On this pull request we also fix Burst Size initialization which
should be done only in SuperSpeed and we were mistakenly setting
Burst Size to the maximum value on non-SuperSpeed mode. Again,
since we never saw any problems caused by that, we're not sending
this patch to stable.
There's also a memory ordering fix regarding usage of bitmaps in
dwc3 driver.
You will also find some sparse warnings fix, a fix for missed
isochronous packets when the endpoint is already busy, and a
fix for synchronization delay on dwc3_stop_active_transfer().
nop xceiv got its own header to avoid polluting otg.h. It has also
learned to work as USB2 and USB3 phys so we can use it on USB3
controllers.
Together with those two changes to nop xceiv, we're adding basic
PHY support to dwc3 driver, this is to allow platforms which actually
have a SW-controllable PHY talk to them through dwc3 driver.
We're adding a new phy driver for the OMAP architecture. This driver
is for the PHY found in OMAP4 SoCs, and a new phy driver for the
marvell architecture. An extra phy driver - for Tegra SoCs - is now
moving from arch/arm/mach-tegra* to drivers/usb/phy.
Also here, there's the creation of <linux/usb/phy.h> which should be
used from now on for PHY drivers, even those which don't support
OTG.
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Merge tag 'xceiv-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
usb: xceiv: patches for v3.7 merge window
nop xceiv got its own header to avoid polluting otg.h. It has also
learned to work as USB2 and USB3 phys so we can use it on USB3
controllers.
Together with those two changes to nop xceiv, we're adding basic
PHY support to dwc3 driver, this is to allow platforms which actually
have a SW-controllable PHY talk to them through dwc3 driver.
We're adding a new phy driver for the OMAP architecture. This driver
is for the PHY found in OMAP4 SoCs, and a new phy driver for the
marvell architecture. An extra phy driver - for Tegra SoCs - is now
moving from arch/arm/mach-tegra* to drivers/usb/phy.
Also here, there's the creation of <linux/usb/phy.h> which should be
used from now on for PHY drivers, even those which don't support
OTG.
We will be adding support for transceivers on
dwc3 driver but not all boards have controllable
transceivers.
For those which don't provide controllable transceivers
we will register nop transceivers.
Signed-off-by: Felipe Balbi <balbi@ti.com>
We will be adding support for transceivers on
dwc3 driver but not all boards have controllable
transceivers.
For those which don't provide controllable transceivers
we will register nop transceivers.
Note that once OMAP's transceiver drivers reach mainline,
this glue layer will change accordingly.
Signed-off-by: Felipe Balbi <balbi@ti.com>
We will be adding support for transceivers on
dwc3 driver but not all boards have controllable
transceivers.
For those which don't provide controllable transceivers
we will register nop transceivers.
Signed-off-by: Felipe Balbi <balbi@ti.com>
If xfernotready is received and there is no request in request_list then
REQUEST_PENDING flag must be set, so that next request in ep queue is executed.
In case of isoc transfer, if xfernotready is already elapsed and even first
request has not been queued to request_list, then issue END TRANSFER, so that
you can receive xfernotready again and can have notion of current microframe.
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Populate the resources for xhci afresh instead of directly using the
*struct resource* of core. *resource* structure has parent, sibling,
child pointers which should be filled only by resource API's. By
directly using the *resource* pointer of core in xhci, these parent,
sibling, child pointers are already populated even before
*platform_device_add* causing side effects.
Cc: stable@vger.kernel.org # v3.4, v3.5
Reported-by: Ruchika Kharwar <ruchika@ti.com>
Tested-by: Moiz Sonasath <m-sonasath@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
In case of ep0 out, if length is not aligned to maxpacket size then we use
dwc->ep_bounce_addr for dma transfer and not request->dma. Since, we have
alreday done memcpy from dwc->ep0_bounce to request->buf, so we do not need to
issue cache sync function. In fact, cache sync function will bring wrong data
in request->buf from request->dma in this scenario.
So, cache sync function must not be executed in case of ep0 bounced.
Cc: <stable@vger.kernel.org> # v3.4 v3.5
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This commit removes USB_GADGET_DUALSPEED and USB_GADGET_SUPERSPEED
Kconfig options. Since now kernel allows many UDC drivers to be
compiled, those options may turn to no longer be valid. For
instance, if someone decides to build UDC that supports super
speed and UDC that supports high speed only, the latter will be
"assumed" to support super speed since USB_GADGET_SUPERSPEED will
be selected by the former.
The test of whether CONFIG_USB_GADGET_*SPEED was defined was just
an optimisation which removed otherwise dead code (ie. if UDC is
not dual speed, there is no need to handle cases that can happen
if speed is high). This commit removes those checks.
Signed-off-by: Michal Nazarewicz <mina86@mina86.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
When connection is established non-ss mode, endpoint.maxburst is correctly set
to 0, this means that current code will set maxburst bitfield on DEPCFG's
parameter 0 to the highest possible value (0x0f) which is wrong.
Even though this hasn't caused any issues so far (HW seems to ignore that when
not running in SS mode) we want to make sure maxburst bitfield is only set to
anything other than zero if we're running on SuperSpeed mode. In order to
achieve that, let's check for gadget's operating speed before setting maxburst
bitfield when issuing DEPCFG command.
[ balbi@ti.com : improved commit log a bit in order to clarify the situation ]
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
As a bitmap is used for free/used. As a device freed
all memory operations must be scheduled before the bitmap
is manipulated.
Signed-off-by: Oliver Neukum <oneukum@suse.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
In case some gadget driver tries to enable an endpoint
which is already enabled, we print a nice WARN so we
can track broken gadget drivers. The only problem is that
we're printing the WARN when we already changed endpoint's
name, which would result in endpoints named as:
ep1in-bulk-bulk-bulk-bulk-bulk-bulk-bulk
To prevent that, we will continue to print the WARN,
but do so before changing endpoint's name and return
early.
Signed-off-by: Felipe Balbi <balbi@ti.com>
dwc3_stop_active_transfer has been called from two places. After each
calling of this function , we should allow 100 us delay to synchronize
with interconnect.
It would be better if we put this delay in that function only, rather
than into calling routine of this function.
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Reported-by: Michel Sanches <michel.sanches@st.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
When MISSED_ISOC is set, BUSY is also set. Since, we are handling
MISSED_ISOC as a separate case in third scenario, therefore handle only
BUSY but not MISSED_ISOC in second scenario.
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This patch fixes the following sparse warnings:
drivers/usb/dwc3/gadget.c:1096:7: warning: symbol 'ret' shadows an earlier one
drivers/usb/dwc3/gadget.c:1058:8: originally declared here
drivers/usb/dwc3/gadget.c:1100:16: warning: symbol 'dwc' shadows an earlier one
drivers/usb/dwc3/gadget.c:1057:15: originally declared here
drivers/usb/dwc3/gadget.c:1118:16: warning: symbol 'dwc' shadows an earlier one
drivers/usb/dwc3/gadget.c:1057:15: originally declared here
drivers/usb/dwc3/gadget.c:1800:19: warning: symbol 'dep' shadows an earlier one
drivers/usb/dwc3/gadget.c:1778:18: originally declared here
Also, fix the potential checkpatch errors around the if() loops that
this fix patch can create.
Signed-off-by: Moiz Sonasath <m-sonasath@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
commit 68d3e66 (usb: dwc3: ep0: fix for possible early
delayed_status) added handling for early delayed status,
but the current code only works because so far delayed
status will always be on the IN direction.
This patch makes the code more robust by making sure that
we can handle all directions properly.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Due to the late Silicon limitation found, we are
now pre-starting DATA phase's TRBs. If, still, we
get XferNotReady(DATA) we will ignore it unless
we're getting it for the wrong direction.
In that case we must keep the error case handling
plus add a ENDTRANSFER command to forcefully end
the Data TRB we started previously, then continue
to SetStall and so on.
Signed-off-by: Felipe Balbi <balbi@ti.com>
We uncovered a limitation of this core WRT to the
Link Layer Compliance Suite's TD7.06.
On that test, host will start a GetDescriptor(DEVICE)
standard request, but it will do so only on the
SETUP phase, meaning there will *NOT* be any DATA or
STATUS phases.
The idea of the test is to verify robustness of the
IP WRT framing errors, so the test will send a
sequence of different SETUP_DPs each with a different
framing error and the Suite expects us to be able to
receive all SETUP_DPs with no timeouts.
This core, has the ability to tell us which phase the
host is expecting before we start it. Whenever we
receive a TP or DP when no transfers are cached on
the internal IP's caches, the IP will generate a
XferNotReady event with status informing us (in case
of physical ep0/ep1) if it's related to DATA or STATUS
phases - SETUP phase is expected to be prestarted.
Because we're always waiting for XferNotReady
events for DATA and STATUS phases, we will never
be able to know that the Host wants to start another
SETUP phase instead, which will render us "not
compliant" with TD7.06.
In order to "fix" the problem we must not rely
on XferNotReady events for the DATA phase and try
to always pre-start DATA transfers on physical
endpoints 0 and 1. If host goes back to SETUP phase
from DATA phase we will receive a XferComplete for
that phase with TRB's status set to SETUP_PENDING,
which is only useful for printing a debugging log as
the core expects us to still go through to the STATUS
phase, initiate a CONTROL_STATUS TRB just so it
completes right away and, only then, we go back to
the pending SETUP phase.
SNPS has decided to modify the programming model of
the core so that on-demand DATA phases will not be
supported anymore. Note that this limitation does not
affect 2-stage transfers, meaning that if TD7.06 would
start a 2-stage transfer instead of a 3-stage transfer,
we would receive a "fake" XferNotReady(STATUS) which
would complete right after being initiated with
SETUP_PENDING status.
Other endpoints are also not affected, so we can still
use on-demand transfers on Bulk/Isoc/Interrupt endpoints.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Databook doesn't say we should stall if we
get XferNotReady(STATUS) while we're expecting
something else.
Instead of stalling and restarting, tests have
proven that ignoring the event is far more
effective.
This problem has been caught while rewriting
ep0 handling in order we pass Link Layer TD7.6.
Signed-off-by: Felipe Balbi <balbi@ti.com>
We can return early from each if () branch
and split the special cases for clarity. While
at that also add a comment to the delayed_status
case.
Signed-off-by: Felipe Balbi <balbi@ti.com>
lots of changes for the dwc3 driver which will make
the driver a lot more stable and some changes which
are just cosmetic.
The bulk of changes is related to mis-defined macros
which were never used before, some fixes to error path
which e.g. prevent the driver from initiating two
transfer on ep0out in case of stall, some fixes to
request dequeueing and the End Transfer Command.
We have some changes to U1/U2 handling where we were
enabling those transtions at the wrong spot (though
we haven't seen a problem from that as of today).
A few patches will make it easier to add support for
newer releases of the core by adding definitions for
new registers and changing the code to act accordingly
when certain revisions are detected.
There's also the usual comestic changes to make the
driver easier to maintain and make it easier for new-
comers to understand the driver. Also one patch fixing
a double inclusion of a header.
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Merge tag 'dwc3-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
usb: dwc3: patches for v3.6 merge window
lots of changes for the dwc3 driver which will make
the driver a lot more stable and some changes which
are just cosmetic.
The bulk of changes is related to mis-defined macros
which were never used before, some fixes to error path
which e.g. prevent the driver from initiating two
transfer on ep0out in case of stall, some fixes to
request dequeueing and the End Transfer Command.
We have some changes to U1/U2 handling where we were
enabling those transtions at the wrong spot (though
we haven't seen a problem from that as of today).
A few patches will make it easier to add support for
newer releases of the core by adding definitions for
new registers and changing the code to act accordingly
when certain revisions are detected.
There's also the usual comestic changes to make the
driver easier to maintain and make it easier for new-
comers to understand the driver. Also one patch fixing
a double inclusion of a header.
This is quite a big pull request and contains patches
all over the place.
omap_udc is now a bit cleaner after removing omap2 support,
fixing some checkpatch.pl warnings and errors, switching over
to generic map/unmap routines and preventing a NULL pointer
de-reference.
s3c-hsotg has been switched over to devm_* API, got some
locking fixes and improvements and it also got an implementation
for the pullup() method.
the mass storage gadgets changed default value of the removable
parameter, dropped some unused options and made "file" and "ro"
module_parameters read-only in some cases.
ffs function got support for HID descriptor.
Some UDCs have been converted to clk_prepare_enable() and
clk_disable_unprepare().
Marvell now got support for its USB3 controller in mainline
after introducing its mv_u3d_core.c driver.
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Merge tag 'gadget-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
usb: gadget: patches for v3.6 merge window
This is quite a big pull request and contains patches
all over the place.
omap_udc is now a bit cleaner after removing omap2 support,
fixing some checkpatch.pl warnings and errors, switching over
to generic map/unmap routines and preventing a NULL pointer
de-reference.
s3c-hsotg has been switched over to devm_* API, got some
locking fixes and improvements and it also got an implementation
for the pullup() method.
the mass storage gadgets changed default value of the removable
parameter, dropped some unused options and made "file" and "ro"
module_parameters read-only in some cases.
ffs function got support for HID descriptor.
Some UDCs have been converted to clk_prepare_enable() and
clk_disable_unprepare().
Marvell now got support for its USB3 controller in mainline
after introducing its mv_u3d_core.c driver.
Although timeout has never been experienced, still to make it
meaningful, its better to return error if it ever occurs.
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
As per databook, ACCEPT{U1,U2}ENA bits should be set after receiving
SetConfiguration Command.
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
as per databook, these bits are cleared by hardware on each USB reset,
so no need to clear it explicitly by software in reset ISR.
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
as per data book any HIRD threshold value greater than 4b1100 is
invalid. So set the maximum valid value as default values.
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
set_halt for ep0 is called to stall a deferred control responses by the
gadget. We already have a function to stall default control endpoint.
This patch points set_halt for ep0 to the already available function.
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Michel Sanches <michel.sanches@st.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
In case we try to start an invalid test mode, we
will call dwc3_ep0_stall_and_restart() but we will
also call dwc3_ep0_out_start() which will start
a second transfer on ep0.
Let's prevent any problems by returning early in
the error case.
Signed-off-by: Felipe Balbi <balbi@ti.com>
whenever we want to stall ep0, we always call
dwc3_ep0_stall_and_restart() which makes sure
to send ep0state properly rendering the code
in __dwc3_gadget_ep_set_halt() duplicated.
Reported-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
It makes it easier to read and also avoids
setting DWC3_EP_PENDING_REQUEST just so the
next branch evaluates true.
No functional changes otherwise.
Cc: Pratyush Anand <pratyush.anand@st.com>
Cc: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Now we are sure that, if res_trans_idx is zero, then endpoint has been
stopped. So it's safe to just return if endpoint is already stopped. No
need to generate warning anymore.
While doing so, it's better to return when res_trans_idx is zero and
decrease one level of indentation.
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
[ balbi@ti.com: slightly changed commit log ]
Signed-off-by: Felipe Balbi <balbi@ti.com>
Synopsys specification clearly states under section "Device Power-On or
Soft Reset" that DCTL.CSftRst=1 should be first step. So, just follow
what specification says.
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Before taking core out of reset phy must be stable. So wait for 100ms
after clear phy reset.
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
In case of ep_disable and reset interrupt is received and, still there
was at least one request queued for dma transfer, then endpoint is
stopped first. Once endpoint is stopped, callback for all queued
request must be called.
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
In case of ep_dequeue , if dequeued request was submitted for dma
transfer, then endpoint is stopped. Once endpoint is stooped, callback
for the dequeued request must be called.
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
bMaxBurst field on endpoint companion descriptor
is supposed to contain the number of burst minus
1. When passing that to controller drivers, we
should be passing the real number instead (by
incrementing 1).
While doing that, also fix the assumption on
dwc3 that value comes decremented by one.
Signed-off-by: Felipe Balbi <balbi@ti.com>
The definition of DWC3_DCTL_HIRD_THRES macro is
completely wrong. It will only work for when we
want to read the register's contents for that bitfield.
Change the macro so that it can be used to writing to
the register, and when we need to read, we can add
extra right shift of 24 bits.
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
[ balbi@ti.com: add a commit log ]
Signed-off-by: Felipe Balbi <balbi@ti.com>
By the time we're disabling the endpoint, HW
could already have posted more events to our
event buffer. In that case, we will receive
endpoint events for a disabled endpoint.
In order to protect ourselves from that situation,
we simply ignore endpoint interrupts whenever
the endpoint is disabled.
Tested-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
