Commit Graph

754836 Commits

Author SHA1 Message Date
Mikita Lipski
85ee15d6a3 drm/amd/display: Do not skip FBC init in failsafe mode
Initially FBC would be initialized if display's edid was correct
and all the modes acquired from it, but n case when edid is corrupted
or non-existant we must still initialize FBC.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:25:04 -05:00
Eric Bernstein
e9522309ef drm/amd/display: Add num_opp to resource_caps
Number of OPPs to be instantiated is based on number
of timing generators, not number of pipes.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:24:57 -05:00
Eric Bernstein
12036586a3 drm/amd/display: Allow DP register double buffer
Remove setting DP_DB_DISABLE to avoid issues when changing
bit depth after vbios take over.
Refactor code to perform single register update for both
pixel encoding and component depth fields.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:24:50 -05:00
Alvin lee
ce3f6e8224 drm/amd/display: create sink_id in dc_sink structure to idenitify all sinks
Signed-off-by: Alvin lee <alvin.lee3@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:24:43 -05:00
Vitaly Prosyak
74167ad60c drm/amd/display: Add new transfer type HWPWL
It is used when curve register settings are generated
by 'matlab', i.e. bypass color module calculation.

Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:24:35 -05:00
Anthony Koo
6aa57bb8e4 drm/amd/display: Disable stats by default
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:24:28 -05:00
Krunoslav Kovac
b73552323a drm/amd/display: Convert quotes to Ascii quotes
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:24:21 -05:00
Krunoslav Kovac
6f0db2dc02 drm/amd/display: Make it more clear when info frames affect DP or HDMI
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:24:10 -05:00
Krunoslav Kovac
2cbe6d9be5 drm/amd/display: Drop duplicate dc_stream_set_static_screen_events definition
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:24:02 -05:00
Krunoslav Kovac
a10dc97ab8 drm/amd/display: Add use_dynamic_meta flag to stream_state
Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:23:53 -05:00
Harry Wentland
973d42c79e drm/amd/display: Move i2c and aux structs into dc_ddc_types.h
We'd like to use some of them in dc_link_ddc and amdgpu_dm and should
have them available in dc_ddc_types.h.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:23:38 -05:00
Eric Bernstein
b4f84bdf57 drm/amd/display: Stream encoder update
Update stream encoder based on feedback from HW team.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:23:30 -05:00
Mikita Lipski
6e0ef9d85b drm/amd/display: Write TEST_EDID_CHECKSUM_WRITE for EDID tests
Extract edid's checksum and send it back for verification if EDID_TEST
is requested.

Also added a flag for EDID checksum write in TEST_RESPONSE structure,
and simple spelling fix.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:22:09 -05:00
Mikita Lipski
3b070c60ea drm/amd/display: Drop to fail-safe mode if edid is bad
Provide the connector with a single fail-safe mode of 640x480 for CTS
tests instead of providing a list of possible base modes.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:22:01 -05:00
Andrey Grodzovsky
00553cf811 drm/amdgpu: Update function level documentation for GPUVM.
Add documentation for missed parameters.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:47 -05:00
Michel Dänzer
ab3ec8a1a9 drm/amdgpu: Restore :internal: for amdgpu_vm.c documentation
This was accidentally dropped by the "drm/amdgpu: update documentation
for amdgpu_irq.c v3" change, resulting in the GPUVM documentation body
being included twice in the generated documentation.

Trivial.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:46 -05:00
Rex Zhu
b1ddf54847 drm/amdgpu: Get real power source to initizlize ac_power
driver need to know the real power source to do some power
related configuration when initialize.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:46 -05:00
Rex Zhu
e1e36485e9 drm/amd/pp: Implement update_smc_table for CI.
driver need to update uvd/vce smc table before enable
uvd/vce dpm.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:46 -05:00
Rex Zhu
600ae890be drm/amdgpu: Use real power source in powerplay instand of hardcode
1. move ac_power to struct pm from dpm, so can be shared with powerplay
2. remove power_source in powerplay, use adev->pm.ac_power instand.
3. update ac_power before dispatch power task.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:45 -05:00
Rex Zhu
c5792d7776 drm/amd/pp: Remove SAMU support in powerplay
As the SAMU ip was not supported in linux,
so delete the SAMU support in powerplay on
asics Bonarire/Hawwii/Tonga/Fiji/Polaris/vegam.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:45 -05:00
Alex Deucher
dc85db256d drm/doc: Add amdgpu hwmon/power documentation (v2)
Document the hwmon and power control interfaces exposed
by the amdgpu driver.

v2: use section rather than chapter for now

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:45 -05:00
Andrey Grodzovsky
c8c5e569c5 drm/amdgpu: Consolidate visible vs. real vram check v2.
Move all instnaces of this check into a function in amdgpu_gmc.h
Rename the original function to a more proper name.

v2:
Add more places to cleanup.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:44 -05:00
Slava Abramov
923ff76eb0 drm/amdgpu: update documentation for amdgpu_irq.c v3
Add/update function level documentation and add reference to amdgpu_irq.c
in amdgpu.rst

v2:
Added DOC comment
Added more explanations for amdgpu_hotplug_work_func
Properly formatted unused parameters
Properly formatted return values
Fixed usage of acronyms
More consistent styling

v3:
Removed duplicate "not"
Using '&' to refer to functions and types

Signed-off-by: Slava Abramov <slava.abramov@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:44 -05:00
Andrey Grodzovsky
7fc48e5912 drm/amdgpu: Update function level documentation for GPUVM v3
Add/update function level documentation and add reference to amdgpu_vm.c
in amdgpu.rst

v2:
Fix reference in rst file.
Fix compilation warnings.
Add space between function names and params list where
it's missing.

v3:
Fix some funtion comments.
Add formatted documentation to structs.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:43 -05:00
Slava Abramov
f4557923b5 drm/amdgpu: fix typo in amdgpu_mn.c comments
In doc comments for struct amdgpu_mn: destrution -> destruction

Signed-off-by: Slava Abramov <slava.abramov@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:43 -05:00
Christian König
ad7f0b6334 drm/amdgpu: fix documentation of amdgpu_mn.c v2
And wire it up as well.

v2: improve the wording, fix label mismatch

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:43 -05:00
Christian König
528e083d85 drm/amdgpu: rename rmn to amn in the MMU notifier code (v2)
Just a copy&paste leftover from radeon.

v2: rebase (Alex)

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:42 -05:00
Harry Wentland
abea57d70e drm/amdgpu: Add BRACKET_LAYOUT_ENUMs to ObjectID.h
DC has an upcoming change that requires these to read the board layout.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:42 -05:00
Junwei Zhang
59d61be222 drm/amdgpu: remove unused parameter for va update
Don't need validation list any more

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: David Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:42 -05:00
David Panariti
04ad26bbc4 drm/amdgpu: Add plumbing for handling SQ EDC/ECC interrupts v2.
SQ can generate interrupts and installs the ISR to
handle the SQ interrupts.

Add parsing SQ data in interrupt handler.

v2:
Remove CZ only limitation.
Rebase.

Signed-off-by: David Panariti <David.Panariti@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:41 -05:00
David Panariti
981658c67a drm/amdgpu: Add interrupt SQ source struct to amdgpu_gfx struct v2.
SQ can generate interrupts on EDC/ECC errors and this struct controls
how the interrupt is handled.  The guts are filled in in the
gf_v<major>_<minor>.c files.

v2:
Rebase.

Signed-off-by: David Panariti <David.Panariti@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:41 -05:00
David Panariti
5a2f291343 drm/amdgpu: Added ISR for CP ECC/EDC interrupt v2.
ISR will DRM_ERROR ECC error message.

v2:
Remove CZ only limitation.
Rebase.

Signed-off-by: David Panariti <David.Panariti@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:41 -05:00
Shirish S
8f4039fefd drm/amdgpu: change gfx8 ib test to use WB
This patch is extends the usage of WB in
gfx8's ib test which was originally
implemented in the below upstream patch
"ed9324a drm/amdgpu: change gfx9 ib test to use WB"

For reference below are the reasons for switching
to WB:

1)Because when doing IB test we don't want to involve KIQ health
status affect, and since SCRATCH register access is go through
KIQ that way GFX IB test would failed due to KIQ fail.

2)acccessing SCRATCH register cost much more time than WB method
because SCRATCH register access runs through KIQ which at least could
begin after GPU world switch back to current Guest VF

Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:40 -05:00
Emily Deng
11528640c7 drm/amdgpu: Correct the ndw of bo update mapping.
For buffer object that has shadow buffer, need twice commands.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:40 -05:00
Boyuan Zhang
b7e6cd5702 drm/amdgpu: add AMDGPU_HW_IP_VCN_JPEG to queue mgr
Add AMDGPU_HW_IP_VCN_JPEG to queue mgr

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:40 -05:00
Boyuan Zhang
4bafe44024 drm/amdgpu: add AMDGPU_HW_IP_VCN_JPEG to info query
Add AMDGPU_HW_IP_VCN_JPEG to info query

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:39 -05:00
Boyuan Zhang
81d350144b uapi/drm: add AMDGPU_HW_IP_VCN_JPEG for jpeg CS
Add AMDGPU_HW_IP_VCN_JPEG define for jpeg CS

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:39 -05:00
Boyuan Zhang
5b2329b618 drm/amdgpu: enable vcn jpeg ib test
Enable vcn jpeg ib ring test in amdgpu_ib.c

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:38 -05:00
Boyuan Zhang
6173040f16 drm/amdgpu: add vcn jpeg ib test
Add an ib test for vcn jpeg.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:38 -05:00
Boyuan Zhang
b1d3760645 drm/amdgpu: add vcn jpeg ring test
Add a ring test for vcn jpeg.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:38 -05:00
Boyuan Zhang
0c5e4b3e1e drm/amdgpu: add vcn jpeg sw finish
Add software finish for vcn jpeg ring.

v2: remove unnecessary scheduler entity.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:37 -05:00
Boyuan Zhang
b7fe681e35 drm/amdgpu: add patch to jpeg ring
Add patch commands to jepg ring by calling set patch ring function.

v2: remove modifications on max_dw, buf_mask and ptr_mask, since we are
now using extra_dw for jpeg ring.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:37 -05:00
Boyuan Zhang
c8c1a1d2ef drm/amdgpu: define and add extra dword for jpeg ring
Define extra dword for jpeg ring. Jpeg ring will allocate extra dword to store
the patch commands for fixing the known issue.

v2: dropping extra_dw for rings other than jpeg.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:37 -05:00
Boyuan Zhang
8a998052f2 drm/amdgpu: implement patch for fixing a known bug
Implement a patch to maunally reset read pointer

v2: using ring assignment instead of amdgpu_ring_write. adding comments
for each steps in the patch function.
v3: fixing a typo bug.
v4: fixing a bug in v3.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:36 -05:00
Boyuan Zhang
d2314b48d6 drm/amdgpu: initialize vcn jpeg ring
Add implementations for vcn jpeg ring initialization

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:36 -05:00
Boyuan Zhang
59dd2b883f drm/amdgpu: add vcn jpeg irq support
Add vcn jpeg irq support.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:36 -05:00
Boyuan Zhang
e612bcc3ab drm/amdgpu: set jpeg ring functions
Set all vcn jpeg ring function pointers.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:35 -05:00
Boyuan Zhang
221f36c460 drm/amdgpu: implement jpeg ring functions
Implement all ring functions needed for jpeg ring

v2: remove unnecessary mem read function.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:35 -05:00
Boyuan Zhang
50613395ab drm/amdgpu: add more jpeg register offset headers
Add more jpeg registers defines that are needed for jpeg ring functions

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:35 -05:00
Boyuan Zhang
d521093a5f drm/amdgpu: add jpeg packet defines to soc15d.h
Add new packet for vcn jpeg, including condition checks, types and packet

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-15 12:20:34 -05:00