Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Device tree node names should contain the node's reg property address value.
The i2c0 node was apparently forgotten in commit 25b2f1bd0b (ARM: bcm2835:
node name unit address cleanup).
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This patch converts all bcm2835 dts and dtsi files to use the pinctrl
header file.
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This new header file defines pincontrol constants to use
from bcm2835 DTS files for pincontrol properties option.
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This patch adds root compatible properties for the following boards:
- Raspberry Pi Model A
- Raspberry Pi Model A+
- Raspberry Pi Model B
- Raspberry Pi Model B (no P5)
- Raspberry Pi Model B rev2
- Raspberry Pi Model B+
- Raspberry Pi Compute Module
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Since the prefix is already in use, we need to add it in the
vendor list.
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3188-radxarock.dts to this combination.
CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Julien Chauveau <chauveau.julien@gmail.com>
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3066a-bqcurie2.dts to this combination.
CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3288-thermal.dtsi to this combination.
CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Caesar Wang <caesar.wang@rock-chips.com>
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3188.dtsi to this combination.
CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Julien Chauveau <chauveau.julien@gmail.com>
Acked-by: Max Schwarz <max.schwarz@online.de>
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3066a.dtsi to this combination.
CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Julien Chauveau <chauveau.julien@gmail.com>
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3xxx.dtsi to this combination.
CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Julien Chauveau <chauveau.julien@gmail.com>
Add a "brcm,bcm6328-timer" and "syscon-reboot" nodes to allow the
generic syscon-reboot driver to reset a BCM63138 SoC.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
A timer node and a syscon-reboot node are required for software reboot
to work on BCM63138, document these two nodes in the platform binding.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Enable NAND support for Broadcom Cygnus SoC
Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Update bcm63138.dtsi with the following:
- enable-method for both CPU nodes
- brcm,bcm63138-bootlut node
- resets properties to point to the correct PMB controller to release
the secondary CPU from reset
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add binding documentation for the additional nodes and properties
required to get the secondary CPU online on the BCM63138 SoC.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add the two BCM63138 PMB busses nodes found on this System-on-a-Chip as
described in their corresponding binding document.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add a Device Tree binding for the Broadcom BCM63138 Processor Monitor
Bus, which is an internal bus used to access different power and reset
signals within a BCM63138 System-on-a-Chip.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Contains a couple of fixes and additions to device tree files. The most
notable change is a fix for a misapplied patch that was only exposed by
a recent change in the regulator subsystem that caused USB to break on
Tegra124 recently.
Other than that there are a more or less random assortment of additions
to enable various features on a couple of boards.
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Merge tag 'tegra-for-4.2-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Merge "ARM: tegra: Devicetree changes for v4.2-rc1" from Thierry Reding:
Contains a couple of fixes and additions to device tree files. The most
notable change is a fix for a misapplied patch that was only exposed by
a recent change in the regulator subsystem that caused USB to break on
Tegra124 recently.
Other than that there are a more or less random assortment of additions
to enable various features on a couple of boards.
* tag 'tegra-for-4.2-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Fix hda2codec_2x clock and reset names
ARM: tegra: Add Tegra30 HDA support
ARM: tegra: Cardhu device-tree comment spelling fix
ARM: tegra: venice2: Set min-/max-microvolt for VDD_LED supply
ARM: tegra: venice2: Mark eMMC as non-removable
ARM: tegra: jetson-tk1: Enable HDA support
ARM: tegra: Add missing HDMI +5V regulator
ARM: tegra: cardhu: Add power and volume keys
ARM: tegra: Correct which USB controller has the UTMI pad registers
- Add a DTS node for the A9 SCU
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Merge tag 'socfpga_dts_for_v4.2_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt
Merge "SoCFPGA update for v4.2 part 2" from Dinh Nguyen:
- Add a DTS node for the A9 SCU
* tag 'socfpga_dts_for_v4.2_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: socfpga: dts: add the a9-scu node
the Cortex-A12 HW PMU on the rk3288 and the tsadc on some more rk3288
boards, as well as some usb properties and marking the radxarock pmic
as system-power-controller.
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Merge tag 'v4.2-rockchip-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Merge "ARM: rockchip: dts changes for 4.2" from Heiko Stuebner:
Some misc improvements defining additional supply regulators, enabling
the Cortex-A12 HW PMU on the rk3288 and the tsadc on some more rk3288
boards, as well as some usb properties and marking the radxarock pmic
as system-power-controller.
* tag 'v4.2-rockchip-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add system-power-controller to act8846 on radxarock
ARM: dts: rockchip: add properties for dwc2 usb otg controller
ARM: dts: rockchip: enable tsadc on rk3288 boards
ARM: dts: rockchip: add act8846 supplies on rk3288-firefly
ARM: dts: rockchip: Specify VMMC and VQMMC on rk3288-evb
ARM: dts: rockchip: Enable Cortex-A12 HW PMU events on rk3288
Define CPU topology, connect that with CoreSight blocks,
add sensor information to DT boards.
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Merge tag 'ux500-v4.2-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt
Merge "Ux500 Device Tree changes for the v4.2 series" form Linus Walleij:
Define CPU topology, connect that with CoreSight blocks,
add sensor information to DT boards.
* tag 'ux500-v4.2-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: add the sensors to the STUIB board
ARM: ux500: assign the sensor trigger IRQs
ARM: ux500: fix lsm303dlh magnetometer compat string
ARM: ux500: add CoreSight blocks to DTS file
ARM: ux500: define CPU topology
This adds the device tree data for the LIS331DL and the
AK8974 magnetometer to the STUIB board device tree include
file.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The ST sensors on the Ux500 boards were not utilizing the IRQs
for data ready sample triggers. Enable this by assigning the
right GPIO lines and interrupt lines (when the GPIO lines are
used for IRQs) to the accelerometer, gyro and magnetometer
sensors.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The magnetometer found on the Ux500 TVK and Snowball boards
is a LSM303DLH not a LSM303DLM, small differences but still
different. Put in the right compatible strings and things start
working smoothly.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This registers all the CoreSight blocks on the DB8500 SoC:
each core has a PTM (v1.0, r1p0-00rel0) connected, both connected
to a funnel (DK-TM908-r0p1-00rel0) which in turn connects to a
replicator (DM-TM909-r0p1-00rel0). The replicator has two outputs,
port 0 to a TPIU interface and port 1 to an ETB
(DK-TM907-r0p3-00rel0). The CoreSight blocks are all clocked by
the APEATCLK from the PRCMU and their AHB interconnect is clocked
from a separate clock called APETRACECLK.
The SoC also has a CTI/CTM block which can be added later as we
have upstream support in the CoreSight subsystem.
Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This driver is used to enable System Configuration Register controlled
External, CTI (Core Sight), PMU (Performance Management), and PL310 L2
Cache IRQs prior to use.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This driver is used to enable System Configuration Register controlled
External, CTI (Core Sight), PMU (Performance Management), and PL310 L2
Cache IRQs prior to use.
Here we are enabling PMU IRQs on both channels.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This is ARM's generic Performance Monitoring Unit.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This driver is used to enable System Configuration Register controlled
External, CTI (Core Sight), PMU (Performance Management), and PL310 L2
Cache IRQs prior to use.
Here we are enabling PMU IRQs on both channels.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This is ARM's generic Performance Monitoring Unit.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
All the infrastructure is now in place for ST's PWM controller. This
patch takes the final step and enables the IP on the 2020 Rev-E
development platform.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Supply top level nodes for the STiH416 based development boards.
The Pinctrl configuration has already been applied, so the only
missing piece of the DT puzzle is for a board's DTB to enable
the nodes.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Supply the Pinctrl configuration to enable PWM{0,1} lines on STiH416
based development boards.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Supply top level nodes for the STiH407 based development boards.
The Pinctrl configuration has already been applied, so the only
missing piece of the DT puzzle is for a board's DTB to enable
the nodes.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Each pxa has an embedded OS Timers IP. The kernel cannot work without a
valid clocksource, and this adds the OS Timers to the pxa device-tree
description.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
