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ARM: STi: STiH407: Enable Cortex-A9 PMU support
This is ARM's generic Performance Monitoring Unit. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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@ -58,6 +58,12 @@ l2: cache-controller {
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cache-level = <2>;
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};
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arm-pmu {
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interrupt-parent = <&intc>;
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compatible = "arm,cortex-a9-pmu";
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interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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