Two long awaited changes:
- Reintroduction of the new EMAC DT bindings that got reverted at the
last minute in 4.13
- Introduction of the AXP803/813 PMIC support
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJaACYQAAoJEBx+YmzsjxAg2noQAKwnsqYF4uF/k9GGMkIiew08
gftF+Ae0i5sx0Z3Bj2aKfO5NU5TBGYxWi1rodB8yI6d+c9XTj1pn4yaiKXM6cVwP
OMDliFZ9Xo1GIb5pUV70h08v4QiJsgUcXHp5BpS5TT0BFnkRfcNF9BU0Irsic/EC
UaueRzdBWRI1vxM8Z/dP+krBw5wLrJPn9VjYgwjbPexr63JRQju6Y7V2n2pV/JBw
j+bv4w5MHDjtsjRFKh3kL9s/hn1hQaG6O4cw2gFPLWlGc54bmaJCVLbNSQbvg5bp
Iu0KTIfM98n4wYqe5NYP5qw6vluWdVXgej8v1QB8MEPl3PiV+59rxsBc7AfRKvP+
FlxWs8/J7FSiNjMa+120W5TQCjRvXz6Bk6JBuZB3q+mWGvYtjfsYfIKkCCq7+Koc
RPoHae8QsjLU1aOhBqeZ+hxI5VVBBTVcjcqo7whW+g+vNcv1msOqjtzmmVtyodh+
PHQBW5pIL55roY9LlyP2d87hDFQBEQcb+DN+2NjiMBs5AGDsatgdFyu2TOYqoTCf
UpOoLuOk8fO5Q2s7cS4ITXEpwhORbU/BKx3C01BCVn+N6OexrPy/jjTAqAMXxOLJ
qTkdNMF9yDnJVrViqSP5ltWxzIK2pHhv+A1k+CtsG1KbIwfLlmd2DC2PjLNIJA0k
i/LH4xThq6UA8zQON7Zg
=96rw
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-4.15-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Pull "Allwinner DT changes for 4.15, take 2" from Maxime Ripard:
Here are a few commits that would be great to get in 4.15, given how
long they've been hanging around.
The first and most important one is the reintroduction of the EMAC DT
changes after they've been reverted at the last minute in 4.13.
There's a arm64 patch that crept in because the H5 and H3 share a
common DTSI that is located in arch/arm, and merging that patch
through the arm64 PR, especially given the pull requests that have
already been sent, would just have generated too many conflicts.
* tag 'sunxi-dt-for-4.15-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun8i: a711: Enable USB OTG
ARM: dts: sun8i: a711: Add regulator support
ARM: dts: sun8i: a83t: bananapi-m3: Enable AP6212 WiFi on mmc1
ARM: dts: sun8i: a83t: cubietruck-plus: Enable AP6330 WiFi on mmc1
ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file
ARM: dts: sun8i: a83t: allwinner-h8homlet-v2: Add AXP818 regulator nodes
ARM: dts: sun8i: a83t: bananapi-m3: Add AXP813 regulator nodes
ARM: dts: sun8i: a83t: cubietruck-plus: Add AXP818 regulator nodes
ARM: dts: sunxi: Add dtsi for AXP81x PMIC
arm64: dts: allwinner: H5: Restore EMAC changes
ARM: dts: sunxi: Restore EMAC changes (boards)
ARM: dts: sunxi: h3/h5: represent the mdio switch used by sun8i-h3-emac
arm: dts: sunxi: h3/h5: Restore EMAC changes
dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY
dt-bindings: net: Restore sun8i dwmac binding
This updates the Guitar board DT with a clock node for the debug UART
and adds a new DT for the CubieBoard6.
It also updates the S500 DT with CPU power domains.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJZ/ZWMAAoJEPou0S0+fgE/fHcQAIdbR8x3BqQ208lnaCAPHGDT
jAkpW1FrnuxO+94r1eKMqOQjZ9Eh5t4qq1MmWSXQaNn7UGaLkYBKIb7T6A+O2H3X
/cNgjU58DWqOgkp3M6TGbRK1WAlEncQWSGCiVAPwqe+dJvvi7PXnxSBz0zCdh2z6
y01TrmswsapjnOBhfaXJmMvTg1yDEaC7uo3tNNo+9fLRs3kvRv8MeONgQ08/JFOc
jLR5WL6Abs+sl/YWMOljFG4M/koUKz/xgPaA0IiQTtd2+sLfkEWivjWNmyDxqm09
k04bCW+w4ZBV8P7OYH7fpeQ0f77jILQl/v/3VdSAQ3+gB2jSCLWgHUKzgvg1r/Qr
XafaTPQbKySRUimufOlIMzEJVo/tz3oXahkvcDVw6q0CYFC7R0ohLHKCho2uon7l
ZiDgGsVwJ/PY0luXf32oIV5EvcMBzgj6MQzqk1f1L6v9g/ZGc+0G/cC0VERcwqRX
tZZrnHiVRD7ICRwAeV6hKmyUhb6wD+KhC92U20O1qQwcsD7mwdDIXjPqAQedva6D
B/tAIZIBfATlfANNfs6Wk4YXS1S5fbGU3oM5aLFnvvadBDOgxbQYjkpBD03ST+Lf
Nji2F/YpAGfBnHvZDOcoGl3yJ4sPbsTVDmgkjUZT37nLKYnnBqAqBgb1cXlq7eoP
djOJEUb5X202cCWRnP8c
=Bu/n
-----END PGP SIGNATURE-----
Merge tag 'actions-arm-dt-for-4.15' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions into next/dt
Pull "Actions Semi ARM based SoC DT for v4.15" from Andreas Färber:
This updates the Guitar board DT with a clock node for the debug UART
and adds a new DT for the CubieBoard6.
It also updates the S500 DT with CPU power domains.
* tag 'actions-arm-dt-for-4.15' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions:
ARM: dts: owl-s500: Add CubieBoard6
dt-bindings: arm: actions: Add CubieBoard6
ARM: dts: owl-s500-guitar-bb-rev-b: Add fake uart3 clock
ARM: dts: owl-s500: Set power domains for CPU2 and CPU3
Remove the jprobes test case because jprobes is a deprecated feature.
Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Jon Medhurst <tixy@linaro.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Wang Nan <wangnan0@huawei.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/150976988105.2012.13618117383683725047.stgit@devbox
Signed-off-by: Ingo Molnar <mingo@kernel.org>
test_kretprobe() uses jprobe_func_called at the
last test, but it must check kretprobe_handler_called.
Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Jon Medhurst <tixy@linaro.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Wang Nan <wangnan0@huawei.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/150976985182.2012.15495311380682779381.stgit@devbox
Signed-off-by: Ingo Molnar <mingo@kernel.org>
The grant v2 support was removed from the kernel with
commit 438b33c714 ("xen/grant-table:
remove support for V2 tables") as the higher memory footprint of v2
grants resulted in less grants being possible for a kernel compared
to the v1 grant interface.
As machines with more than 16TB of memory are expected to be more
common in the near future support of grant v2 is mandatory in order
to be able to run a Xen pv domain at any memory location.
So re-add grant v2 support basically by reverting above commit.
Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
This fixes a missing semi-colon. It went unnoticed initially since it is
only built under certain defconfigs.
Reported-by: kbuild test robot
Signed-off-by: Kees Cook <keescook@chromium.org>
The GICv4 support introduces a hard dependency between the KVM
core and the ITS infrastructure. arm64 already selects it at
the architecture level, but 32bit doesn't. In order to avoid
littering the kernel with #ifdefs, let's just select the whole
of the GICv3 suport code.
You know you want it.
Acked-by: Christoffer Dall <cdall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
This patch selects IRQ_BYPASS_MANAGER and HAVE_KVM_IRQ_BYPASS
configs for ARM/ARM64.
kvm_arch_has_irq_bypass() now is implemented and returns true.
As a consequence the irq bypass consumer will be registered for
ARM/ARM64 with the forwarding callbacks:
- stop/start: halt/resume guest execution
- add/del_producer: set/unset forwarding at vgic/irqchip level
We don't have any actual support yet, so nothing gets actually
forwarded.
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Eric Auger <eric.auger@redhat.com>
[maz: dropped the DEOI stuff for the time being in order to
reduce the dependency chain, amended commit message]
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
kvm_vcpu_dabt_isextabt() tries to match a full fault syndrome, but
calls kvm_vcpu_trap_get_fault_type() that only returns the fault class,
thus reducing the scope of the check. This doesn't cause any observable
bug yet as we end-up matching a closely related syndrome for which we
return the same value.
Using kvm_vcpu_trap_get_fault() instead fixes it for good.
Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Both arm and arm64 implementations are capable of injecting
faults, and yet have completely divergent implementations,
leading to different bugs and reduced maintainability.
Let's elect the arm64 version as the canonical one
and move it into aarch32.c, which is common to both
architectures.
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
On reset we clear the valid bits of GITS_CBASER and GITS_BASER<n>.
We also clear command queue registers and free the cache (device,
collection, and lpi lists).
As we need to take the same locks as save/restore functions, we
create a vgic_its_ctrl() wrapper that handles KVM_DEV_ARM_VGIC_GRP_CTRL
group functions.
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Add suport for the physical timer registers in kvm_arm_timer_set_reg and
kvm_arm_timer_get_reg so that these functions can be reused to interact
with the rest of the system.
Note that this paves part of the way for the physical timer state
save/restore, but we still need to add those registers to
KVM_GET_REG_LIST before we support migrating the physical timer state.
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
As we are about to be lazy with saving and restoring the timer
registers, we prepare by moving all possible timer configuration logic
out of the hyp code. All virtual timer registers can be programmed from
EL1 and since the arch timer is always a level triggered interrupt we
can safely do this with interrupts disabled in the host kernel on the
way to the guest without taking vtimer interrupts in the host kernel
(yet).
The downside is that the cntvoff register can only be programmed from
hyp mode, so we jump into hyp mode and back to program it. This is also
safe, because the host kernel doesn't use the virtual timer in the KVM
code. It may add a little performance performance penalty, but only
until following commits where we move this operation to vcpu load/put.
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
When CONFIG_DEBUG_USER is enabled, it's possible for a user to
deliberately trigger dump_instr() with a chosen kernel address.
Let's avoid problems resulting from this by using get_user() rather than
__get_user(), ensuring that we don't erroneously access kernel memory.
So that we can use the same code to dump user instructions and kernel
instructions, the common dumping code is factored out to __dump_instr(),
with the fs manipulated appropriately in dump_instr() around calls to
this.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The reworked MPU code produces a new warning in some configurations,
presumably starting with the code move after the compiler now makes
different inlining decisions:
arch/arm/mm/pmsa-v7.c: In function 'adjust_lowmem_bounds_mpu':
arch/arm/mm/pmsa-v7.c:310:5: error: 'specified_mem_size' may be used uninitialized in this function [-Werror=maybe-uninitialized]
This appears to be harmless, as we know that there is always at
least one memblock, and the only way this could get triggered is
if the for_each_memblock() loop was never entered.
I could not come up with a better workaround than initializing
the specified_mem_size to zero, but at least that is the value
that the variable would have in the hypothetical case of no
memblocks.
Fixes: 877ec119db ("ARM: 8706/1: NOMMU: Move out MPU setup in separate module")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Some terminals apparently have issues with "\n\r" and mess up the
display. Let's use the traditional "\r\n" ordering.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Reported-by: Chris Brandt <Chris.Brandt@renesas.com>
Tested-by: Chris Brandt <Chris.Brandt@renesas.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Pull ARM fixes from Russell King:
- omit EFI memory map sorting, which was recently introduced, but
caused problems with the decompressor due to additional sections
being emitted.
- avoid unaligned load fault-generating instructions in the
decompressor by switching to a private unaligned implementation.
- add a symbol into the decompressor to further debug non-boot
situations (ld's documentation is extremely poor for how "." works,
ld doesn't seem to follow its own documentation!)
- parse endian information to sparse
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: add debug ".edata_real" symbol
ARM: 8716/1: pass endianness info to sparse
efi/libstub: arm: omit sorting of the UEFI memory map
ARM: 8715/1: add a private asm/unaligned.h
x86 KVM guest fix.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.22 (GNU/Linux)
iQEcBAABAgAGBQJZ/fZuAAoJEL/70l94x66DHVkH/i99gyP/BoFaNfooesXpy89o
VcjuHzp4XYvUmhP1rCGYqYQEVZYrgsqKAsxL5cyN1nF5SWxebpM8cD96yM7lQx2Y
Ap5rxYWldn41ZmRRLQzCRKgwPG+V+yMlVTDM8FG/PKJyRTG7fMUEN6IBlRZF2yZr
DNmy2s//JafEUL3TDq2IXCvfZ1d5VEsCfI2xiYsIzQxwKZ1bHFNqbTqWJZr3Xns1
xL9e0VjMtNaGtyyCs0ZDjco3kAVQp58Q5+BhnL4/P+uqThjFDrpjQ3RmF0mtC95n
TKQuUP7QpLUoq74RwHa8tP4IpWj2EZLjefOw/s1Uv2XtieJrRmNIHT0OOGBj9O8=
=uYvL
-----END PGP SIGNATURE-----
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull KVM fixes from Paolo Bonzini:
"Fixes for interrupt controller emulation in ARM/ARM64 and x86, plus a
one-liner x86 KVM guest fix"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
KVM: x86: Update APICv on APIC reset
KVM: VMX: Do not fully reset PI descriptor on vCPU reset
kvm: Return -ENODEV from update_persistent_clock
KVM: arm/arm64: vgic-its: Check GITS_BASER Valid bit before saving tables
KVM: arm/arm64: vgic-its: Check CBASER/BASER validity before enabling the ITS
KVM: arm/arm64: vgic-its: Fix vgic_its_restore_collection_table returned value
KVM: arm/arm64: vgic-its: Fix return value for device table restore
arm/arm64: kvm: Disable branch profiling in HYP code
arm/arm64: kvm: Move initialization completion message
arm/arm64: KVM: set right LR register value for 32 bit guest when inject abort
KVM: arm64: its: Fix missing dynamic allocation check in scan_its_table
Only two patches came in over the last two weeks: Uniphier USB support
needs additional clocks enabled (on both 32-bit and 64-bit ARM), and
a Marvell MVEBU stability issue has been fixed.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAWfz7gGCrR//JCVInAQLpeQ//SI+l8egWQCpBVF57oW3Y+PdNcYvAmfqv
h4fPl6if0VXYKPdGoiIOLO5uk+SL2MxoX46dSmqOVnBVj7CvHZzmlCjvVk8UKzJI
svfU3x1YwHdFf+brIoQxrdCI3iVV/6LgtHgjF2jxxatHqLpnjQRqLmY/kTV99I19
IXSTBS49H0X4QaXt+l6AUdn5f/fauX0cN8EIh3e8bPIBHZWkrXEbJb7Zx0tGMtlz
jKb0vw4RTms7BS7R5iZIvUzD5WvgRXEMeiTVbBXlB7Tp6Pet4+zdP98J3TBO7GYD
Dq/vhj2rLw6C2sbmLNCdghWi7urZIuWWdJAEDU6hijvoDqidGUjtmSobGToW8B5n
rb42NbfeOleDzFCXN+0mjE2dH/coqe3FPfG3MkppdLc8AM70wvYMpguAAkGWp+DI
FTJvqybrPZ0/YCy9x5UDRe4VsBp015lUdRzZx/kfZ0olvE12wuLRiQ4+d26nHrry
Y08EKY8pYJ9BMVTWYqB4XVaP5axuDa4tLr+hsuHEwW21fziyZ/IvkYTbwfmmxxCG
bF9alE/H5bp20I8j3taZUhpdAg4f/Cl+sZBHMPfyo+oeQ2Dmx1XOtk9nXqcvroa3
8ls9BK1ySJSAREpIADPa8OESeSWOHuGDmbzcw0KtVVcraeLfEl1m1L+zHqPsHPjB
Ii+uUzsmg0M=
=pn9T
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"Only two patches came in over the last two weeks: Uniphier USB support
needs additional clocks enabled (on both 32-bit and 64-bit ARM), and a
Marvell MVEBU stability issue has been fixed"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: dts: mvebu: pl310-cache disable double-linefill
arm64: dts: uniphier: add STDMAC clock to EHCI nodes
ARM: dts: uniphier: add STDMAC clock to EHCI nodes
Until KVM has full SVE support, guests must not be allowed to
execute SVE instructions.
This patch enables the necessary traps, and also ensures that the
traps are disabled again on exit from the guest so that the host
can still use SVE if it wants to.
On guest exit, high bits of the SVE Zn registers may have been
clobbered as a side-effect the execution of FPSIMD instructions in
the guest. The existing KVM host FPSIMD restore code is not
sufficient to restore these bits, so this patch explicitly marks
the CPU as not containing cached vector state for any task, thus
forcing a reload on the next return to userspace. This is an
interim measure, in advance of adding full SVE awareness to KVM.
This marking of cached vector state in the CPU as invalid is done
using __this_cpu_write(fpsimd_last_state, NULL) in fpsimd.c. Due
to the repeated use of this rather obscure operation, it makes
sense to factor it out as a separate helper with a clearer name.
This patch factors it out as fpsimd_flush_cpu_state(), and ports
all callers to use it.
As a side effect of this refactoring, a this_cpu_write() in
fpsimd_cpu_pm_notifier() is changed to __this_cpu_write(). This
should be fine, since cpu_pm_enter() is supposed to be called only
with interrupts disabled.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
-----BEGIN PGP SIGNATURE-----
iQEcBAABAgAGBQJZ0WQ6AAoJEHm+PkMAQRiGuloH/3sF4qfBhPuJo8OTf0uCtQ18
4Ux9zZbm81df/Jjz0exAp1Jqk+TvdIS3OXPWcKilvbUBP16hQcsxFTnI/5QF+YcN
87aNr+OCMJzOBK4suN1yhzO46NYHeIizdB0PTZVL1Zsto69Tt31D8VJmgH6oBxAw
Isb/nAkOr31dZ9PI5UEExTIanUt6EywVb0UswA+2rNl3h1UkeasQCpMpK2n6HBhU
kVD7sxEd/CN0MmfhB0HrySSam/BeSpOtzoU9bemOwrU2uu9+5+2rqMe7Gsdj4nX6
3Kk+7FQNktlrhxCZIFN/+CdusOUuDd8r/75d7DnsRK5YvSb0sZzJkfD3Nba68Ms=
=7J2+
-----END PGP SIGNATURE-----
Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux
Merge 4.14-rc3 in order to pick up the new timer_setup function.
A new driver has been developed to support the CESA IP. Switch
remaining users of the old driver to the new driver in order to remove
the old one.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
In preparation for unconditionally passing the struct timer_list pointer to
all timer callbacks, switch to using the new timer_setup() and from_timer()
to pass the timer pointer explicitly. Adds a static variable to hold the
interrupt private data pointer.
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Cc: Russell King <linux@armlinux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Kees Cook <keescook@chromium.org>
In preparation for unconditionally passing the struct timer_list pointer to
all timer callbacks, switch to using the new timer_setup() and from_timer()
to pass the timer pointer explicitly.
Cc: Russell King <linux@armlinux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Kees Cook <keescook@chromium.org>
* Add a flag to mark NANDs that require 3 address cycles to encode a
page address
* Set a default ECC/free layout when NAND_ECC_NONE is requested
* Fix a bug in panic_nand_write()
Driver changes:
* Another batch of cleanups for the denali driver
* Fix PM support in the atmel driver
* Remove support for platform data in the omap driver
* Fix subpage write in the omap driver
* Fix irq handling in the mtk driver
* Change link order of mtk_ecc and mtk_nand drivers to speed up boot
time
* Change log level of ECC error messages in the mxc driver
* Patch the pxa3xx driver to support Armada 8k platforms
* Add BAM DMA support to the qcom driver
* Convert gpio-nand to the GPIO desc API
* Fix ECC handling in the mt29f driver
-----BEGIN PGP SIGNATURE-----
iQJABAABCAAqBQJZ+iDfIxxib3Jpcy5icmV6aWxsb25AZnJlZS1lbGVjdHJvbnMu
Y29tAAoJEGXtNgF+CLcAPxoP/iuRGzfzs7DTbS6rLtcbIFKbulj/kjB8BfPtYGC8
1n7C2ZZkQOeargPyf1wtcvNgbVRjUv4/lZ22+HD7l/wDGDjOWeTs0v+it4yGVYzo
iafyx+8m7J4kZWmZnguc6MQnFJ4g0yorUF3tmMYtd+OihgtlB/NWoxEAG40kPuhQ
JpARsV/yWxV+l+30TBVtKCOmcS4tBh7Kjhlmr624BJv6sWilv63PnkG90a1qZUCw
He2PLSNAXXaU7nWta+FKUSzIiRnsWhp2hqf9HIndx4zs1WHK86C15oBXvPuFs3q7
FD5TB/sutTIhmkrqpZZJID/h1QDUkCYd9p2ZO6a0if/S1gZgiBKFFeJXcAlhj0Ze
xqFvE/gni/w2mY8xlqX4/Ras5ndfMuNIIQgyCR/iDwQM4Sv6G5t59nMaCb7r0XYy
Y1pZqVQ/jE8Kh5IkANEmQPVWv95OeQQwY0igtSb5Ih2J9cIzbX/8daE3CP1SOUaX
REOmUJkb1Ad6gA9e3/nS0ZhLttmFtLEgxQqMQ16XWDtKkf+6uQcBPF/1JD6CuFjn
0q6S5p1Mci/IZy2/ds9zIm42/dkG3LSLSG0cd2j60lTgTZsTloIsLcX120bDH/DM
3LejsHgHuaA1Qd7ku9Bn/rfTZdQbSoqQtvkSw3t0touMG/5ErKuleTv9JDaoEb2e
vRGr
=iUhH
-----END PGP SIGNATURE-----
Merge tag 'nand/for-4.15' of git://git.infradead.org/l2-mtd
From Boris:
"
Core changes:
* Add a flag to mark NANDs that require 3 address cycles to encode a
page address
* Set a default ECC/free layout when NAND_ECC_NONE is requested
* Fix a bug in panic_nand_write()
Driver changes:
* Another batch of cleanups for the denali driver
* Fix PM support in the atmel driver
* Remove support for platform data in the omap driver
* Fix subpage write in the omap driver
* Fix irq handling in the mtk driver
* Change link order of mtk_ecc and mtk_nand drivers to speed up boot
time
* Change log level of ECC error messages in the mxc driver
* Patch the pxa3xx driver to support Armada 8k platforms
* Add BAM DMA support to the qcom driver
* Convert gpio-nand to the GPIO desc API
* Fix ECC handling in the mt29f driver
"
MT7623 has its own compatible in pinctrl driver so we don't need the
backward compatible for it.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The current usb related nodes are out-of-date, so we make them be
consistent with the binding documents.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This patch updates compatible string and clocks for the crypto node.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-----BEGIN PGP SIGNATURE-----
iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCWfswbQ8cZ3JlZ0Brcm9h
aC5jb20ACgkQMUfUDdst+ykvEwCfXU1MuYFQGgMdDmAZXEc+xFXZvqgAoKEcHDNA
6dVh26uchcEQLN/XqUDt
=x306
-----END PGP SIGNATURE-----
Merge tag 'spdx_identifiers-4.14-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core
Pull initial SPDX identifiers from Greg KH:
"License cleanup: add SPDX license identifiers to some files
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the
'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally
binding shorthand, which can be used instead of the full boiler plate
text.
This patch is based on work done by Thomas Gleixner and Kate Stewart
and Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset
of the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to
license had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied
to a file was done in a spreadsheet of side by side results from of
the output of two independent scanners (ScanCode & Windriver)
producing SPDX tag:value files created by Philippe Ombredanne.
Philippe prepared the base worksheet, and did an initial spot review
of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537
files assessed. Kate Stewart did a file by file comparison of the
scanner results in the spreadsheet to determine which SPDX license
identifier(s) to be applied to the file. She confirmed any
determination that was not immediately clear with lawyers working with
the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained
>5 lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that
was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that
became the concluded license(s).
- when there was disagreement between the two scanners (one detected
a license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply
(and which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases,
confirmation by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights.
The Windriver scanner is based on an older version of FOSSology in
part, so they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot
checks in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect
the correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial
patch version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch
license was not GPL-2.0 WITH Linux-syscall-note to ensure that the
applied SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>"
* tag 'spdx_identifiers-4.14-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core:
License cleanup: add SPDX license identifier to uapi header files with a license
License cleanup: add SPDX license identifier to uapi header files with no license
License cleanup: add SPDX GPL-2.0 license identifier to files with no license
issues for v4.15 merge window sent by their human operatorrrrrs.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAln3VUIRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXOBcxAA07MX90Ao/48PLf3nLTYNWm6AurLNgbol
wEcb4xxFW/kn1OlF3YrQmo+3kYmFpt9iEMMY46VT6kuYYvLLTDPlIxt3xcdDlQtJ
sHX+51EudFH4f9qLZp3zhPtTN/JjvF866Wnp66+l5lI1c50jD9TtI6RYbsdvprvl
8kVB4eFQzMJvoKUjmOkpheACaH91HPOiWNgS0R2PRFNN63Oyy8UwE1Mtl3Ry9Ayx
eSc6V0JZzIgogG3Np9VnKiK78toYWsaphO50HLLOsGezOEmG7IUgxWxvFCge83ew
BKT3fk5yY8D1kLrGYirkJj0VkLTSO8+P/cgxLXw8VJu5P6uwXBKbjwBJEejmxFRZ
hnCy1VJM6df88Bx/PalhSd5LWreQH5xlt67FmKwGXlRRVqTay2wKN+AZid/tMjqC
A97BUIHjnXIAk31R1pNXjBWInN9oaEA10ueihIDFWFJw23dP/MFb0Gs1Yi5ZwPPW
Dv/7AGhSicCS20LgsF37Ye7wFihNI8K6mQYFqUgJjsVQ9+k/G3wNtRh1My3aHiK5
F63Pq0ySfPx6p6Ka9+9SjgXqflE1NJ10OPasQ973TC12UG1uwMiI228Wh55Wij6E
AeyXYbfLJ1T5jrmOTb1+WEL8KRM5nYG3pNL19vRvB3IoRUGHz8rdFV8/6a5fzMvO
xkep0b0++30=
=vA9m
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.15/coccinelle-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Pull "omap coccinelle warning fixes for v4.15 merge window" from Tony Lindgren:
Few coccinelle robot clean-up patches for careless human coding
issues for v4.15 merge window sent by their human operatorrrrrs.
* tag 'omap-for-v4.15/coccinelle-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP3: Delete an unnecessary variable initialisation in omap3xxx_hwmod_init()
ARM: OMAP3: Use common error handling code in omap3xxx_hwmod_init()
ARM: omap1: add const and initconst to omap_lcd_config
- add mt7622 support to pwrap
- test build all mediatek soc drivers
- fix compiler issues
- clean up Kconfig description
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEEiUuSfQSYnG8EMsBltDliWyzx00MFAlns36cXHG1hdHRoaWFz
LmJnZ0BnbWFpbC5jb20ACgkQtDliWyzx00Ozxg/9EL0cErlhOwxCVfLljeVlRsQV
2qKgoFKINT/JoTd0OW3Xodzhia0Mbf7G6xtfokktEG7R4jUV6W5UoyftlRVDJjw+
OAM1t/QoGBifcRP5XJfxVnln9GT3egcfixLJB7e1KR9HM+Yjin8pX8EK5blWJ5X5
nJPHAuxo6/RcU+TaLhTNMyLa22OpFkVGKkaxsOh1/qKVMk9SfVe3oW2WYqXRc/3Y
9Qt83xldIqXXkwS0p/o5GeZZq8pui29V3y2jLBzv9soKqkVAM6fO3hXSQFsEAMre
doAhErbXwHFwV8TnVqdnoDK5Q41TNpDC215wi0ElywrMV5TbV4TtEclNMxR2xdc7
t8pf8TNj08dzV3xiOK0RDrxmmAymxnbjqVEacdNHgByu0wSryD5Js/BDYcwmweUv
VTCCJyTFA/vEeTdo4vEZCy+SHmiw73mBcIVmc+fgxFqw9J6BCNGFcasPS8TGNlfa
ouGbkK+fEWep+659dKECuwYgyT4ODqpJ05hYQDMn8vArHTh5pXi/GyGlR/c+xPgY
cHWU0XCZx80jAF80iVbXVdBU/TuKwuoyytyvAG44lmMY5BIj2Q/xoWPTwkEgJ/ZV
JyGE04QzANP2SxTGoBHEgwOe5NvU2aulyUF18/kJh6t1los+/sKtoDzf9hGKrwB/
VkLn2D2qpoKqNz5yvkk=
=ZWf/
-----END PGP SIGNATURE-----
Merge tag 'v4.14-next-soc' of https://github.com/mbgg/linux-mediatek into next/drivers
Pull "Mediatek: soc driver updates for v4.15" from Matthias Brugger:
- add 32 bit read/write support to pwrap
- add mt7622 support to pwrap
- test build all mediatek soc drivers
- fix compiler issues
- clean up Kconfig description
* tag 'v4.14-next-soc' of https://github.com/mbgg/linux-mediatek:
soc: mediatek: pwrap: fix fatal compiler error
soc: mediatek: pwrap: fix compiler errors
arm64: mediatek: cleanup message for platform selection
soc: Allow test-building of MediaTek drivers
soc: mediatek: place Kconfig for all SoC drivers under menu
soc: mediatek: pwrap: add support for MT7622 SoC
soc: mediatek: pwrap: add common way for setup CS timing extenstion
soc: mediatek: pwrap: add MediaTek MT6380 as one slave of pwrap
soc: mediatek: pwrap: refactor pwrap_init for the various PMIC types
soc: mediatek: pwrap: add pwrap_write32 for writing in 32-bit mode
soc: mediatek: pwrap: add pwrap_read32 for reading in 32-bit mode
dt-bindings: arm: mediatek: add MT7622 string to the PMIC wrapper doc
ARM: mediatek: Cocci spatch "of_table"
soc: mediatek: pwrap: fixup warnings from coding style
Many user space API headers have licensing information, which is either
incomplete, badly formatted or just a shorthand for referring to the
license under which the file is supposed to be. This makes it hard for
compliance tools to determine the correct license.
Update these files with an SPDX license identifier. The identifier was
chosen based on the license information in the file.
GPL/LGPL licensed headers get the matching GPL/LGPL SPDX license
identifier with the added 'WITH Linux-syscall-note' exception, which is
the officially assigned exception identifier for the kernel syscall
exception:
NOTE! This copyright does *not* cover user programs that use kernel
services by normal system calls - this is merely considered normal use
of the kernel, and does *not* fall under the heading of "derived work".
This exception makes it possible to include GPL headers into non GPL
code, without confusing license compliance tools.
Headers which have either explicit dual licensing or are just licensed
under a non GPL license are updated with the corresponding SPDX
identifier and the GPLv2 with syscall exception identifier. The format
is:
((GPL-2.0 WITH Linux-syscall-note) OR SPDX-ID-OF-OTHER-LICENSE)
SPDX license identifiers are a legally binding shorthand, which can be
used instead of the full boiler plate text. The update does not remove
existing license information as this has to be done on a case by case
basis and the copyright holders might have to be consulted. This will
happen in a separate step.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne. See the previous patch in this series for the
methodology of how this patch was researched.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Many user space API headers are missing licensing information, which
makes it hard for compliance tools to determine the correct license.
By default are files without license information under the default
license of the kernel, which is GPLV2. Marking them GPLV2 would exclude
them from being included in non GPLV2 code, which is obviously not
intended. The user space API headers fall under the syscall exception
which is in the kernels COPYING file:
NOTE! This copyright does *not* cover user programs that use kernel
services by normal system calls - this is merely considered normal use
of the kernel, and does *not* fall under the heading of "derived work".
otherwise syscall usage would not be possible.
Update the files which contain no license information with an SPDX
license identifier. The chosen identifier is 'GPL-2.0 WITH
Linux-syscall-note' which is the officially assigned identifier for the
Linux syscall exception. SPDX license identifiers are a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne. See the previous patch in this series for the
methodology of how this patch was researched.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The TBS A711 has a micro-USB connector that can be used in OTG mode. Enable
it.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The TBS A711 is using an AXP813 PMIC. Let's add all the regulators for that
board, and migrate the current, dumb, regulators to the actual ones.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The WiFi side of the AP6212 WiFi/BT combo module is connected to
mmc1. There are also GPIOs for enable and interrupts. An external
clock from the AC100 RTC is also used.
Enable WiFi on this board by enabling mmc1 and adding the power
sequencing clocks and GPIO, as well as the chip's interrupt line.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The WiFi side of the AP6330 WiFi/BT combo module is connected to
mmc1. There are also GPIOs for enable and interrupts. An external
clock from the AC100 RTC is also used.
Enable WiFi on this board by enabling mmc1 and adding the power
sequencing clocks and GPIO, as well as the chip's interrupt line.
For the WiFi module to correctly detect the frequency of its main
oscillator, the external low power clock must be set to 32768 Hz.
Their does not seem to be proper out-of-band interrupt support
for the BCM4330 chip within the AP6330 module. This part is left
out for now.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
mmc1 only has 1 possible pinmux setting.
Move any settings to the dtsi file and set it by default.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch adds device nodes for all the regulators of the AXP818 PMIC.
Sunxi common regulators are removed, and USB VBUS regulators are added.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch adds device nodes for all the regulators of the AXP813 PMIC.
Sunxi common regulators are removed, and USB VBUS regulators are added.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch adds device nodes for all the regulators of the AXP818 PMIC.
Sunxi common regulators are removed, and USB VBUS regulators are added.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The AXP81x family of PMIC is used with the Allwinner A83T and H8 SoCs.
This includes the AXP813 and AXP818. There is no discernible difference
except the labeling. The AXP813 is paired with the A83T, while the
AXP818 is paired with the H8.
This patch adds a dtsi file for all the common bindings for these two
PMICs. Currently this is just listing all the regulator nodes. The
regulators are initialized based on their device node names.
In the future this would be expanded to include power supplies and
GPIO controllers.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.
This patch restore all boards DT about dwmac-sun8i
This reverts partially commit fe45174b72 ("arm: dts: sunxi: Revert EMAC changes")
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Since dwmac-sun8i could use either an integrated PHY or an external PHY
(which could be at same MDIO address), we need to represent this selection
by a MDIO switch.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.
This patch restore sunxi-h3-h5.dtsi
This reverts partially commit fe45174b72 ("arm: dts: sunxi: Revert EMAC changes")
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add an additional symbol to the decompressor image, which will allow
future debugging of non-bootable problems similar to the one encountered
with the EFI stub.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
ARM depends on the macros '__ARMEL__' & '__ARMEB__' being defined
or not to correctly select or define endian-specific macros,
structures or pieces of code.
These macros are predefined by the compiler but sparse knows
nothing about them and thus may pre-process files differently
from what gcc would.
Fix this by passing '-D__ARMEL__' or '-D__ARMEB__' to sparse,
depending on the endianness of the kernel, like defined by GCC.
Note: In most case it won't change anything since most ARMs use
little-endian (but an allyesconfig would use big-endian!).
To: Russell King <linux@armlinux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Add flash and indicator LED phandles to the sensor node.
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
The patch d85a2d6143: "ARM: OMAP2+: Populate legacy resources for
dma and smartreflex" from Oct 10, 2017, leads to the following Smatch
complaint:
arch/arm/mach-omap2/omap_device.c:453 omap_device_copy_resources()
error: we previously assumed 'oh' could be null (see line 394)
Fixes: d85a2d6143: ("ARM: OMAP2+: Populate legacy resources for dma
and smartreflex")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
cm_split_idlest doesn't take the CM base offset into account right now,
causing it to read reserved registers which show idlestatus as active
always. This will cause the wait_module_ready functionality to be
effectively an expensive NOP, which will cause problems if the
module hasn't really activated during its execution. Fix by adding
the CM offset into the calculation so the wait_module_ready will
access correct register.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reported-by: Filip Matijevic <filip.matijevic.pz@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
MMC3 hwmod data is missing the module_offs definition. MMC3 belongs under
core, so add CORE_MOD for it.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As kbuild document & commit 6588169d51 says: KBUILD_{C,LD}FLAGS_MODULE are
used to add arch-specific options for $(CC) and $(LD). From commandline,
{C,LD}FLAGS_MODULE shall be used.
Doesn't have any functional change, but just follow kbuild rules.
Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com>
CC: Russell King <linux@armlinux.org.uk>
CC: linux-arm-kernel@lists.infradead.org
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Fixing an old stability issue on Cortex A9 based mvebu SoC
-----BEGIN PGP SIGNATURE-----
iIEEABECAEEWIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWfc2MCMcZ3JlZ29yeS5j
bGVtZW50QGZyZWUtZWxlY3Ryb25zLmNvbQAKCRALBhiOFHI71YpGAJ4+BErwNW+H
oIooiNUTpPxDzK/03ACfdYzf6IXFEf8FlbEyicsKOp1mFew=
=338i
-----END PGP SIGNATURE-----
Merge tag 'mvebu-fixes-4.14-3' of git://git.infradead.org/linux-mvebu into fixes
Pull "mvebu fixes for 4.14 (part 3)" from Gregory CLEMENT:
Fixing an old stability issue on Cortex A9 based mvebu SoC
* tag 'mvebu-fixes-4.14-3' of git://git.infradead.org/linux-mvebu:
ARM: dts: mvebu: pl310-cache disable double-linefill
- New board support: i.MX51 ZII RDU1, i.MX53 GE Healthcare PPD, i.MX6
TX modules for MB7 from Ka-Ro Electronics, i.MX6 Wandboard revd1
variants, i.MX6 LWN DISPLAY5 board, Pistachio i.MX6Q board, i.MX6SX
Vining-2000 board.
- Use the 'vpcie-supply' property for PCIe device for boards
imx6qdl-sabresd, imx6q-novena and imx6q-cm-fx6.
- A series from Jagan Teki to update imx6qdl-icore board with audio,
touch and CAN support.
- Switch to nvmem for accessing OCOTP from tempmon for i.MX6SX and add
tempmon support for i.MX6UL.
- A bunch of patches from Lothar Waßmann updating Ka-Ro i.MX28, i.MX53
and i.MX6 TX modules.
- Fix DTC warnings in i.MX device trees, dropping leading zeros from
unit address, correcting display nodes notation and display port
names, fixing nodes with unit name and no reg property.
- Other random device updates for various board support.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJZ7ypUAAoJEFBXWFqHsHzOpVkH/RsZ3IMg8O5tMO6uz1CNmutR
3EAXfBeQTnQZe2A/3XkDRpJWGiIniRSVAf6rYipmeyV9jV2Ff4vfiv5gnhg1ev+B
eV35W3gb3EclHKrHgHVMkfzWfNp63L1etdVFrY0QuMc0wQbch0TwO3TTPHpk0+AS
eauLOMY1qzRVnayzZ8IeTn++igsoj4KT1NmIprNKe66eDAOfWxO0IB26r0svKrhg
mIlqTUG1p6I/H8h6hQZuRJaLM9no3dHDcm7Scbf1y8Mvf5mPVTTHKXGLLyEVT/UB
SEWydfAt0VEAEA+Uk6pFJsrG1KRx0hwF46DHk2BXj7A1wxBsUIPnMSoMRWgGrZE=
=grKK
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Pull "i.MX device tree updates for 4.15" from Shawn Guo:
- New board support: i.MX51 ZII RDU1, i.MX53 GE Healthcare PPD, i.MX6
TX modules for MB7 from Ka-Ro Electronics, i.MX6 Wandboard revd1
variants, i.MX6 LWN DISPLAY5 board, Pistachio i.MX6Q board, i.MX6SX
Vining-2000 board.
- Use the 'vpcie-supply' property for PCIe device for boards
imx6qdl-sabresd, imx6q-novena and imx6q-cm-fx6.
- A series from Jagan Teki to update imx6qdl-icore board with audio,
touch and CAN support.
- Switch to nvmem for accessing OCOTP from tempmon for i.MX6SX and add
tempmon support for i.MX6UL.
- A bunch of patches from Lothar Waßmann updating Ka-Ro i.MX28, i.MX53
and i.MX6 TX modules.
- Fix DTC warnings in i.MX device trees, dropping leading zeros from
unit address, correcting display nodes notation and display port
names, fixing nodes with unit name and no reg property.
- Other random device updates for various board support.
* tag 'imx-dt-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (63 commits)
ARM: dts: imx53-tx53: fix interrupt flags
ARM: dts: imx28-tx28: fix interrupt flags
ARM: dts: display5: Device tree description of LWN's DISPLAY5 board
ARM: dts: imx53-qsb-common: Fix 'led_gpio7_7@0' node with unit name and no reg property
ARM: dts: imx53-m53evk: Fix 'led_gpio@0' node with unit name and no reg property
ARM: dts: imx53: Fix 'usbphy@x' node with unit name and no reg property
ARM: dts: imx51-ts4800: Fix 'port@0' node with unit name and no reg property
ARM: dts: imx51-apf51dev: Fix 'backlight@bl1' node with unit name and no reg property
ARM: dts: imx: add ZII RDU1 board
ARM: dts: imx: add support for TX6 modules on MB7 baseboard
ARM: dts: imx: add support for TX6QP
ARM: dts: imx6-tx6: add a .dtsi file for the MB7 baseboard
ARM: dts: imx6-tx6: move display configuration to .dtsi file
ARM: dts: imx6-tx6: add support for I2C bus recovery
ARM: dts: imx6-tx6: convert to using simple-audio-card
ARM: dts: imx6-tx6: specify ethernet phy reset post-delay
ARM: dts: imx6-tx6: improve ethernet related pinctrl setup
ARM: dts: imx6-tx6: add trickle-charge config for DS1339
ARM: dts: imx6-tx6: remove obsolete ipu1 alias
ARM: dts: imx6-tx6: remove obsolete eeti,egalax_ts
...
[arnd: made sure we have no new leading zeroes in unit address during merge]
- McASP support for K2G EVM
- I2C support for K2G EVM
- USB support for K2G EVM
- SPI & SPI NOR flash support for K2G EVM
- ECAP PWM support for K2G EVM
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZ6p7IAAoJEHJsHOdBp5c/jYgP/1iNiLSP4lIQeSjleJKt21+z
Sw62wLC5zJH8DxgOyUX+0p6pH5GpETTekVaIXQTT9h9JVFchleehDsFh5UHGcF+N
Q+B02DvDbHMSOrqYZ0JJWerKQqghS63NIPAfT+Loj0v8j7w3/iYeUQCb+aVHBlzx
/SYOfKi6C/7TzfDFnAurmsJ7jvIVLc3kKQlWLhraT/tSTsnfoOMflZnVzbcH2e1S
melKPVMiO5BSGoXZsMV+xI5AHNt88z4t0/cRVJo/xXXFbtn2JNWvL3Pwuk/6e2fm
dMDK4JQkaXNzgS07Szuxo1S1IE7+3Jl23o0nIHfmZkQ9ArgQZQH0AA+ZQqIgcSms
bUbWQCsgfYPbbOp0VLBPc5SiW/YoGLGhNe59zwK+x0d0EuXZNgoToUthpr01SJA8
YeRROa7ZAIEB+5D3is4H1c44t1tjGZekp+0ssIQAoU/c2X8MfcX8MqC8MceBEUOI
69JyM+u/AswLP6Kczvc/2KK9JbtKXwQwjbCbuvUHd5XM4wPKfvrWFfryfV09R6n2
/62QPULVGTwZJWN/FRisjRj3lUdamCzzNZ6uJSD8nfiAcQ4rOdzMQcv7K3BBuv87
FWq+NkOTR/1I3kXAjhNBJszZjrir/+Tu3rQ6F5LsoSl9Zx+LkPzt1BMvfEANJ5IF
8O7wxB3qu9sgPOrd+0Lc
=ynA8
-----END PGP SIGNATURE-----
Merge tag 'keystone_dts_for_4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt
Pull "ARM: Keystone DTS update for 4.15" from Santosh Shilimkar:
- McASP support for K2G EVM
- I2C support for K2G EVM
- USB support for K2G EVM
- SPI & SPI NOR flash support for K2G EVM
- ECAP PWM support for K2G EVM
* tag 'keystone_dts_for_4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ARM: dts: keystone-k2g-evm: add bindings for SPI NOR flash
ARM: dts: keystone-k2g: Add SPI nodes
ARM: dts: keystone-k2g-evm: Enable PWM ECAP0
ARM: dts: keystone-k2g: Add ECAP PWM DT nodes
ARM: dts: k2g-evm: Enable USB 0 and 1
ARM: dts: k2g: Add USB instances
ARM: dts: keystone-k2g-evm: Add I2C EEPROM DT entry
ARM: dts: keystone-k2g: Add I2C nodes
ARM: dts: keystone-k2g: Add McASP nodes
please pull the following:
- Eric adds support for the CLCD and PWM controller on Cygnus chis
- Loic fixes the console path on the Raspberry Pi 3 (already submitted as
fixes) and then proceeds with enabling the BCM43438 bluetooth chip on
the Raspberry Pi 3
- Rafal specifies the USB ports on the Luxul XWR-1200
- Dan adds support for the Luxul ABR-4500 based on BCM47094, the Luxul XAP-810
and XAP-1440 both based on BCM53573
- Florian adds support for the Broadcom Hurricane 2 SoC by adding general
machine binding, clock binding, SoC DTS include file and a DTS for the
Ubiquiti Networks UniFi Switch 8
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJZ6oyXAAoJEIfQlpxEBwcEZ9sQAIHxupdwbECNH1DJo0jWxqrC
bMAfx2yHyr/snPXq46E91QjRIGJLk/E2lMUS0xYWpxC2MRp0pZPFAVTc3qYKgI/9
dGOuJNsk1ZUhbys1BhgVuryYbc6ZSfxz8h5uUxdZ5CLxs9beAsaKDXablsN8Th3O
j5OEundSosZ1SPd+F9KNDURjRmfeUzhYlBuRZ2AfWvSJFYjn2cIDM9aCBnDSNYHh
Pxs03CF4uGM6DBReIcuG99NKtlaTFoD4v7Empb5i4F0sUNCefcGvhXeMDUBGPeRo
z0BDJ4LEBySDzTRd9NhekPC4DM7QsyTjGJz1JbW8FmsK+GnJx5uLMrEgXUtWbSou
bup1RHRaxAcpoTv0BTiPK0chfU63RgAqrvDw7wo8O17d06BHtyt0Z5tlv3Oc7OBP
4XhkSj6TmkD6WtQCQWY81jMZ6ezzxeZ/5kOIASAvKc1bh3ocbxpdQkNoxd0pASsI
o/CW14a0q0STEdYnF+Y6YGQziuAhRQH/8W6mBUeRfPxQQrG8NXPJoGArP9be1ikR
7mqUivV3pD1mA+3PiiD2fZ57hQRjTowr4bA+RarYxxg7TDu3kUFqkXm93aYXuBbm
UzyAZZ4LLbhlcIXIuwfoigoSmQaqUbEIMOqSW8v74PKJDOcSqBS+iZDD+hDSpbPA
XShAuXKwt3p6uSei3nib
=DmZ2
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.15/devicetree' of http://github.com/Broadcom/stblinux into next/dt
Pull "Broadcom devicetree changes for 4.15" from Florian Fainelli:
This pull request contains Broadcom ARM-based Device Tree changes for 4.15,
please pull the following:
- Eric adds support for the CLCD and PWM controller on Cygnus chis
- Loic fixes the console path on the Raspberry Pi 3 (already submitted as
fixes) and then proceeds with enabling the BCM43438 bluetooth chip on
the Raspberry Pi 3
- Rafal specifies the USB ports on the Luxul XWR-1200
- Dan adds support for the Luxul ABR-4500 based on BCM47094, the Luxul XAP-810
and XAP-1440 both based on BCM53573
- Florian adds support for the Broadcom Hurricane 2 SoC by adding general
machine binding, clock binding, SoC DTS include file and a DTS for the
Ubiquiti Networks UniFi Switch 8
* tag 'arm-soc/for-4.15/devicetree' of http://github.com/Broadcom/stblinux:
ARM: dts: Hurricane 2: Add basic support for Ubiquiti UniFi Switch 8
dt-bindings: Add Ubiquiti Networks vendor prefix
ARM: dts: Add Broadcom Hurricane 2 DTS include file
dt-bindings: Document Broadcom Hurricane 2 clocks
dt-bindings: Add documentation for Broadcom Hurricane 2 SoCs
ARM: dts: BCM53573: Add DT for Luxul XAP-1440
ARM: dts: BCM53573: Add DT for Luxul XAP-810
ARM: dts: BCM5301X: Add DT for Luxul ABR-4500
ARM: dts: BCM5301X: Add DT for Luxul XBR-4500
ARM: dts: BCM5301X: Specify USB ports for USB LED of Luxul XWR-1200
ARM: dts: bcm2837-rpi-3-b: Add bcm43438 serial slave
ARM: dts: bcm283x: Fix console path on RPi3
ARM: dts: cygnus: Add the PWM node
ARM: dts: cygnus: Add the CLCD controller
Adds support for the CEC controller found on Tegra124 and enables it on
Tegra K1.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlnp4hATHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoWS9EACVYLK4M0ZdBldmaOecm8WpdS9WlvI4
0VrStFue2cfIJcGff+/7pmlxyMmOsHp1J51mKOzipHYXfmKKns6mMhllO7gVrEBN
2QJx/UGFqz7lbVLAuVuyUIBmtIvFYJr9WYZB3FLaCjsxNKze1tLQC2MdJgB6lCZC
mO62xy+hNe3HYuSdUc86h5iyZVvph8NJ344BEVhvu0CDdRwyBp9zEmybIu//Bh/H
o7JeIbJbuffNfbfmB5ygRoPCpbIJ7emYjfqviPZzkE8dn+NKeIlfWT7FeEoj0+Oh
8NpD/LzTSyH2LUOzOmnGpS8VXq9SqkY8NbjIBj8nvVe++QOsSWMXmf2CDWNxht1r
B1U3ik/IbWX++JXhaSw+FpbN/LrCTZOvGNzGhILiyKFU5r4qtM53zkcbX/r71jHe
IxcQ+TwperCH4YsuhOtT2TzdNKyQjxkkfb4fX7D5WY5o3U7tIhzelNwuZQy0VS/w
c5Ee5+cmypVRmYUA3b7V4f9odmel2V2bsxw7zB3AuXj8PNJwwAIw647naJ30xJa4
f/OHYTKdq4NM0OdMmlqlIA4q1d32nkRLzYbsEwSaWdIOAdDA+NFnYMyIH39LzrUs
dLdRb5ESj3aJijO6lhb9g4Sa8t7JOIKIgGzSsXdVkKLRcrgR8ZkhHD/h5ZcQiDmT
31lTzYJAhV/ZmQ==
=kDQK
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.15-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Pull "ARM: tegra: Device tree changes for v4.15-rc1" from Thierry Reding:
Adds support for the CEC controller found on Tegra124 and enables it on
Tegra K1.
* tag 'tegra-for-4.15-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Enable CEC support on Jetson TK1
ARM: tegra: Add CEC support for Tegra124
* r8a77430 (RZ/G1M) SoC
- Add XHCI support to SoC DT. Boards may enable this as appropriate
* All Renesas ARM based SoCs
- Add missing clocks for ARM CPU cores
Geert Uytterhoeven says "This series improves DT hardware descriptions
for Renesas arm32 SoCs by adding missing clocks properties to the
device nodes corresponding to ARM CPU cores."
* R-Car Gen 1 and 2, and RZ/G SoCs
- Use R-Car Fallback compat strings for GPIO
Simon Horman says "Use newly added R-Car GPIO Gen 1, 2 and 3 fallback
compat strings in peace of now deprecated non-generation specific R-Car
GPIO fallback compat string in the DT of Renesas ARM and arm64 based
SoCs.
As noted in the changelogs for the r8a777[89] changes, this introduces
an incompatibility with pre-v4.14 kernels used with new DTBs. There is
no run-time effect for other SoCs updated by this changeset."
* r7s72100 (RZ/A1H) GR-Peach board
- Add pin configuration subnode for ETHER pin group.
This avoids relying on boot-loader configuration of these pins.
- Enable ostm0 and ostm1 timers
Jacopo Mondi says these are "to be used as clock source and clockevent
source. The timers provides greater accuracy than the already enabled
mtu2 one."
- Correct leds node name indent
- Enable MTU2 timer pulse unit
Jacopo Mondi says "MTU2 multi-function/multi-channel timer/counter is
not enabled for GR-Peach board. The timer is used as clock event source
to schedule wake-ups, and without this enabled all sleeps not performed
through busy waiting hang the board."
* r8a7743 (RZ/G1M) iW-RainboW-G20M-Qseven SoM
- Add USB function support
* r8a7745 (RZ/G1E) iW-RainboW-G22D development platform
- Add USB2.0 Host support
* r8a7743 (RZ/G1M) iW-RainboW-G20D-Qseven development platform
- Rework DT architecture and add DT for camera DB
Fabrizio Castro says "Some of the serial interfaces are exposed on the
camera daughter board. The camera daughter board can be connected to
the carrier board by means of expansion connectors 1, 2 and 3. The
carrier board may host an RZ/G1M or an RZ/G1N based SoM.
While adding support for the serial interfaces on the camera daughter
board we faced the dilemma of how to properly describe all of the
possible HW configurations and how to maximize code reuse.
The best option would be to use device tree overlays, however there is
still some work to be done on that front before actually using them,
therefore for the time being we decided to provide .dtsi files to
describe the carrier board and the camera daughter board, and provide
.dts files to describe the HW configurations we need to support."
* r8a779[0-4] R-Car Gen2 SoCs
- Use generic node name for VSP1 nodes
Geert Uytterhoeven says "This patch series replaces the specific node
names used for the VSP1 nodes by the preferred generic node names, cfr.
commit 0e1bfb72b0 ("v4l: vsp1: Use generic node name")."
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlnpyZ4ACgkQ189kaWo3
T74hdw//TFy3jIbO2Uc6lk/dPDgDTY9su+acosM496PjUWu1a0qxc6haEfbQzz/t
Tz6jCKaqOa7V/v+44vye00sU/iG22DJum7S+Hq2bBPrhOYWUcUxU1r7uwFC1+/TL
L9hk/fNqUkkB1C/8mOjrQUsnVLUt8uYIu3jPTjfrStyL1on2SnrCxi4y6sxZLFpc
nv8hcAk61iBW8JfC66g0Hx2eChd9aJBhRFYh3SIpzeeKMufRn8NeeUlK1/DSbLW9
GYWYyC5bw8Ie7JvzrucY9pp4MFtmxmObPlUKoZrpikrFv0ZCMoW3z27ZhU4ooFhd
aPMy4I+mbT5Ua+KzeIQiG+HftLuNrYZqiqg92h1MRdUoTCug9u531Y0sN/qAn1sN
XJZ4NK+yY8V8mJGgFIeXF0qSNlzynpHd44HO4cEGtXP5RlgQFIu+vhhEV0hOO86p
3jbI35ATPcYjmBXY3tDQhPp0WxL/zgspX3YqRtgYGHa50XtcVMAt8Z2oA4PotTgY
hfStHKR9nLsf1TMUv7kqbH/T4mujVOnIMJ2zd85S8Pujdt5mdEyrUChKTlXPzCZg
nTigppy8hIYGix24b5guOMfh4HPEenTWNQS2vZ687r2DwayKYTAV4bJTPEpxckoj
rxnoGDJjt7Hfc8cTIjPSalOgS5UjweRaGIvihxg43qyRKtkyxjg=
=Y3FX
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt2-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Second Round of Renesas ARM Based SoC DT Updates for v4.15" from Simon Horman:
* r8a77430 (RZ/G1M) SoC
- Add XHCI support to SoC DT. Boards may enable this as appropriate
* All Renesas ARM based SoCs
- Add missing clocks for ARM CPU cores
Geert Uytterhoeven says "This series improves DT hardware descriptions
for Renesas arm32 SoCs by adding missing clocks properties to the
device nodes corresponding to ARM CPU cores."
* R-Car Gen 1 and 2, and RZ/G SoCs
- Use R-Car Fallback compat strings for GPIO
Simon Horman says "Use newly added R-Car GPIO Gen 1, 2 and 3 fallback
compat strings in peace of now deprecated non-generation specific R-Car
GPIO fallback compat string in the DT of Renesas ARM and arm64 based
SoCs.
As noted in the changelogs for the r8a777[89] changes, this introduces
an incompatibility with pre-v4.14 kernels used with new DTBs. There is
no run-time effect for other SoCs updated by this changeset."
* r7s72100 (RZ/A1H) GR-Peach board
- Add pin configuration subnode for ETHER pin group.
This avoids relying on boot-loader configuration of these pins.
- Enable ostm0 and ostm1 timers
Jacopo Mondi says these are "to be used as clock source and clockevent
source. The timers provides greater accuracy than the already enabled
mtu2 one."
- Correct leds node name indent
- Enable MTU2 timer pulse unit
Jacopo Mondi says "MTU2 multi-function/multi-channel timer/counter is
not enabled for GR-Peach board. The timer is used as clock event source
to schedule wake-ups, and without this enabled all sleeps not performed
through busy waiting hang the board."
* r8a7743 (RZ/G1M) iW-RainboW-G20M-Qseven SoM
- Add USB function support
* r8a7745 (RZ/G1E) iW-RainboW-G22D development platform
- Add USB2.0 Host support
* r8a7743 (RZ/G1M) iW-RainboW-G20D-Qseven development platform
- Rework DT architecture and add DT for camera DB
Fabrizio Castro says "Some of the serial interfaces are exposed on the
camera daughter board. The camera daughter board can be connected to
the carrier board by means of expansion connectors 1, 2 and 3. The
carrier board may host an RZ/G1M or an RZ/G1N based SoM.
While adding support for the serial interfaces on the camera daughter
board we faced the dilemma of how to properly describe all of the
possible HW configurations and how to maximize code reuse.
The best option would be to use device tree overlays, however there is
still some work to be done on that front before actually using them,
therefore for the time being we decided to provide .dtsi files to
describe the carrier board and the camera daughter board, and provide
.dts files to describe the HW configurations we need to support."
* r8a779[0-4] R-Car Gen2 SoCs
- Use generic node name for VSP1 nodes
Geert Uytterhoeven says "This patch series replaces the specific node
names used for the VSP1 nodes by the preferred generic node names, cfr.
commit 0e1bfb72b0 ("v4l: vsp1: Use generic node name")."
* tag 'renesas-dt2-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (42 commits)
ARM: dts: r8a7743: Add xhci support to SoC dtsi
ARM: dts: r7s72100: Add clock for CA9 CPU core
dt-bindings: clk: r7s72100: Add missing I and G clocks
ARM: dts: sh73a0: Add clocks for CA9 CPU cores
ARM: dts: r8a7794: Add missing clock for secondary CA7 CPU core
ARM: dts: r8a7793: Add missing clock for secondary CA15 CPU core
ARM: dts: r8a7792: Add missing clock for secondary CA15 CPU core
ARM: dts: r8a7791: Add missing clock for secondary CA15 CPU core
ARM: dts: r8a7790: Add clocks for CA7 CPU cores
ARM: dts: r8a7790: Add missing clocks for secondary CA15 CPU cores
ARM: dts: r8a7779: Add clocks for CA9 CPU cores
ARM: dts: r8a7778: Add clock for CA9 CPU core
ARM: dts: r8a7743: Add missing clock for secondary CA15 CPU core
ARM: dts: r8a73a4: Add clock for CA15 CPU0 core
ARM: dts: r8a7794: Use R-Car GPIO Gen2 fallback compat string
ARM: dts: r8a7793: Use R-Car GPIO Gen2 fallback compat string
ARM: dts: r8a7792: Use R-Car GPIO Gen2 fallback compat string
ARM: dts: r8a7791: Use R-Car GPIO Gen2 fallback compat string
ARM: dts: r8a7790: Use R-Car GPIO Gen2 fallback compat string
ARM: dts: r8a7743: Use R-Car GPIO Gen2 fallback compat string
...
The most notable changes are:
- Conversion to the last SoC (A10, A20) to the new clock framework
- HDMI and dual pipeline support for the A10, A20 and A31 DRM driver
- Support for the various power supplies on a number of boards
- Fix of DTC warnings on a number of SoCs, but most of them still need
some work
- New boards: A20-OLinuXino-MICRO-eMMC, TBS A711, Banana Pi M2 Berry,
Banana Pi M2 Ultra
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJZ6avvAAoJEBx+YmzsjxAgQ9MP/RvW5lGwVg8Y6aIEr8pGBNCO
pNiQkBToR5HQnCPTBzNfspoaR8w/8H344AGS56+tzjFIF1P2cawzOxEn1oUrOcbM
mAuSUzekpBoKbad2vXsL6uwY2qo3fv62+I72edZkQ4tSEGLK6ISA49sKzhIfFP/2
7K92nP9xodKfMu/pn74/jxzSqcOKXDRSsj1Eyht5KL0oiSmwPgZfCFz+ITE5lozt
mzh19qTdxabXZZ4CxVRCBPz/+p6+lmbnIgh8anjcL0YgLN96B1rly3bqAvAmgw7H
Bv6nxRhNlEGwvQasgHiSQM7AaVONfPK6WUdDI5Wrpch7de4aFt/Bpz676zeDWWUt
dH3Nix8z4AAIma1Yw5CM3fJaPY7vKiL8TlWmSzu2Gc+fb1jGIVf/yvDlV9Gu3g6I
JE6YoQmUDC3Sw2q2fvrCokjGTr24u6Er+mBt7u0qGmv7dx70jTBIosXsGwfcwtj2
iKGCjbfRU6rzui+YGEgktCz6m8LIdm5T2BkS93hgfVWJPL7oxmDd+rRon2N196ni
JhM8ieTHrow7Mb365FK66Xa4KK8emhLhH7wubo2l9x5uIfr4iu61gv0rOhAppoCC
Cop3YyHk1H7SlSUP0tbN2pc36x2wMoPDfAy1MsZNzuD3VXVd//wf9z1c07oL22XA
TXkVd4c39WYRx6MZlQ7+
=HjP6
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Pull "Allwinner DT changes for 4.15" from Maxime Ripard:
The most notable changes are:
- Conversion to the last SoC (A10, A20) to the new clock framework
- HDMI and dual pipeline support for the A10, A20 and A31 DRM driver
- Support for the various power supplies on a number of boards
- Fix of DTC warnings on a number of SoCs, but most of them still need
some work
- New boards: A20-OLinuXino-MICRO-eMMC, TBS A711, Banana Pi M2 Berry,
Banana Pi M2 Ultra
- New R40 SoC support
* tag 'sunxi-dt-for-4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (63 commits)
ARM: sun8i: r40: enable USB host for Banana Pi M2 Ultra
ARM: sun8i: v40: add 5V regulator for Banana Pi M2 Berry
ARM: sun8i: r40: add 5V regulator for Banana Pi M2 Ultra
ARM: sun8i: r40: add USB host port nodes for R40
ARM: dts: sun4i: Enable HDMI support on some A10 devices
ARM: dts: sun7i: Enable HDMI support on some A20 devices
ARM: dts: sun7i: Add device nodes for display pipelines
ARM: dts: sun4i: Add device nodes for display pipelines
ARM: dts: sun8i: r40: add watchdog device node
ARM: dts: sun5i: reference-design-tablet: Enable AXP209 AC and battery
ARM: dts: sun9i: Change node names to remove underscores
ARM: dts: sun9i: Change node names to remove underscores
ARM: dts: sun4i: Remove underscores from nodes names
ARM: dts: sun4i: Provide default muxing for relevant controllers
ARM: dts: sun4i: Change pinctrl nodes to avoid warning
ARM: dts: sun6i: Enable HDMI support on some A31/A31s devices
ARM: dts: sun6i: Add device node for HDMI controller
ARM: dts: sun4i: Change LRADC node names to avoid warnings
ARM: dts: sun4i: Remove skeleton and memory to avoid warnings
ARM: dts: sun4i: Remove gpio-keys warnings
...
- add SMP support to Meson8/8b
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAln2AfgACgkQWTcYmtP7
xmXP+A//U3cBORd3lkmaVxGzcul/IB0czVH1XJp+WgMi2ksuin3UjveANFFxIUtL
cqBBNV23+PDjgFZF+SAbuEMIyWKoxvuxJ6ktKoP3N9MQsyb2yM9t2ITDfGCcHQ/E
xu5vjuYDqfjpowLcDE2yFTZbDV980gc7QyJvhwX9Bcxod+KfXz7C60J57qxRar0C
F5ViskncTvka3NlQGcCvZz0Wd1J5rMcBncmWpqQPKTyKg22gqbYgISHOWay6h6G4
otNhcnN4FeVgem9v/k1BUe6edIO9CQrhIITFdnT6B6NxmpQ2rFvK/hwboqOFRoL/
6v8nHtV3SIkxHiT06slkNeXvLKDGBr/3pFzswz/pPDXKiIJpeVbwFrFBv6L6V2Bz
P0MdbRFEO8KODud8Z+ZTl3Gwqlv/8ISb18dOuxaPtK/cbNzffrmZqwvNe6IfkVGW
zQrxnknxoLHb07lQ1lRHQiwHvmOdlK5l/9VVVE07fRUbIvR05JdX0KhU/1rs3dPv
Gsu25nb5Jn59rWTlRzw0O9P5ER/AMObfjsMMhF/Fj8bzcLGSJVhrNXGtWQ/+D20I
zsDJOfoWiwIa1ezoY7S8nIj0sNz5Xp14+MMOw2Wz0L1lXGla9qJsUNQANlI933Uz
zXwDSGLEhLkaNwvOXLXNVPnnTkenNeDPPeaBJ7FuJo5o/1UxQOs=
=1tXJ
-----END PGP SIGNATURE-----
Merge tag 'amlogic-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/soc
Pull "Amlogic SoC updates for v4.15" from Kevin Hilman:
- add SMP support to Meson8/8b
* tag 'amlogic-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: meson: enable MESON_IRQ_GPIO in Kconfig for meson8b
ARM: meson: Add SMP bringup code for Meson8 and Meson8b
ARM: smp_scu: allow the platform code to read the SCU CPU status
ARM: smp_scu: add a helper for powering on a specific CPU
dt-bindings: Amlogic: Add Meson8 and Meson8b SMP related documentation
- A series from Marco Franchi from to clean up build warnings see with
W=1 in arch/arm/mach-imx/.
- Move i.MX6 speed grading check from i.MX platform code to cpufreq
driver. The patch is suggested by cpufreq folks to go through
arm-soc tree.
- Enable cpuidle support on i.MX6DL starting from IMX_CHIP_REVISION_1_1.
- Constify platform_suspend_ops for MXS platform.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJZ7yAPAAoJEFBXWFqHsHzO2/AH/jLMgZBJgOG/EhKeocAcvuGH
UO6ST/Cj+R/2X0Yof4toiCfksflsDj8rGdGMchNjUsoPdApHcsyjJgGrDfo0j4uV
3eBn9tw0YmgEIA68R5QyTXbmm79cq0JmiJtzKMoKkX+fzNjrkNur0gfZYkiNNL+z
DEEufvv2HbTbgqTVKK+/DjDySsN/Ez8vVZwJMNY43zx6T4RB7TSvsAyRa6nTAOTM
Em4pC28IztGLk4uZYJspsKS4qx5FK9kskheUpMqbv1ra6PwHslYklvswSD36kPcw
xpAFQ35XuAGpsvjqgXN+4ACL8H7SyTXEZwbHbiJVps86S5C4FyOvNUfm1QIPqzs=
=tPmd
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
Pull "i.MX SoC changes for 4.15" from Shawn Guo:
- A series from Marco Franchi from to clean up build warnings see with
W=1 in arch/arm/mach-imx/.
- Move i.MX6 speed grading check from i.MX platform code to cpufreq
driver. The patch is suggested by cpufreq folks to go through
arm-soc tree.
- Enable cpuidle support on i.MX6DL starting from IMX_CHIP_REVISION_1_1.
- Constify platform_suspend_ops for MXS platform.
* tag 'imx-soc-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
cpufreq: imx6q: Move speed grading check to cpufreq driver
ARM: imx: Enable cpuidle for i.MX6DL starting at 1.1
ARM: imx: mach-mx31lite: Make mx31lite_map_io static
ARM: imx: cpuidle-imx5: Include "cpuidle.h" header file
ARM: imx: 3ds-debugboard: Include "3ds_debugboard.h" header file
ARM: imx: imx31moboard: Include "board-mx31moboard.h" header file
ARM: mxs: constify platform_suspend_ops
part), please pull the following:
- Florian adds support for the Broadcom Hurricane 2 SoC machine entry point
and defines the debug UART address for use with earlyprintk/DEBUG_LL
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJZ6otTAAoJEIfQlpxEBwcEO8MP/31sG8GF6YLjezPZI4VGdJMN
n9Fgvy0DjNTXExq158fx+DllP3ecpWF8yimXuE/FO3LBauOfVKFpLKwh10GJFTmS
3TsI37sKQj5MgaTuVGW1otnQIoupX3Teze9MyquHooEY69Xwsehyo1rfagfXNllb
1STRE1uluChwlLIoLV3fY74U+bij9gxROMRU5MaG87z4tGgYXuO5nYCl7oaJCNZ1
gPKUsUj5OZD5OTDnE4qXyPEgR7bUr6wemLYYlfu0LOKOCHTfALV7pfJmXmeLF70z
5G65BT5eSBa8nAb28Z7LjUiwipSiHiam9jnmiiG5LRoXQ8NKeQmfyrF++ljUlk19
MurzmZIEdCVRk+Htxohf2PyBc+TvgDJ0Wy9rp6h8k18KeJvmlT4z4CHg1QFTyr4F
u6PC8i1TCtb53iqbXixu1ax60X5L/ygRyNfvk7R7VU45VIjnMb9IoAZdoqYYj5Gh
yXNuyEXDRMLfvc5niE9lSTeDw+2Hby1ZO3+M6l15cIJ4z4s/kzQOnbpzxnOFwK5n
0xLhOTsMFNuvJImU6v/slzX8pM2JFgEebKImzBq2ybF3Gnh+sv9kZf+RmZtAhiH0
h56BIN5v2lSv8EkT64t6cfwm58HqXI6bAKuUHTdwe+vbDeW4CkT1NJaF7KzlYULy
mmLleC8JdOWrBNFUC2Tn
=OjEl
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.15/soc-part2' of http://github.com/Broadcom/stblinux into next/soc
Pull "Broadcom soc changes for 4.15 (part 2)" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoC changes for 4.15 (second
part), please pull the following:
- Florian adds support for the Broadcom Hurricane 2 SoC machine entry point
and defines the debug UART address for use with earlyprintk/DEBUG_LL
* tag 'arm-soc/for-4.15/soc-part2' of http://github.com/Broadcom/stblinux:
ARM: debug: Add Hurricane 2 UART2 debug addresses
ARM: bcm: Add support for Broadcom Hurricane 2 SoC
- Turn on DRM_DW_HDMI_CEC option to get HDMI CEC support.
- Enable MUX_MMIO to get ADV7180 probe on Gateworks GW51xx boards.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJZ7y5xAAoJEFBXWFqHsHzOnuIH/0ftbQ5pKFdWZ4y/UiR5JpYA
hYz2RlgS4m3DbrC8xC8b6MGRBeLr7clSxXlnXfpyASZVmfYhDNaoMFdKtTJpSYxe
rnvhi1ePhb2oq4orjPFzM212eFoIhKEzvwdNyMyLlHM9xqoBGLkcHDJ/6pt96car
JkCoFtQgpy4i0FAV+HNtuE//n0hQAWzXJ7E8Nc00pkwuzWA1HQC1GyAOzsSaIGyR
dQxCxiL9AZGVD8awUnFb39Hme1FIZaP+taz+JFFuTLNE+c/0xQDUi4BTpJxiyWKK
rQrZ1ZUHMOJZ7h55G46paahSqVwN/bxq8nTXoPnaVPHQc+pFOS9X5aUzZKczOJU=
=8Xwg
-----END PGP SIGNATURE-----
Merge tag 'imx-defconfig-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
Pull "i.MX defconfig updates for 4.15" from Shawn Guo:
- Turn on DRM_DW_HDMI_CEC option to get HDMI CEC support.
- Enable MUX_MMIO to get ADV7180 probe on Gateworks GW51xx boards.
* tag 'imx-defconfig-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx_v6_v7_defconfig: Select the CEC driver
ARM: imx_v6_v7_defconfig: Select CONFIG_MUX_MMIO
A bunch of patches for the sunxi documentation and mach-sunxi. The most
notable feature is the introduction of the R40 support.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJZ6alxAAoJEBx+YmzsjxAg518P/2GKSpQu/vnttFl4ofOYGGhR
2D3avz5fuCBeZxVtYi0Iqc6YSMR8yuh9UUNdCMqJWmHhF8ULd61MeliK9MCQ5EDe
zini3rwQuI1XX2k7ICXhdORjtyZzaf5go/OZ3jIurrEGYlzSW8HPXBh2X3OyjoNr
xThbXC5oC6VHIFLOYQd6OoRR85ssP0yN/V8c8WlWBMyNnC/K8NhGFK0vdt2b7HEp
1C01/DVmduVOhCsAGVoIYYxBNi662IYrSPbh1TKMiPIjnrVkyxDZBkBADCOFFImb
CCcyUNz44+XnToYCHNKblOmNnh6HQ6heggXZa2761+hYAgULA/6W/nYjYJCzHfT3
uFT4sVG3uXM0O4g+TDqL26Qatc/Lmitv/tIe2tpVvRX9UJhXopqk414GUf4upYc+
cIRKvNmUvhV5QkyGFdiJZpNmGK5uTzWpFO6RJjpGx78uswcISASa+lgZ2jEmNmjP
a7l8mat4YvI+DIwcPnpQ7hneB2wRaGOFjO6U9OD+CcyhOC1c52G6yiHNZlZCp/si
ZOSOf+1OWB4qWhsB+BGp5t8sVRhvyQe6brC+PAkhnrvQs8AKp9i/f772f0n+nsPj
btFuE7zKygSA0cLdUty0eu6gPv+LM7p+SR3T/2v8MJHLWcQW9Q6m/r4hqHf2LXF+
JME22AEp2AZ9IED/YmlB
=2O2j
-----END PGP SIGNATURE-----
Merge tag 'sunxi-core-for-4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/soc
Pull "Allwinner core changes for 4.15" from Maxime Ripard:
A bunch of patches for the sunxi documentation and mach-sunxi. The most
notable feature is the introduction of the R40 support.
* tag 'sunxi-core-for-4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: sunxi: add support for R40 SoC
ARM: sunxi: fix the core number of V3s in sunxi README
dt-bindings: add compatible string for Allwinner V3s SoC
We now handle the open drain mode internally in the I2C GPIO
driver, but we will get warnings from the gpiolib that we
override the default mode of the line so it becomes open
drain.
We can fix all in-kernel users by simply passing the right
flag along in the descriptor table, and we already touched
all of these files in the series so let's just tidy it up.
Cc: Steven Miao <realmz6@gmail.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Acked-by: Wu, Aaron <Aaron.Wu@analog.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This converts the GPIO-based I2C-driver to using GPIO
descriptors instead of the old global numberspace-based
GPIO interface. We:
- Convert the driver to unconditionally grab two GPIOs
from the device by index 0 (SDA) and 1 (SCL) which
will work fine with device tree and descriptor tables.
The existing device trees will continue to work just
like before, but without any roundtrip through the
global numberspace.
- Brutally convert all boardfiles still passing global
GPIOs by registering descriptor tables associated with
the devices instead so this driver does not need to keep
supporting passing any GPIO numbers as platform data.
There is no stepwise approach as elegant as this, I
strongly prefer this big hammer over any antsteps for this
conversion. This way the old GPIO numbers go away and
NEVER COME BACK.
Special conversion for the different boards utilizing
I2C-GPIO:
- EP93xx (arch/arm/mach-ep93xx): pretty straight forward as
all boards were using the same two GPIO lines, just define
these two in a lookup table for "i2c-gpio" and register
these along with the device. None of them define any
other platform data so just pass NULL as platform data.
This platform selects GPIOLIB so all should be smooth.
The pins appear on a gpiochip for bank "G" as pins 1 (SDA)
and 0 (SCL).
- IXP4 (arch/arm/mach-ixp4): descriptor tables have to
be registered for each board separately. They all use
"IXP4XX_GPIO_CHIP" so it is pretty straight forward.
Most board define no other platform data than SCL/SDA
so they can drop the #include of <linux/i2c-gpio.h> and
assign NULL to platform data.
The "goramo_mlr" (Goramo Multilink Router) board is a bit
worrisome: it implements its own I2C bit-banging in the
board file, and optionally registers an I2C serial port,
but claims the same GPIO lines for itself in the board file.
This is not going to work: there will be competition for the
GPIO lines, so delete the optional extra I2C bus instead, no
I2C devices are registered on it anyway, there are just hints
that it may contain an EEPROM that may be accessed from
userspace. This needs to be fixed up properly by the serial
clock using I2C emulation so drop a note in the code.
- KS8695 board acs5k (arch/arm/mach-ks8695/board-acs5.c)
has some platform data in addition to the pins so it needs to
be kept around sans GPIO lines. Its GPIO chip is named
"KS8695" and the arch selects GPIOLIB.
- PXA boards (arch/arm/mach-pxa/*) use some of the platform
data so it needs to be preserved here. The viper board even
registers two GPIO I2Cs. The gpiochip is named "gpio-pxa" and
the arch selects GPIOLIB.
- SA1100 Simpad (arch/arm/mach-sa1100/simpad.c) defines a GPIO
I2C bus, and the arch selects GPIOLIB.
- Blackfin boards (arch/blackfin/bf533 etc) for these I assume
their I2C GPIOs refer to the local gpiochip defined in
arch/blackfin/kernel/bfin_gpio.c names "BFIN-GPIO".
The arch selects GPIOLIB. The boards get spiked with
IF_ENABLED(I2C_GPIO) but that is a side effect of it
being like that already (I would just have Kconfig select
I2C_GPIO and get rid of them all.) I also delete any
platform data set to 0 as it will get that value anyway
from static declartions of platform data.
- The MIPS selects GPIOLIB and the Alchemy machine is using
two local GPIO chips, one of them has a GPIO I2C. We need
to adjust the local offset from the global number space here.
The ATH79 has a proper GPIO driver in drivers/gpio/gpio-ath79.c
and AFAICT the chip is named "ath79-gpio" and the PB44
PCF857x expander spawns from this on GPIO 1 and 0. The latter
board only use the platform data to specify pins so it can be
cut altogether after this.
- The MFD Silicon Motion SM501 is a special case. It dynamically
spawns an I2C bus off the MFD using sm501_create_subdev().
We use an approach to dynamically create a machine descriptor
table and attach this to the "SM501-LOW" or "SM501-HIGH"
gpiochip. We use chip-local offsets to grab the right lines.
We can get rid of two local static inline helpers as part
of this refactoring.
Cc: Steven Miao <realmz6@gmail.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Ben Dooks <ben.dooks@codethink.co.uk>
Cc: Heiko Schocher <hs@denx.de>
Acked-by: Wu, Aaron <Aaron.Wu@analog.com>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
After finding out there are active users of this sensor I noticed:
- It has a single PXA27x board file using the platform data
- The platform data is only used to carry two GPIO pins, all other
fields are unused
- The driver does not use GPIO descriptors but the legacy GPIO
API
I saw we can swiftly fix this by:
- Killing off the platform data entirely
- Define a GPIO descriptor lookup table in the board file
- Use the standard devm_gpiod_get() to grab the GPIO descriptors
from either the device tree or the board file table.
This compiles, but needs testing.
Cc: arm@kernel.org
Cc: Marco Franchi <marco.franchi@nxp.com>
Cc: Davide Hug <d@videhug.ch>
Cc: Jonathan Cameron <jic23@cam.ac.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Marco Franchi <marco.franchi@nxp.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Meson6, Meson8 and Meson8b use a similar IP block which has access to
512 bytes of efuse data.
During SoC manufacturing some calibration settings for the CVBS
connector and the internal temperature sensor are written to this efuse.
On some boards it additionally stores for example the MAC addresses.
The efuse is enabled on Meson8 and Meson8b but kept disabled on Meson6
since we do not have a clock driver there (which is required to read
data from the efuse).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Booting the secondary CPU cores involves the following nodes/devices:
- SCU (Snoop-Control-Unit, for which we already have a DT node)
- a reset line for each CPU core, provided by the reset-controller
which is built into the clock-controller
- the PMU (power management unit) which controls the power of the CPU
cores
- a range in the SRAM specifically reserved for booting secondary CPU
cores
- the "enable-method" which activates booting the secondary CPU cores
This adds all required nodes and properties to boot the secondary CPU
cores.
Signed-off-by: Carlo Caione <carlo@caione.org>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Linus Lüssing <linus.luessing@c0d3.blue>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Booting the secondary CPU cores involves the following nodes/devices:
- SCU (Snoop-Control-Unit, for which we already have a DT node)
- a reset line for each CPU core, provided by the reset-controller
which is built into the clock-controller
- the PMU (power management unit) which controls the power of the CPU
cores
- a range in the SRAM specifically reserved for booting secondary CPU
cores
- the "enable-method" which activates booting the secondary CPU cores
This adds all required nodes and properties to boot the secondary CPU
cores.
Suggested-by: Carlo Caione <carlo@caione.org>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This adds the necessary SMP-operations and startup code to use the
additional cores on the Amlogic Meson8/Meson8m2 (both are using the same
sequence) and Meson8b (using a slightly difference sequence) SoCs.
Signed-off-by: Carlo Caione <carlo@endlessm.com>
[add Meson8/Meson8m2 support and allow taking CPU cores offline as well]
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
On Amlogic Meson8 / Meson8m2 (both Cortex-A9) and Meson8b (Cortex-A5)
the CPU hotplug code needs to wait until the SCU status of the CPU that
is being taken offline is SCU_PM_POWEROFF.
Provide a utility function (which can be invoked for example from
.cpu_kill()) which allows reading the SCU status of a CPU.
While here, replace the magic number 0x3 with a preprocessor macro
(SCU_CPU_STATUS_MASK) so we don't have to duplicate this magic number in
the new function.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
To boot the secondary CPUs on the Amlogic Meson8/Meson8m2 (Cortex-A9)
and Meson8b (Cortex-A5) SoCs we have to enable SCU mode SCU_PM_NORMAL,
otherwise the secondary cores will not start.
This patch adds a scu_cpu_power_enable() function which can be used to
enable SCU_PM_NORMAL for a specific (logical) CPU. An internal helper
function is also created, to avoid code duplication with
scu_power_mode().
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQEcBAABAgAGBQJZ8uDpAAoJELDendYovxMvnYAH/iYlLBkNhw2yLScYxMNuMo60
8W82/70UNdC2ZIWlIKQSDsvlU0Omy9Iu51zBrE6SEVKpISxrOvtYO5JiaZGhPAqY
2/Jpeuawdm44uaFPFwajLRsHIhgyuAxMxj7Y+TLFGW/+X6FrmFg5G3CNt5pRf0Ah
xraD8O5MYG6FfqxftCLMD8cKlxqslZwZUFuf5CjxSKbw4HTWcTEA7a86toONUI9L
hJjmAD6VRW/PgEVrLklQBRRwiSsV1nyBLrY5Q+sSEy9BGGvblO/yEEg8uO6sYmJ0
a9bycTASUbisV1LvCp7HcHFn6h60CZV2XwNgwRaToEF8ebycAw5hq6l7t8pFTNI=
=EvbJ
-----END PGP SIGNATURE-----
Merge tag 'for-linus-4.14c-rc7-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip
Pull xen fixes from Juergen Gross:
- a fix for the Xen gntdev device repairing an issue in case of partial
failure of mapping multiple pages of another domain
- a fix of a regression in the Xen balloon driver introduced in 4.13
- a build fix for Xen on ARM which will trigger e.g. for Linux RT
- a maintainers update for pvops (not really Xen, but carrying through
this tree just for convenience)
* tag 'for-linus-4.14c-rc7-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip:
maintainers: drop Chris Wright from pvops
arm/xen: don't inclide rwlock.h directly.
xen: fix booting ballooned down hvm guest
xen/gntdev: avoid out of bounds access in case of partial gntdev_mmap()
rwlock.h should not be included directly. Instead linux/splinlock.h
should be included. One thing it does is to break the RT build.
Cc: Stefano Stabellini <sstabellini@kernel.org>
Cc: xen-devel@lists.xenproject.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Under heavy system stress mvebu SoC using Cortex A9 sporadically
encountered instability issues.
The "double linefill" feature of L2 cache was identified as causing
dependency between read and write which lead to the deadlock.
Especially, it was the cause of deadlock seen under heavy PCIe traffic,
as this dependency violates PCIE overtaking rule.
Fixes: c8f5a878e5 ("ARM: mvebu: use DT properties to fine-tune the L2 configuration")
Cc: stable@vger.kernel.org
Signed-off-by: Yan Markman <ymarkman@marvell.com>
Signed-off-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Nadav Haklai <nadavh@marvell.com>
[gregory.clement@free-electrons.com: reformulate commit log, add Armada
375 and add Fixes tag]
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The local variable "bus" will eventually be set to an appropriate pointer
a bit later. Thus omit the explicit initialisation at the beginning.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add a jump target so that a bit of exception handling can be better reused
at the end of this function.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Please do not apply this to mainline directly, instead please re-run the
coccinelle script shown below and apply its output.
For several reasons, it is desirable to use {READ,WRITE}_ONCE() in
preference to ACCESS_ONCE(), and new code is expected to use one of the
former. So far, there's been no reason to change most existing uses of
ACCESS_ONCE(), as these aren't harmful, and changing them results in
churn.
However, for some features, the read/write distinction is critical to
correct operation. To distinguish these cases, separate read/write
accessors must be used. This patch migrates (most) remaining
ACCESS_ONCE() instances to {READ,WRITE}_ONCE(), using the following
coccinelle script:
----
// Convert trivial ACCESS_ONCE() uses to equivalent READ_ONCE() and
// WRITE_ONCE()
// $ make coccicheck COCCI=/home/mark/once.cocci SPFLAGS="--include-headers" MODE=patch
virtual patch
@ depends on patch @
expression E1, E2;
@@
- ACCESS_ONCE(E1) = E2
+ WRITE_ONCE(E1, E2)
@ depends on patch @
expression E;
@@
- ACCESS_ONCE(E)
+ READ_ONCE(E)
----
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: davem@davemloft.net
Cc: linux-arch@vger.kernel.org
Cc: mpe@ellerman.id.au
Cc: shuah@kernel.org
Cc: snitzer@redhat.com
Cc: thor.thayer@linux.intel.com
Cc: tj@kernel.org
Cc: viro@zeniv.linux.org.uk
Cc: will.deacon@arm.com
Link: http://lkml.kernel.org/r/1508792849-3115-19-git-send-email-paulmck@linux.vnet.ibm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
linux/compiler.h is included indirectly by linux/types.h via
uapi/linux/types.h -> uapi/linux/posix_types.h -> linux/stddef.h
-> uapi/linux/stddef.h and is needed to provide a proper definition of
offsetof.
Unfortunately, compiler.h requires a definition of
smp_read_barrier_depends() for defining lockless_dereference() and soon
for defining READ_ONCE(), which means that all
users of READ_ONCE() will need to include asm/barrier.h to avoid splats
such as:
In file included from include/uapi/linux/stddef.h:1:0,
from include/linux/stddef.h:4,
from arch/h8300/kernel/asm-offsets.c:11:
include/linux/list.h: In function 'list_empty':
>> include/linux/compiler.h:343:2: error: implicit declaration of function 'smp_read_barrier_depends' [-Werror=implicit-function-declaration]
smp_read_barrier_depends(); /* Enforce dependency ordering from x */ \
^
A better alternative is to include asm/barrier.h in linux/compiler.h,
but this requires a type definition for "bool" on some architectures
(e.g. x86), which is defined later by linux/types.h. Type "bool" is also
used directly in linux/compiler.h, so the whole thing is pretty fragile.
This patch splits compiler.h in two: compiler_types.h contains type
annotations, definitions and the compiler-specific parts, whereas
compiler.h #includes compiler-types.h and additionally defines macros
such as {READ,WRITE.ACCESS}_ONCE().
uapi/linux/stddef.h and linux/linkage.h are then moved over to include
linux/compiler_types.h, which fixes the build for h8 and blackfin.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1508840570-22169-2-git-send-email-will.deacon@arm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
The asm-generic/unaligned.h header provides two different implementations
for accessing unaligned variables: the access_ok.h version used when
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is set pretends that all pointers
are in fact aligned, while the le_struct.h version convinces gcc that the
alignment of a pointer is '1', to make it issue the correct load/store
instructions depending on the architecture flags.
On ARMv5 and older, we always use the second version, to let the compiler
use byte accesses. On ARMv6 and newer, we currently use the access_ok.h
version, so the compiler can use any instruction including stm/ldm and
ldrd/strd that will cause an alignment trap. This trap can significantly
impact performance when we have to do a lot of fixups and, worse, has
led to crashes in the LZ4 decompressor code that does not have a trap
handler.
This adds an ARM specific version of asm/unaligned.h that uses the
le_struct.h/be_struct.h implementation unconditionally. This should lead
to essentially the same code on ARMv6+ as before, with the exception of
using regular load/store instructions instead of the trapping instructions
multi-register variants.
The crash in the LZ4 decompressor code was probably introduced by the
patch replacing the LZ4 implementation, commit 4e1a33b105 ("lib: update
LZ4 compressor module"), so linux-4.11 and higher would be affected most.
However, we probably want to have this backported to all older stable
kernels as well, to help with the performance issues.
There are two follow-ups that I think we should also work on, but not
backport to stable kernels, first to change the asm-generic version of
the header to remove the ARM special case, and second to review all
other uses of CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS to see if they
might be affected by the same problem on ARM.
Cc: stable@vger.kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Some interrupts properties are given '0' as the flags argument or no
flags argument at all.
Change them to use the appropriate interrupt flags.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Some interrupts properties are given '0' as the flags argument.
Change them to use the appropriate interrupt flags.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Interrupt lines from on-board devices are connected to the GPIO
controller. Add GPIO hogging so that the corresponding GPIO line
is automatically requested.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Interrupt lines from on-board devices are connected to the GPIO
controller. Handle this correctly.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The GPIO controller also acts as an interrupt controller and the
interrupt lines are connected to the AIDET block.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Currently, there is assumption in early MPU setup code that kernel
image is located in RAM, which is obviously not true for XIP. To run
code from ROM we need to make sure that it is covered by MPU. However,
due to we allocate regions (semi-)dynamically we can run into issue of
trimming region we are running from in case ROM spawns several MPU
regions. To help deal with that we enforce minimum alignments for start
end end of XIP address space as 1MB and 128Kb correspondingly.
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
PMSAv7 defines curious alignment requirements to the regions:
- size must be power of 2, and
- region start must be aligned to the region size
Because of that we currently adjust lowmem bounds plus we assign
only one MPU region to cover memory all these lead to significant amount of
memory could be wasted. As an example, consider 64Mb of memory at
0x70000000 - it fits alignment requirements nicely; now, imagine that
2Mb of memory is reserved for coherent DMA allocation, so now Linux is
expected to see 62Mb of memory... and here annoying thing happens -
memory gets truncated to 32Mb (we've lost 30Mb!), i.e. MPU layout
looks like:
0: base 0x70000000, size 0x2000000
This patch tries to allocate as much as possible MPU slots to minimise
amount of truncated memory. Moreover, with this patch MPU subregions
starting to get used. MPU subregions allow us reduce the number of MPU
slots used. For example given above, MPU layout looks like:
0: base 0x70000000, size 0x2000000
1: base 0x72000000, size 0x1000000
2: base 0x73000000, size 0x1000000, disable subreg 7 (0x73e00000 - 0x73ffffff)
Where without subregions we'd get:
0: base 0x70000000, size 0x2000000
1: base 0x72000000, size 0x1000000
2: base 0x73000000, size 0x800000
3: base 0x73800000, size 0x400000
4: base 0x73c00000, size 0x200000
To achieve better layout we fist try to cover specified memory as is
(maybe with help of subregions) and if we failed, we truncate memory
to fit alignment requirements (so it occupies one MPU slot) and
perform one more attempt with the reminder, and so on till we either
cover all memory or run out of MPU slots.
Tested-by: Szemző András <sza@esh.hu>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
This patch makes it possible to use MPU with v7M cores.
Tested-by: Szemző András <sza@esh.hu>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The last user of CONFIG_VECTORS_BASE has gone, so kill it.
Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reported-by: Afzal Mohammed <afzal.mohd.ma@gmail.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
It seems that MPU never worked with XIP, so we just disallow such
combination.
Tested-by: Szemző András <sza@esh.hu>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Currently, there are several issues with how MPU is setup:
1. We won't boot if MPU is missing
2. We won't boot if use XIP
3. Further extension of MPU setup requires asm skills
The 1st point can be relaxed, so we can continue with boot CPU even if
MPU is missed and fail boot for secondaries only. To address the 2nd
point we could create region covering CONFIG_XIP_PHYS_ADDR - _end and
that might work for the first stage of MPU enable, but due to MPU's
alignment requirement we could cover too much, IOW we need more
flexibility in how we're partitioning memory regions... and it'd be
hardly possible to archive because of the 3rd point.
This patch is trying to address 1st and 3rd issues and paves the path
for 2nd and further improvements.
The most visible change introduced with this patch is that we start
using mpu_rgn_info array (as it was supposed?), so change in MPU setup
done by boot CPU is recorded there and feed to secondaries. It
allows us to keep minimal region setup for boot CPU and do the rest in
C. Since we start programming MPU regions in C evaluation of MPU
constrains (number of regions supported and minimal region order) can
be done once, which in turn open possibility to free-up "probe"
region early.
Tested-by: Szemző András <sza@esh.hu>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Currently, inline assembly for accessing to MPU's cp15 lacks volatile
keyword which opens possibility to compiler to optimise such accesses
as soon as we start using them more intensively. Rather than fixing
inline asm, lets move MPU accessors to use cp15 helpers which do the
right thing.
Tested-by: Szemző András <sza@esh.hu>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Having MPU handling code in dedicated module makes it easier to
enhance/maintain it.
Tested-by: Szemző András <sza@esh.hu>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The following build warning is seen with W=1:
Warning (unit_address_vs_reg): Node /soc/aips@50000000/iomuxc@53fa8000/imx53-qsb/led_gpio7_7@0 has a unit name, but no reg property
Fix this warning by removing '@0' from such node.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The following build warning is seen with W=1:
Warning (unit_address_vs_reg): Node /soc/aips@50000000/iomuxc@53fa8000/imx53-m53evk/led_gpio@0 has a unit name, but no reg property
Fix this warning by removing '@0' from such node.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The following build warnings are seen with W=1:
Warning (unit_address_vs_reg): Node /soc/aips@50000000/usbphy@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/aips@50000000/usbphy@1 has a unit name, but no reg property
Fix these warnings by changing '@' to '-'.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The following build warning is seen with W=1:
Warning (unit_address_vs_reg): Node /display-di0/port@0 has a unit name,
but no reg property
Fix this warning by removing '@' from such node.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The following build warning is seen with W=1:
Warning (unit_address_vs_reg): Node /backlight@bl1 has a unit name, but no reg property
Fix this warning by removing '@bl1'from such node and change 'bl1grp' to
'backlightgrp', once there is only one backlight in this dts.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds support for the Zodiac Inflight Innovations RDU1 board,
which is based on the i.MX51.
It is the predecessor of the already supported ZII RDU2 board and
relies on the bootloader in the same way to enable correct display
and touchscreen nodes.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The TX6QP-8037 is a Computer On Module manufactured by
Ka-Ro electronics GmbH with the following characteristics:
Processor Freescale i.MX 6QuadPlus MCIMX6QP7, 1 GHz
RAM 1GiB 64-bit DDR3 SDRAM
ROM 4GB HiRel eMMC
Power supply Single 3.3 to 5V
Size 26mm SO-DIMM
Temp. Range -40°C to 105°C
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move the MB7 specific settings to a separate .dtsi file to facilitate
supporting more module variants with this baseboard.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Currently the display (LCD or LVDS) configuration is duplicated with
slight variations in each TX6 module specific file.
Move it to an include file for simplification and consistency.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Define the required properties to enable I2C bus recovery supported by
the I2C subsystem.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Convert the DTS sound setup to use the simple-audio-card driver.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Under certain circumstances the ethernet PHY cannot be detected on
Ka-Ro electronics TX6 modules. Using a phy-reset-post-delay of at least
2ms alleviates this problem. Define it to 10ms to be on the safe side.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Remove the PHY INT and RESET pins from hog section and put them into
their own pinctrl nodes referenced by the appropriate driver nodes.
Also, the MDIO pins are required for probing the Ethernet PHY, so they
must be configured by the FEC driver, not by the PHY driver. Move the
corresponding pinctrl settings from the PHY subnode to the FEC node.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
As the DS1339 driver now supports enabling the trickle charge feature
via DTB, add the appropriate properties to utilize this feature.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The 'ipu1' alias is already defined in imx6q.dtsi. There is no need to
redefine it here.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The display, that incorporates this touchpanel is obsolete and won't
be supported any more.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The current TX6Q module HW revision is 3 reflected in the module name
suffix '-1030' (-1130 for LVDS).
Change the model string to prevent confusion about what DTS file to
use for these modules.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The GPIO polarity is missing in the cd-gpios property.
Fix it, so that the following build warnings are gone:
DTC arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dtb
arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dtb: Warning (gpios_property): cd-gpios property size (8) too small for cell size 2 in /soc/aips@53f00000/esdhc@53fb4000
DTC arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dtb
arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dtb: Warning (gpios_property): cd-gpios property size (8) too small for cell size 2 in /soc/aips@53f00000/esdhc@53fb4000
DTC arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-dvi-svga.dtb
arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-dvi-svga.dtb: Warning (gpios_property): cd-gpios property size (8) too small for cell size 2 in /soc/aips@53f00000/esdhc@53fb4000
DTC arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-dvi-vga.dtb
arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-dvi-vga.dtb: Warning (gpios_property): cd-gpios property size (8) too small for cell size 2 in /soc/aips@53f00000/esdhc@53fb4000
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Pass the '#dma-cells' property in the sdma node, so that the following
build warning is gone:
DTC arch/arm/boot/dts/imx50-evk.dtb
arch/arm/boot/dts/imx50-evk.dtb: Warning (dmas_property): Missing property '#dma-cells' in node /soc/aips@60000000/sdma@63fb0000 or bad phandle (referred from /soc/aips@50000000/spba@50000000/ssi@50014000:dmas[0])
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The GPIO polarity is missing in the cd-gpios property.
Fix it, so that the following build warning is gone:
DTC arch/arm/boot/dts/imx35-eukrea-mbimxsd35-baseboard.dtb
arch/arm/boot/dts/imx35-eukrea-mbimxsd35-baseboard.dtb: Warning (gpios_property): cd-gpios property size (8) too small for cell size 2 in /soc/aips@53f00000/esdhc@53fb400
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The correct property name is 'interrupt-parent', so fix it accordingly.
This fixes the following build warning:
arch/arm/boot/dts/imx6sx-softing-vining-2000.dtb: Warning (interrupts_property): interrupts size is (8), expected multiple of 12 in /soc/aips-bus@02100000/ethernet@02188000/mdio/ethernet0-phy@0
arch/arm/boot/dts/imx6sx-softing-vining-2000.dtb: Warning (interrupts_property): interrupts size is (8), expected multiple of 12 in /soc/aips-bus@02100000/ethernet@021b4000/mdio/ethernet1-phy@0
Cc: Christoph Fritz <chf.fritz@googlemail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The 'interrupts' property has an extra cell by mistake.
Fix this, so that the following build warning is gone:
DTC arch/arm/boot/dts/imx6ul-pico-hobbit.dtb
arch/arm/boot/dts/imx6ul-pico-hobbit.dtb: Warning (interrupts_property): interrupts size is (12), expected multiple of 8 in /soc/aips-bus@2000000/ethernet@20b4000/mdio/ethernet-phy@1
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx6qp variant also has sata, so add support for it.
Reported-by: Luís Mendes <luis.p.mendes@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt,
the property for specifying the PCIe regulator is 'vpcie-supply', so
use the correct one.
Also fix the polarity of GPIO2_24 so that the regulator can operate
correctly.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Since commit c26ebe98a1 ("PCI: imx6: Add regulator support"), it is
possible to pass the 'vpcie-supply' property to describe the PCIE supply.
This way we can remove the 'regulator-always-on' property from the
regulator and have a better device tree description.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This works identically to imx6sx-tempmon on both imx6ul and imx6ull.
It just needs to be defined in dts.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On imx6sx accessing OCOTP directly is wrong because the ocotp clock
needs to be enabled first. Use the nvmem-cells binding instead.
This requirement does not apply to older imx6qdl chips because there the
ocotp access clock (clk_ipg_s) is always enabled.
This is visible by comparing the "System Clocks, Gating, and Override"
tables (OCOTP rows) in the 6DQ and 6SX manuals:
http://www.nxp.com/assets/documents/data/en/reference-manuals/IMX6SXRM.pdfhttp://www.nxp.com/assets/documents/data/en/reference-manuals/IMX6DQRM.pdf
This happens to work right now because the ocotp clock might be enabled
for some other reason. In particular the it might be enabled from the
bootloader and it only gets disabled late during boot in
clk_disable_unused, after imx-thermal has completed probing.
If imx-thermal is compiled as a module then the system can hang on
probe.
Reported-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The container node in the iomuxc node is no longer necessary and causes
pinctl errors on the Ventana boards with analog video capture
since aa12693e41:
pinctrl core: initialized pinctrl subsystem
imx6q-pinctrl 20e0000.iomuxc: no groups defined in /soc/aips-bus@02000000/iomuxc@020e0000/adv7180grp
imx6q-pinctrl 20e0000.iomuxc: no groups defined in /soc/aips-bus@02000000/iomuxc@020e0000/ipu2_csi1grp
imx6q-pinctrl 20e0000.iomuxc: initialized IMX pinctrl driver
imx6q-pinctrl 20e0000.iomuxc: function 'iomuxc' not supported
imx6q-pinctrl 20e0000.iomuxc: invalid function iomuxc in map table
imx6q-pinctrl 20e0000.iomuxc: function 'iomuxc' not supported
imx6q-pinctrl 20e0000.iomuxc: invalid function iomuxc in map table
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Latest wandboard hardware revision is revd1, which brings the following
new features:
- PFUZE100 PMIC
- AR8035 Ethernet PHY
- Upgrade Wifi/BT chip to BCM4339/BCM43430.
Add support for the mx6, mx6dl and mx6qp revd1 variants.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
By default, the lcdif_pre_sel mux is switched to the pll3_pfd1_540m PFD
source. If this mux is allowed to propagate rate changes to its parent,
setting the LCDIF pixel clock rate to 9 MHz, as required by the LCD
panel, will cause the pll3_pfd1_540m PFD to be switched away from its
nominal rate to 288 MHz.
This has no negative side effects, as there are no other children to
this PFD. Still, to avoid surprises, it might be preferrable to switch
to the designated video PLL (pll5_video_div) as clock source for the
LCDIF pixel clock.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
