This patch adds support for the core of the BestComm API
for the Freescale MPC5200(b). The BestComm engine is a
microcode-controlled / tasks-based DMA used by several
of the onchip devices.
Setting up the tasks / memory allocation and all common
low level functions are handled by this patch.
The specifics details of each tasks and their microcode
are split-out in separate patches.
This is not the official API, but a much cleaner one.
(hopefully)
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
With the base stored in dcr_host_t, there's no need for callers to pass
the dcr_n into dcr_unmap(). In fact this removes the possibility of them
passing the incorrect value, which would then be iounmap()'ed.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Now that all users of dcr_read()/dcr_write() add the dcr_host_t.base, we
can save them the trouble and do it in dcr_read()/dcr_write().
As some background to why we just went through all this jiggery-pokery,
benh sayeth:
Initially the goal of the dcr_read/dcr_write routines was to operate like
mfdcr/mtdcr which take absolute DCR numbers. The reason is that on 4xx
hardware, indirect DCR access is a pain (goes through a table of
instructions) and it's useful to have the compiler resolve an absolute DCR
inline.
We decided that wasn't worth the API bastardisation since most places
where absolute DCR values are used are low level 4xx-only code which may
as well continue using mfdcr/mtdcr, while the new API is designed for
device "instances" that can exist on 4xx and Axon type platforms and may
be located at variable DCR offsets.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Add 64-bit physical address support to setup_indirect_pci().
Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
We no longer initialise the name and owner fields of the
of_platform_driver, but use the fields of the embedded device_driver's
name field instead.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
dcr.c is an arch/powerpc only thing. Compiling ppc405 arch/ppc kernels
throws warnings without this change.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
On non-QE processors (mpc831x/mpc834x) the SPI clock is the SoC clock.
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
8 bytes padding required to match MPC85xx registers layout.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Reviewed-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
set_irq_chained_handler overwrites MPIC's handle_irq function
(handle_fasteoi_irq) thus MPIC never gets eoi event from the
cascaded IRQ. This situation hangs MPIC on MPC8568E.
To solve this problem efficiently, QEIC needs pluggable handlers,
specific to the underlaying interrupt controller.
Patch extends qe_ic_init() function to accept low and high interrupt
handlers. To avoid #ifdefs, stack of interrupt handlers specified in
the header file and functions are marked 'static inline', thus
handlers are compiled-in only if actually used (in the board file).
Another option would be to lookup for parent controller and
automatically detect handlers (will waste text size because of
never used handlers, so this option abolished).
qe_ic_init() also changed in regard to support multiplexed high/low
lines as found in MPC8568E-MDS, plus qe_ic_cascade_muxed_mpic()
handler implemented appropriately.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
On the majority of 85xx & 86xx we have a register that's ability to
assert HRESET_REQ to reset the board. We refactored that code so it
can be shared between both platforms into fsl_soc.c and removed all
the duplication in each platform directory.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch makes numerous miscellaneous code improvements to the QE library.
1. Remove struct ucc_common and merge ucc_init_guemr() into ucc_set_type()
(every caller of ucc_init_guemr() also calls ucc_set_type()). Modify all
callers of ucc_set_type() accordingly.
2. Remove the unused enum ucc_pram_initial_offset.
3. Refactor qe_setbrg(), also implement work-around for errata QE_General4.
4. Several printk() calls were missing the terminating \n.
5. Add __iomem where needed, and change u16 to __be16 and u32 to __be32 where
appropriate.
6. In ucc_slow_init() the RBASE and TBASE registers in the PRAM were programmed
with the wrong value.
7. Add the protocol type to struct us_info and updated ucc_slow_init() to
use it, instead of always programming QE_CR_PROTOCOL_UNSPECIFIED.
8. Rename ucc_slow_restart_x() to ucc_slow_restart_tx()
9. Add several macros in qe.h (mostly for slow UCC support, but also to
standardize some naming convention) and remove several unused macros.
10. Update ucc_geth.c to use the new macros.
11. Add ucc_slow_info.protocol to specify which QE_CR_PROTOCOL_xxx protcol
to use when initializing the UCC in ucc_slow_init().
12. Rename ucc_slow_pram.rfcr to rbmr and ucc_slow_pram.tfcr to tbmr, since
these are the real names of the registers.
13. Use the setbits, clrbits, and clrsetbits where appropriate.
14. Refactor ucc_set_qe_mux_rxtx().
15. Remove all instances of 'volatile'.
16. Simplify get_cmxucr_reg();
17. Replace qe_mux.cmxucrX with qe_mux.cmxucr[].
18. Updated struct ucc_geth because struct ucc_fast is not padded any more.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
MPC8568E-MDS have DS1374 chip on the I2C bus, thus let's use it.
This patch also adds #address-cells and #size-cells to the I2C
controllers nodes.
p.s. DS1374 rtc class driver is in the -mm tree, its name is
rtc-rtc-class-driver-for-the-ds1374.patch.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
i2c_board_info used semi-initialized, causing garbage in the
info->flags, and that, in turn, causes various symptoms of i2c
malfunctioning, like PEC mismatches.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The way the current CPM binding describes available multi-user (a.k.a.
dual-ported) RAM doesn't work well when there are multiple free regions,
and it doesn't work at all if the region doesn't begin at the start of
the muram area (as the hardware needs to be programmed with offsets into
this area). The latter situation can happen with SMC UARTs on CPM2, as its
parameter RAM is relocatable, u-boot puts it at zero, and the kernel doesn't
support moving it.
It is now described with a muram node, similar to QE. The current CPM
binding is sufficiently recent (i.e. never appeared in an official release)
that compatibility with existing device trees is not an issue.
The code supporting the new binding is shared between cpm1 and cpm2, rather
than remain separated. QE should be able to use this code as well, once
minor fixes are made to its device trees.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add support for the I2C devices handled by the rtc-ds1307 driver to
of_register_i2c_devices.
Cc: G. Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Fix a trivial printk typo in fsl_soc.
Cc: G. Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This provides a generic way for board code to set up CPM pins, rather
than directly poking magic values into registers.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Mostly sparse fixes (__iomem annotations, etc); also, cpm2_immr
is used rather than creating many temporary mappings.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
These let board code set up pins and clocks without having to
put magic numbers directly into the registers.
The clock function is mostly duplicated from the cpm2 version;
hopefully this stuff can be merged at some point.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
1. Keep a global mpc8xx_immr mapping, rather than constantly
creating temporary mappings.
2. Look for new fsl,cpm1 and fsl,cpm1-pic names.
3. Always reset the CPM when not using the udbg console;
this is required in case the firmware initialized a device
that is incompatible with one that the kernel is about to
use.
4. Remove some superfluous casts and header includes.
5. Change a usage of IMAP_ADDR to get_immrbase().
6. Use phys_addr_t, not uint, for dpram_pbase.
7. Various sparse-related fixes, such as __iomem annotations.
8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything
useful beyond the generic cpuinfo handler.
9. Move prototypes for 8xx support functions from board files
to sysdev/commproc.h.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This code assumes that the ports have been previously set up, with
buffers in DPRAM.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This introduces a new device binding for the CPM and other devices on
these boards. Some of the changes include:
1. Proper namespace scoping for Freescale compatibles and properties.
2. Use compatible rather than things like device_type and model
to determine which particular variant of a device is present.
3. Give the drivers the relevant CPM command word directly, rather than
requiring it to have a lookup table based on device-id, SCC v. SMC, and
CPM version.
4. Specify the CPCR and the usable DPRAM region in the CPM's reg property.
Boards that do not require the legacy bindings should select
CONFIG_PPC_CPM_NEW_BINDING to enable the of_platform CPM devices. Once
all existing boards are converted and tested, the config option can
become default y to prevent new boards from using the old model. Once
arch/ppc is gone, the config option can be removed altogether.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
As suggested by David Gibson, now that we have a separate node
for the baud rate generators, it's better to use the standard
clock-frequency property than a cpm-node-level fsl,brg-frequency
property.
This patch updates existing places where fsl,brg-frequency is
used.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Adds support for the Xilinx opb-intc interrupt controller
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Now that dcr_host_t contains the base address, we can use that in the mpic
code, rather than storing it separately.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
In its current form, dcr_map() doesn't remember the base address you passed
it, which means you need to store it somewhere else. Rather than adding the
base to another struct it seems simpler to store it in the dcr_host_t.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
With these functions implemented we cooperate better with the generic
timekeeping code. This obsoletes the need for the timer sysdev as a bonus.
Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
In the MPIC U3 MSI code, we call u3msi_compose_msi_msg() once for each MSI.
This is overkill, as the address is per pci device, not per MSI. So setup
the address once, and just set the data per MSI.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
u3msi_setup_msi_irqs() doesn't need to call teardown() itself,
the generic code will do this for us as long as we return a non
zero value.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The powerpc version of commproc.c exports cpm_dpram_addr twice
and cpm_dpram_phys not at all due to a typo. This patch fixes this
problem.
CC arch/powerpc/sysdev/commproc.o
arch/powerpc/sysdev/commproc.c:398: error: redefinition of '__kcrctab_cpm_dpram_addr'
arch/powerpc/sysdev/commproc.c:392: error: previous definition of '__kcrctab_cpm_dpram_addr' was here
arch/powerpc/sysdev/commproc.c:398: error: redefinition of '__kstrtab_cpm_dpram_addr'
arch/powerpc/sysdev/commproc.c:392: error: previous definition of '__kstrtab_cpm_dpram_addr' was here
arch/powerpc/sysdev/commproc.c:398: error: redefinition of '__ksymtab_cpm_dpram_addr'
arch/powerpc/sysdev/commproc.c:392: error: previous definition of '__ksymtab_cpm_dpram_addr' was here
make[1]: *** [arch/powerpc/sysdev/commproc.o] Error 1
make: *** [arch/powerpc/sysdev] Error 2
Signed-off-by: Jochen Friedrich <jochen@scram.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Hook up affinity-setting for U3/U4 MSI interrupt sources.
Tested on Quad G5 with myri10ge.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Commit 69331af, "Fixes and cleanups for earlyprintk aka boot console",
resulted in printk output prior to the initialization of the mpsc
console driver not being printed. That commit causes the mpsc's
CON_PRINTBUFFER flag to be cleared since udbg should have printed
the previous output.
I guess we can no longer ignore udbg. :)
This patch provides udbg_putc() and udbg_getc() functions for the
Marvell mv64x60 chips. These functions are enabled if an mv64x60
port is to be used as the console as determined from the device tree.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Acked-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Create a helper function (alloc_maybe_bootmem) that is marked __init_refok
to limit the chances of mistakenly referring to other __init routines.
WARNING: vmlinux.o(.text+0x2a9c4): Section mismatch: reference to .init.text:.__alloc_bootmem (between '.update_dn_pci_info' and '.pci_dn_reconfig_notifier')
WARNING: vmlinux.o(.text+0x36430): Section mismatch: reference to .init.text:.__alloc_bootmem (between '.mpic_msi_init_allocator' and '.find_ht_magic_addr')
WARNING: vmlinux.o(.text+0x5e804): Section mismatch: reference to .init.text:.__alloc_bootmem (between '.celleb_setup_phb' and '.celleb_fake_pci_write_config')
WARNING: vmlinux.o(.text+0x5e8e8): Section mismatch: reference to .init.text:.__alloc_bootmem (between '.celleb_setup_phb' and '.celleb_fake_pci_write_config')
WARNING: vmlinux.o(.text+0x5e968): Section mismatch: reference to .init.text:.__alloc_bootmem (between '.celleb_setup_phb' and '.celleb_fake_pci_write_config')
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Add helper function to setup SPI bus/device information
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Added basic board port for MPC8572 DS reference platform that is
similiar to the MPC8544/33 DS reference platform in uniprocessor mode.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
1. Update the way get_brgfreq() finds things in the device tree.
It now uses names that are less namespace polluting. The old names
are supported until all boards are converted.
2. "size" is changed from unsigned int to int, to match what
of_get_property() expects.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Some versions of PWRficient 1682M have an interrupt controller in which
the first register in each pair for interrupt sources doesn't always
read with the right polarity/sense values.
To work around this, keep a software copy of the register instead. Since
it's not modified from the mpic itself, it's a feasible solution. Still,
keep it under a config option to avoid wasting memory on other platforms.
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The most common match semantic is an exact match based on the device node.
So provide a default implementation that does this, and hook it up if no
match routine is specified.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The majority of irq_host implementations (3 out of 4) are associated
with a device_node, and need to stash it somewhere. Rather than having
it somewhere different for each host, add an optional device_node pointer
to the irq_host structure.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The hardware adds one to the BRG value to get the divider, so it must
be subtracted by software. Without this patch, characters will occasionally
be corrupted.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
On exit do not delete gendisk's queue because this is already done by
del_gendisk(). Doing it twice may cause memory damage.
Signed-off-by: Maximilian <maxim@de.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Firmware would not deliver two interrupt numbers in device-tree any more
but only one, for correctable ECC, because uncorrectable ECC from now
is handled by firmware itself.
Changes in the axonram module are necessary because in the old version, if
it is not allowed to fetch the second interrupt number from device-tree,
it interpretes this as an error case and exits.
Signed-off-by: Maximilian <maxim@de.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The initial user manuals for MPC8544/8533 had some issues with properly
documenting the device IDs for MPC8544/8533. These processors are almost
identical and both show up on the reference boards.
Fix up the quirks for PCIe support to handle MPC8533/E.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
CC arch/powerpc/sysdev/commproc.o
arch/powerpc/sysdev/fsl_soc.c: In function fsl_pcmcia_of_init:
arch/powerpc/sysdev/fsl_soc.c:1109: error: implicit declaration of function of_platform_device_create
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The RTC CMOS driver expects the interrupt to be a resource of the platform
device. Use a fixed interrupt value of 8 since on PPC if we are using this
its off an i8259 which we ensure has interrupt numbers 0..15.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Use strlcpy() to guarantee strings in i2c device type and driver_name
fields are 0-terminated.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
These functions are only called from __init functions.
WARNING: vmlinux.o(.text+0x398f4): Section mismatch: reference to .init.text:.lmb_alloc (between '.iommu_init_early_dart' and '.pci_dma_bus_setup_dart')
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
At present the cascade interrupt handler for the UIC (interrupt
controller on 4xx embedded chips) will misbehave badly if it is called
spuriously - that is if the handler is invoked when no interrupts are
asserted in the child UIC.
Although spurious interrupts shouldn't happen, it's good to behave
robustly if they do. This patch does so by checking for and ignoring
spurious interrupts.
Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
At present the driver for the UIC (the embedded interrupt controller
in 4xx chips) uses the handle_level_irq() flow handler. It turns out
this does not correctly handle level triggered interrupts on the UIC.
Specifically, acknowledging an irq on the UIC (i.e. clearing the
relevant bit in UIC_SR) will have no effect for a level interrupt
which is still asserted by the external device, even if the irq is
already masked. Therefore, unlike handle_level_irq() we must ack the
interrupt after invoking the ISR (which should cause the device to
stop asserting the irq) instead of acking it when we mask it, before
the ISR.
This patch implements this change, in a new handle_uic_irq(), a
customised irq flow handler for the UIC. For edge triggered
interrupts, handle_uic_irq() still uses the old flow - we must ack
edge triggered interrupt before the ISR not after, or we could miss a
second event which occurred between invoking the ISR and acking the
irq.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The UIC (interrupt controller in 4xx embedded CPUs) driver currently
missets the IRQ_lEVEL flag in desc->status, due to a thinko. This
patch fixes the bug.
Currently this is only a cosmetic problem (affects the output in
/proc/interrupts), however subsequent patches will use the IRQ_LEVEL
flag to affect flow handling.
Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
In order to compile drivers as modules that uses some of the
DCR functions, we need to export the symbols. Example, EMAC
driver and other drivers that are under development use these
functions.
Signed-off-by: Murali Iyer <mniyer@us.ibm.com>
Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
* git://git.kernel.org/pub/scm/linux/kernel/git/wim/linux-2.6-watchdog: (28 commits)
[WATCHDOG] Fix pcwd_init_module crash
[WATCHDOG] ICH9 support for iTCO_wdt
[WATCHDOG] 631xESB/632xESB support for iTCO_wdt - add all LPC bridges
[WATCHDOG] 631xESB/632xESB support for iTCO_wdt
[WATCHDOG] omap_wdt.c - default error for IOCTL is -ENOTTY
[WATCHDOG] Return value of nonseekable_open
[WATCHDOG] mv64x60_wdt: Rework the timeout register manipulation
[WATCHDOG] mv64x60_wdt: disable watchdog timer when driver is probed
[WATCHDOG] mv64x60_wdt: Support the WDIOF_MAGICCLOSE feature
[WATCHDOG] mv64x60_wdt: Add a module parameter to change nowayout setting
[WATCHDOG] mv64x60_wdt: Add WDIOC_SETOPTIONS ioctl support
[WATCHDOG] mv64x60_wdt: Support for WDIOC_SETTIMEOUT ioctl
[WATCHDOG] mv64x60_wdt: Fix WDIOC_GETTIMEOUT return value
[WATCHDOG] mv64x60_wdt: Check return value of nonseekable_open
[WATCHDOG] mv64x60_wdt: Add arch/powerpc platform support
[WATCHDOG] mv64x60_wdt: Get register address from platform data
[WATCHDOG] mv64x60_wdt: set up platform_device in platform code
[WATCHDOG] ensure mouse and keyboard ignored in w83627hf_wdt
[WATCHDOG] s3c2410_wdt: fixup after arch include moves
[WATCHDOG] git-watchdog-typo
...
Scan the device tree for i2c devices, check their "compatible" property
against a hard-coded table, and, if found, register with i2c boardinfo.
This provides the infrastructure needed to find i2c devices in the
device tree and register them with the i2c subsystem.
This and the following commit let the linkstation work with the new i2c
API and thus fix a regression.
Signed-off-by: G. Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Fixed the following warnings:
WARNING: vmlinux.o(.text+0x2934): Section mismatch: reference to .init.text:__alloc_bootmem (between 'irq_alloc_host' and 'irq_set_default_host')
WARNING: vmlinux.o(.text+0xb2aa): Section mismatch: reference to .init.data:boot_command_line (between 'register_early_udbg_console' and 'udbg_printf')
WARNING: vmlinux.o(.text+0xb2b2): Section mismatch: reference to .init.data:boot_command_line (between 'register_early_udbg_console' and 'udbg_printf')
WARNING: vmlinux.o(.text+0xe354): Section mismatch: reference to .init.text:__alloc_bootmem (between 'pcibios_alloc_controller' and 'pci_domain_nr')
WARNING: vmlinux.o(.text+0x12768): Section mismatch: reference to .init.text:update_bridge_resource (between 'quirk_fsl_pcie_transparent' and 'indirect_read_config')
WARNING: vmlinux.o(.text+0x127a8): Section mismatch: reference to .init.text:update_bridge_resource (between 'quirk_fsl_pcie_transparent' and 'indirect_read_config')
WARNING: vmlinux.o(.text+0x17566c): Section mismatch: reference to .init.text:pcibios_fixup_bus (between 'pci_scan_child_bus' and 'pci_scan_bus_parented')
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We didn't actually propogate the flag we pass into setup_indirect_pci()
to set indirect_type and thus were getting the wrong endianness if
PPC_INDIRECT_TYPE_BIG_ENDIAN was set.
Also, we need to or in additional flags rather than just doing a
direct assignment.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add support for arch/powerpc, specifically for the prpmc2800 platform.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Added the MPC85xx PCI device IDs that we need for the quirks we have.
Also, fixed the MPC8567E, MPC8567 device IDs which had the wrong value.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Also add 8641/8641D device IDs as well.
All of which already exist or have been submitted to
The Linux PCI ID Repository at:
http://pci-ids.ucw.cz/
CC-to: pci-ids@ucw.cz
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Some set of 85xx platforms have PCI-X controllers. The old arch/ppc
code setup these controllers and we haven't moved it over to arch/powerpc.
We use the PCI-X Capabilties to know if we are in PCI-X mode instead
of the Global Utilities PORDEVSR.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
For the Freescale PCIe PHBs Not all firmwares setup the virtual P2P
bridge registers properly. Make sure they get setup based on what
the struct pci_controller got from the device tree.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add basic support for the PCIe PHB and enable the ULI bridge.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Make it so we do a runtime check to know if we need to write cfg_addr
as big or little endian. This is needed if we want to allow 86xx support
to co-exist in the same kernel as other 6xx PPCs.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We don't use setup_indirect_pci_nomap in arch/powerpc and it appears
the users that needed it from arch/ppc are now using setup_indirect_pci.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
On the 85xx/86xx PCIe controllers if there is no device connected to the
PHB we will still allocate a pci_bus for downstream bus of the virtual
P2P bridge. However the resources allocated to the downstream bus are not
correct and so we just mimic the resources from the upstream pci_bus.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Switch the 85xx platform over to using the FSL generic PCI code. This
gets ups PCIe support in addition to base PCI support.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Use the PCI capabilities to determine if we are PCIe PHB. Also use
PPC_INDIRECT_TYPE_NO_PCIE_LINK since the Freescale PCIe controllers
will lock the system if they don't have link and you try to do a config
access to anything but the PHB.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Added PPC_INDIRECT_TYPE_NO_PCIE_LINK flag to the indirect pci handling
code to ensure that we don't talk to any device other than the PHB
if we don't have PCIe link. Some controllers will lockup if they try
to do a config cycle to any device on the bus except the PHB.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Rewrite the Freescale PCI code to support PCI on 83xx/85xx/86xx and
PCIe on 85xx/86xx.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Move
arch/powerpc/platforms/86xx/pci.c -> arch/powerpc/sysdev/fsl_pci.c
arch/powerpc/sysdev/fsl_pcie.h -> arch/powerpc/sysdev/fsl_pci.h
as the base to unify 83xx/85xx/86xx pci and pcie.
Add CONFIG_FSL_PCI to build fsl_pci.c for Freescale pci and pcie option.
The code still works for 86xx platforms.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Some HW platforms, such as the new cell blades, requires some MPIC sources
to be left alone by the operating system. This implements support for
a "protected-sources" property in the mpic controller node containing a list
of source numbers to be protected against operating system interference.
For those interested in the gory details, the MPIC on the southbridge of
those blades has some of the processor outputs routed to the cell, and
at least one routed as a GPIO to the service processor. It will be used
in the GA product for routing some of the southbridge error interrupts
to the service processor which implements some of the RAS stuff, such
as checkstopping when fatal errors occurs before they can propagate.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The Axon bridge chip used on new Cell/B.E. based blade servers
comes with a DDR2 memory controller that can be used to
attach cheap memory modules, as opposed to the high-speed
XDR memory that is used by the CPU itself.
Since the memory controller does not participate in the
cache coherency protocol, we can not use the memory direcly
for Linux applications, but by providing a block device
it can be used for swap space, temporary file storage and
through the use of the direct_access block device operation
for mapping into user addresses, when it is mounted with
an appropriate file system.
Signed-off-by: Maxim Shchetynin <maxim@de.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
The pmi driver got simplified by removing support for multiple devices.
As there is no more than one pmi device per maschine, there is no need to
specify the device for listening and sending messages.
This way the caller (cbe_cpufreq) doesn't need to scan the device tree.
When registering the handler on a board without a pmi
interface, pmi.c will just return -ENODEV.
The patch that fixed the breakage of cell_defconfig has been
broken out of the earlier version of this patch. So this is
the version that applies cleanly on top of it.
Signed-off-by: Christian Krafft <krafft@de.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
The TSEC/eTSEC can detect the interface to the PHY automatically,
but it isn't able to detect whether the RGMII connection needs internal
delay. So we need to detect that change in the device tree, propagate
it to the platform data, and then check it if we're in RGMII. This fixes
a bug on the 8641D HPCN board where the Vitesse PHY doesn't use the delay
for RGMII.
Signed-off-by: Andy Fleming <afleming@freescale.com>
In order to use the RTC CMOS driver, each architecture must register a
platform device for the RTC.
This creates a function to register the platform device based on the RTC
device node and verifies that the RTC port against the hard-coded value
in asm/mc146818rtc.h.
Signed-off-by: Wade Farnsworth <wfarnsworth@mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Adds support for PowerQuicc on-chip PCMCIA. The driver is implemented as
of_device, so only arch/powerpc stuff is capable to use it, which now implies
only mpc885ads reference board.
To cope with the code that should be hooked inside driver, but is really board
specific (like set_voltage), global structure mpc8xx_pcmcia_ops holds
necessary function pointers that are filled in the BSP code.
[akpm@linux-foundation.org: whitespace diddles]
Signed-off-by: Vitaly Bordug <vitb@kernel.crashing.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Olof Johansson <olof@lixom.net>
Cc: Dominik Brodowski <linux@dominikbrodowski.net>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Export symbols of qe_lib to be used by QE driver.
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Selvamuthukumar V <vsmkumar.84@gmail.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Make the ppc32 pcibios_alloc_controller take a device node to match
the ppc64 prototypes and have it set arch_data.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The Freescale PCI-e controllers have an issue in that they use the
PCI_PRIMARY_BUS register in the virtual P2P bridge to determine which
bus number to match on when generating a type 0 config cycle. The
issue is if we are renumbering bus numbers to match Linux we will try
setting the PCI_PRIMARY_BUS and will not know which bus number to use
for generating type 0 config cycles. We surpress writing the register
in the P2P bridge and always keep it at zero.
In the future when proper PCI domain support is working we should be
able to remove this.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The generic PCI config ops indirect support for ppc32 covers only two
cases (implicit vs explicit) type 0/1 config cycles via set_cfg_type.
Added a indirect_type bit mask to handle other variants.
Added support for PCI-e extended registers and moved the cfg_type
handling into the bit mask for ARCH=powerpc. We can also use this to
handle indirect quirks.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Remove errata for PCI-e support of Rev 1.0 of MPC8641 since its considered
obselete and is not production level silicon from Freescale.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Acked-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Removed the remants of bus_offset and use self_busno in the mv64x60 case
and use pci_assign_all_buses on 83xx/85xx.
83xx/85xx have multiple PHBs and the firmwares on these devices tend not
to handle topologies with P2P bridges well so we let Linux just reassign
the bus numbers to match.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Added self_busno to pci_controller and indirect PCI ops to be set by
board code to indicate which bus number to use when talking to the PHB.
By default we use zero since the majority of controllers that have
implicit mechanisms to talk to the PHBs use a bus number of zero.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The user of the fsl_pcie code doesn't set bus_offset and 82xx doesn't
require it either. Remove the places in the code that reference it so
we can remove it all together.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
There are times that we need to know which controller we are on to decide
how to exclude devices properly. We now pass the pci_controller that we
are going to use down to the pci_exclude_device function. This will
greatly simplify being able to exclude the PHBs in multiple controller
setups.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The Freescale and Marvell PCI controllers dont require explicit setting for
type 1 config cycles. They handle producing them by implicitly looking at the
bus, devfn.
The TSI108 and 52xx don't use the generic PCI indirect code and thus don't
bother with set_cfg_type.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
When a Marvell MPSC (serial controller) port is the specified
/chosen/stdout-path device, call 'add_preferred_console()' so the user
doesn't have to specify a 'console=ttyMMx' cmdline argument.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
With both generic rtc and powerpc timer suspend / resume code now in the
(powerpc.git) tree, powerpc platforms using the generic timer and enabling
power management will have timer.o linked in the kernel, which they don't
need. Moreover, it will likely WARN_ON(!ppc_md.get_rtc_time), save
zero-time and return no error on suspend...
As a possible solution we can choose not to build timer.o when RTC_CLASS
is enabled. However, I can imagine systems with 2 rtc's, one served by the
ppc-rtc, another one generic built as a module, in which case using the
ppc-rtc for suspend / resume will be impossible. Not to say, that such a
configuration would be ugly...
Signed-off-by: G. Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This makes the timer sysdev use mktime instead of rtc_tm_to_time,
since rtc_tm_to_time just calls mktime anyway, and this means we
don't have a dependency on rtc-lib.
Signed-off-by: Johannes Berg <johannes@sipsolutions.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This fixes some problems with the way the some things
represented in the device tree for the Holly and Taiga boards. This
means changes both to the dts files, and to the code which
instantiates the tsi108 ethernet platform devices based on the device
tree.
- First, and most importantly, the ethernet PHYs are given
with an identical 'reg' property. This reg currently encodes the
accessible register used to initiate mdio interaction with the PHYs,
rather than a meaningful address on the parent bus (mdio in this
case), which is incorrect. Instead we give the address of these
registers as 'reg' in the mdio node itself, and encode the ID of each
phy in their 'reg' propertyies.
- Currently the platform device constructor enables a
workaround in the tsi108 ethernet driver based on the compatible
property of the PHY. This is incorrect, because the workaround in
question is necessary due to the board's wiring of the PHY, not the
model of PHY itself. This patch alters the constructor to instead
enable the workaround based on a new special property in the PHY node.
- The compatible properties on a number of nodes in the device
tree are insufficiently precise. In particular the PHYs give only
"bcm54xx", which is broken, since there are many bcm54xx PHY models,
and they have differences which matter. The mdio had a compatible
property of "tsi-ethernet" identical to the ethernet MAC nodes, which
doesn't make sense. The ethernet, i2c, bridge and PCI nodes were
given only as "tsi-*" which is somewhat inprecise, we replace with
"tsi108-*" in the case of Taiga (which has a TSI108 bridge), and
"tsi109-*", "tsi108-*" in the case of Holly (which has a TSI109
bridge).
- We remove some "model" properties from the ethernets on
Taiga board which were neither useful nor adequately precise.
- On Holly we change to using a dtc label instead of a full
path to reference the MPIC node, which makes the dts a little more
readable.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The UCC_GETH Kconfig option in drivers/net/Kconfig had a line to select the
UCC_FAST option is arch/powerpc/sysdev/qe_lib/Kconfig, which is only used
on PowerPC builds. On other architectures, this would generated a warning.
The fix is to have UCC_FAST depend on UCC_GETH.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/sysdev/mpic.c: In function 'mpic_request_ipis':
arch/powerpc/sysdev/mpic.c:1445: warning: ignoring return value of 'request_irq', declared with attribute warn_unused_result
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patch adds PCI bridge support for the Marvell mv64x60 chip.
We also provide the ability to read/write the mv64x60 hotswap
register via sysfs if the hs_reg_valid property is set in the
device tree.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patch creates platform_device entries for the Marvell mv64x60
I2C ports, based on information contained in device tree.
This driver (like the other mv64x60 drivers) are unusual in that it
works on both the MIPS and PowerPC architectures. Because of that,
the drivers do not support the normal PowerPC of_platform_bus_type.
They support platform_bus_type instead.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patch creates platform_device entries for the Marvell mv64x60
ethernet controller ports, based on information contained in the
device tree.
This driver (like the other mv64x60 drivers) are unusual in that it
works on both the MIPS and PowerPC architectures. Because of that,
the drivers do not support the normal PowerPC of_platform_bus_type.
They support platform_bus_type instead.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patch creates platform_device entries for the Marvell mv64x60
MPSC (multi-protocol serial controller) ports, based on information
contained in the device tree.
This driver (like the other mv64x60 drivers) are unusual in that it
works on both the MIPS and PowerPC architectures. Because of that,
the drivers do not support the normal PowerPC of_platform_bus_type.
They support platform_bus_type instead.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
There are 3 interrupt groups each with its own status/mask registers.
We use a separate struct irq_chip for each interrupt group and handle
interrupts in two stages or levels: level 1 selects the appropriate
struct irq_chip, and level 2 selects individual interrupts within
that irq_chip.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The rheap allocation functions return a pointer, but the actual value is based
on how the heap was initialized, and so it can be anything, e.g. an offset
into a buffer. A ulong is a better representation of the value returned by
the allocation functions.
This patch changes all of the relevant rheap functions to use a unsigned long
integers instead of a pointer. In case of an error, the value returned is
a negative error code that has been cast to an unsigned long. The caller can
use the IS_ERR_VALUE() macro to check for this.
All code which calls the rheap functions is updated accordingly. Macros
IS_MURAM_ERR() and IS_DPERR(), have been deleted in favor of IS_ERR_VALUE().
Also added error checking to rh_attach_region().
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
of_get_mac_address() returns a const pointer, so the result
should be stored in a const pointer.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
powerpc_flash_init() implements a broken way of probing for flash
devices supported by the physmap_of driver. It finds all nodes in the
device tree with device_type=="rom" and instantiates of_platform
devices for them. This is fundamentally incompatible with the normal
and correct way of probing for of_platform_bus_probe(). Platforms
which relied on powerpc_flash_init()s behaviour (none are in-tree)
will have to update their platform probing code to correctly probe
busses containing flash devices.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
MPIC U3/U4 MSI backend. Based on code from Segher, heavily hacked by me.
This only deals with MSI on U3/U4 MPICs, aka. CPC 9x5.
If we find a U3/U4 then we enable this backend, ie. take over the ppc_md
MSI hooks. We might need more elaborate logic in future to decide which
backend is enabled.
We need our own irq_chip so that we can do MSI masking/unmasking on
the device itself. We also need to mask explicitly on shutdown to make
sure we don't get bitten by lazy-disable semantics.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
To support MSI on MPIC we need a way to reserve and allocate hardware irq
numbers, this patch implements an allocator for that purpose.
New firmware platforms must define a "msi-available-ranges" property on their
MPIC node for MSI to work. For U3/U4 we do a best-guess setup.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
On some Apple machines the HT MSI mappings are not enabled by firmware, so
we need to do it by hand.
We can't use the pci routines as this code runs too early.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Generalize tsi108_setup_pci to take the config space physical address and
primary bus designator as a parameter.
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Add a phy_type field to the tsi108 ethernet structures to indicate which PHY
is used on a board. This is derived from the "compatible" property in the
ethernet-phy node of the device tree. The default remains the MV88E PHY.
Also, convert the setup code to use of_get_mac_address instead of hard coding
a lookup for the "address" property in the ethernet node.
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Add a header file for the common PCI routines used for the TSI bridge
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This implements save and restore hooks for IOMMUs and implements
it the DART iommu.
Signed-off-by: Johannes Berg <johannes@sipsolutions.net>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
for consistency with other Open Firmware interfaces (and Sparc).
This is just a straight replacement.
This leaves the compatibility define in place.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This adds mpic to the system devices and implements suspend
and resume for them. This is necessary to get interrupts for
modules back to where they were before a suspend to disk.
Signed-off-by: Johannes Berg <johannes@sipsolutions.net>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The weird TSI 10x MPIC needs an EOI after getting a spurious vector. This
patch uses the existing MPIC_SPV_EOI flag to fix this issue.
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
arch/powerpc/sysdev/timer.c:51: error: variable `timer_sysclass' has
initializer but incomplete type
arch/powerpc/sysdev/timer.c:52: error: unknown field `resume' specified in initializer
<etc>
Signed-off-by: Srinivasa Ds <srinivasa@in.ibm.com>
Acked-by: Johannes Berg <johannes@sipsolutions.net>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Just another pass through arch/powerpc for old usages.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Transmit on Demand: Fix spelling in config option, and make it actually enable TOD.
Signed-off-by: Michael Reiss <michael.f.reiss@freescale.com>
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Rename MPIC_BROKEN_U3 to something a little more descriptive. Its
effect is to enable support for HT irqs behind the PCI-X/HT bridge on
U3/U4 (aka. CPC9x5) parts.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patch adds a driver to arch/powerpc/sysdev for the UIC, the
on-chip interrupt controller from IBM/AMCC 4xx chips. It uses the new
irq host mapping infrastructure.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The of_iomap function maps memory for a given
device_node and returns a pointer to that memory.
This is used at some places, so it makes sense to
a seperate function.
Signed-off-by: Christian Krafft <krafft@de.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
At the moment the pmi device driver is probing for devices with
a given type and a given name. As there may be devices of
the same type but with a different name, probing should be
done also for device type only.
Signed-off-by: Christian Krafft <krafft@de.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
This patch adds a check for the private driver data to be initialized.
The bug showed up, as the caller found a pmi device by it's type.
Whereas the pmi driver probes for the type and the name.
Since the name was not as the driver expected, it did not initialize.
A more relaxed probing will be supplied with an extra patch, too.
Signed-off-by: Christian Krafft <krafft@de.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Correct the alignment of the internal buffer used by the QUICC Engine
SDMA controller to 4Kbytes. Correct the shift direction in the logic
that sets up the SDMR register for the QUICC Engine SDMA controller.
Signed-off-by: Chuck Meade <chuckmeade@mindspring.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Fix a bug in dcr_unmap().
At unmap time the DCR offset need to be added instead of substracted.
Signed-off-by: Jean-Christophe Dubois <jdubois@mc.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
In two places, ucc_slow_init() passes a physical address instead of the
virtual address to functions that were expecting the latter, causing a kernel
panic. us_info->regs contains the physical address of the UCC register set.
The registers are ioremap'd to kernel space, and the virtual pointers are
stored in us_regs. The code was using us_info->regs when it should have been
using us_regs.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Change the Kconfig files so that the Freescale QE options are automatically
selected if a QE device is selected. Previously, you'd need to manually
select UCC_FAST if you want any "fast" UCC devices, such as Gigabit Ethernet.
Now, the QE Gigabit Ethernet option is always available if the device has a
QE, and UCC_FAST is automatically enabled. A side-effect is that the
"QE Options" menu no longer exists.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This move sets the stage for the use of generic PCI Express
code in 85xx and 86xx parts from FSL. Subsequent patches
for 8548 and 8544 will be able to use this shared code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This removes the time suspend/restore code that was done through
a PMU notifier in arch/platforms/powermac/time.c.
Instead, introduce arch/powerpc/sysdev/timer.c which creates a sys
device and handles time of day suspend/resume through that.
This should probably be replaced by using the generic RTC framework
but for now it gets rid of the arcane powermac specific hack.
Signed-off-by: Johannes Berg <johannes@sipsolutions.net>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This will allow us to build without PCI easier.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Refactored and cleaned up ucc_fast.c and ucc_slow.c so that the two files
look more alike and are easier to read. Removed uccf_printk() and related
functions, because they were just front-ends to printk(). Fixed some
spacing and tabbing issues. Minor optimizations of some code. Changed
the type of some variables to their proper type (mostly buffer
descriptors).
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add function of_get_mac_address(), which obtains the best MAC address to use
from the device tree by checking various properties in order. The order is:
'mac-address', then 'local-mac-address', then 'address'. It skips properties
that contain invalid MAC addresses, which were probably not initialized
by U-Boot.
Update gfar_of_init() and fs_enet_of_init() in fsl_soc.c to call
of_get_mac_address().
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patch changes the MPIC IPIs to be per-CPU to avoid getting a
warning ("Cannot set affinity for irq 251") when taking a CPU
offline via sysfs or during suspend.
Signed-off-by: Johannes Berg <johannes@sipsolutions.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This adds driver code for the PMI device found in future IBM products.
PMI stands for "Platform Management Interrupt" and is a way to
communicate with the BMC (Baseboard Management Controller).
It provides bidirectional communication with a low latency.
Signed-off-by: Christian Krafft <krafft@de.ibm.com>
Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Acked-by: Heiko J Schick <schickhj@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Move a couple of MPIC smp routines into mpic.c, they're inside an SMP
block in mpic.c - so they're still only built for SMP.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Rename the 'us_regs' field of the ucc_slow_info structure in ucc_slow.h
to just 'regs'. The equivalent field in the ucc_fast_info structure is
also called 'regs', so this patch makes them comparable, and makes the
code a little easier to read, because there already is a 'us_regs' in
another ucc_slow structure.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add platform_device setup code for OTG/peripheral mode of 834x DR module.
It is needed for USB client driver to work.
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
G3 Blue & White is misconfigured by default so that CardBus controllers
in PCI slots don't work. The PCI bridge is programmed to only allow
access to bus 1 but not higher busses.
The patch forces the PCI busses to be reassigned if a Grackle controller
is found and the machine identifies itself as "PowerMac1,1"
Signed-off-by: Pavel Roskin <proski@gnu.org>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This contains important fixes for the CPM2 PIC code. Eliminated
CPM_IRQ_OFFSET, pulling the respective interrupt numbers from the interrupt
mapping. Updated devicetree files to reflect that. Changed direct
IC-related IO accesses to the IO accessors. Fixed all the sense values to
keep coherency with ipic. In the current code, CPM2 stuff will have no IRQs
and hence could be hardly usable.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Allow more than the default 256 MPIC sources. Allocates a new flag
(MPIC_LARGE_VECTORS) to be used by platform code when instantiating
the mpic.
I picked 11 bits worth right now since it would cover the number of
sources on any hardware I have seen. It can always be increased later
if needed.
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This covers common CPM access functions, CPM interrupt controller code,
micropatch and a few compatibility things to kee the same driver base
working with arch/ppc. This version is refined with all the comments
(mostly PIC-related) addressed.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Added 8xx SoC peripherials: fec for Ethernet and smc for UARTs.
Ordinary routines to extract values from the device tree and insert
respective platform devices
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
It's useful to have access to struct ipic handle that just got created
in ipic_init().
For example, if we want to setup an external IRQ with out
a device node we need access ipic->irqhost to create the virtual to HW
IRQ mapping and to set the IRQ sense. With this we can mimic the old
sense array concept that existed in arch/ppc.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Remove redundant argument check for of_node_get().
It's ok to remove 'node' check because in real life cpm2_pic_init()
never gets called with node == NULL.
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Paul Mackerras <paulus@samba.org>
No need for ?: as of_node_get() can handle NULL argument.
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
arch/powerpc/sysdev/qe_lib/qe_ic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Signed-off-by: Paul Mackerras <paulus@samba.org>
No need for ?: because of_node_get() can handle NULL argument.
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Paul Mackerras <paulus@samba.org>
No need for ?: because of_node_get() can handle NULL argument.
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The mmio nvram driver (used by cell only atm) isn't properly parsing
the device-tree, meaning that nvram isn't found correctly on the new
Cell blades. It works ok for old blades where the nvram is at the
root of the device tree but fails on Malta and CAB when it's hanging
off axon. This fixes it by using the proper OF parsing functions.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
sysdev/rom.c is for arch/powerpc only. Don't compile it when building
an arch/ppc kernel.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Sylvain Munaut <tnt@246tNt.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Only compare the exact HT capability bits against HT_CAPTYPE_IRQ,
this is a little paranoid, but doesn't hurt.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
On 85xx we don't build in dcr support because the core doesn't implement the
instructions. This caused problems when building an 85xx kernel. Additionally
made it so we only build __mtdcr/__mfdcr if we are CONFIG_PPC_DCR_NATIVE.
The 85xx build issue wasPointed out by Dai Haruki.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
When I renamed dcr.S to dcr_low.S (and added dcr.c) it looks like the
old dcr.S file didn't properly get removed. This fixes it.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patch causes a sync do be done after masking a QE interrupt, to
ensure that the masking has completed before interrupts are enabled.
This allows the masking of the cascade IRQ to be removed without causing
spurious interrupts.
The mask_and_ack function is also removed and set to the mask function,
as the two are identical.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Add missing include in rom.c. Fixes this build error when CONFIG_MTD=y:
arch/powerpc/sysdev/rom.c:26: error: implicit declaration of function
of_platform_device_create
Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
No other chips use this device, it belongs in a 52xx-specific path.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This adds support for flash device descriptions to the OF device tree.
It's inspired by and partially borrowed from Sergei's patch "[RFC]
Adding MTD to device tree.patch".
Signed-off-by: Vitaly Wool <vwool@ru.mvista.com>
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
arch/powerpc/sysdev/mpc52xx_pic.c breaks the ppc build
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The following patch adds a tsi108/9 pci interrupt controller host.
On mpc7448hpc2 board, pci_irq_fixup function is removed, which makes the
pci_read_irq_line be the default pci irq fixup.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patch adds full cell iommu support (and iommu disabled mode).
It implements mapping/unmapping of iommu pages on demand using the
standard powerpc iommu framework. It also supports running with
iommu disabled for machines with less than 2GB of memory. (The
default is off in that case, though it can be forced on with the
kernel command line option iommu=force).
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patch completely refactors DMA operations for 64 bits powerpc. 32 bits
is untouched for now.
We use the new dev_archdata structure to add the dma operations pointer
and associated data to struct device. While at it, we also add the OF node
pointer and numa node. In the future, we might want to look into merging
that with pci_dn as well.
The old vio, pci-iommu and pci-direct DMA ops are gone. They are now replaced
by a set of generic iommu and direct DMA ops (non PCI specific) that can be
used by bus types. The toplevel implementation is now inline.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patch applies on top of the MPIC DCR support. It makes the MPIC
driver capable of a lot more auto-configuration based on the device-tree,
for example, it can retreive it's own physical address if not passed as
an argument, find out if it's DCR or MMIO mapped, and set the BIG_ENDIAN
flag automatically in the presence of a "big-endian" property in the
device-tree node.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patch implements support for DCR based MPIC implementations. Such
implementations have the MPIC_USES_DCR flag set and don't use the phys_addr
argument of mpic_alloc (they require a valid dcr mapping in the device node)
This version of the patch can use a little bif of cleanup still (I can
probably consolidate rb->dbase/doff, at least once I'm sure on how the
hardware is actually supposed to work vs. possible simulator issues) and
it should be possible to build a DCR-only version of the driver. I need
to cleanup a bit the CONFIG_* handling for that and probably introduce
CONFIG_MPIC_MMIO and CONFIG_MPIC_DCR.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patch adds new dcr_map/dcr_read/dcr_write accessors for DCRs that
can be used by drivers to transparently address either native DCRs or
memory mapped DCRs. The implementation for memory mapped DCRs is done
after the binding being currently worked on for SLOF and the Axon
chipset. This patch enables it for the cell native platform
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The qe_brg structure manually defined each of the 16 BRG registers, which
made any code that used them cumbersome. This patch replaces the fields
with a single 16-element array.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
* Cleaned up interrupt mapping a little by adding a helper
function which parses the irq out of the device-tree, and puts
it into a resource.
* Changed the arch/ppc platform files to specify PHY_POLL, instead of -1
* Changed the fixed phy to use PHY_IGNORE_INTERRUPT
* Added ethtool.h and mii.h to phy.h includes
Signed-off-by: Paul Mackerras <paulus@samba.org>
This adds support for the MPC52xx Interrupt controller for
ARCH=powerpc.
It includes the main code in arch/powerpc/sysdev/ as well as a header
file in include/asm-powerpc.
Signed-off-by: Nicolas DET <nd@bplan-gmbh.de>
Acked-by: Sylvain Munaut <tnt@246tNt.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Changed qe_issue_cmd() to write cmd_input to the CECDR unmodified. It
was treating cmd_input as a virtual address and tried to convert it to
a physical address.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The 10Gigabit ethernet device drivers appear to be able to chew
up all 256MB of TCE mappings on pSeries systems, as evidenced by
numerous error messages:
iommu_alloc failed, tbl c0000000010d5c48 vaddr c0000000d875eff0 npages 1
Some experimentation indicates that this is essentially because
one 1500 byte ethernet MTU gets mapped as a 64K DMA region when
the large 64K pages are enabled. Thus, it doesn't take much to
exhaust all of the available DMA mappings for a high-speed card.
This patch changes the iommu allocator to work with its own
unique, distinct page size. Although the patch is long, its
actually quite simple: it just #defines a distinct IOMMU_PAGE_SIZE
and then uses this in all the places that matter.
As a side effect, it also dramatically improves network performance
on platforms with H-calls on iommu translation inserts/removes (since
we no longer call it 16 times for a 1500 bytes packet when the iommu HW
is still 4k).
In the future, we might want to make the IOMMU_PAGE_SIZE a variable
in the iommu_table instance, thus allowing support for different HW
page sizes in the iommu itself.
Signed-off-by: Linas Vepstas <linas@austin.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
On CHRP platforms with only a 8259 controller, we should set the
default IRQ host to the 8259 driver's one for the IRQ probing
fallbacks to work in case the IRQ tree is incorrect (like on
Pegasos for example). Without this fix, we get a bunch of WARN_ON's
during boot.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This causes ipic_set_irq_type to set the handler directly rather
than call set_irq_handler, which causes spinlock recursion because
the lock is already held when ipic_set_irq_type is called.
I'm also not convinced that ipic_set_irq_type should be changing the
handler at all. There seem to be several controllers that don't and
several that do. Those that do would break what appears to be a common
usage of calling set_irq_chip_and_handler followed by set_irq_type, if a
non-standard handler were to be used. OTOH, irq_create_of_mapping()
doesn't set the handler, but only calls set_irq_type().
This patch gets things working in the spinlock-debugging-enabled case,
but I'm curious as to where the handler setting is ideally supposed to be
done. I don't see any documentation on set_irq_type() that clarifies
what the semantics are supposed to be.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
MPC8323EMDS board ethernet interface with RMII uses the CLK16 divisor
for the rx and tx clock, but the ucc_set_qe_mux_rxtx() function doesn't
handle the CLK16 setting of the CMXUCR3 and CMXUCR4 registers. This
fixes it.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
In ucc_fast.c and ucc_slow.c, "illegal" is twice spelled "illagal".
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This fixes the warning message from the return value of function
get_property(), by making sure that the variable that receives the
value is marked as const.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
--
Signed-off-by: Paul Mackerras <paulus@samba.org>
Apparently we've copied the todc drivers, for various RTCs used in
embedded machines from ARCH=ppc to ARCH=powerpc, despite the fact that
it's never used in the latter. This patch removes it.
If we ever need these drivers (which we probably shouldn't now the RTC
class stuff is in), we can transfer them one by one from ARCH=ppc,
removing from the hideous abomination which is the todc
"infrastructure".
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Remove struct pt_regs * from all handlers.
Also remove the regs argument from get_irq() functions.
Compile tested with arch/powerpc/config/* and
arch/ppc/configs/prep_defconfig
Signed-off-by: Olaf Hering <olaf@aepfle.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Hrm, there's no way this ever built at time of merge. There's a missing } and
the wrong type on phy_irq.
Also, another const for get_property().
CC arch/powerpc/sysdev/fsl_soc.o
arch/powerpc/sysdev/fsl_soc.c: In function 'fs_enet_of_init':
arch/powerpc/sysdev/fsl_soc.c:625: error: assignment of read-only variable 'phy_irq'
arch/powerpc/sysdev/fsl_soc.c:625: warning: assignment makes integer from pointer without a cast
arch/powerpc/sysdev/fsl_soc.c:661: warning: assignment discards qualifiers from pointer target type
arch/powerpc/sysdev/fsl_soc.c:684: error: subscripted value is neither array nor pointer
arch/powerpc/sysdev/fsl_soc.c:687: error: subscripted value is neither array nor pointer
arch/powerpc/sysdev/fsl_soc.c:722: warning: ISO C90 forbids mixed declarations and code
arch/powerpc/sysdev/fsl_soc.c:728: error: invalid storage class for function 'cpm_uart_of_init'
arch/powerpc/sysdev/fsl_soc.c:798: error: initializer element is not constant
arch/powerpc/sysdev/fsl_soc.c:798: error: expected declaration or statement at end of input
make[1]: *** [arch/powerpc/sysdev/fsl_soc.o] Error 1
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Fix up some of the buildbreaks from the irq handler changes.
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
of passing regs around manually through all ~1800 interrupt handlers in the
Linux kernel.
The regs pointer is used in few places, but it potentially costs both stack
space and code to pass it around. On the FRV arch, removing the regs parameter
from all the genirq function results in a 20% speed up of the IRQ exit path
(ie: from leaving timer_interrupt() to leaving do_IRQ()).
Where appropriate, an arch may override the generic storage facility and do
something different with the variable. On FRV, for instance, the address is
maintained in GR28 at all times inside the kernel as part of general exception
handling.
Having looked over the code, it appears that the parameter may be handed down
through up to twenty or so layers of functions. Consider a USB character
device attached to a USB hub, attached to a USB controller that posts its
interrupts through a cascaded auxiliary interrupt controller. A character
device driver may want to pass regs to the sysrq handler through the input
layer which adds another few layers of parameter passing.
I've build this code with allyesconfig for x86_64 and i386. I've runtested the
main part of the code on FRV and i386, though I can't test most of the drivers.
I've also done partial conversion for powerpc and MIPS - these at least compile
with minimal configurations.
This will affect all archs. Mostly the changes should be relatively easy.
Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
struct pt_regs *old_regs = set_irq_regs(regs);
And put the old one back at the end:
set_irq_regs(old_regs);
Don't pass regs through to generic_handle_irq() or __do_IRQ().
In timer_interrupt(), this sort of change will be necessary:
- update_process_times(user_mode(regs));
- profile_tick(CPU_PROFILING, regs);
+ update_process_times(user_mode(get_irq_regs()));
+ profile_tick(CPU_PROFILING);
I'd like to move update_process_times()'s use of get_irq_regs() into itself,
except that i386, alone of the archs, uses something other than user_mode().
Some notes on the interrupt handling in the drivers:
(*) input_dev() is now gone entirely. The regs pointer is no longer stored in
the input_dev struct.
(*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does
something different depending on whether it's been supplied with a regs
pointer or not.
(*) Various IRQ handler function pointers have been moved to type
irq_handler_t.
Signed-Off-By: David Howells <dhowells@redhat.com>
(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
* master.kernel.org:/pub/scm/linux/kernel/git/davej/configh:
Remove all inclusions of <linux/config.h>
Manually resolved trivial path conflicts due to removed files in
the sound/oss/ subdirectory.
* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (25 commits)
[POWERPC] Add support for the mpc832x mds board
[POWERPC] Add initial support for the e300c2 core
[POWERPC] Add MPC8360EMDS default dts file
[POWERPC] Add MPC8360EMDS board support
[POWERPC] Add QUICC Engine (QE) infrastructure
[POWERPC] Add QE device tree node definition
[POWERPC] Don't try to just continue if xmon has no input device
[POWERPC] Fix a printk in pseries_mpic_init_IRQ
[POWERPC] Get default baud rate in udbg_scc
[POWERPC] Fix zImage.coff on oldworld PowerMac
[POWERPC] Fix xmon=off and cleanup xmon initialisation
[POWERPC] Cleanup include/asm-powerpc/xmon.h
[POWERPC] Update swim3 printk after blkdev.h change
[POWERPC] Cell interrupt rework
POWERPC: mpc82xx merge: board-specific/platform stuff(resend)
POWERPC: 8272ads merge to powerpc: common stuff
POWERPC: Added devicetree for mpc8272ads board
[POWERPC] iSeries has no legacy I/O
[POWERPC] implement BEGIN/END_FW_FTR_SECTION
[POWERPC] iSeries does not need pcibios_fixup_resources
...
This adds defines for the hypertransport capability subtypes and starts
using them a little.
[akpm@osdl.org: fix typo]
Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Greg KH <greg@kroah.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Add QUICC Engine (QE) configuration, header files, and
QE management and library code that are used by QE devices
drivers.
Includes Leo's modifications up to, and including, the
platform_device to of_device adaptation:
"The series of patches add generic QE infrastructure called
qe_lib, and MPC8360EMDS board support. Qe_lib is used by
QE device drivers such as ucc_geth driver.
This version updates QE interrupt controller to use new irq
mapping mechanism, addresses all the comments received with
last submission and includes some style fixes.
v2: Change to use device tree for BCSR and MURAM;
Remove I/O port interrupt handling code as it is not generic
enough.
v3: Address comments from Kumar; Update definition of several
device tree nodes; Copyright style change."
In addition, the following changes have been made:
o removed typedefs
o uint -> u32 conversions
o removed following defines:
QE_SIZEOF_BD, BD_BUFFER_ARG, BD_BUFFER_CLEAR, BD_BUFFER,
BD_STATUS_AND_LENGTH_SET, BD_STATUS_AND_LENGTH, and BD_BUFFER_SET
because they hid sizeof/in_be32/out_be32 operations from the reader.
o fixed qe_snums_init() serial num assignment to use a const array
o made CONFIG_UCC_FAST select UCC_SLOW
o reduced NR_QE_IC_INTS from 128 to 64
o remove _IO_BASE, etc. defines (not used)
o removed irrelevant comments, added others to resemble removed BD_ defines
o realigned struct definitions in headers
o various other style fixes including things like pinMask -> pin_mask
o fixed a ton of whitespace issues
o marked ioregs as __be32/__be16
o removed platform_device code and redundant get_qe_base()
o removed redundant comments
o added cpu_relax() to qe_reset
o uncasted all get_property() assignments
o eliminated unneeded casts
o eliminated immrbar_phys_to_virt (not used)
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Shlomi Gridish <gridish@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Many files include the filename at the beginning, serveral used a wrong one.
Signed-off-by: Uwe Zeisberger <Uwe_Zeisberger@digi.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
This has modules of common directories related to the
mpc8272ADS board, mainly common cpm2 changes and fsl_soc.c
portions related to the bitbang MDIO and other mechanisms specific
for this family.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (29 commits)
[POWERPC] Fix rheap alignment problem
[POWERPC] Use check_legacy_ioport() for ISAPnP
[POWERPC] Avoid NULL pointer in gpio1_interrupt
[POWERPC] Enable generic rtc hook for the MPC8349 mITX
[POWERPC] Add powerpc get/set_rtc_time interface to new generic rtc class
[POWERPC] Create a "wrapper" script and use it in arch/powerpc/boot
[POWERPC] fix spin lock nesting in hvc_iseries
[POWERPC] EEH failure to mark pci slot as frozen.
[POWERPC] update powerpc defconfig files after libata kconfig breakage
[POWERPC] enable sysrq in pmac32_defconfig
[POWERPC] UPIO_TSI cleanup
[POWERPC] rewrite mkprep and mkbugboot in sane C
[POWERPC] maple/pci iomem annotations
[POWERPC] powerpc oprofile __user annotations
[POWERPC] cell spufs iomem annotations
[POWERPC] NULL noise removal: spufs
[POWERPC] ppc math-emu needs -fno-builtin-fabs for math.c and fabs.c
[POWERPC] update mpc8349_itx_defconfig and remove some debug settings
[POWERPC] Always call cede in pseries dedicated idle loop
[POWERPC] Fix loop logic in irq_alloc_virt()
...
0x08 is the HT capability, while PCI_CAP_ID_HT_IRQCONF would be
the subtype 0x80 that mpic_scan_ht_pic() uses.
Rename PCI_CAP_ID_HT_IRQCONF into PCI_CAP_ID_HT.
And by the way, use it in the ipath driver instead of defining its
own HT_CAPABILITY_ID.
Signed-off-by: Brice Goglin <brice@myri.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This patch causes fsl_soc.h to import the definition of phys_addr_t
itself, rather than relying on its includer to do so.
Signed-off-by: Scott Wood <scott@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patch fixes the assignment of pending registers to IRQ numbers for
the IPIC; the code previously assigned all IRQs to the high pending word
regardless of which word the interrupt belonged to.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The fs_no mean used to be fs_enet driver driven, hence it was an
enumeration across all the possible fs_enet "users" in the SoC. Now, with
QE on the pipeline, and to make DTS descriptions more clear, fs_no features
relevant SoC part number, with additional field to describe the SoC type.
Another reason for that is now not only fs_enet is going to utilize those
stuff. There might be UART, HLDC, and even USB, so to prevent confusion and
be ready for upcoming OF_device transfer, fs_enet and cpm_uart drivers were
updated in that concern, as well as the relevant DTS.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
Incorporating the new way of cpm2 immr access, introduced in the previous
patch, into CPM2 peripheral devices (fs_enet and cpm_uart). Both ppc and
powerpc approved working( real actions taken in powerpc only, ppc just
has a wrapper to keep init stuff consistent).
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
The stuff below cleans up the code attempting to remap the whole cpm2_immr
early, as well as places happily assuming that fact. This is more like the 2.4
legacy stuff, and is at least confusing and unclear now.
To keep the world comfortable, a new mechanism is introduced: before accessing
specific immr register/register set, one needs to map it, using cpm2_map(<reg>),
for instance, access to CPM command register will look like
volatile cpm_cpm2_t *cp = cpm2_map(im_cpm);
keeping the code clear, yet without "already defined somewhere" cpm2_immr.
So far, unmapping code is not implemented, but it's not a big deal to add it,
if the whole idea makes sense.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
This moves the cpm2 common code and PIC stuff to the powerpc. Most of the files
were just copied from ppc/, with minor tuning to make it compile, and, subsequently, work.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
This patch contains necessary modifications to support the CPM2 SoC peripherals.
For the time being, those are fs_enet Ethernet driver and cpm_uart serial.
Written initially to support mpc8560, it also suites to the part of the large PQ2
(more specifically, mpc8260) family.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
It seems that the occasional data corruption observed with the tg3
driver wasn't due to missing barriers after all, but rather seems to
be due to the DART (= IOMMU) in the U4 northbridge reading stale
IOMMU table entries from memory due to a race. This fixes it by
making the CPU read the entry back from memory before using it.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This adds a new hardware information table for mpic. This enables
the mpic code to deal with mpic controllers with different register
layouts and hardware behaviours.
This introduces CONFIG_MPIC_WEIRD. For boards with non standard mpic
controllers, select CONFIG_MPIC_WEIRD and add its hardware information
in the mpic_infos[] array.
TSI108/109 PIC takes the first index of weird hardware information
table. :) The table can be extended. The Tsi108/109 PIC looks like
standard OpenPIC but, in fact, is different in register mapping and
behavior.
The patch does not affect the behavior of standard mpic. If
CONFIG_MPIC_WEIRD is not defined, the code is essentially identical to
the current code.
[benh@kernel.crashing.org:
This patch is a slightly cleaned up version of Zang Roy's support for
the TSI108 MPIC variant. It also fixes up MPC7448_hpc2 to use the new
version of the type macros and changes the way MPIC is selected in
Kconfig to better match what is done for other system devices.
]
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This converts ipic code to Benh's IRQ mods. For the IPIC, IRQ sense values in the device tree equal those in include/linux/irq.h; that's 8 for low assertion (most internal IRQs on mpc83xx), and 2 for high-to-low change.
spinlocks added to [un]mask, ack operations; default handler and type now set in host_map; and redundant condition check eliminated.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Keep from breaking 83xx arch/ppc build. Back up old school arch/powerpc/sysdev/ipic.[hc] to arch/ppc/syslib.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The patch rewrites mpc7448hpc2 board irq support according to the new
mpic device tree interface.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
IRQ setup now comes from the Flat Device Tree and use the new generic
IRQ code. Fixed the fsl_soc.c IRQ OF interrupt node parsing.
Removed some unused MPC86xx macro definition.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
(cherry picked from 919fede6ed commit)
Also accept "local-mac-address". However the old "address"
is now obsolete, but accepted for backwards compatibility.
It should be removed after all device trees have been
converted to use "mac-address".
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
We don't have much in the way of doc comments, but some of those we do have
don't work because they start with "/***" or "/*", not "/**" which is what
kernel-doc requires.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
IRQ setup now comes from the Flat Device Tree and use the new generic
IRQ code. Fixed the fsl_soc.c IRQ OF interrupt node parsing.
Removed some unused MPC86xx macro definition.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Now that get_property() returns a void *, there's no need to cast its
return value. Also, treat the return value as const, so we can
constify get_property later.
tsi108 driver changes.
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Now that get_property() returns a void *, there's no need to cast its
return value. Also, treat the return value as const, so we can
constify get_property later.
powerpc core changes.
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The quad g5 currently doesn't boot due to two problems. This patch fixes the
first one: Apple new way of doing interrupt specifiers in OF for devices using
the HT APIC isn't properly parsed by the new MPIC driver code.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This patch slightly reworks the new irq code to fix a small design error. I
removed the passing of the trigger to the map() calls entirely, it was not a
good idea to have one call do two different things. It also fixes a couple of
corner cases.
Mapping a linux virtual irq to a physical irq now does only that. Setting the
trigger is a different action which has a different call.
The main changes are:
- I no longer call host->ops->map() for an already mapped irq, I just return
the virtual number that was already mapped. It was called before to give an
opportunity to change the trigger, but that was causing issues as that could
happen while the interrupt was in use by a device, and because of the
trigger change, map would potentially muck around with things in a racy way.
That was causing much burden on a given's controller implementation of
map() to get it right. This is much simpler now. map() is only called on
the initial mapping of an irq, meaning that you know that this irq is _not_
being used. You can initialize the hardware if you want (though you don't
have to).
- Controllers that can handle different type of triggers (level/edge/etc...)
now implement the standard irq_chip->set_type() call as defined by the
generic code. That means that you can use the standard set_irq_type() to
configure an irq line manually if you wish or (though I don't like that
interface), pass explicit trigger flags to request_irq() as defined by the
generic kernel interfaces. Also, using those interfaces guarantees that
your controller set_type callback is called with the descriptor lock held,
thus providing locking against activity on the same interrupt (including
mask/unmask/etc...) automatically. A result is that, for example, MPIC's
own map() implementation calls irq_set_type(NONE) to configure the hardware
to the default triggers.
- To allow the above, the irq_map array entry for the new mapped interrupt
is now set before map() callback is called for the controller.
- The irq_create_of_mapping() (also used by irq_of_parse_and_map()) function
for mapping interrupts from the device-tree now also call the separate
set_irq_type(), and only does so if there is a change in the trigger type.
- While I was at it, I changed pci_read_irq_line() (which is the helper I
would expect most archs to use in their pcibios_fixup() to get the PCI
interrupt routing from the device tree) to also handle a fallback when the
DT mapping fails consisting of reading the PCI_INTERRUPT_PIN to know wether
the device has an interrupt at all, and the the PCI_INTERRUPT_LINE to get an
interrupt number from the device. That number is then mapped using the
default controller, and the trigger is set to level low. That default
behaviour works for several platforms that don't have a proper interrupt
tree like Pegasos. If it doesn't work for your platform, then either
provide a proper interrupt tree from the firmware so that fallback isn't
needed, or don't call pci_read_irq_line()
- Add back a bit that got dropped by my main rework patch for properly
clearing pending IPIs on pSeries when using a kexec
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
With the new interrupt rework, an interrupt "host" map() callback can be
called after the interrupt is already active.
It's called again for an already mapped interrupt to allow changing the
trigger setup, and currently this is not guarded with a test of wether
the interrupt is requested or not.
I plan to change some of this logic to be a bit less lenient against
random reconfiguring of live interrupts but just not yet.
The ported MPIC driver has a bug where when that happens, it will mask
the interrupt. This changes it to preserve the previous masking of the
interrupt instead.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This adds the new irq remapper core and removes the old one. Because
there are some fundamental conflicts with the old code, like the value
of NO_IRQ which I'm now setting to 0 (as per discussions with Linus),
etc..., this commit also changes the relevant platform and driver code
over to use the new remapper (so as not to cause difficulties later
in bisecting).
This patch removes the old pre-parsing of the open firmware interrupt
tree along with all the bogus assumptions it made to try to renumber
interrupts according to the platform. This is all to be handled by the
new code now.
For the pSeries XICS interrupt controller, a single remapper host is
created for the whole machine regardless of how many interrupt
presentation and source controllers are found, and it's set to match
any device node that isn't a 8259. That works fine on pSeries and
avoids having to deal with some of the complexities of split source
controllers vs. presentation controllers in the pSeries device trees.
The powerpc i8259 PIC driver now always requests the legacy interrupt
range. It also has the feature of being able to match any device node
(including NULL) if passed no device node as an input. That will help
porting over platforms with broken device-trees like Pegasos who don't
have a proper interrupt tree.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This copies the i8259 interrupt controller driver from arch/powerpc
to arch/ppc. It's currently shared by both architectures, but the upcoming
arch/powerpc interrupt changes will break the arch/ppc builds. The changes
are too important to just use #ifdef's in the driver.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This adapts the generic powerpc interrupt handling code, and all of
the platforms except for the embedded 6xx machines, to use the new
genirq framework.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Use the new IRQF_ constants and remove the SA_INTERRUPT define
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (43 commits)
[POWERPC] Use little-endian bit from firmware ibm,pa-features property
[POWERPC] Make sure smp_processor_id works very early in boot
[POWERPC] U4 DART improvements
[POWERPC] todc: add support for Time-Of-Day-Clock
[POWERPC] Make lparcfg.c work when both iseries and pseries are selected
[POWERPC] Fix idr locking in init_new_context
[POWERPC] mpc7448hpc2 (taiga) board config file
[POWERPC] Add tsi108 pci and platform device data register function
[POWERPC] Add general support for mpc7448hpc2 (Taiga) platform
[POWERPC] Correct the MAX_CONTEXT definition
powerpc: minor cleanups for mpc86xx
[POWERPC] Make sure we select CONFIG_NEW_LEDS if ADB_PMU_LED is set
[POWERPC] Simplify the code defining the 64-bit CPU features
[POWERPC] powerpc: kconfig warning fix
[POWERPC] Consolidate some of kernel/misc*.S
[POWERPC] Remove unused function call_with_mmu_off
[POWERPC] update asm-powerpc/time.h
[POWERPC] Clean up it_lp_queue.h
[POWERPC] Skip the "copy down" of the kernel if it is already at zero.
[POWERPC] Add the use of the firmware soft-reset-nmi to kdump.
...
Consolidation: remove the irq_affinity[NR_IRQS] array and move it into the
irq_desc[NR_IRQS].affinity field.
[akpm@osdl.org: sparc64 build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.
While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.
The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.
This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.
As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.
The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.
We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.
This patch:
rename desc->handler to desc->chip.
Originally i did not want to do this, because it's a big patch. But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.
I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.
So lets get over with this quickly. The conversion was done automatically
via scripts and converts all the code in the kernel.
This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.
[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Better late than never...
Respin based on previous comment. Only remaining issue last time was an
extra mb() that I've taken out.
Signed-off-by: Paul Mackerras <paulus@samba.org>
This is a resubmit with a proper subject and with all comments addressed.
Applies cleanly to powerpc.git 649e857972
Mark
--
The todc code from arch/ppc supports many todc/rtc chips and is needed
in arch/powerpc. This patch adds the todc code to arch/powerpc.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
--
arch/powerpc/Kconfig | 7
arch/powerpc/sysdev/Makefile | 1
arch/powerpc/sysdev/todc.c | 392 ++++++++++++++++++++++++++++++++++
include/asm-powerpc/todc.h | 487 +++++++++++++++++++++++++++++++++++++++++++
4 files changed, 887 insertions(+)
--
Signed-off-by: Paul Mackerras <paulus@samba.org>
Add Tundra Semiconductor tsi108 pci and platform device data register
function support.
Signed-off-by: Alexandre Bounine <alexandreb@tundra.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
---
Signed-off-by: Paul Mackerras <paulus@samba.org>
locking init cleanups:
- convert " = SPIN_LOCK_UNLOCKED" to spin_lock_init() or DEFINE_SPINLOCK()
- convert rwlocks in a similar manner
this patch was generated automatically.
Motivation:
- cleanliness
- lockdep needs control of lock initialization, which the open-coded
variants do not give
- it's also useful for -rt and for lock debugging in general
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (139 commits)
[POWERPC] re-enable OProfile for iSeries, using timer interrupt
[POWERPC] support ibm,extended-*-frequency properties
[POWERPC] Extra sanity check in EEH code
[POWERPC] Dont look for class-code in pci children
[POWERPC] Fix mdelay badness on shared processor partitions
[POWERPC] disable floating point exceptions for init
[POWERPC] Unify ppc syscall tables
[POWERPC] mpic: add support for serial mode interrupts
[POWERPC] pseries: Print PCI slot location code on failure
[POWERPC] spufs: one more fix for 64k pages
[POWERPC] spufs: fail spu_create with invalid flags
[POWERPC] spufs: clear class2 interrupt status before wakeup
[POWERPC] spufs: fix Makefile for "make clean"
[POWERPC] spufs: remove stop_code from struct spu
[POWERPC] spufs: fix spu irq affinity setting
[POWERPC] spufs: further abstract priv1 register access
[POWERPC] spufs: split the Cell BE support into generic and platform dependant parts
[POWERPC] spufs: dont try to access SPE channel 1 count
[POWERPC] spufs: use kzalloc in create_spu
[POWERPC] spufs: fix initial state of wbox file
...
Manually resolved conflicts in:
drivers/net/phy/Makefile
include/asm-powerpc/spu.h
In some systems we may have both a platform EHCI controller and PCI EHCI
controller. Previously we couldn't build the EHCI support as a module due
to conflicting module_init() calls in the code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
On Tue, Jun 20, 2006 at 02:01:26PM +1000, Benjamin Herrenschmidt wrote:
> On Mon, 2006-06-19 at 13:08 -0700, Mark A. Greer wrote:
> > MPC10x-style interrupt controllers have a serial mode that allows
> > several interrupts to be clocked in through one INT signal.
> >
> > This patch adds the software support for that mode.
>
> You hard code the clock ratio... why not add a separate call to be
> called after mpic_init,
> something like mpic_set_serial_int(int mpic, int enable, int
> clock_ratio) ?
How's this?
--
MPC10x-style interrupt controllers have a serial mode that allows
several interrupts to be clocked in through one INT signal.
This patch adds the software support for that mode.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
--
arch/powerpc/sysdev/mpic.c | 20 ++++++++++++++++++++
include/asm-powerpc/mpic.h | 10 ++++++++++
2 files changed, 30 insertions(+)
--
Signed-off-by: Paul Mackerras <paulus@samba.org>
Allocate IOMMU tables local to the relevant node.
Signed-off-by: Anton Blanchard <anton@samba.org>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Micro-optimisation - add no-minimal-toc to some more arch/powerpc Makefiles.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Turn on the DART already at 1GB. This is needed because of crippled
devices in some systems, i.e. Airport Extreme cards, only supporting
30-bit DMA addresses.
Otherwise, users with between 1 and 2GB of memory will need to manually
enable it with iommu=force, and that's no good.
Some simple performance tests show that there's a slight impact of
enabling DART, but it's in the 1-3% range (kernel build with disk I/O
as well as over NFS).
iommu=off can still be used for those who don't want to deal with the
overhead (and don't need it for any devices).
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
