Commit Graph

873826 Commits

Author SHA1 Message Date
Chris Wilson
370831fcb1 drm/i915/selftests: Initialise err in case there are no engines!
drivers/gpu/drm/i915//gt/selftest_engine_heartbeat.c:255 live_heartbeat_fast() error: uninitialized symbol 'err'.
drivers/gpu/drm/i915//gt/selftest_engine_heartbeat.c:320 live_heartbeat_off() error: uninitialized symbol 'err'.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191025135943.12524-2-chris@chris-wilson.co.uk
2019-10-28 16:09:44 +00:00
Chris Wilson
a7f328fc78 drm/i915/execlists: Simply walk back along request timeline on reset
The request's timeline will only contain requests from this context, in
order of execution. Therefore, we can simply look back along this
timeline to find the currently executing request.

If we do find that the current context has completed its last request,
that does not imply that all requests are completed in the context, so
only advance the ring->head up to the end of the known completions!

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191028124125.25176-1-chris@chris-wilson.co.uk
2019-10-28 16:09:44 +00:00
Chris Wilson
13670f4ce9 drm/i915/selftests: Check a few more fixed locations within the context image
As we use hard coded offsets for a few locations within the context
image, include those in the selftests to assert that they are valid.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191028121803.29408-1-chris@chris-wilson.co.uk
2019-10-28 16:09:43 +00:00
Christian König
a39414716c drm/amdgpu: add independent DMA-buf import v9
Instead of relying on the DRM functions just implement our own import
functions. This prepares support for taking care of unpinned DMA-buf.

v2: enable for all exporters, not just amdgpu, fix invalidation
    handling, lock reservation object while setting callback
v3: change to new dma_buf attach interface
v4: split out from unpinned DMA-buf work
v5: rebased and cleanup on new DMA-buf interface
v6: squash with invalidation callback change,
    stop using _(map|unmap)_locked
v7: drop invalidations when the BO is already in system domain
v8: rebase on new DMA-buf patch and drop move notification
v9: cleanup comments

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/337948/
2019-10-28 16:59:43 +01:00
Christian König
6e6db2722c drm/amdgpu: add independent DMA-buf export v8
Add an DMA-buf export implementation independent of the DRM helpers.

This not only avoids the caching of DMA-buf mappings, but also
allows us to use the new dynamic locking approach.

This is also a prerequisite of unpinned DMA-buf handling.

v2: fix unintended recursion, remove debugging leftovers
v3: split out from unpinned DMA-buf work
v4: rebase on top of new no_sgt_cache flag
v5: fix some warnings by including amdgpu_dma_buf.h
v6: fix locking for non amdgpu exports
v7: rebased on new DMA-buf locking patch
v8: drop extra include

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/337949/
2019-10-28 16:59:35 +01:00
Matt Roper
e5df52dcf8 drm/i915/tgl: Handle AUX interrupts for TC ports
We're currently only processing AUX interrupts on the combo ports; make
sure we handle the TC ports as well.

v2: Drop stale comment

Fixes: f663769a5e ("drm/i915/tgl: initialize TC and TBT ports")
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191024173023.22113-1-matthew.d.roper@intel.com
2019-10-28 08:27:04 -07:00
Kyle Mahlkuch
d02f5aab06 drm/radeon: Fix EEH during kexec
During kexec some adapters hit an EEH since they are not properly
shut down in the radeon_pci_shutdown() function. Adding
radeon_suspend_kms() fixes this issue.
Enabled only on PPC because this patch causes issues on some other
boards.

Signed-off-by: Kyle Mahlkuch <kmahlkuc@linux.vnet.ibm.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-28 11:19:17 -04:00
YueHaibing
b64919a236 drm/amd/powerplay: Make two functions static
Fix sparse warnings:

drivers/gpu/drm/amd/amdgpu/../powerplay/arcturus_ppt.c:2050:5:
 warning: symbol 'arcturus_i2c_eeprom_control_init' was not declared. Should it be static?
drivers/gpu/drm/amd/amdgpu/../powerplay/arcturus_ppt.c:2068:6:
 warning: symbol 'arcturus_i2c_eeprom_control_fini' was not declared. Should it be static?

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-28 11:19:17 -04:00
Wambui Karuga
f440ff44b1 drm/amd: correct "_LENTH" mispelling in constant
Correct the "_LENTH" mispelling in the AMDGPU_MAX_TIMEOUT_PARAM_LENGTH
constant.

Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-28 11:19:17 -04:00
Wambui Karuga
7e0ff20c7a drm/amd: declare amdgpu_exp_hw_support in amdgpu.h
Declare `amdgpu_exp_hw_support` as extern in amdgpu.h to address the
following sparse warning:
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c:118:5: warning: symbol 'amdgpu_exp_hw_support' was not declared. Should it be static?

Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com>
Suggested-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-28 11:19:17 -04:00
YueHaibing
4ef0b9d0a1 drm/amd/display: Make calculate_integer_scaling static
Fix sparse warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_resource.c:963:6:
 warning: symbol 'calculate_integer_scaling' was not declared. Should it be static?

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-28 11:19:17 -04:00
Pelle van Gils
11436b0177 drm/amdgpu/powerplay/vega10: allow undervolting in p7
The vega10_odn_update_soc_table() function does not allow the SCLK
dependent voltage to be set for power-state 7 to a value below the default
in pptable. Change the for-loop condition to allow undervolting in the
highest state.

Bug: https://bugzilla.kernel.org/show_bug.cgi?id=205277
Signed-off-by: Pelle van Gils <pelle@vangils.xyz>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-28 11:19:17 -04:00
chen gong
f509be1840 drm/amd/powerplay: Disable gfx CGPG when suspend smu
if no disable gfx CGPG when suspend smu, enabling gfx CGPG will fail when resume smu.

Platform: Renoir
dmesg log information:

[  151.844110 ] amdgpu: [powerplay] SMU is resuming...
[  151.844116 ] amdgpu: [powerplay] dpm has been disabled
[  151.844604 ] amdgpu: [powerplay] Failed to send message 0x2f,response 0xfffffffb param 0x1
[  151.844605 ] amdgpu: [powerplay] SMU is resumed successfully!

Signed-off-by: chen gong <curry.gong@amd.com>
Acked-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-28 11:19:01 -04:00
Wambui Karuga
847a75fb9e drm/radeon: remove assignment for return value
Remove unnecessary assignment for return value and have the
function return the required value directly.
Issue found by coccinelle:
@@
local idexpression ret;
expression e;
@@

-ret =
+return
     e;
-return ret;

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Wambui Karuga <wambui@karuga.xyz>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-28 11:19:00 -04:00
zhongshiqi
039ffeaae3 dc.c:use kzalloc without test
dc.c:583:null check is needed after using kzalloc function

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: zhongshiqi <zhong.shiqi@zte.com.cn>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-28 11:19:00 -04:00
Chenwandun
b69cd5dd01 drm/amd/display: remove gcc warning Wunused-but-set-variable
drivers/gpu/drm/amd/display/dc/dce/dce_aux.c: In function dce_aux_configure_timeout:
drivers/gpu/drm/amd/display/dc/dce/dce_aux.c: warning: variable timeout set but not used [-Wunused-but-set-variable]

Signed-off-by: Chenwandun <chenwandun@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-28 11:19:00 -04:00
Krzysztof Wilczynski
5a884be547
drm/exynos: Move static keyword to the front of declaration
Move the static keyword to the front of declaration of modes,
and resolve the following compiler warning that can be seen
when building with warnings enabled (W=1):

drivers/gpu/drm/exynos/exynos_mixer.c:1074:2: warning:
  ‘static’ is not at beginning of declaration [-Wold-style-declaration]

Signed-off-by: Krzysztof Wilczynski <kw@linux.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2019-10-28 21:12:27 +09:00
Chris Wilson
746078b334 drm/i915/selftests: Exercise adjusting rpcs over all render-class engines
Iterate over all user-accessible render engines when checking whether
they can be adjusted for sseu.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191027225808.19437-2-chris@chris-wilson.co.uk
2019-10-28 12:08:29 +00:00
Chris Wilson
6804da20bb drm/i915/selftests: Select a random engine for testing memory regions
Use any blitter engine at random for prefilling the memory region.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191027225808.19437-5-chris@chris-wilson.co.uk
2019-10-28 11:57:17 +00:00
Chris Wilson
5a3e2b82af drm/i915/gt: Tidy up rps irq handler to use intel_gt
Since the rps is tied to its intel_gt, use that backpointer to find the
right engine rather than delving into i915.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Andi Shyti <andi.shyti@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191027175505.25470-1-chris@chris-wilson.co.uk
2019-10-28 11:42:59 +00:00
Chris Wilson
c8c197d426 drm/i915/selftests: Use a random engine for GEM coherency tests
Select a random user accessible engine for checking coherency results.
While we should check all engines, we use a random selection so that
over repeated runs we cover all.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191027225808.19437-4-chris@chris-wilson.co.uk
2019-10-28 11:42:59 +00:00
Jani Nikula
96815f3d8b drm/i915/bios: add compression parameter block definition
Add definition for block 56, the compression parameters.

v2: add missing slice_height (Vandita)

Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191024075608.11511-1-jani.nikula@intel.com
2019-10-28 13:34:30 +02:00
Chris Wilson
52aac377e7 drm/i915/selftests: Check all blitter engines for client blt
Check all user accessible engines that can blit work with our blitter
client.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191027225808.19437-3-chris@chris-wilson.co.uk
2019-10-28 11:24:50 +00:00
Chris Wilson
1f9f6353e8 drm/i915/selftests: Drop global engine lookup for gt selftests
As we are inside the gt, we have a local gt->engine[] lookup we should
be using in preference over the i915->engine[] copy.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191027225808.19437-1-chris@chris-wilson.co.uk
2019-10-28 11:23:35 +00:00
Chris Wilson
39f9547a33 drm/i915/selftests: Measure basic throughput of blit routines
We need to verify that our blitter routines perform as expected, so
measure it.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191028112207.5464-1-chris@chris-wilson.co.uk
2019-10-28 11:22:58 +00:00
Ville Syrjälä
1d581dc3f5 drm/i915: Add CHICKEN_TRANS_D
Add CHICKEN_TRANS definition for transcoder D.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191024122138.25065-2-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2019-10-28 12:51:17 +02:00
Ville Syrjälä
12c4d4c18c drm/i915: Use _PICK() for CHICKEN_TRANS()
Make CHICKEN_TRANS() a bit less special looking by using _PICK().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191024122138.25065-1-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2019-10-28 12:47:55 +02:00
Thierry Reding
85d0c4b54f drm/tegra: sor: Introduce audio enable/disable callbacks
In order to support different modes (DP in addition to HDMI), split out
the audio setup/teardown into callbacks.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 11:18:57 +01:00
Thierry Reding
a9087cf2e1 drm/tegra: sor: Extract common audio enabling code
The code to enable audio support is split into two parts, one being
generic for the SOR and another part that is specific whether the SOR is
in HDMI mode or in DP mode. Split out the common part in preparation for
reusing the code in DP mode.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 11:18:57 +01:00
Thierry Reding
68a2ebb54d drm/tegra: sor: Avoid timeouts on unplug events
When the SOR is disabled in DP mode as part of an unplug event, do not
attempt to power the DP link down. Powering down the link requires the
DPAUX to transmit AUX messages which only works if there's a connected
sink.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 11:18:56 +01:00
Thierry Reding
d278e4a971 drm/tegra: sor: Unify eDP and DP support
The SOR0 on Tegra210 does, contrary to what was previously assumed, in
fact support DisplayPort. The difference between SOR0 and SOR1 is that
the latter supports audio and HDCP over DP, whereas the former doesn't.

The code for eDP and DP is now almost identical and the differences can
easily be parameterized based on the presence of a panel. There is no
need any longer to duplicate the code.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 11:18:56 +01:00
Thierry Reding
d23691f647 drm/tegra: sor: Use correct I/O pad for DP
The correct I/O pad needs to be powered up before DP can be used. Make
sure the correct default is set for Tegra generations where the I/O pad
cannot be derived from the SOR instance.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 11:18:56 +01:00
Thierry Reding
61417aaa11 drm/tegra: sor: Unify clock setup for eDP, HDMI and DP
With the clocks modelled consistently across SoC generations, the clock
setup for eDP, HDMI and DP can now be unified.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 11:18:56 +01:00
Thierry Reding
bae88815ad drm/tegra: sor: Support DisplayPort on Tegra194
Reuse parameters from earlier generations to support DisplayPort on
Tegra194.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 11:18:55 +01:00
Thierry Reding
1c3cc0df82 drm/tegra: sor: Deduplicate connector type detection code
The connector type detection code is duplicated in two places. Keeping
both places in sync is an extra maintenance burden that can be avoided
by comparing the connector type operations that are set upon the first
detection.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 11:18:55 +01:00
Thierry Reding
4bdf4710e0 drm/tegra: sor: Implement pad clock for all SOR instances
So far the pad clock was only needed on the second SOR instance. The
clock does exist for all SOR instances, though, so make sure it is
always implemented. This prepares for further unification of the code
in subsequent patches.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 11:18:55 +01:00
Thierry Reding
24e64f86da drm/tegra: sor: Use correct SOR index on Tegra210
The device tree bindings for the Tegra210 SOR don't require the
controller instance to be defined, since the instance can be derived
from the compatible string. The index is never used on Tegra210, so we
got away with it not getting set. However, subsequent patches will
change that, so make sure the proper index is used.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 11:18:54 +01:00
Thierry Reding
b9b9e19762 drm/tegra: sor: Remove tegra186-sor1 support
It turns out that SOR1 is just another instance of the same block as the
SOR0, so there is no need to distinguish them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 11:18:54 +01:00
Thierry Reding
0472c21b83 drm/tegra: sor: Add DisplayPort support
Add support for regular DisplayPort on Tegra210 and Tegra186.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 11:18:54 +01:00
Thierry Reding
c9533131fe drm/tegra: sor: Filter eDP rates
The SOR found on Tegra SoCs does not support all the rates potentially
advertised by eDP 1.4. Make sure that the rates that are not supported
are filtered out.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 11:18:54 +01:00
Thierry Reding
38b445bc13 drm/tegra: sor: Stabilize eDP
Rework eDP code to correspond more closely to what's documented. This
also improves the reliability of modesets.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 11:18:53 +01:00
Thierry Reding
6f684de537 drm/tegra: sor: Hook up I2C-over-AUX to output
This is necessary for the output abstraction to retrieve a list of valid
modes from the EDID of a connected panel/monitor. This will be useful in
conjunction with DisplayPort support that will be added in a subsequent
patch, so that the driver can read EDID via the AUX channel.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 11:18:53 +01:00
Thierry Reding
c176393728 drm/tegra: sor: Use DP link training helpers
Make use of the DP link training helpers to implement full and fast link
training. While at it, refactor some of the code and remove various code
sequences that are not necessary.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 11:18:53 +01:00
Thierry Reding
078c445733 drm/tegra: dp: Add DisplayPort link training helper
Add a helper that will perform link training as described in the
DisplayPort specification.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 11:18:53 +01:00
Thierry Reding
6a127160c4 drm/tegra: dp: Add support for eDP link rates
Parses additional link rates from DPCD if the sink supports eDP 1.4.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 11:18:53 +01:00
Thierry Reding
01f09f242e drm/tegra: dp: Add drm_dp_link_choose() helper
This helper chooses an appropriate configuration, according to the
bitrate requirements of the video mode and the capabilities of the
DisplayPort sink.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 11:18:52 +01:00
Thierry Reding
c4a2728852 drm/tegra: dp: Enable alternate scrambler reset when supported
If the sink is eDP and supports the alternate scrambler reset, enable
it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 11:18:52 +01:00
Thierry Reding
553769ff8d drm/tegra: dp: Set channel coding on link configuration
Make use of ANSI 8B/10B channel coding if the DisplayPort sink supports
it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 11:18:52 +01:00
Thierry Reding
ad7f2dda38 drm/tegra: dp: Read AUX read interval from DPCD
Store the AUX read interval from DPCD, so that it can be used to wait
for the durations given in the specification during link training.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 11:18:52 +01:00
Thierry Reding
7aa3cc540d drm/tegra: dp: Read eDP version from DPCD
If the sink supports eDP, read the eDP revision from it's DPCD.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28 11:18:45 +01:00