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drm/tegra: dp: Set channel coding on link configuration

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Make use of ANSI 8B/10B channel coding if the DisplayPort sink supports
it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding 2015-06-10 16:35:44 +02:00
parent ad7f2dda38
commit 553769ff8d
1 changed files with 10 additions and 1 deletions
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11
drivers/gpu/drm/tegra/dp.c
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@ -203,7 +203,7 @@ int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link)
*/
int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link)
{
u8 values[2];
u8 values[2], value;
int err;
values[0] = drm_dp_link_rate_to_bw_code(link->rate);
@ -216,5 +216,14 @@ int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link)
if (err < 0)
return err;
if (link->caps.channel_coding)
value = DP_SET_ANSI_8B10B;
else
value = 0;
err = drm_dp_dpcd_writeb(aux, DP_MAIN_LINK_CHANNEL_CODING_SET, value);
if (err < 0)
return err;
return 0;
}