The copy_to_user_page() function is called only in the core kernel
code. Therefore, there is no need to export it. This patch removes
EXPORT_SYMBOL(copy_to_user_page).
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The copy_user_highpage() routine has no users outside of the
core kernel code, so exporting this symbol is pointless.
This patch removes EXPORT_SYMBOL(copy_user_highpage).
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Move the code registering the Alchemy UART platform devices from
drivers/serial/ to its proper place, into the Alchemy platform code. Fix
the related Kconfig entry, while at it...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Go thru the Alchemy code and hunt down every unneeded #include, #define, and
extern (some of which refer to already long dead functions).
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The following variables defined in arch/mips/mips-boards/malta/malta_int.c
can become static: msc_irqmap[], msc_nr_irqs, msc_eicirqmap[], and
msc_nr_eicirqs. This patch makes them static.
Successfully build-tested using default configs for Malta, Atlas
and SEAD boards.
Runtime test successfully performed by booting the Malta 4Kc board
up to the shell prompt.
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The array standard_io_resources[] needs not to be exposed in the kernel
global namespace. This patch makes it static.
Successfully build-tested using default configs for Malta, Atlas
and SEAD boards.
Runtime test successfully performed by booting the Malta 4Kc board
up to the shell prompt.
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
There is no need for the plat_perf_setup() function to be global,
so make it static.
Successfully build-tested using default configs for Malta, Atlas
and SEAD boards.
Runtime test successfully performed by booting the Malta 4Kc board
up to the shell prompt.
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Neither the mdesc[] array nor the prom_getmdesc() function need to
be global. This patch makes them static.
Successfully build-tested using default configs for Malta, Atlas
and SEAD boards.
Runtime test successfully performed by booting the Malta 4Kc board
up to the shell prompt.
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This change makes the needlessly global function mips_ejtag_setup() static.
Successfully build-tested using default configs for Malta, Atlas
and SEAD boards.
Runtime test successfully performed by booting the Malta 4Kc board
up to the shell prompt.
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This change makes the needlessly global function mips_nmi_setup() static.
Successfully build-tested using default configs for Malta, Atlas
and SEAD boards.
Runtime test successfully performed by booting the Malta 4Kc board
up to the shell prompt.
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
__FUNCTION__ is gcc-specific, use __func__
Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Since the commit 91a2fcc886 ([MIPS]
Consolidate all variants of MIPS cp0 timer interrupt handlers) removed the
Alchemy specific timer handler, 'r4k_offset' and 'r4k_cur' variables became
practically useless, so get rid of them at last, renaming cal_r4off()
function into calc_clock() and making it return CPU frequency. Also, make
'no_au1xxx_32khz' variable static...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Defer the unmasking of the count/compare interrupt (IRQ5) till the
clockevent driver initialization:
- only enable the cascaded IRQs 0 thru 4 in arch_init_irq(); kill the
ALLINTS macro -- this change is blessed by AMD as I saw it in their own
patch; :-)
- do not force IRQ5 enabled in plat_time_init() if PM is enabled and there's
no 32 KHz crystal.
Update the copyrights (taking into account my prior changes), also removing
Pete Popov's old email...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Slightly tacky, but there is a precedent in the sparc archirecture code.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
It is not being used by Malta and shouldn't be needed for MIPSsim.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Fold the SB-1 specific implementation of clear_page/copy_page in the
generic version, and rewrite that one in tlbex style. The immediate
benefits:
- It converts the compile-time workaround for SB-1 pass 1 prefetches
to a more efficient run-time check.
- It allows adjustment of loop unfolling, which helps to reduce the
number of redundant cdex cache ops.
- It fixes some esoteric cornercases (the cache line length calculations
can go wrong, and support for 64k pages without prefetch instructions
will overflow the addiu immediate).
- Somewhat better guesses of "good" prefetch values.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
None of these files use any of the functionality promised by
asm/semaphore.h. It's possible that they rely on it dragging in some
unrelated header file, but I can't build all these files, so we'll have
fix any build failures as they come up.
Signed-off-by: Matthew Wilcox <willy@linux.intel.com>
Semaphores are no longer performance-critical, so a generic C
implementation is better for maintainability, debuggability and
extensibility. Thanks to Peter Zijlstra for fixing the lockdep
warning. Thanks to Harvey Harrison for pointing out that the
unlikely() was unnecessary.
Signed-off-by: Matthew Wilcox <willy@linux.intel.com>
Acked-by: Ingo Molnar <mingo@elte.hu>
The header files for the Pb1200/DBAu1200 boards have wrong definition for the
IDE interface's decoded range length -- it should be 512 bytes according to
what the IDE driver does. In addition, the IDE platform device claims 1 byte
too many for its memory resource -- fix the platform code and the IDE driver
in accordance.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
flush_cache_vmap / flush_cache_vunmap were calling flush_cache_all which -
having been deprecated - turned into a nop ...
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Building UP kernel with KGDB enabled produces the following errors and warning
(fatal due to -Werror in arch/mips/kernel/Makefile):
In file included from arch/mips/kernel/gdb-stub.c:142:
include/asm/smp.h:25:1: "raw_smp_processor_id" redefined
In file included from include/linux/sched.h:69,
from arch/mips/kernel/gdb-stub.c:126:
include/linux/smp.h:88:1: this is the location of the previous definition
In file included from arch/mips/kernel/gdb-stub.c:142:
include/asm/smp.h:62: error: redefinition of 'smp_send_reschedule'
include/linux/smp.h:102: error: previous definition of 'smp_send_reschedule' was here
include/asm/smp.h: In function `smp_send_reschedule':
include/asm/smp.h:65: error: dereferencing pointer to incomplete type
arch/mips/kernel/gdb-stub.c: At top level:
arch/mips/kernel/gdb-stub.c:660: warning: 'kgdb_wait' defined but not used
Fix the errors by not directly including <asm/smp.h> (which is already included
by <linux/smp.h>) and the warning by enclosing kgdb_wait() in #ifdef CONFIG_SMP.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This patch fixes the compilation of the Au1000 XSS1500
board setup and irqmap code.
Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Work around the CPU clock miscalculation on Au1000DA/HA/HB due the
sys_cpupll register being write-only, i.e. actually do what the comment
before cal_r4off() function advertised for years but the code failed at.
This is achieved by just giving user a chance to define the clock
explicitly in the board config. via CONFIG_SOC_AU1000_FREQUENCY option,
defaulting to 396 MHz if the option is not given...
The patch is based on the AMD's big unpublished patch, the issue seems to
be an undocumented errata (or feature :-)...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Early 4KEc were MIPS32r1 and therefore need some love to get a TLB
refill handler.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
- removed check for enable HT-PCI bridges, because some CFE version
init only the needed one and scanning works even with disabled HT
links
- implemented I/O access behind HT PCI busses
- fixed pci_map for IO resource behind PCI bridge
Tested with E100 and Tulip driver.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Check whether gcc supports -mr10-cache-barrier=1 and issue a cleaner
error message if not. This option is needed to build working SGI IP28
kernels.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
And while at it, make it a little cleaner. Issue originally reported by
Tiejun Chen (tiejun.chen@windriver.com).
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
With KBUILD_DEFCONFIG we don't have to ship a second copy of ip22_defconfig.
Signed-off-by: Adrian Bunk <adrian.bunk@movial.fi>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This allows a 48Hz clock to be selected on Malta and other systems. Note
this not normally a sensible option as it results in rather high latencies
for some kernel stuff.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Some of these are architecturally required for R2 processors so lets try
to be bit closer to the real thing. This also provides access to the
CPU cycle timer, even on multiprocessors. In that aspect its currently
bug compatible to what would happen on a R2-based SMP.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
0 is a valid device id (DSCR_CMD0_UART0_TX), so we can't use it to mark
an empty entry in the device table. Use ~0 instead and search for id ~0
when looking for a free entry.
Signed-off-by: Wolfgang Ocker <weo@reccoware.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
