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[MIPS] Add CoreFPGA5 support; distinguish between SOCit/ROCit
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -295,15 +295,21 @@ void __init prom_init(void)
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break;
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case MIPS_REVISION_CORID_CORE_MSC:
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case MIPS_REVISION_CORID_CORE_FPGA2:
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case MIPS_REVISION_CORID_CORE_FPGA3:
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case MIPS_REVISION_CORID_CORE_FPGA4:
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case MIPS_REVISION_CORID_CORE_24K:
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case MIPS_REVISION_CORID_CORE_EMUL_MSC:
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/*
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* SOCit/ROCit support is essentially identical
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* but make an attempt to distinguish them
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*/
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mips_revision_sconid = MIPS_REVISION_SCON_SOCIT;
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break;
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case MIPS_REVISION_CORID_CORE_FPGA3:
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case MIPS_REVISION_CORID_CORE_FPGA4:
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case MIPS_REVISION_CORID_CORE_FPGA5:
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case MIPS_REVISION_CORID_CORE_EMUL_MSC:
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default:
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mips_display_message("CC Error");
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while (1); /* We die here... */
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/* See above */
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mips_revision_sconid = MIPS_REVISION_SCON_ROCIT;
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break;
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}
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}
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@ -68,6 +68,7 @@
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#define MIPS_REVISION_CORID_CORE_FPGA3 9
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#define MIPS_REVISION_CORID_CORE_24K 10
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#define MIPS_REVISION_CORID_CORE_FPGA4 11
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#define MIPS_REVISION_CORID_CORE_FPGA5 12
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/**** Artificial corid defines ****/
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/*
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