Commit Graph

527 Commits

Author SHA1 Message Date
Paul Mundt
6d63e73d52 sh: Limit ioremap_prot() to 32bit pgprot parts.
Presently ioremap_prot() uses an unsigned long to pass the pgprot value
around. This results in the upper half of the pgprot being chomped when
using 64-bit pgprots on a 32-bit ABI (X2TLB and SH-5).

As the only users of ioremap_prot() are presently legacy parts, this
doesn't cause too much of an issue. In the future when the interface is
converted to use pgprot_t directly this can be re-enabled for the other
parts, too.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-19 14:00:14 +09:00
Paul Mundt
f33609344a sh: Convert p3_ioremap() users to ioremap_prot().
This kills off the ancient p3_ioremap(), converting over to the more
generic ioremap_prot() instead.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-19 13:55:41 +09:00
Paul Mundt
acf2c9685f sh: Kill off duplicate address alignment in ioremap_fixed().
This is already taken care of in the top-level ioremap, and now that
no one should be calling ioremap_fixed() directly we can simply throw the
mapping displacement in as an additional argument.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-19 13:49:19 +09:00
Paul Mundt
d57d64080d sh: Prevent 64-bit pgprot clobbering across ioremap implementations.
Presently 'flags' gets passed around a lot between the various ioremap
helpers and implementations, which is only 32-bits. In the X2TLB case
we use 64-bit pgprots which presently results in the upper 32bits being
chopped off (which handily include our read/write/exec permissions).

As such, we convert everything internally to using pgprot_t directly and
simply convert over with pgprot_val() where needed. With this in place,
transparent fixmap utilization for early ioremap works as expected.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-19 13:34:38 +09:00
Paul Mundt
4f744affc3 sh: Make iounmap_fixed() return success/failure for iounmap() path.
This converts iounmap_fixed() to return success/error if it handled the
unmap request or not. At the same time, drop the __init label, as this
can be called in to later.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-18 21:30:29 +09:00
Paul Mundt
edf711b66f sh: Fixup the IOREMAP_FIXED=n build.
Presently the fixed ioremap API is only defined when CONFIG_IOREMAP_FIXED
is set. As we want to call in to it unconditionally, provide a stubbed
out interface.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-18 21:20:13 +09:00
Paul Mundt
d9b9487af7 sh: Handle early ioremaps through fixed mappings.
This adds in a mem_init_done to work out when a standard ioremap() is
possible, falling back to the fixmap based ioremap otherwise.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-18 21:08:32 +09:00
Matt Fleming
4d35b93a66 sh: Add fixed ioremap support
Some devices need to be ioremap'd and accessed very early in the boot
process. It is not possible to use the standard ioremap() function in
this case because that requires kmalloc()'ing some virtual address space
and kmalloc() may not be available so early in boot.

This patch provides fixmap mappings that allow physical address ranges
to be remapped into the kernel address space during the early boot
stages.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
2010-01-16 14:31:36 +00:00
Matt Fleming
07cad4dc1b sh: Generalise the pte handling code for the fixmap path
Generalise the code for setting and clearing pte's and allow TLB entries
to be pinned and unpinned if the _PAGE_WIRED flag is present.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
2010-01-16 14:29:23 +00:00
Matt Fleming
24ef7fc4dc sh: Acquire some more page flags for SH-5.
We need some more page flags to hook up _PAGE_WIRED (and eventually
other things). So use the unused PTE bits above the PPN field as no
implementations use these for anything currently.

Now that we have _PAGE_WIRED let's provide the SH-5 functions for wiring
up TLB entries.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
2010-01-16 14:29:06 +00:00
Matt Fleming
8eda551420 sh: New extended page flag to wire/unwire TLB entries
Provide a new extended page flag, _PAGE_WIRED and an SH4 implementation
for wiring TLB entries and use it in the fixmap code path so that we can
wire the fixmap TLB entry.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
2010-01-16 14:28:57 +00:00
Matt Fleming
46c4e5daea sh: Fix CONFIG_PMB=n build.
The last commit introduced the following breakage

arch/sh/include/asm/mmu.h: In function 'pmb_remap':
arch/sh/include/asm/mmu.h:79: error: expected ';' before '}' token

and...

arch/sh/include/asm/mmu.h:78: error: 'EINVAL' undeclared (first use in this function)
arch/sh/include/asm/mmu.h:78: error: (Each undeclared identifier is reported only once
arch/sh/include/asm/mmu.h:78: error: for each function it appears in.)
arch/sh/include/asm/mmu.h: In function 'pmb_init':
arch/sh/include/asm/mmu.h:87: error: 'ENODEV' undeclared (first use in this function)

Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-15 08:00:45 +09:00
Paul Mundt
e44d6c4010 sh: Rename split-level pgtable headers.
These were originally named _nopmd and _pmd to follow their asm-generic
counterparts, but we rename them to -2level and -3level for general
consistency.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-13 19:18:39 +09:00
Paul Mundt
782bb5a532 sh: default to extended TLB support.
All SH-X2 and SH-X3 parts support an extended TLB mode, which has been
left as experimental since support was originally merged. Now that it's
had some time to stabilize and get some exposure to various platforms,
we can drop it as an option and default enable it across the board.

This is also good future proofing for newer parts that will drop support
for the legacy TLB mode completely.

This will also force 3-level page tables for all newer parts, which is
necessary both for the varying page sizes and larger memories.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-13 19:11:14 +09:00
Paul Mundt
206582c316 sh: Make all PxSEGADDR() calls fatal for non-legacy configs.
This stubs out all of the PxSEGADDR() wrappers for non-legacy code.
29-bit will continue to work with these, while 32-bit code will now blow
up on compile rather than at runtime.

The vast majority of the in-tree offenders are gone, with the only
remaining culprits being unable to support 32-bit mode.

Hopefully this will prevent anyone from ever using these again.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-13 18:45:12 +09:00
Paul Mundt
a0ab36689a sh: fixed PMB mode refactoring.
This introduces some much overdue chainsawing of the fixed PMB support.
fixed PMB was introduced initially to work around the fact that dynamic
PMB mode was relatively broken, though they were never intended to
converge. The main areas where there are differences are whether the
system is booted in 29-bit mode or 32-bit mode, and whether legacy
mappings are to be preserved. Any system booting in true 32-bit mode will
not care about legacy mappings, so these are roughly decoupled.

Regardless of the entry point, PMB and 32BIT are directly related as far
as the kernel is concerned, so we also switch back to having one select
the other.

With legacy mappings iterated through and applied in the initialization
path it's now possible to finally merge the two implementations and
permit dynamic remapping overtop of remaining entries regardless of
whether boot mappings are crafted by hand or inherited from the boot
loader.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-13 18:31:48 +09:00
Paul Mundt
644755e786 Merge branches 'sh/xstate', 'sh/hw-breakpoints' and 'sh/stable-updates' 2010-01-13 13:02:55 +09:00
Matt Fleming
6430a5987f sh: Don't perform an icbi on a P2 address
The legacy P2 area may not always be mapped (for example when using
PMB). So perform an icbi on an address that we know will always be
mapped.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-13 12:59:24 +09:00
Paul Mundt
0ea820cf9b sh: Move over to dynamically allocated FPU context.
This follows the x86 xstate changes and implements a task_xstate slab
cache that is dynamically sized to match one of hard FP/soft FP/FPU-less.

This also tidies up and consolidates some of the SH-2A/SH-4 FPU
fragmentation. Now fpu state restorers are commonly defined, with the
init_fpu()/fpu_init() mess reworked to follow the x86 convention.
The fpu_init() register initialization has been replaced by xstate setup
followed by writing out to hardware via the standard restore path.

As init_fpu() now performs a slab allocation a secondary lighterweight
restorer is also introduced for the context switch.

In the future the DSP state will be rolled in here, too.

More work remains for math emulation and the SH-5 FPU, which presently
uses its own special (UP-only) interfaces.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-13 12:51:40 +09:00
Paul Mundt
cbf6b1ba7a sh: Always provide thread_info allocators.
Presently the thread_info allocators are special cased, depending on
THREAD_SHIFT < PAGE_SHIFT. This provides a sensible definition for them
regardless of configuration, in preparation for extended CPU state.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-12 19:01:11 +09:00
Paul Mundt
70e068eef9 sh: Move start_thread() out of line.
start_thread() will become a bit heavier with the xstate freeing to be
added in, so move it out-of-line in preparation.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-12 18:52:00 +09:00
Paul Mundt
a99eae5417 sh: Split out the unaligned counters and user bits.
This splits out the unaligned access counters and userspace bits in to
their own generic interface, which will allow them to be wired up on sh64
too.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-12 16:12:25 +09:00
Paul Mundt
776258df92 sh: Consolidate the sh_bios earlyprintk code.
Now that the sh-sci earlyprintk is taken care of by the sh-sci driver
directly, there's no longer any reason for having a split-out
early_printk framework. sh_bios is the only other thing that uses it, so
we just migrate the leftovers in to there. As it's possible to have
multiple early_param()'s for the same string, there's not much point in
having this split out anymore anyways, particularly since the sh_bios
dependencies are still special-cased within sh-sci itself.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-12 15:31:20 +09:00
Paul Mundt
b9303a7956 sh: Kill off more unused sh_bios callbacks.
sh_bios_char_out() is not used by anything in-tree these days, so just
get rid of it.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-12 15:26:11 +09:00
Paul Mundt
191d0d24b6 sh: Tidy up the sh bios VBR handling.
This moves the VBR handling out of the main trap handling code and in to
the sh-bios helper code. A couple of accessors are added in order to
permit other kernel code to get at the VBR value for state save/restore
paths.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-12 14:50:43 +09:00
Paul Mundt
53e6d8e006 sh: mach-se: Convert SE7343 FPGA to dynamic IRQ allocation.
This gets rid of the arbitrary set of vectors used by the SE7722 FPGA
interrupt controller and switches over to a completely dynamic set.
No assumptions regarding a contiguous range are made, and the platform
resources themselves need to be filled in lazily.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-12 13:37:04 +09:00
Paul Mundt
8c0b8139c8 sh: consolidate atomic_cmpxchg()/atomic_add_unless() definitions.
The LL/SC and IRQ versions were using generic stubs while the GRB version
was just reimplementing what it already had for the standard cmpxchg()
code. As we have optimized cmpxchg() implementations that are decoupled
from the atomic code, simply falling back on the generic wrapper does the
right thing. With this in place the GRB case is unaffected while the
LL/SC case gets to use its optimized cmpxchg().

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-08 17:02:17 +09:00
Paul Mundt
fa94ddea2b Merge branch 'master' into sh/hw-breakpoints 2010-01-06 15:49:08 +09:00
Paul Mundt
9fae4fb3ce sh: Reclaim TIF_DEBUG.
This was used by the old hw-breakpoints API, but now there is nothing
is using it anymore, so just kill it off.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-05 19:30:18 +09:00
Paul Mundt
7025bec912 sh: Kill off dead UBC headers.
Nothing is using these now, so kill them all off.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-05 19:16:35 +09:00
Paul Mundt
4352fc1b12 sh: Abstracted SH-4A UBC support on hw-breakpoint core.
This is the next big chunk of hw_breakpoint support. This decouples
the SH-4A support from the core and moves it out in to its own stub,
following many of the conventions established with the perf events
layering.

In addition to extending SH-4A support to encapsulate the remainder
of the UBC channels, clock framework support for handling the UBC
interface clock is added as well, allowing for dynamic clock gating.

This also fixes up a regression introduced by the SIGTRAP handling that
broke the ksym_tracer, to the extent that the current support works well
with all of the ksym_tracer/ptrace/kgdb. The kprobes singlestep code will
follow in turn.

With this in place, the remaining UBC variants (SH-2A and SH-4) can now
be trivially plugged in.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-05 19:06:45 +09:00
Paul Mundt
0176bd3dab sh: Drop down to a single quicklist.
We previously had 2 quicklists, one for the PGD case and one for PTEs.
Now that the PGD/PMD cases are handled through slab caches due to the
multi-level configurability, only the PTE quicklist remains. As such,
reduce NR_QUICK to its appropriate size and bump down the PTE quicklist
index.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-05 12:35:00 +09:00
Paul Mundt
a7595fe7e8 Merge branch 'sh/pgtable' of git://github.com/mfleming/linux-2.6 2010-01-05 12:27:46 +09:00
Paul Mundt
921a220857 Merge branch 'sh/stable-updates' 2010-01-04 16:45:56 +09:00
Matt Fleming
2a5eacca85 sh: Move page table allocation out of line
We also switched away from quicklists and instead moved to slab
caches. After benchmarking both implementations the difference is
negligible. The slab caches suit us better though because the size of a
pgd table is just 4 entries when we're using a 3-level page table layout
and quicklists always deal with pages.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
2010-01-02 01:02:25 +00:00
Matt Fleming
3f5ab76816 sh: Correct the PTRS_PER_PMD and PMD_SHIFT values
The previous expressions were wrong which made free_pmd_range() explode
when using anything other than 4KB pages (which is why 8KB and 64KB
pages were disabled with the 3-level page table layout).

The problem was that pmd_offset() was returning an index of non-zero
when it should have been returning 0. This non-zero offset was used to
calculate the address of the pmd table to free in free_pmd_range(),
which ended up trying to free an object that was not aligned on a page
boundary.

Now 3-level page tables should work with 4KB, 8KB and 64KB pages.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
2010-01-02 00:51:45 +00:00
Matt Fleming
e591a51723 sh: Remove unused functions
Apply some TLC to the SH64 header files and remove some functions that
are not used anymore.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
2009-12-31 13:44:54 +00:00
Paul Mundt
8152a74bc0 sh: Only provide a PCLK definition for legacy CPG CPUs.
As CPUs are migrated over to more fully-featured clock frameworks of
their own and off of the legacy CPG code, they no longer have any real
need for defining the PCLK value. The PCLK define in itself is already
fairly misleading, as many boards get their input clocks from different
sources, making this value fairly arbitrary anyways.

Outside of the legacy CPG clock framework, the only place where this
value is used is for deriving CLOCK_TICK_RATE, which we set back to the
legacy PIT value that it was before the PCLK definitions were added in
the first place.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-29 11:09:30 +09:00
Paul Mundt
34d0b5af50 sh: Convert ptrace to hw_breakpoint API.
This is the initial step for converting singlestep handling via ptrace
over to hw_breakpoints.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-28 17:53:47 +09:00
Paul Mundt
f34548cb73 Merge branch 'sh/g3-prep' into sh/for-2.6.33 2009-12-24 15:16:02 +09:00
Paul Mundt
4b4f887fb2 Merge branch 'master' into sh/hw-breakpoints 2009-12-21 15:44:34 +09:00
Paul Mundt
76e7461a21 Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 2009-12-21 11:59:55 +09:00
Linus Torvalds
5a865c0606 Merge branch 'for-33' of git://repo.or.cz/linux-kbuild
* 'for-33' of git://repo.or.cz/linux-kbuild: (29 commits)
  net: fix for utsrelease.h moving to generated
  gen_init_cpio: fixed fwrite warning
  kbuild: fix make clean after mismerge
  kbuild: generate modules.builtin
  genksyms: properly consider  EXPORT_UNUSED_SYMBOL{,_GPL}()
  score: add asm/asm-offsets.h wrapper
  unifdef: update to upstream revision 1.190
  kbuild: specify absolute paths for cscope
  kbuild: create include/generated in silentoldconfig
  scripts/package: deb-pkg: use fakeroot if available
  scripts/package: add KBUILD_PKG_ROOTCMD variable
  scripts/package: tar-pkg: use tar --owner=root
  Kbuild: clean up marker
  net: add net_tstamp.h to headers_install
  kbuild: move utsrelease.h to include/generated
  kbuild: move autoconf.h to include/generated
  drop explicit include of autoconf.h
  kbuild: move compile.h to include/generated
  kbuild: drop include/asm
  kbuild: do not check for include/asm-$ARCH
  ...

Fixed non-conflicting clean merge of modpost.c as per comments from
Stephen Rothwell (modpost.c had grown an include of linux/autoconf.h
that needed to be changed to generated/autoconf.h)
2009-12-17 07:23:42 -08:00
Matt Fleming
5d9b4b19f1 sh: Definitions for 3-level page table layout
If using 64-bit PTEs and 4K pages then each page table has 512 entries
(as opposed to 1024 entries with 32-bit PTEs). Unlike MIPS, SH follows
the convention that all structures in the page table (pgd_t, pmd_t,
pgprot_t, etc) must be the same size. Therefore, 64-bit PTEs require
64-bit PGD entries, etc. Using 2-levels of page tables and 64-bit PTEs
it is only possible to map 1GB of virtual address space.

In order to map all 4GB of virtual address space we need to adopt a
3-level page table layout. This actually works out better for
CONFIG_SUPERH32 because we only waste 2 PGD entries on the P1 and P2
areas (which are untranslated) instead of 256.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-17 14:31:20 +09:00
Matt Fleming
b73c806341 sh: Abstract the number of page table levels
Keep the dimensions of the page tables in a separate header file in
preparation for allowing a three level page table structure.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-17 14:31:15 +09:00
Paul Mundt
2f7bb2dfed sh: Fix up MAX_DMA_CHANNELS definition when DMA is disabled.
MAX_DMA_CHANNELS is tested for the total number of channels in order to
populate an IRQ map. Stub this out completely when no DMA support is
enabled -- as used to be the default behaviour before this was
generalized for use by the dmaengine code.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-17 14:25:10 +09:00
Guennadi Liakhovetski
39b27f4cc3 sh: dmaengine support for sh7724.
Add a dmaengine platform device to sh7724, fix DMA channel interrupt numbers.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-17 14:18:27 +09:00
Linus Torvalds
9b2831704e Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (33 commits)
  sh: Fix test of unsigned in se7722_irq_demux()
  sh: mach-ecovec24: Add FSI sound support
  sh: mach-ecovec24: Add mt9t112 camera support
  sh: mach-ecovec24: Add tw9910 support
  sh: MSIOF/mmc_spi platform data for the Ecovec24 board
  sh: ms7724se: Add ak4642 support
  sh: Fix up FPU build for SH5
  sh: Remove old early serial console code V2
  sh: sh5 scif pdata (sh5-101/sh5-103)
  sh: sh4a scif pdata (sh7757/sh7763/sh7770/sh7780/sh7785/sh7786/x3)
  sh: sh4a scif pdata (sh7343/sh7366/sh7722/sh7723/sh7724)
  sh: sh4 scif pdata (sh7750/sh7760/sh4-202)
  sh: sh3 scif pdata (sh7705/sh770x/sh7710/sh7720)
  sh: sh2a scif pdata (sh7201/sh7203/sh7206/mxg)
  sh: sh2 scif pdata (sh7616)
  sh-sci: Extend sh-sci driver with early console V2
  sh: Stub in P3 ioremap support for nommu parts.
  sh: wire up vmallocinfo support in ioremap() implementations.
  sh: Make the unaligned trap handler always obey notification levels.
  sh: Couple kernel and user write page perm bits for CONFIG_X2TLB
  ...
2009-12-16 10:29:52 -08:00
Christoph Hellwig
698ba7b5a3 elf: kill USE_ELF_CORE_DUMP
Currently all architectures but microblaze unconditionally define
USE_ELF_CORE_DUMP.  The microblaze omission seems like an error to me, so
let's kill this ifdef and make sure we are the same everywhere.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Hugh Dickins <hugh.dickins@tiscali.co.uk>
Cc: <linux-arch@vger.kernel.org>
Cc: Michal Simek <michal.simek@petalogix.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-12-16 07:20:12 -08:00
Thomas Gleixner
e5931943d0 locking: Convert raw_rwlock functions to arch_rwlock
Name space cleanup for rwlock functions. No functional change.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Acked-by: David S. Miller <davem@davemloft.net>
Acked-by: Ingo Molnar <mingo@elte.hu>
Cc: linux-arch@vger.kernel.org
2009-12-14 23:55:32 +01:00