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sh: Correct the PTRS_PER_PMD and PMD_SHIFT values

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The previous expressions were wrong which made free_pmd_range() explode
when using anything other than 4KB pages (which is why 8KB and 64KB
pages were disabled with the 3-level page table layout).

The problem was that pmd_offset() was returning an index of non-zero
when it should have been returning 0. This non-zero offset was used to
calculate the address of the pmd table to free in free_pmd_range(),
which ended up trying to free an object that was not aligned on a page
boundary.

Now 3-level page tables should work with 4KB, 8KB and 64KB pages.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
This commit is contained in:
Matt Fleming 2009-12-24 20:38:45 +00:00
parent e591a51723
commit 3f5ab76816
2 changed files with 4 additions and 4 deletions
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4
arch/sh/include/asm/pgtable_pmd.h
View File

@ -17,11 +17,11 @@
#define USER_PTRS_PER_PGD 2
/* PMD bits */
#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT - 3))
#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT - PTE_MAGNITUDE))
#define PMD_SIZE (1UL << PMD_SHIFT)
#define PMD_MASK (~(PMD_SIZE-1))
#define PTRS_PER_PMD (PAGE_SIZE / sizeof(pmd_t))
#define PTRS_PER_PMD ((1 << PGDIR_SHIFT) / PMD_SIZE)
#define pmd_ERROR(e) \
printk("%s:%d: bad pmd %016llx.\n", __FILE__, __LINE__, pmd_val(e))

4
arch/sh/mm/Kconfig
View File

@ -220,7 +220,7 @@ config PAGE_SIZE_4KB
config PAGE_SIZE_8KB
bool "8kB"
depends on !MMU || X2TLB && !PGTABLE_LEVELS_3
depends on !MMU || X2TLB
help
This enables 8kB pages as supported by SH-X2 and later MMUs.
@ -232,7 +232,7 @@ config PAGE_SIZE_16KB
config PAGE_SIZE_64KB
bool "64kB"
depends on !MMU || CPU_SH4 && !PGTABLE_LEVELS_3 || CPU_SH5
depends on !MMU || CPU_SH4 || CPU_SH5
help
This enables support for 64kB pages, possible on all SH-4
CPUs and later.