Commit Graph

15 Commits

Author SHA1 Message Date
Vladimir Zapolskiy
d06670e962 arm: dts: phy3250: add SD fixed regulator
The change adds fixed voltage regulator for SD controller, ARM MMCI
controller driver uses it to control card power management.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2016-02-11 03:06:36 +02:00
Vladimir Zapolskiy
f6d4434916 arm: dts: phy3250: add lcd and backlight fixed regulators
Phytec PHY3250 board has GPIO controlled regulators for LCD and
backlight, add their descriptions to board DTS file.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2016-02-11 03:06:32 +02:00
Vladimir Zapolskiy
aa29efb445 arm: dts: lpc32xx: move USB controller subdevices into own device node
NXP LPC32xx SoC has one USB OTG controller, which is supposed to work
with an external phy (default is NXP ISP1301).

Practically the USB controller contains 5 subdevices:
- host controller   0x3102 0000 -- 0x3102 00FF
- OTG controller    0x3102 0100 -- 0x3102 01FF
- device controller 0x3102 0200 -- 0x3102 02FF
- I2C controller    0x3102 0300 -- 0x3102 03FF
- clock controller  0x3102 0F00 -- 0x3102 0FFF

The USB controller can be considered as a "bus", because the
subdevices above are relatively independent, for example I2C
controller is the same as other two general purpose I2C controllers
found on SoC.

The change is not intended to modify any logic, but it rearranges
existing device nodes, in future it is planned to add a USB clock
controller device node into the same group.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2015-11-18 18:01:27 +02:00
Vladimir Zapolskiy
cae5949067 arm: dts: ea3250/phy3250: specify phys memory offset for lpc32xx boards
In case if SDRAM memory region is not populated by a bootloader,
provide this value in device trees for EA3250 and PHY3250 boards.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2015-11-18 18:01:14 +02:00
Vladimir Zapolskiy
1a24edd2ee arm: dts: lpc32xx: change include syntax to be C preprocessor friendly
The change replaces /include/ to #include in lpc32xx.dtsi and
derivatives, it is required, if C preprocessor is intended to be used
over dtsi/dts files, otherwise errors like one below are generated:

  Error: ea3250.dts:15.1-9 syntax error
  FATAL ERROR: Unable to parse input tree

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2015-11-18 18:00:53 +02:00
Roland Stigge
07c7e12ca7 ARM: LPC32xx: LED fix in PHY3250 DTS file
This patch adjusts the PHY3250 board file to the actual LED configuration
(active high, default-state and trigger configuration).

Signed-off-by: Roland Stigge <stigge@antcom.de>
2012-09-25 10:11:41 +02:00
Roland Stigge
067c182fb5 ARM: LPC32xx: Adjust device tree node to new standard num-cs
In spi-pl022.c, the new device tree binding is now "num-cs" for the number of
chip selects. Further, pl022,hierarchy and pl022,slave-tx-disable isn't
supported in favour of reasonable defaults in the driver.

Adjusting phy3250.dts to it.

Signed-off-by: Roland Stigge <stigge@antcom.de>
2012-09-06 11:40:42 +02:00
Alexandre Pereira da Silva
2e0b5a3752 ARM: LPC32xx: Add dt settings to the at25 node
Add the reg, cs-gpios and max-frequencies that are needed for spi
device registry in phy3250.
Adds also the pl022 internal transfers details via dt

Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Roland Stigge <stigge@antcom.de>
2012-06-14 16:16:19 +02:00
Roland Stigge
ac5ced91aa ARM: LPC32xx: High Speed UART configuration via DT
This patch fixes the DTS files for the High Speed UARTs 1, 2 and 7 of the
LPC32xx SoC, adjusting the compatible strings, adding interrupts and status
configuration. On the PHY3250 reference board, UART2 is enabled.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
2012-06-14 16:16:18 +02:00
Roland Stigge
c70426f153 ARM: LPC32xx: DT conversion of Standard UARTs
This patch switches from static serial driver initialization to devicetree
configuration. This way, the Standard UARTs of the LPC32xx SoC can be enabled
individually via DT.

E.g., instead of Kconfig configuration, the phy3250.dts activates
UARTs 3 and 5.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Tested-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
2012-06-14 16:16:18 +02:00
Roland Stigge
2c7fa28622 ARM: LPC32xx: DTS adjustment for using pl18x primecell
This patch adjusts the dts files to reference the pl18x primecell driver
correctly.

Signed-off-by: Roland Stigge <stigge@antcom.de>
2012-06-14 16:16:18 +02:00
Roland Stigge
a6d1be0e58 ARM: LPC32xx: DTS adjustment for key matrix controller
This patch connects the lpc32xx-key driver to the LPC32xx platform (via
lpc32xx.dtsi), and more specifically to the reference board via its dts file.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
2012-06-14 16:16:17 +02:00
Roland Stigge
15ab218318 ARM: LPC32xx: Add NAND flash timing to PHY3250 board dts
This patch adds necessary NAND flash timings to the board specific dts file of
the PHY3250 reference board of the LPC32xx SoC.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Tested-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
2012-06-14 16:16:16 +02:00
Roland Stigge
a035254aef ARM: LPC32xx: Adjust dts files to gpio dt binding
The GPIO devicetree binding in 3.5 doesn't register the various LPC32xx GPIO
banks via DT subnodes but always all at once, and changes the gpio referencing
to 3 cells (bank, gpio, flags). This patch adjusts the DTS files to this
binding that was just accepted to the gpio subsystem.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-05-30 16:15:53 -07:00
Roland Stigge
e04920d9ef ARM: LPC32xx: DTS files for device tree conversion
This patch adds the dts files for the reference machine of LPC32xx:

* arch/arm/boot/dts/lpc32xx.dtsi: Include for devices based on LPC32xx
* arch/arm/boot/dts/phy3250.dts: Board support for PHYTEC phyCORE-LPC3250

Signed-off-by: Roland Stigge <stigge@antcom.de>
2012-04-22 12:01:19 +02:00