Commit Graph

13 Commits

Author SHA1 Message Date
Marcel Ziswiler
0d900bbbae ARM: tegra: apalis-tk1: Copyright period, spurious newlines
Update the copyright period and get rid of some spurious newlines.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08 16:18:08 +01:00
Marcel Ziswiler
818e8729e1 ARM: tegra: apalis-tk1: Hog group for ethernet, PCIe, reset GPIOs
The Apalis TK1 module uses some dedicated GPIOs as I210 gigabit Ethernet
controller reset and to control RESET_MOCI aka reset module output
carrier input on MXM3 pin 26. The Apalis Evaluation Board furthermore
uses Apalis GPIO7 on MXM3 pin 15 as reset signal for its PLX PEX 8605
PCIe Switch.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08 16:15:34 +01:00
Marcel Ziswiler
405698f072 ARM: tegra: apalis-tk1: Add missing as3722 gpio0 configuration
As the AS3722 GPIO0 is also a not connected on our Apalis TK1 module
explicitly configure it to high-impedance as well.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08 16:15:13 +01:00
Marcel Ziswiler
e18dc29620 ARM: tegra: apalis-tk1: Activate PWM pin muxing for pwm3
Activate PWM pin muxing for Apalis PWM3. Note that the same PWM3 is
already active on pu6 being Apalis BKL1_PWM as well. Therefore exporting
that one for raw sysfs access will fail and one has to revert to using
the PWM backlight.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08 16:13:33 +01:00
Marcel Ziswiler
d174e9465d ARM: tegra: apalis-tk1: Set critical trips
Set "critical" trip temperatures for cpu, gpu, mem and pllx thermal
zones. These trips can trigger shut down or reset.

Similar to commit 40823f8e26 ("arm: tegra: set critical trips for
Tegra124").

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08 16:12:50 +01:00
Marcel Ziswiler
1c3389e6cb ARM: tegra: Fix I2C bus frequencies on Apalis/Colibri
Use a faster speed of 400 kbit/s for regular I2C busses.

Use a slower speed of 10 kbit/s for DDC/EDID to improve reliability.

Use a slower speed of 100 kbit/s for power I2C to be within specs of
the LM95245 temperature sensor.

While at it further annotate I2C pin usage.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08 16:08:20 +01:00
Rob Herring
508d690e94 ARM: dts: tegra: fix PCI bus dtc warnings
dtc recently added PCI bus checks. Fix these warnings.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-06-13 16:49:57 +02:00
Marcel Ziswiler
6270bd3d91 ARM: tegra: apalis-tk1: Update compatibility comment
Now with the new V1.1A HW card detect being implemented update resp.
compatibility information.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-25 07:48:36 +01:00
Marcel Ziswiler
5142bd659c ARM: tegra: apalis-tk1: Adjust pin muxing for v1.1 HW
Configure Apalis MMC1 D6 GPIO on SDMMC3_CLK_LB_IN as reserved function
without any pull-up/down.

Configure GPIO_PV2 as SD1_CD# according to latest V1.1 HW.

Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output driver enabled aka
not tristated and input driver enabled as well as it features some
magic properties even though the external loopback is disabled and the
internal loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 register's
SDMMC_SPARE1 bits being set to 0xfffd according to the TRM! This pin is
now a not-connect on V1.1 HW in order to avoid any interference.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-25 07:46:54 +01:00
Marcel Ziswiler
a7f9d4febc ARM: tegra: apalis-tk1: Optional DisplayPort hot-plug detect
Configure DP_HPD_PFF0 pin as optional DisplayPort hot-plug detect.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-25 07:45:24 +01:00
Marcel Ziswiler
02888f8be5 ARM: tegra: apalis-tk1: Pull-up temperature alert
Pull-up GPIO_PI6 connected to TMP451's ALERT#/THERM2#.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-25 07:38:51 +01:00
Thierry Reding
5e8a724d14 ARM: tegra: apalis-tk1: Drop leading 0 from unit-address
According to the latest best practices, unit-addresses should be
represented without any leading zeroes.

Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-08 11:14:02 +01:00
Marcel Ziswiler
85afd20e4b ARM: tegra: Initial support for Apalis TK1
This patch adds the device tree to support Toradex Apalis TK1 a
computer on module which can be used on different carrier boards.

The module consists of a Tegra TK1 SoC, a PMIC solution, 2 GB of DDR3L
RAM, a bunch of level shifters, an eMMC, a TMP451 temperature sensor
chip, an I210 gigabit Ethernet controller and a SGTL5000 audio codec.
Furthermore, there is a Kinetis MK20DN512 companion micro controller for
analogue, CAN and resistive touch functionality which is not yet
supported. Anything that is not self contained on the module is disabled
by default.

The device tree for the Evaluation Board includes the module's device
tree and enables the supported peripherals of the carrier board (the
Evaluation Board supports almost all of them).

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-11 16:48:10 +02:00