Commit Graph

1594 Commits

Author SHA1 Message Date
Dave Airlie
2b4f44eec2 Linux 4.16-rc7
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Backmerge tag 'v4.16-rc7' into drm-next

Linux 4.16-rc7

This was requested by Daniel, and things were getting
a bit hard to reconcile, most of the conflicts were
trivial though.
2018-03-28 14:30:41 +10:00
Rex Zhu
160b8e7593 drm/amdgpu: Remove wrapper layer of cgs irq handling
v2: add Vega12 support

1. remove struct cgs_os_ops
2. delete cgs_linux.h
3. refine the irq code for vega10, can fix set pp table
   failed issue.
4. add common smu irq process function

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:58 -05:00
Jerry (Fangzhi) Zuo
b6a8a2bc83 drm/amd/display: Add bios firmware info version for VG12
VG12 shows minor revision version of 2 which is not handled in
bios_parser_get_firmware_info() routine.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:24:45 -05:00
Alex Deucher
2325ff305e drm/amd/display/dm: add vega12 support
Add support for vega12 to the display manager.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:24:40 -05:00
Harry Wentland
731a373698 drm/amd/display: Add one to EDID's audio channel count when passing to DC
DC takes channel count to mean the actual count. cea_sad's channels
represent it as number of channels - 1.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2018-03-21 00:24:47 -05:00
Harry Wentland
509648fcf0 drm/amd/display: We shouldn't set format_default on plane as atomic driver
This is still a leftover from early atomic brinup days.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2018-03-21 00:23:51 -05:00
Mikita Lipski
4407a29bad drm/amd/display: Fix FMT truncation programming
Switch the order of parameters being set for depth
and mode of truncation, as it previously was not correct

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 00:22:35 -05:00
Mikita Lipski
8bfac12f88 drm/amd/display: Allow truncation to 10 bits
The truncation isn't being programmed if the truncation
depth is set to 2, it causes an issue with dce11.2 asic
using 6bit eDP panel. It required to truncate 12:10 in order to
perform spatial dither 10:6.

This change will allow 12:10 truncation to be enabled.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 00:22:08 -05:00
Shirish S
cd2d6c92a8 drm/amd/display: fix dereferencing possible ERR_PTR()
This patch fixes static checker warning caused by
"36cc549d5986: "drm/amd/display: disable CRTCs with
NULL FB on their primary plane (V2)"

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-19 11:23:23 -05:00
Clark Zheng
219be9dda6 drm/amd/display: Refine disable VGA
bad case won't follow normal sense, it will not enable vga1 as usual, but vga2,3,4 is on.

Signed-off-by: Clark Zheng <clark.zheng@amd.com>
Reviewed-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-19 11:23:03 -05:00
Harry Wentland
6da2b9332c amdgpu/dm: Default PRE_VEGA ASIC support to 'y'
Even though we default PRE_VEGA support to 'n' upstream in amd-staging
we want to keep it enabled by default.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-16 16:16:50 -05:00
Shirish S
6f4969ef0a drm/amd/display: fix dereferencing possible ERR_PTR()
This patch fixes static checker warning caused by
"36cc549d5986: "drm/amd/display: disable CRTCs with
NULL FB on their primary plane (V2)"

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-16 16:16:49 -05:00
Clark Zheng
5e9a4f0873 drm/amd/display: Refine disable VGA
bad case won't follow normal sense, it will not enable vga1 as usual, but vga2,3,4 is on.

Signed-off-by: Clark Zheng <clark.zheng@amd.com>
Reviewed-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-16 16:16:49 -05:00
Shirish S
2a7b58293d drm/amd/display: Check msg->size before starting aux transfer
This patch adds an essential check related to the size of the
payload to be transferred via aux channel.

Without this check dal_ddc_service_read_dpcd_data() is fed with
inappropriate payload size leading to deadlocks.

Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 16:01:15 -05:00
Dmytro Laktyushkin
17ac50368f drm/amd/display: clean up dcn pplib notification call
We have unused variables being populated when notifying pplib.
This change amends that.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 16:01:14 -05:00
Yongqiang Sun
14d6f64436 drm/amd/display: Fixed dim around 1sec when resume from S3 (v2)
root cause:
DMCU try to perform a smoothness brightness change.Incorrect initial
brightness level causes the 1 sec dim.
Change:
Cache brightness level in stream, and clear it when edp backlight on.
If brightness level in stream is 0, set brightness with ramp value is 0.
DMCU will set the brightness without smoothness transition.

v2: squash in null pointer fix (Harry)

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 16:01:14 -05:00
Jerry (Fangzhi) Zuo
2a54bd6e08 drm/amd/display: Use actual TG instance instead of pipe instance
Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:16:36 -05:00
Harry Wentland
d1aaad05d0 drm/amd/display: Check for HW blocks in HWSS, rather than DC core for cursor
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:16:36 -05:00
Oak Zeng
3760f76cbe drm/amdgpu: Move IH clientid defs to separate file
This is preparation for sharing client ID definitions
between amdgpu and amdkfd

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:16:35 -05:00
Dmytro Laktyushkin
e36ec85998 drm/amd/display: update dce_calcs to latest version
Bw spreadsheet was updated while dce_calcs was not

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:16:35 -05:00
Yongqiang Sun
45bb8dd696 drm/amd/display: Set disp clk in a safe way to avoid over high dpp clk. (v2)
Increase clock, if current dpp div is 0 and request dpp div is 1, request clk is
higher than maximum dpp clk as per dpm table.
	set dispclk to the value of maximum supported dpp clk
	set div to 1
	set dispclk to request value.
Decrease clock, currrent dpp div is 1 and request dpp div is 0, current clk is
higher than maximum dpp clk as per dpm table.
	set dispclk to the value of maximum supported dpp clk
	set div to 0
	set dispclk to request value.

v2: squash in !DCN build fix

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:16:34 -05:00
Samson Tam
5231f5d112 drm/amd/display: add support for regkey "LCDFreeSyncDefault"
Signed-off-by: Samson Tam <Samson.Tam@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:16:34 -05:00
Shirish S
df534fff0d drm/amd/display: Correct the plane enumeration order (v2)
The order of planes is given by the order they are enumerated
by kms.
Planes with a higher ID appears above planes with a lower ID.

Currently the planes are enumerated in the wrong order,
putting the nv12 only plane after the two RGBA planes.

This patch corrects the plane enumeration order such that all
the overlay planes are initialized first then the primary planes.

Due to this change in order the dc_add_plane_to_context() shall
receive the planes in reverse order hence this patch reverses
the parsing of planes in DM side itself.

v2: drop local reverse macro for upstream

Signed-off-by: Shirish S <shirish.s@amd.com>
Signed-off-by: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:16:34 -05:00
Vitaly Prosyak
9eee21376b drm/amd/display: Fix handling of linear transfer function
Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:48 -05:00
Tony Cheng
3f7194bce2 drm/amd/display: dal 3.1.38
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:47 -05:00
Anthony Koo
64ed6a2eba drm/amd/display: Add variable refresh rate parameters to DC structures
Time stamping will be part of surface, and will be updated when address is flipped.
FreeSync parameters will be attached to stream, as it adjusts the timing dynamically.

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:47 -05:00
Anthony Koo
a3e1737ed6 drm/amd/display: Implement stats logging
Stats will be used for debug purposes

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:47 -05:00
Eric Yang
e18d308673 drm/amd/display: early return if not in vga mode in disable_vga
The work around for hw bug causes S3 resume failure. Don't execute
disable vga logic if not in vga mode.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:46 -05:00
Mikita Lipski
d54ee94603 drm/amd/display: Enable backlight support for pre-DCE11 ASICs
Initializing ABM and DMCU modules for dce 80/81/83/100 as in DCE110
Adding constructors and destructors for each module.
Adding register list for DMCU in dce80 as some registers are missing
in dce80 from the basic list. DMCU is never used, so it would not have
any functional impact.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:46 -05:00
Krunoslav Kovac
a4056c2a63 drm/amd/display: use HW hdr mult for brightness boost
In MPO scenario when playing SDR clip in HDR desktop mode, Win is
boosting desktop and requests driver to boost MPO. But driver boosting
is currently done in regamma which is stream property and thus shared
between grph and video.

Redesigning the boosting in RV: use CM_HDR_MULT register which was added
for this scenario. It also has the benefit that it can be done in HIRQL.

Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:46 -05:00
Bhawanpreet Lakha
713d451d2d drm/amd/display: Use MACROS instead of dm_logger
Use DC_LOGGER macro for logs.

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:45 -05:00
Bhawanpreet Lakha
f0ba51e83a drm/amd/display: Move DTRACE and dml_print defines
These MACROS are only being used by a few files but
gets pulled in by dc.h

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:45 -05:00
Yongqiang Sun
8e437c7991 drm/amd/display: Modified set bandwidth sequence.
This change make sure bandwidth is set properly.
For increase bandwidth, set bandwidth before backend
and front end programming.
For decrease bandwidth, set bandwidth after.
To avoid smu hang when reboot and dpms due to 0 disp clk,
keep min disp clock as 100Mhz.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:44 -05:00
Eric Yang
d03f3f6304 drm/amd/display: fix check condition for edp power control
Per discussion with VBIOS team, the orginal check is not correct in
all cases on latest VBIOS. Additional check is needed. This change should
maintain old behaviour on older VBIOS.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:44 -05:00
Bhawanpreet Lakha
90e3103e19 drm/amd/display: Fix takover from VGA mode
HW Engineer's Notes:
 During switch from vga->extended, if we set the VGA_TEST_ENABLE and then
 hit the VGA_TEST_RENDER_START, then the DCHUBP timing gets updated correctly.
 Then vBIOS will have it poll for the VGA_TEST_RENDER_DONE and unset
 VGA_TEST_ENABLE, to leave it in the same state as before.

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:44 -05:00
Jerry (Fangzhi) Zuo
316178f072 drm/amd/display: Allow passing of syspll id to get_smu_clock_info
Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:43 -05:00
Yongqiang Sun
623a7e96cd drm/amd/display: Remove 300Mhz minimum disp clk limit.
300Mhz disp clk limit was a workaround that was fixed in SMU and is no
longer needed.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:43 -05:00
Leo (Sunpeng) Li
5e3e341cee drm/amd/display: Convert CTM to 2's complement
DRM's documentation for the color transform matrix does not specify
whether the values are in signed-magnitude, or 2's complement.
Therefore, it was assumed to use 2's complement.

However, existing usermode implementations use signed-magnitude.
Therefore, conform to existing standards, and convert to 2's complement
internally.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:43 -05:00
SivapiriyanKumarasamy
a7596f25db drm/amd/display: Varibright add null check
Add null check for stream update

Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:42 -05:00
SivapiriyanKumarasamy
9aef1a3170 drm/amd/display: Varibright fix bug and review comments
Fix bug and make changes from review 132656

Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:42 -05:00
SivapiriyanKumarasamy
aa5a577730 drm/amd/display: Vari-bright looks disabled near end of MM14
Avoid hanging DMCU by setting abm level only when OTG unblanked

Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:41 -05:00
Leo (Sunpeng) Li
d5400aab15 drm/amd/display: Use correct error codes
Should return -ENOMEM when allocation fails.
Also, just return the error code instead of using a variable.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:41 -05:00
Leo (Sunpeng) Li
8c45c5db84 drm/amd/display: Fix memleaks when atomic check fails.
While checking plane states for updates during atomic check, we create
dc_plane_states in preparation. These dc states should be freed if
something errors.

Although the input transfer function is also freed by
dc_plane_state_release(), we should free it (on error) under the same
scope as where it is created.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:41 -05:00
Dave Airlie
128ccceaba Merge branch 'drm-next-4.17' of git://people.freedesktop.org/~agd5f/linux into drm-next
More stuff for 4.17. Highlights:
- More fixes for "wattman" like functionality (fine grained clk/voltage control)
- Add more power profile infrastucture (context based dpm)
- SR-IOV fixes
- Add iomem debugging interface for use with umr
- Powerplay and cgs cleanups
- DC fixes and cleanups
- ttm improvements
- Misc cleanups all over

* 'drm-next-4.17' of git://people.freedesktop.org/~agd5f/linux: (143 commits)
  drm/amdgpu:Always save uvd vcpu_bo in VM Mode
  drm/amdgpu:Correct max uvd handles
  drm/amdgpu: replace iova debugfs file with iomem (v3)
  drm/amd/display: validate plane format on primary plane
  drm/amdgpu: Clean sdma wptr register when only enable wptr polling
  drm/amd/amdgpu: re-add missing GC 9.1 and SDMA0 4.1 sh_mask header files
  drm/amdgpu: give warning before sleep in kiq_r/wreg
  drm/amdgpu: further mitigate workaround for i915
  drm/amdgpu: drop gtt->adev
  drm/amdgpu: add amdgpu_evict_gtt debugfs entry
  drm/amd/pp: Add #ifdef checks for CONFIG_ACPI
  drm/amd/pp: fix "Delete the wrapper layer of smu_allocate/free_memory"
  drm/amd/pp: Drop wrapper functions for upper/lower_32_bits
  drm/amdgpu: Delete cgs wrapper functions for gpu memory manager
  drm/amd/pp: Delete the wrapper layer of smu_allocate/free_memory
  drm/amd/pp: Remove cgs wrapper function for temperature update
  Revert "drm/amd/pp: Add a pp feature mask bit for AutoWattman feature"
  drm/amd/pp: Add auto power profilng switch based on workloads (v2)
  drm/amd/pp: Revert gfx/compute profile switch sysfs
  drm/amd/pp: Fix sclk in highest two levels when compute on smu7
  ...
2018-03-09 10:50:45 +10:00
Shirish S
4a53d9045e drm/amd/display: validate plane format on primary plane
In dce110, the plane configuration is such that plane 0
or the primary plane should be rendered with only RGB data.

This patch adds the validation to ensure that no video data
is rendered on plane 0.

Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-07 16:31:19 -05:00
Eric Yang
abca24007e drm/amd/display: early return if not in vga mode in disable_vga
The work around for hw bug causes S3 resume failure. Don't execute
disable vga logic if not in vga mode.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-07 16:28:39 -05:00
Bhawanpreet Lakha
bd9bc355be drm/amd/display: Fix takover from VGA mode
HW Engineer's Notes:
 During switch from vga->extended, if we set the VGA_TEST_ENABLE and then
 hit the VGA_TEST_RENDER_START, then the DCHUBP timing gets updated correctly.
 Then vBIOS will have it poll for the VGA_TEST_RENDER_DONE and unset
 VGA_TEST_ENABLE, to leave it in the same state as before.

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-07 16:28:32 -05:00
Leo (Sunpeng) Li
9fe8f03bc0 drm/amd/display: Fix memleaks when atomic check fails.
While checking plane states for updates during atomic check, we create
dc_plane_states in preparation. These dc states should be freed if
something errors.

Although the input transfer function is also freed by
dc_plane_state_release(), we should free it (on error) under the same
scope as where it is created.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-07 16:28:22 -05:00
Harry Wentland
c0e463d3a0 drm/amd/display: Return success when enabling interrupt
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-07 16:28:15 -05:00
Harry Wentland
c0ec56449d drm/amd/display: Use crtc enable/disable_vblank hooks
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-07 16:28:06 -05:00