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drm/amd/display: early return if not in vga mode in disable_vga
The work around for hw bug causes S3 resume failure. Don't execute disable vga logic if not in vga mode. Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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d54ee94603
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drivers/gpu/drm/amd/display/dc
@ -407,6 +407,7 @@ struct dce_hwseq_registers {
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HWS_SF(, DOMAIN6_PG_STATUS, DOMAIN6_PGFSM_PWR_STATUS, mask_sh), \
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HWS_SF(, DOMAIN7_PG_STATUS, DOMAIN7_PGFSM_PWR_STATUS, mask_sh), \
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HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \
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HWS_SF(, D1VGA_CONTROL, D1VGA_MODE_ENABLE, mask_sh),\
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HWS_SF(, VGA_TEST_CONTROL, VGA_TEST_ENABLE, mask_sh),\
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HWS_SF(, VGA_TEST_CONTROL, VGA_TEST_RENDER_START, mask_sh),\
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HWS_SF(, LVTMA_PWRSEQ_CNTL, LVTMA_BLON, mask_sh), \
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@ -495,7 +496,8 @@ struct dce_hwseq_registers {
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type DENTIST_DPPCLK_WDIVIDER; \
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type DENTIST_DISPCLK_WDIVIDER; \
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type VGA_TEST_ENABLE; \
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type VGA_TEST_RENDER_START;
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type VGA_TEST_RENDER_START; \
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type D1VGA_MODE_ENABLE;
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struct dce_hwseq_shift {
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HWSEQ_REG_FIELD_LIST(uint8_t)
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@ -220,10 +220,14 @@ static void enable_power_gating_plane(
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static void disable_vga(
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struct dce_hwseq *hws)
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{
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unsigned int in_vga_mode = 0;
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REG_GET(D1VGA_CONTROL, D1VGA_MODE_ENABLE, &in_vga_mode);
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if (in_vga_mode == 0)
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return;
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REG_WRITE(D1VGA_CONTROL, 0);
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REG_WRITE(D2VGA_CONTROL, 0);
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REG_WRITE(D3VGA_CONTROL, 0);
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REG_WRITE(D4VGA_CONTROL, 0);
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/* HW Engineer's Notes:
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* During switch from vga->extended, if we set the VGA_TEST_ENABLE and
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