Add clock support for Vybrid VF610. It uses dtc macro support to
define all clock IDs in vf610-clock.h to keep clock IDs coherence
between kernel and DT.
Signed-off-by: Jingchang Lu <b35083@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
commit 84344b43c (ARM: i.MX5: Allow DT clock providers) introduce the following
sparse warning:
arch/arm/mach-imx/clk.c:12:43: warning: Using plain integer as NULL pointer
There is no need to initialize phandle, so remove it.
Cc: Martin Fuzzey <mfuzzey@parkeon.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Fix the following sparse warning:
arch/arm/mach-imx/irq-common.c:24:5: warning: symbol 'mxc_set_irq_fiq' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Instead of explicitly calling clock initialization functions, we can
declare the functions with CLK_OF_DECLARE() and then call common
of_clk_init() to have them invoked properly.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Let the mx53 TVE driver be built by default.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The CCM_CBCMR register (address 0x02C4018) has different meaning
between the i.MX6 Quad/Dual and the i.MX6 Solo/DualLite.
Compared to the i.MX6 Quad/Dual, the CCM_CBCMR register in the
i.MX6 Solo/DualLite reuses the gpu2d_core bits for the MLB clock
configuration.
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch adds the S/PDIF clocks for i.MX51 and i.MX53. Tested on i.MX53.
The i.MX51 has a second set of spdif_root clock dividers, and on i.MX53
there is an additional input to the spdif_xtal mux.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
MLB PLL should be handled internally in MLB driver,
so remove it from pllv3.
Signed-off-by: Jiada Wang <jiada_wang@mentor.com>
CC: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The MLB PLL clock's operation doesn't fit for clock framework and
it should be handled internally in MLB driver.
Remove initialization of pll8_mlb clock device but leave its
declaration in mx6q_clks to avoid affecting imx6q clock numbering.
Signed-off-by: Jiada Wang <jiada_wang@mentor.com>
CC: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add clock support for i.MX6 SoloLite. It uses the dtc marco support to
define all clock IDs in imx6sl-clock.h, which will be included by both
clock driver and device tree sources, so that the data will stay sync
all the time between kernel and DT.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The mxc_arch_reset_init() uses static mapping and calls clk_get_sys() to
get clock. It's suitable for non-DT boot but not for DT boot where
dynamic mapping and of_clk_get() should be used instead. Create
mxc_arch_reset_init_dt() as the DT variant of mxc_arch_reset_init(),
and change DT platforms to use it.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
It's inappropriate to call clk_prepare() in mxc_restart(), because the
restart routine could be called in atomic context. Move clk_get() and
clk_prepare() into mxc_arch_reset_init() and only have the atomic part
clk_enable() be called in mxc_restart().
As a result, mxc_arch_reset_init() needs to be called after clk gets
initialized.
While there, it also changes printk(KERN_ERR ...) to pr_err() and adds
__init annotation for mxc_arch_reset_init().
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The CCM_CBCMR register (address 0x02C4018) has different meaning
between the i.MX6 Quad/Dual and the i.MX6 Solo/DualLite.
Compared to the i.MX6 Quad/Dual, the CCM_CBCMR register in the
i.MX6 Solo/DualLite doesn't have a gpu3d_shader configuration and
moves the gpu2_core configuration at that place.
Handle these i.MX6 Quad/Dual vs. i.MX6 Solo/DualLite clock differences
by using cpu_is_mx6dl().
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
To improve the performance and power consumption add an i.MX6
specific L2 cache initialization.
This configuration is taken from Freescale's kernel patch
"ENGR00153601 [MX6]Adjust L2 cache parameter" [1]
with two additional improvements:
a) The L2X0_POWER_CTRL has only the two bits we set. So no need
to read the register before. Remove the register read done
in Freescale's patch.
b) In the L2X0_PREFETCH_CTRL register, besides the double linefill (bit[30]),
additionally enable the instruction and data prefetch (bit[29-28]).
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
[1] http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/arch/arm/mach-mx6/mm.c?h=imx_3.0.35_12.09.01&id=814656410b40c67a10b25300e51b0477b2bb96d1
Currently clock providers defined in the DT are not registered
on i.MX5 platforms since of_clk_init() is not called.
This is not a problem for the SOC's own clocks, which are registered
in code, but prevents the DT being used to define clocks for external
hardware.
Fix this by calling of_clk_init() and actually using the DT to obtain
the 4 SOC fixed clocks.
These are already defined in the DT but were previously just used to
manually obtain the rate.
Fall back to the old scheme for non DT platforms.
Since the same method may be useful for other i.MX platforms
implement the imx_obtain_fixed_clock() function in common code.
Actually changing other i.MX platforms to use this should be done
later by someone with access to the appropriate hardware.
Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Remove board support for the r8a7740 based Bonito board
The r8a7740 SoC support code is still kept around since it
is in use by the Armadillo800eva board which is basically a more
recent board where the design is based on Bonito.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Remove board support for the sh7372 based AP4EVB board
The sh7372 SoC support code is still kept around since it
is in use by the Mackerel board which is basically a more
recent board where the design is based on AP4EVB.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Remove mach-shmobile memory.h since it is no longer needed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Remove CONFIG_MEMORY_START and CONFIG_MEMORY_SIZE from mach-shmobile.
Boards should use DT to specify their memory setup. Boards that still
not support DT may pass ATAGS with memory information from the boot
loader. If those ATAGS turn out to be incorrect then appended DTB with
memory information should be used as a workaround.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Adjust mach-shmobile to add a select for CONFIG_ARM_PATCH_PHYS_VIRT
and at the same time remove NEED_MACH_MEMORY_H.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Remove shmobile_secondary_vector_scu now when all SCU enabled
SMP platforms instead make use of shmobile_boot_scu. This
removes two inline virtual to physical address conversions.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Let EMEV2 make use of shmobile_boot_fn and shmobile_boot_arg
together with shmobile_boot_scu and the SCU base address.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Let sh73a0 make use of shmobile_boot_fn and shmobile_boot_arg
together with shmobile_boot_scu and the SCU base address.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Let r8a7779 make use of shmobile_boot_fn and shmobile_boot_arg
together with shmobile_boot_scu and the SCU base address.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a shmoible_boot_scu function that assumes that the base address
of the SCU is passed in r0. This code is free from inline virtual
to physical address conversion.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add code for mach-shmobile to allow specifying boot function
and argument. Will initially be used for SMP together with SCU
but may in the future also be used for deep sleep resume. This
patch removes one inline virtual to physical address conversion.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Instead of having a hard coded virt-to-phys address
conversion code in sleep-sh7372.S, rework the code
to do the conversion in C using virt_to_phys().
This removes the need for PLAT_PHYS_OFFSET which
in turn is needed for ARCH_MULTIPLATFORM.
Signed-off-by: Magnus Damm <damm@opensource.se>
[horms+renesas@verge.net.au: squashed in build fix posted as
"ARM: shmobile: sh7372 build fix for SUSPEND=n && CPU_IDLE=n"]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The A10s is a SoC member of the Allwinner sun5i family. It is basically
an A13 with an EMAC and an HDMI controller.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Another week, another batch of fixes for arm-soc platforms.
Again, nothing controversial. A few more than would be ideal, but all
are valid fixes. In particular the prima2 panic patch is critical since
it fixes a problem where multiplatform kernels panic on all but prima2
hardware.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"These are a little later than I planned on since I got caught up with
handling merges for 3.11 most of the week.
Another week, another batch of fixes for arm-soc platforms.
Again, nothing controversial. A few more than would be ideal, but all
are valid fixes. In particular the prima2 panic patch is critical
since it fixes a problem where multiplatform kernels panic on all but
prima2 hardware."
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: SAMSUNG: pm: Adjust for pinctrl- and DT-enabled platforms
ARM: prima2: fix incorrect panic usage
arm: mvebu: armada-xp-{gp,openblocks-ax3-4}: specify PCIe range
ARM: Kirkwood: handle mv88f6282 cpu in __kirkwood_variant().
ARM: omap3: clock: fix wrong container_of in clock36xx.c
ARM: dts: OMAP5: Fix missing PWM capability to timer nodes
ARM: dts: omap4-panda|sdp: Fix mux for twl6030 IRQ pin and msecure line
ARM: dts: AM33xx: Fix properties on gpmc node
arm: omap2: fix AM33xx hwmod infos for UART2
ARM: OMAP3: Fix iva2_pwrdm settings for 3703
This registers the memory ranges for I/O, non-prefetched and
prefetched memory and configuration space for the PCIv3 bridge
and let us fetch these basic memory resources from the device
tree in the device tree boot path. Remove the stepping stone
platform device. This is an either/or approach - the platform
data path is mutually exclusive to the plain platform data
path and provided addresses from the device tree have to be
correct.
This adds the interrupt-map property to the PCIv3 DTS file
and makes the bridge obtain mappings from the device tree.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This branch contains fixes and enhancement for core Tegra Soc support:
* CPU hotplug support for Tegra114.
* Some preliminary work on Tegra114 CPU sleep modes.
* Minor fix for EMC table DT parsing.
This branch is based on v3.10-rc1.
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Merge tag 'tegra-for-3.11-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc
From Stephen Warren:
ARM: tegra: core SoC support enhancements
This branch contains fixes and enhancement for core Tegra Soc support:
* CPU hotplug support for Tegra114.
* Some preliminary work on Tegra114 CPU sleep modes.
* Minor fix for EMC table DT parsing.
* tag 'tegra-for-3.11-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: don't pass CPU ID to tegra_{set,clear}_cpu_in_lp2
ARM: tegra: cpuidle: using IS_ENABLED for multi SoCs management in init func
ARM: tegra: hook tegra_tear_down_cpu function in the PM suspend init function
ARM: tegra: cpuidle: move the init function behind the suspend init function
ARM: tegra: remove ifdef in the tegra_resume
ARM: tegra: add cpu_disable for hotplug
ARM: tegra114: add CPU hotplug support
clk: tegra114: implement wait_for_reset and disable_clock for tegra_cpu_car_ops
ARM: tegra114: add power up sequence for warm boot CPU
ARM: tegra: make tegra_resume can work for Tegra114
ARM: tegra: skip SCU and PL310 code when CPU is not Cortex-A9
ARM: tegra: add an assembly marco to check Tegra SoC ID
ARM: tegra: emc: correction of ram-code parsing from dt
Signed-off-by: Olof Johansson <olof@lixom.net>
* Ether device name updates for r8a7778 and r8a7779 Sergei Shtylyov
* Extended clock and driver coverage for r8a7778 by Goda-san and Morimoto-san
* Extended clock and coverage for r8a73a4 and r8a7790 by Guennadi Liakhovetski
* HSCIF support for r8a7790 by Ulrich Hecht
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Merge tag 'renesas-soc2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Second Round of Renesas ARM-based SoC updates for v3.11
* Ether device name updates for r8a7778 and r8a7779 Sergei Shtylyov
* Extended clock and driver coverage for r8a7778 by Goda-san and Morimoto-san
* Extended clock and coverage for r8a73a4 and r8a7790 by Guennadi Liakhovetski
* HSCIF support for r8a7790 by Ulrich Hecht
* tag 'renesas-soc2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7790: add clock definitions and aliases for MMCIF and SDHI
ARM: shmobile: r8a73a4: add clock definitions and aliases for MMCIF and SDHI
ARM: shmobile: r8a7778: add support MMC driver
ARM: shmobile: r8a7778: add support HSPI driver
ARM: shmobile: r8a7778: add support I2C driver
ARM: shmobile: r8a7778: add support MMC clock
ARM: shmobile: r8a7778: add support HSPI clock
ARM: shmobile: r8a7778: add support I2C clock
ARM: shmobile: r8a7790: HSCIF support
ARM: shmobile: r8a7778: fix Ether device name
ARM: shmobile: r8a7779: fix Ether device name
Signed-off-by: Olof Johansson <olof@lixom.net>
Conflicts:
arch/arm/mach-shmobile/clock-r8a7778.c
arch/arm/mach-shmobile/include/mach/r8a7778.h
These updates are by Sergei Shtylyov to clean-up USB support
present for R8A7779/Marzen and then extend USB support coverage to
R8A7778/BOCK-W.
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Merge tag 'renesas-phy-rcar-usb-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Renesas USB updates for v3.11
These updates are by Sergei Shtylyov to clean-up USB support
present for R8A7779/Marzen and then extend USB support coverage to
R8A7778/BOCK-W.
* tag 'renesas-phy-rcar-usb-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: BOCK-W: add USB support
ARM: shmobile: r8a7778: add USB support
phy-rcar-usb: add R8A7778 support
phy-rcar-usb: handle platform data
ARM: shmobile: Marzen: pass platform data to USB PHY device
phy-rcar-usb: add platform data
phy-rcar-usb: correct base address
ARM: shmobile: r8a7779: remove USB PHY 2nd memory resource
phy-rcar-usb: remove EHCI internal buffer setup
ARM: shmobile: r8a7779: setup EHCI internal buffer
ehci-platform: add pre_setup() method to platform data
ARM: shmobile: Marzen: move USB EHCI, OHCI, and PHY devices to R8A7779 code
Conflicts:
arch/arm/mach-shmobile/board-marzen.c
arch/arm/mach-shmobile/setup-r8a7778.c
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch removes static definitions of power domains and code
responsible for registering them and adding devices to them, since only
DT based boot is now supported on Exynos.
Cc: linux-pm@vger.kernel.org
Cc: "Rafael J. Wysocki" <rjw@sisk.pl>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch makes the firmware setup code assume presence of DT, since it
is now the only way of booting supported for Exynos.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch removes static mapping of chip ID block that was used when
booting with ATAGS, which is not supported on Exynos any more.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch removes legacy platform device initialization code that was
used to set names and other parameters of static platform devices when
booting with ATAGS, which is not supported on Exynos any more.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch removes legacy timer initialization code that was used to
set up system timers when booting with ATAGS, which is not supported
on Exynos any more.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch removes legacy IRQ initialization code that was used to set
up interrupt handling when booting with ATAGS, which is not supported
any more.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch removes now unused files containing old device and GPIO setup
code that was needed for ATAGS based boot, which is not supported on
Exynos any more.
The only exception is setup-i2c0.c that will be removed later, since it
has dependencies in plat-samsung/ directory.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch removes legacy UART initialization code that was used to
set up UART platform devices when booting with ATAGS, which is not
supported on Exynos any more.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch removes legacy EINT initialization code that was used to
handle external interrupts when booting with ATAGS, which is not
supported any more.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch removes legacy PMU initialization code that was used to set
up PMU when booting with ATAGS, which is not supported any more.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds a Kconfig entry that enables compilation of legacy
support code required for Samsung platforms that require ATAGS based
boot.
This allows to bypass compilation of this code when platforms without
ATAGS support are selected.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Since EXYNOS is now DT-only, it always requires USE_OF option to be
selected. This patch moves USE_OF selection from entries of DT board
files to ARCH_EXYNOS.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Since commit 383ffda ARM: EXYNOS: no more support non-DT for EXYNOS SoCs
all non-DT Exynos board files are not used anymore. This patch removes
them.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This series removes the hardcoded register base address for mvebu.
Depends:
- mvebu/fixes-non-critical (up to tags/fixes-non-3.11-1)
- mvebu/cleanup (up to tags/cleanup-3.11-3)
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Merge tag 'regmap-3.11' of git://git.infradead.org/users/jcooper/linux into next/soc
mvebu register map changes for v3.11
This series removes the hardcoded register base address for mvebu.
Depends:
- mvebu/fixes-non-critical (up to tags/fixes-non-3.11-1)
- mvebu/cleanup (up to tags/cleanup-3.11-3)
* tag 'regmap-3.11' of git://git.infradead.org/users/jcooper/linux:
arm: mvebu: disable DEBUG_LL/EARLY_PRINTK in defconfig
arm: mvebu: add another earlyprintk Kconfig option
arm: mvebu: don't hardcode the physical address for mvebu-mbus
arm: mvebu: don't hardcode a physical address in headsmp.S
arm: mvebu: remove hardcoded static I/O mapping
arm: mvebu: move cache and mvebu-mbus initialization later
arm: mvebu: avoid hardcoded virtual address in coherency code
arm: mvebu: remove dependency of SMP init on static I/O mapping
arm: mvebu: fix length of Ethernet registers area in .dtsi
arm: mvebu: fix length of SATA registers area in .dtsi
arm: mvebu: mark functions of armada-370-xp.c as static
ARM: mvebu: Remove init_irq declaration in machine description
ARM: Orion: Remove redundant init_dma_coherent_pool_size()
Signed-off-by: Olof Johansson <olof@lixom.net>
Add support for the OMAP5 SoC family.
As part of the transition to DT, no board files will be used
for OMAP5. The hwmod data is gradually being transitioned
away from arch/arm/mach-omap2: IRQ, DMA, and memory map data
has been moved to DT. Hopefully the dev_attr and clock role
data will be the next step.
Basic test logs are available here, although not for OMAP5,
since I don't have an OMAP5 board:
http://www.pwsan.com/omap/testlogs/omap5_v3.10/20130608130949/
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Merge tag 'omap-for-v3.11/omap5-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
From Tony Lindgren:
Omap5 SoC data via Paul Walmsley <paul@pwsan.com:
Add support for the OMAP5 SoC family.
As part of the transition to DT, no board files will be used
for OMAP5. The hwmod data is gradually being transitioned
away from arch/arm/mach-omap2: IRQ, DMA, and memory map data
has been moved to DT. Hopefully the dev_attr and clock role
data will be the next step.
Basic test logs are available here, although not for OMAP5,
since I don't have an OMAP5 board:
http://www.pwsan.com/omap/testlogs/omap5_v3.10/20130608130949/
* tag 'omap-for-v3.11/omap5-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP5: Remove unused include for ocp2scp
ARM: OMAP5: Enable build and frameowrk initialisations
ARM: OMAP5: voltagedomain data: Add OMAP5 voltage domain data
ARM: OMAP5: hwmod data: Create initial OMAP5 SOC hwmod data
ARM: OMAP5: powerdomain data: Add OMAP54XX data and update the header
ARM: OMAP5: clockdomain data: Add OMAP54XX data and update the header
ARM: OMAP5: SCRM: Add OMAP54XX header file.
ARM: OMAP5: PRCM: Add OMAP54XX local MPU PRCM registers
ARM: OMAP4+: PRCM MPU: Move function prototypes to common header for re-use
ARM: OMAP5: CM: Add OMAP54XX register and bitfield files
ARM: OMAP4+: CM: Move function prototypes to common header for re-use
ARM: OMAP5: PRM: Add OMAP54XX register and bitfield files
ARM: OMAP4+: PRM: Move function prototypes to common header for re-use
Signed-off-by: Olof Johansson <olof@lixom.net>
minimal support for am43x SoCs.
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Merge tag 'omap-for-v3.11/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
From Tony Lindgren:
Omap SoC changes. Mostly improves am33xx support, and adds
minimal support for am43x SoCs.
* tag 'omap-for-v3.11/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: AM43x: SRAM base and size
ARM: OMAP2+: AM43x: GP or HS ?
ARM: OMAP2+: AM43x: early init
ARM: OMAP2+: AM43x: static mapping
ARM: OMAP2+: AM437x: SoC revision detection
ARM: OMAP2+: AM43x: soc_is support
ARM: OMAP2+: AM43x: kbuild
ARM: OMAP2+: AM43x: Kconfig
ARM: OMAP2+: separate out OMAP4 restart
ARM: AM33XX: clk: Add clock node for EHRPWM TBCLK
ARM: OMAP3: clock data: get rid of unused USB host clock aliases and dummies
ARM: OMAP2+: AM33xx: Add missing reset status info to GFX hwmod
+ Linux 3.10-rc5
Signed-off-by: Olof Johansson <olof@lixom.net>
OMAP PM cleanups for v3.10
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Merge tag 'omap-for-v3.11/pm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
From Tony Lindgren:
Omap PM changes via Kevin Hilman <khilman@linaro.org>:
OMAP PM cleanups for v3.10
* tag 'omap-for-v3.11/pm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP4+: PM: Consolidate OMAP4 PM code to re-use it for OMAP5
ARM: OMAP4+: Make secondary_startup function name more consistent
ARM: OMAP4+: PM: Consolidate MPU subsystem PM code for re-use
ARM: OMAP4: PM: Avoid expensive cpu_suspend() path for all CPU power states except off
__init attribute does not make sense on function declarations.
Get rid of them in mach-davinci.
Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Cc: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Now that we have two different addresses for the UART, depending on
which bootloader is used, it is no longer desirable to enable
earlyprintk by default in the defconfig. Users who need earlyprintk
support will have to enable it explicitly, and select the right UART
configuration depending on their platform.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
In order to support both old and new bootloaders, we add a new Kconfig
option for the earlyprintk UART selection. The existing option allows
to work with old bootloaders (that keep the internal registers mapped
at 0xd0000000), while the newly introduced option allows to work with
new bootloaders (that remap the internal registers at 0xf1000000).
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Since the mvebu-mbus driver doesn't yet have a DT binding (and this DT
binding may not necessarily be ready for 3.11), the physical address
of the mvebu-mbus registers are currently hardcoded. This doesn't play
well with the fact that the internal registers base address may be
different depending on the bootloader.
In order to have only one central place for the physical address of
the internal registers, we now use of_translate_address() to translate
the mvebu-mbus register offsets into the real physical address, by
using DT-based address translation. This will go away once the
mvebu-mbus driver gains a proper DT binding.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Now that the coherency_init() function is called a bit earlier, we can
actually read the physical address of the coherency unit registers
from the Device Tree, and communicate that to the headsmp.S code,
which avoids hardcoding a physical address.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Now that we have removed the need of the static I/O mapping for early
initialization reasons, and fixed the registers area length that were
broken, we can get rid of the static I/O mapping. Only the earlyprintk
mapping needs to be set up, using the debug_ll_io_init() helper
function.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Current, the L2 cache and the mvebu-mbus drivers are initialized at
->init_early() time. However, at ->init_early() time, ioremap() only
works if a static I/O mapping has already been put in place. If it's
not the case, it tries to do a memory allocation with kmalloc() which
is not possible so early at this stage of the initialization.
Since we want to get rid of the static I/O mapping, we cannot
initialize the L2 cache driver and the mvebu-mbus driver so early. So,
we move their initialization to the ->init_time() level, which is
slightly later (so ioremap() works properly), but sufficiently early
to be before the call of the ->smp_prepare_cpus() hook, which creates
an address decoding window for the BootROM, which requires the
mvebu-mbus driver to be properly initialized.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Now that the coherency_get_cpu_count() function no longer requires a
very early mapping of the coherency unit registers, we can avoid the
hardcoded virtual address in coherency.c. However, the coherency
features are still used quite early, so we need to do the of_iomap()
early enough, at the ->init_timer() level, so we have the call of
coherency_init() at this point.
Unfortunately, at ->init_timer() time, it is not possible to register
a bus notifier, so we add a separate coherency_late_init() function
that gets called as as postcore_initcall(), when bus notifiers are
available.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The ->smp_init_cpus() function is called very early during boot, at a
point where dynamic I/O mappings are not yet possible. However, in the
Armada 370/XP implementation of this function, we have to get the
number of CPUs. We used to do that by accessing a hardware register,
which requires relying on a static I/O mapping set up by
->map_io(). Not only this requires hardcoding a virtual address, but
it also prevents us from removing the static I/O mapping.
So this commit changes the way used to get the number of CPUs: we now
use the Device Tree, which is a representation of the hardware, and
provides us the number of available CPUs. This is also more accurate,
because it potentially allows to boot the Linux kernel on only a
number of CPUs given by the Device Tree, instead of unconditionally on
all CPUs.
As a consequence, the coherency_get_cpu_count() function becomes no
longer used, so we remove it.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
- mvebu
- fix register area length in dtsi for ethernet and sata
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Merge tag 'tags/fixes-non-3.11-1' into mvebu/regmap
mvebu fixes non-critical for v3.11 (round 1)
- mvebu
- fix register area length in dtsi for ethernet and sata
Describe minimal DT boot machine details for AM43x based SoC's. AM43x
SoC's are ARM Cortex-A9 based with one core. AM43x is similar to
AM335x w.r.t L4 PER/WKUP memory map. AM43x has a sync timer, here that
is being used as clocksource, while 1ms dmtimer as clockevent.
Signed-off-by: Ankur Kishore <a-kishore@ti.com>
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This definition corresponds to the L3_OCMC0,
as in case of AM33XX.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Afzal Mohammed <afzal@ti.com>
[tony@atomide.com: updated to remove default y]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Minimal early init - PRCM initialization not yet taken care.
Control module is similar (base address, feature register etc.) as
that of AM335x, while PRCM base address is different. Instead of
adding a new header file for AM43x, PRCM base address is added in
AM335x header file as it is similar to it to a large extent.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
[tony@atomide.com: updated to drop am33xx_check_features()]
Signed-off-by: Tony Lindgren <tony@atomide.com>
soc_is support for AM43x family of SoC's. Only variant now is AM437x,
it is made as a subclass of AM43x.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Build pieces that could be reused for AM43x - GIC related, secure
related and common PRCM.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Separate out OMAP4 restart and have it similar to other platforms, in
a different file. Main motive is to reuse omap4-common on platforms
other than OMAP4, like AM43x, even if OMAP4 is deselected (otherwise
would have caused build breakage).
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add MSTP clock definitions and fix aliases for the two MMCIF and four SDHI
interfaces on r8a7790 (H2).
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
[horms+renesas@verge.net.au: applied manually]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add MSTP clock definitions and fix aliases for the two MMCIF and three SDHI
interfaces on r8a73a4 (APE6).
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Instead of relying on CONFIG_MEMORY_START for memory
base address, let each romImage board header file
specify this information.
This is reworks code not to rely on CONFIG_MEMORY_START
which in turn is needed for ARCH_MULTIPLATFORM.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Remove the ATAGS data structure from head-shmobile.S
since a default ATAGS is already provided by the code
in arch/arm/kernel/atags_parser.c. Passing a NULL as
ATAGS is valid. For actual hardware specific setup
the fixup callback in the board code may be used.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This is V2 of the mach-shmobile uImage load address rework patch.
Rework the mach-shmobile uImage load address calculation by storing
the per-board load addresses in Makefile.boot. This removes the
CONFIG_MEMORY_START dependency from Makefile.boot, and it also makes
it possible to create safe kernel images that boot on multiple boards.
This is one of several series of code that reworks code not to rely on
CONFIG_MEMORY_START/SIZE which in turn is needed for ARCH_MULTIPLATFORM.
Signed-off-by: Magnus Damm <damm@opensource.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
dw_apb_timer_init used to search the devicetree for matching timer
devices, making calls to it from board files necessary.
Change the dw_apb_timer_init to work with CLOCKSOURCE_OF_DECLARE.
With this change the function gets called once for each timer node
and tracks these number of calls to attach clockevent and clocksource
devices to the nodes.
Also remove the calls to dw_apb_timer_init from all previous users, as
clocksource_of_init is the default for init_time now.
Tested on the upcoming rk3066 code.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: Dinh Nguyen <dinguyen@altera.com>
dw_apb_timer_of is the driver part facing devicetree platforms and
calls into dw_apb_timer with the data gathered from the dt.
Currently the two platforms using the dw_apb_timer_of select both
the options for the core timer and the dt addon.
As dw_apb_timer_of always depends on dw_apb_timer let it select
DW_APB_TIMER itself without the need for every platform to do it.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: Dinh Nguyen <dinguyen@altera.com>
- mvebu
- fix PCIe ranges property so NOR flash is visible
- kirkwood
- fix identification of 88f6282 so MPPs can be set correctly
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Merge tag 'fixes-3.10-4' of git://git.infradead.org/users/jcooper/linux into fixes
From Jason Cooper, mvebu fixes for v3.10 round 4:
- mvebu
- fix PCIe ranges property so NOR flash is visible
- kirkwood
- fix identification of 88f6282 so MPPs can be set correctly
* tag 'fixes-3.10-4' of git://git.infradead.org/users/jcooper/linux:
arm: mvebu: armada-xp-{gp,openblocks-ax3-4}: specify PCIe range
ARM: Kirkwood: handle mv88f6282 cpu in __kirkwood_variant().
Signed-off-by: Olof Johansson <olof@lixom.net>
SOCFPGA has a system manager register block can be accessed by using
the syscon driver.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Cc: <linux@arm.linux.org.uk>
Signed-off-by: Olof Johansson <olof@lixom.net>
From Alexander Shiyan, this is a series of cleanups of clps711x, movig it
closer to multiplatform and cleans up a bunch of old code.
* clps711x/soc:
ARM: clps711x: Update defconfig
ARM: clps711x: Add support for SYSCON driver
ARM: clps711x: edb7211: Control LCD backlight via PWM
ARM: clps711x: edb7211: Add support for I2C
ARM: clps711x: Optimize interrupt handling
ARM: clps711x: Add clocksource framework
ARM: clps711x: Replace "arch_initcall" in common code with ".init_early"
ARM: clps711x: Move specific definitions from hardware.h to boards files
ARM: clps711x: p720t: Define PLD registers as GPIOs
ARM: clps711x: autcpu12: Move remaining specific definitions to board file
ARM: clps711x: autcpu12: Special driver for handling memory is removed
ARM: clps711x: autcpu12: Add support for NOR flash
ARM: clps711x: autcpu12: Move LCD DPOT definitions to board file
ARM: clps711x: Set PLL clock to zero if we work from 13 mHz source
ARM: clps711x: Remove NEED_MACH_MEMORY_H dependency
ARM: clps711x: Re-add GPIO support
GPIO: clps711x: Add DT support
GPIO: clps711x: Rewrite driver for using generic GPIO code
+ Linux 3.10-rc4
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds support for SYSCON driver for CLPS711X targets.
At this time there are no users for this driver, but it is will
be used as start point to use in CLPS711X drivers and remove
<mach/xx> dependencies.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch provide control LCD backlight via PWM. GPIO is used
only for switch backlight ON and OFF.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch modify interrupt handler for processing all penging interrupts
at once.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch provide migration to using "mtd-ram" driver instead of using
special driver for handling NVRAM memory.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>
We do not have driver for Up/Down digital potentiometer (DPOT), so
just define pins as GPIOs and export these pins to user.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>
This clock will be used in audio subsystem. Since audio cannot work
without PLL we should indicate this.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch removes dependency of NEED_MACH_MEMORY_H for CLPS711X-target.
Since some board may have memory holes, define ARCH_HAS_HOLES_MEMORYMODEL
for these boards.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>
arch_initcall was been removed from GPIO driver, so this patch
re-add support for GPIO into boards as platform_device.
Since some drivers (spi, nand, etc.) is not support deferred probe,
separate machine init calls is used in board code to make proper
loading sequence.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add a platform device for the r8a7778 MMC.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a platform device for the r8a7778 HSPI.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a platform device for the r8a7778 I2C.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds r8a7778 HSPI clock support.
It also adds shyway_clk which is requiested
from sh-hspi driver
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds r8a7778 I2C clock support.
It also adds peripheral_clk which is requiested
from i2c-rcar driver
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch makes legacy code on suspend/resume path being executed
conditionally, on non-DT platforms only, to fix suspend/resume of
DT-enabled systems, for which the code is inappropriate.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[olof: add #include <linux/of.h>]
Signed-off-by: Olof Johansson <olof@lixom.net>
* Increased clock coverage for r8a7740, r8a73a4, r8a7778 and r8a7790
* Use fixed clock ratio for r8a7778
* Always use shmobile_setup_delay for sh73a0
* Add add CPUFreq support for sh73a0
* Check kick bit before changing rate on sh73a0
* Do not overwrite all div4 clock operations on sh73a0
* Cleanup SH_FIXED_RATIO_CLK and SH_FIXED_RATIO_CLK macros
* sh73a0: Use DEFINE_RES_MEM*() everywhere
* r8a7740: Make private clock arrays static
* r8a7778: Correct model number
The last four changes listed above are cleanups. I have included them
in this series as all bar the last one are dependencies of non-cleanup
patches.
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Merge tag 'renesas-soc-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Renesas ARM-based SoC updates for v3.11
* Increased clock coverage for r8a7740, r8a73a4, r8a7778 and r8a7790
* Use fixed clock ratio for r8a7778
* Always use shmobile_setup_delay for sh73a0
* Add add CPUFreq support for sh73a0
* Check kick bit before changing rate on sh73a0
* Do not overwrite all div4 clock operations on sh73a0
* Cleanup SH_FIXED_RATIO_CLK and SH_FIXED_RATIO_CLK macros
* sh73a0: Use DEFINE_RES_MEM*() everywhere
* r8a7740: Make private clock arrays static
* r8a7778: Correct model number
The last four changes listed above are cleanups. I have included them
in this series as all bar the last one are dependencies of non-cleanup
patches.
* tag 'renesas-soc-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (27 commits)
ARM: shmobile: sh73a0: div4 clocks must check the kick bit before changing rate
ARM: shmobile: sh73a0: do not overwrite all div4 clock operations
ARM: shmobile: sh73a0: Always use shmobile_setup_delay()
ARM: shmobile: sh73a0: add CPUFreq support
ARM: shmobile: sh73a0: add support for adjusting CPU frequency
ARM: shmobile: r8a7790: add TPU PWM support
ARM: shmobile: r8a7790: Make private clock arrays static
ARM: shmobile: r8a7790: add div6 clocks
ARM: shmobile: r8a7790: add div4 clocks
ARM: shmobile: r8a7790: add main clock
ARM: shmobile: r8a7778: Register SDHI device
ARM: shmobile: r8a7778: add SDHI clock support
ARM: shmobile: r8a7778: use fixed ratio clock
ARM: shmobile: r8a7779: Add PCIe clocks
ARM: shmobile: r8a73a4: add div6 clocks
ARM: shmobile: r8a73a4: add div4 clocks
ARM: shmobile: r8a73a4: add pll clocks
ARM: shmobile: r8a73a4: add main clock
ARM: shmobile: r8a7740: add TPU PWM support
ARM: shmobile: r8a7740: Add I2C DT clock names
...
Conflicts:
arch/arm/mach-shmobile/Kconfig
arch/arm/mach-shmobile/include/mach/r8a7778.h
arch/arm/mach-shmobile/setup-r8a7778.c
SH-PFC:
* Entries for INTC external IRQs
* Remove dependency on GPIOLIB
* PFC support for r8a7790 SoC
* Pinmux support for r8a7778 SoC
* Increase pin group and function coverage for sh7372, r8a7740,
r8a7778, r8a7779 and r8a7790 SoCs
* Use pinctrl mapping on mackerel, ap4evb, armadillo800eva,
bonito, bockw, lager boards
* Use RCAR_GP_PIN macro in marzen board
* Remove unused GPIOs for sh7372, sh73a0, r8a7740 and r8a7790 SoCs
* Add bias (pull-up/down) pinconf support for r8a7740 SoC
* Add VCCQ support for sh73a0
GPIO car:
* Add RCAR_GP_PIN macro
* Add support for IRQ_TYPE_EDGE_BOTH
* Make the platform data gpio_base field signed
The GPIO changes have been included as the RCAR_GP_PIN and
IRQ_TYPE_EDGE_BOTH changes are depended on by SH-PFC changes.
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Merge tag 'renesas-pinmux-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Renesas ARM based SoC pinmux and GPIO update for v3.11
SH-PFC:
* Entries for INTC external IRQs
* Remove dependency on GPIOLIB
* PFC support for r8a7790 SoC
* Pinmux support for r8a7778 SoC
* Increase pin group and function coverage for sh7372, r8a7740,
r8a7778, r8a7779 and r8a7790 SoCs
* Use pinctrl mapping on mackerel, ap4evb, armadillo800eva,
bonito, bockw, lager boards
* Use RCAR_GP_PIN macro in marzen board
* Remove unused GPIOs for sh7372, sh73a0, r8a7740 and r8a7790 SoCs
* Add bias (pull-up/down) pinconf support for r8a7740 SoC
* Add VCCQ support for sh73a0
GPIO car:
* Add RCAR_GP_PIN macro
* Add support for IRQ_TYPE_EDGE_BOTH
* Make the platform data gpio_base field signed
The GPIO changes have been included as the RCAR_GP_PIN and
IRQ_TYPE_EDGE_BOTH changes are depended on by SH-PFC changes.
* tag 'renesas-pinmux-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (132 commits)
ARM: shmobile: marzen: Use RCAR_GP_PIN macro
ARM: shmobile: lager: Initialize pinmux
ARM: shmobile: bockw: add pinctrl support
ARM: shmobile: kzm9g: tidyup FSI pinctrl
ARM: shmobile: r8a7740 pinmux platform device cleanup
ARM: shmobile: r8a7790: Configure R-Car GPIO for IRQ_TYPE_EDGE_BOTH
pinctrl: sh-pfc: r8a7779: Fix missing MOD_SEL2 entry
Revert "ARM: shmobile: Disallow PINCTRL without GPIOLIB"
pinctrl: r8a7790: add pinmux data for MMCIF and SDHI interfaces
sh-pfc: r8a7778: add MMCIF pin groups
sh-pfc: r8a7778: add HSPI pin groups
sh-pfc: r8a7778: add I2C pin groups
pinctrl: sh-pfc: fix a typo in pfc-r8a7790
pinctrl: sh-pfc: fix r8a7790 Function Select register tables
sh-pfc: r8a7778: fixup IRQ1A settings
sh-pfc: r8a7779: add Ether pin groups
sh-pfc: r8a7778: add Ether pin groups
sh-pfc: r8a7778: add VIN pin groups
sh-pfc: sh73a0: Remove function GPIOs
sh-pfc: r8a7790: Add TPU pin groups and functions
...
Register the USB PHY device from bockw_init(), passing the platform data to it.
Set machine's init_late() method to r8a7778_init_late() in order for [EO]HCI to
get registered too...
Don't forget to add USB PENC0/1 pins to bockw_pinctrl_map[].
The patch has been tested on the BOCK-W board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
In prima2, some functions of checking DT is registered in initcall
level. If it doesn't match the compatible name of sirf, kernel
will panic. It blocks the usage of multiplatform on other verndor.
The error message is in below.
Knic - not syncing: unable to find compatible pwrc node in dtb
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.10.0-rc3-00006-gd7f26ea-dirty #86
[<c0013adc>] (unwind_backtrace+0x0/0xf8) from [<c0011430>] (show_stack+0x10/0x1)
[<c0011430>] (show_stack+0x10/0x14) from [<c026f724>] (panic+0x90/0x1e8)
[<c026f724>] (panic+0x90/0x1e8) from [<c03267fc>] (sirfsoc_of_pwrc_init+0x24/0x)
[<c03267fc>] (sirfsoc_of_pwrc_init+0x24/0x58) from [<c0320864>] (do_one_initcal)
[<c0320864>] (do_one_initcall+0x90/0x150) from [<c0320a20>] (kernel_init_freeab)
[<c0320a20>] (kernel_init_freeable+0xfc/0x1c4) from [<c026b9e8>] (kernel_init+0)
[<c026b9e8>] (kernel_init+0x8/0xe4) from [<c000e158>] (ret_from_fork+0x14/0x3c)
Signen-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add USB clock and EHCI, OHCI, and USB PHY platform devices for R8A7778 SoC; add
a function to register PHY device with board-specific platform data and register
EHCI and OHCI platfrom devices from the init_late() board method.
Also, don't forget to enable CONFIG_ARCH_HAS_[EO]HCI options for R8A7778 SoC in
Kconfig...
The patch has been tested on the BOCK-W board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Since we're now going to setup the USBPCTRL0 register using the USB PHY device's
platform data, we now need a way to pass those platform data from the board file
to the device which is situated in setup-r8a7779.c -- and what I'm suggesting is
r8a7779_add_usb_phy_device() that will register USB PHY platform device with the
passed platform data using platform_device_register_resndata() call; creating
this function involves deletion of 'usb_phy_device' from r8a7779_devices_dt[],
so that it will no longer be registered for the generic R8A7779 machine (where
we can't provide the platform data anyway), hence EHCI/OHCI drivers will fail
to load as well.
For the Marzen board, this new function will be called from marzen_init() to
register the USB PHY device early enough.
Note that the board and the SoC code have to be in one patch to keep the code
bisectable...
The patch has been tested on the Marzen board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[horms+renesas@verge.net.au: manually applied]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The memory region that is used by the driver overlaps EHCI and OHCI register
regions for absolutely no reason now -- fix it by adding offset of 0x800 to
the base address, changing the register #define's accordingly. This has extra
positive effect that we now can use devm_ioremap_resource()...
Note that the driver and the SoC code have to be in one patch to keep the code
bisectable...
The patch has been tested on the Marzen board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Now that 'drivers/usb/phy/phy-rcar-usb.c' doesn't require the second memory
resource anymore, we can remove it from the R8A7779's USB PHY platform device.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Setup the EHCI internal buffer (before EHCI driver has a chance to touch the
registers) using the pre_setup() method in 'struct usb_ehci_pdata'.
The patch has been tested on the Marzen board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
USB EHCI, OHCI, and common PHY are the SoC devices but are wrongly defined and
registered in the Marzen board file. Move the data and code to their proper
place in setup-r8a7779.c; while at it, we have to rename r8a7779_late_devices[]
to r8a7779_standard_devices[] -- this seems legitimate since they are registered
from r8a7779_add_standard_devices() anyway.
Note that I'm deliberately changing the USB PHY platform device's 'id' field
from (previously just omitted) 0 to -1 as the device is a single of its kind.
Note also that the board and SoC code have to be in one patch to keep the code
bisectable...
The patch has been tested on the Marzen board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[horms+renesas@verge.net.au: manually applied]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Adds support for HSCIF0 and HSCIF1 on the r8a7790.
Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
While recasting commit 524219146a (ARM: shmobile:
R8A7778: add Ether support), I made a typo in the platform device's name: used
underscore instead of hyphen.
However, there's now patch merged to net-next.git renaming the platform device
from "sh-eth" to "r8a777x-ehter", so it makes the most sense to change the name
straight to that one.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
While recasting commit dace48d04d (ARM: shmobile:
R8A7779: add Ether support), I made a typo in the platform device's name: used
underscore instead of hyphen.
However, there's now patch merged to net-next.git renaming the platform device
from "sh-eth" to "r8a777x-ehter", so it makes the most sense to change the name
straight to that one.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This branch acts as a base for adding USB support to
r8A7778/BOCK-W and r8A7779/Marzen.
It includes the soc branch to provide dependencies in
the r8A7778 clock code.
It includes pinmux to provide pinmux initialisation for Bock-W
which is a dependency.
Conflicts:
arch/arm/mach-shmobile/Kconfig
arch/arm/mach-shmobile/include/mach/r8a7778.h
arch/arm/mach-shmobile/setup-r8a7778.c
As we discussed in mailing list, non-DT for EXYNOS SoCs will not be
supported from v3.11. This patch removes regarding files for non-DT
including board files and defconfig.
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Tomasz Figa <t.figa@samsung.com>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
As part of the transition to DT, no board files will be used
for OMAP5. The hwmod data is gradually being transitioned
away from arch/arm/mach-omap2: IRQ, DMA, and memory map data
has been moved to DT. Hopefully the dev_attr and clock role
data will be the next step.
Basic test logs are available here, although not for OMAP5,
since I don't have an OMAP5 board:
http://www.pwsan.com/omap/testlogs/omap5_v3.10/20130608130949/
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Merge tag 'omap-devel-a-for-3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.11/omap5
Add support for the OMAP5 SoC family.
As part of the transition to DT, no board files will be used
for OMAP5. The hwmod data is gradually being transitioned
away from arch/arm/mach-omap2: IRQ, DMA, and memory map data
has been moved to DT. Hopefully the dev_attr and clock role
data will be the next step.
Basic test logs are available here, although not for OMAP5,
since I don't have an OMAP5 board:
http://www.pwsan.com/omap/testlogs/omap5_v3.10/20130608130949/
Pull ARM fixes from Russell King:
"The biggest two fixes are fixing a compilation error with the
decompressor, and a problem with our __my_cpu_offset implementation.
Other changes are very trivial and small, which seems to be the way
for most -rc stuff."
* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
ARM: 7747/1: pcpu: ensure __my_cpu_offset cannot be re-ordered across barrier()
ARM: 7750/1: update legacy CPU ID in decompressor cache support jump table
ARM: 7743/1: compressed/head.S: work around new binutils warning
ARM: 7742/1: topology: export cpu_topology
ARM: 7737/1: fix kernel decompressor compilation error with CONFIG_DEBUG_SEMIHOSTING
EHRPWM module requires explicit clock gating of TBCLK from control
module. Hence add TBCLK clock node in clock tree for EHRPWM modules.
Signed-off-by: Philip Avinash <avinashphilip@ti.com>
[bigeasy: remove CK_AM33XX]
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
We don't need multiple aliases for the OMAP USB host clocks and neither
the dummy clocks so remove them.
CC: Paul Walmsley <paul@pwsan.com>
CC: Rajendra Nayak <rnayak@ti.com>
CC: Benoit Cousson <b-cousson@ti.com>
CC: Mike Turquette <mturquette@linaro.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
[paul@pwsan.com: updated against v3.10-rc4]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
GFX has a reset status register (PRM_GFX.RM_GFX_RSTST),
so update the GFX hwmod data with .rstst_off and .st_shift
information.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Another week, another batch of fixes for arm-soc platforms.
Nothing controversial here, a handful of fixes for regressions and/or
serious problems across several of the platforms. Things are slowing
down nicely on fix rates for 3.10.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Another week, another batch of fixes for arm-soc platforms.
Nothing controversial here, a handful of fixes for regressions and/or
serious problems across several of the platforms. Things are slowing
down nicely on fix rates for 3.10"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: exynos: add debug_ll_io_init() call in exynos_init_io()
ARM: EXYNOS: uncompress - print debug messages if DEBUG_LL is defined
ARM: shmobile: sh73a0: Update CMT clockevent rating to 80
sh-pfc: r8a7779: Don't group USB OVC and PENC pins
ARM: mxs: icoll: Fix interrupts gpio bank 0
ARM: imx: clk-imx6q: AXI clock select index is incorrect
ARM: bcm2835: override the HW UART periphid
ARM: mvebu: Fix bug in coherency fabric low level init function
ARM: Kirkwood: TS219: Fix crash by double PCIe instantiation
ARM: ux500: Provide supplies for AUX1, AUX2 and AUX3
ARM: ux500: Only configure wake-up reasons on ux500 based platforms
ARM: dts: imx: fix clocks for cspi
ARM i.MX6q: fix for ldb_di_sels
Include the OMAP5 data files in build. Initialise the voltage, power,
clock domains.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add voltagedomain related data for OMAP54XX SOCs. OMAP4 OPP data is
used for now. OMAP5 OPP data will be added as part of OMAP5 DVFS
support.
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Adding the hwmod data for OMAP54xx SOCs.
Additional changes done on top of initial SOC data files.
- The IO resource information like dma request lines, irq number and
ocp address space can be populated via dt blob. So such data is stripped
from OMAP5 SOC hwmod data file.
- SDMA IO resource information is still kept since dmaengine work
is till ongoing. Once the legacy dma platform driver becomes obsolete,
SDMA io space information can be removed.
- The devices like dss, aess, usb which are missing the device tree bindings,
hwmod data is not added since OMAP5 is DT only build. When such devices add
the dt bindings, respective hwmod data can be added along with it.
With above update, we now need about ~2000 loc vs ~6000 loc with previous
version of the patch for OMAP5 hwmod data file. Ofcourse with addition of
few more drivers it can go upto ~2400 loc which is still better than the
earlier version.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the data file to describe all power domains inside the OMAP54XX soc.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[santosh.shilimkar@ti.com: Generated es2.0 data]
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the data file to describe all clock domains inside the OMAP54XX soc.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[santosh.shilimkar@ti.com: Generated es2.0 data]
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP5 reuses OMAP4 MPU PRCM IP block which lets us re-use functions.
So move the function prototypes from prcm_mpu44xx.h to prcm_mpu_44xx_54xx.h
header. The suggestion came from Paul Walmsley as part of the
OMAP5 data file review.
This is preparatory patch to add OMAP5 MPU PRCM data file.
Cc: Paul Walmsley <paul@pwsan.com>
Acked-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP5 reuses OMAP4 CM IP block which lets us re-use CM1/CM2 functions.
So move the function prototypes from cm1_44xx.h, cm2_44xx.h to
cm_prm44xx_54xx.h header. The suggestion came from Paul Walmsley
as part of the OMAP5 data file review.
This is preparatory patch to add OMAP5 CM data file.
Cc: Paul Walmsley <paul@pwsan.com>
Acked-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP5 reuses OMAP4 PRM IP block which lets us re-use PRM functions.
So move the function prototypes from prm44xx.h to prm44xx_54xx.h
header. The suggestion came from Paul Walmsley as part of the
OMAP5 data file review.
This is preparatory patch to add OMAP5 PRM data file.
Cc: Paul Walmsley <paul@pwsan.com>
Acked-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
