Commit Graph

46 Commits

Author SHA1 Message Date
Jeeja KP
6abca1d71b ASoC: Intel: Skylake: Add support to topology for module static pin
Some module pin connection are static and defined by the topology.
This patch adds support for static pin definitions in topology widget
private data

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-24 01:31:34 +09:00
Jeeja KP
bfa764accd ASoC: Intel: Skylake: Fix to set Non gateway copier cfg
If copier instance is connected to a DMA gateway then driver
needs to configure the gateway configuration otherwise set
it to invalid.
This patch sets the non gateway copier node value to invalid.

Signed-off-by: Dharageswari.R <dharageswari.r@intel.com>
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-24 01:31:34 +09:00
Jeeja KP
2ac454ffe6 ASoC: Intel: Skylake: Fix to check return value of dsp init
If DSP initialization fails, ipc to disable notification
will cause NULL ptr exception as ipc is not initialized.
This patch returns error if dsp init fails before
sending disable notification ipc.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-24 01:31:34 +09:00
Jeeja KP
4e10996ba8 ASoC: Intel: Skylake: Add support to disable module notifications
Each FW modules can report underrun/overrun notification from
all modules. This patch disables underrun/overrun notification after
firmware is loaded.
This will be supportted for debug mode only thru debugfs

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-24 01:31:34 +09:00
Jeeja KP
d7b188131c ASoC: Intel: Skylake: Update for ssp node index in copier cfg
DSP firmware has interface change for SSP node index structure.
New FW interface removes the dual_mono field and adds 4 bits for
TDM slot group index. This patch updates the ssp dma to align with
the DSP firmware structure.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-24 01:31:34 +09:00
Subhransu S. Prusty
4d8adccb22 ASoC: Intel: Skylake: Fix to fill all sink/source pipe params
Currently params only for first copier widget identified in the
source/sink path is queried from NHLT. In the dapm route the
playback/capture widget may be connected to more than one copier
widget. This patch adds return check to return only for any error
case.

Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-24 01:31:34 +09:00
Subhransu S. Prusty
f0900eb213 ASoC: Intel: Skylake: Fix to use correct macros for the path iteration
In case of playback, for the BE dai source path should be iterated to find
the pipe params. With sink path iterated, this resulted in a loop and kernel
panic with page request failure.
Similar are the cases for Capture and FE dais. Using correct macros to fix
the panic

Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-24 01:31:34 +09:00
Jeeja KP
bc03281a5c ASoC: Intel: Skylake: Remove BE copier blob memcpy
The BE copier private data allowed endpoint configuration blobs, now these
are queried from BIOS, we don't need to copy the blob, but only capability.

Removing the blob from private data will not allocate memory for module
specific config in which case memcpy will fail. Fix is to assign the ptr
queried from the NHLT table for the endpoint configuration.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-24 01:31:34 +09:00
Jeeja KP
9270b7b926 ASoC: Intel: Skylake: Fix return for pm_runtime_get_sync()
pm_runtime_get_sync() will return a negative value in case of
error and can return postive value for success.  The return check
for pm_runtime_get_sync() must be less than 0, so fix it

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-24 01:31:34 +09:00
Dan Williams
ba40a854ea ASoC: Intel: switch from ioremap_cache to memremap
In preparation for deprecating ioremap_cache() convert its usage in
skl-nhlt to memremap.

Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-22 14:23:27 +01:00
Jeeja KP
01bb84b500 ASoC: Intel: Skylake: power down all link in suspend
This ensures that the link is not requesting any clock and the
PLL can turn off. The link is powered when controller is brought
out of reset.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-09 11:19:01 +01:00
Jeeja KP
84c9e2836a ASoC: Intel: Skylake: Correct the runtime handler behaviour
On runtime pm resume, we need to download the firmware, also on
suspend we need to ensure all the interrupts from controller and
DSP are disabled.

Also since we download the firmware on resume, we don't need to do
so on init, so remove that bit

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-09 11:19:00 +01:00
Jeeja KP
def656fe22 ASoC: Intel: Skylake: Verify the status bit before handling interrupt
Like we have in legacy mode HDA driver, we need to check the
status bit and handle interrupt only when it is not zero or all
bits set.  We typically see the status as all 1's when controller
resumes from suspend, So add the check here as well and don't
handle for these cases.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-09 11:18:59 +01:00
Jeeja KP
6ea8ba33e6 ASoC: Intel: Skylake: Check CPA bit in DSP core power down
Skylake driver will set the SPA bit to 0 to turn off the DSP core.
Driver will poll the Current Power Active (CPA) bit to match the
Set Power Active (SPA) bit value. When CPA bit matches the value
of SPA bit, the achieved power state has reached.

In case of DSP power down, register that was polled is SPA
instead of CPA. This patch corrects the register to be polled
in case of DSP power down.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-09 11:18:58 +01:00
Vinod Koul
3373f71683 ASoC: Intel: Skylake: Modify the log level
dev_info is too noisy for tplg wiget loading, so move it to
debug level

Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-08 09:46:22 +01:00
Jeeja KP
87b2bdf022 ASoC: Intel: Skylake: Initialize NHLT table
Load and Initialize Non HDA Link Table in Skylake driver
to get platform configuration.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-07 16:04:17 +01:00
Jeeja KP
2a29b200c6 ASoC: Intel: Skylake: Add DSP support and enable it
If processing pipe capability is supported, add DSP support.
Adds initialization/free/suspend/resume DSP functionality.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-07 16:04:16 +01:00
Jeeja KP
b663a8c5c9 ASoC: Intel: Skylake: Initialize and load DSP controls
Initialize and creates DSP controls if processing pipe capability
is supported by HW. Updates the dma_id, hw_params to module param
to be used when DSP module has to be configured.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-07 16:04:15 +01:00
Vinod Koul
3af36706ff ASoC: Intel: Skylake: Add topology core init and handlers
The SKL driver does not code DSP topology in driver. It uses the
newly added ASoC topology core to parse the topology information
(controls, widgets and map) from topology binary.
Each topology element passed private data which contains
information that driver used to identify the module instance
within firmware and send IPCs for that module to DSP firmware
along with parameters.
This patch adds init routine to invoke topology load and callback
for topology creation.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-07 16:04:14 +01:00
Vinod Koul
cfb0a87383 ASoC: Intel: Skylake: Add FE and BE hw_params handling
For FE and BE, the PCM parameters come from FE and BE hw_params
values passed. For a FE we convert the FE params to DSP expected
module format and pass to DSP. For a BE we need to find the
gateway settings (i2s/PDM) to be applied. These are queried from
NHLT table and applied.

Further for BE based on direction the settings are applied as
either source or destination parameters.

These helpers here allow the format to be calculated and queried
as per firmware format.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-07 15:30:16 +01:00
Vinod Koul
d93f8e550f ASoC: Intel: Skylake: add DSP platform widget event handlers
The Skylake driver topology model tries to model the firmware
rule for pipeline and module creation.
The creation rule is:
 - Create Pipe
 - Add modules to Pipe
 - Connect the modules (bind)
 - Start the pipes

Similarly destroy rule is:
 - Stop the pipe
 - Disconnect it (unbind)
 - Delete the pipe

In driver we use Mixer, as there will always be ONE mixer in a
pipeline to model a pipe. The modules in pipe are modelled as PGA
widgets.  The DAPM sequencing rules (mixer and then PGA) are used
to create the sequence DSP expects as depicted above, and then
widget handlers for PMU and PMD events help in that.

This patch adds widget event handlers for PRE/POST PMU and
PRE/POST PMD event for mixer and pga modules.  These event
handlers invoke pipeline creation, destroy, module creation,
module bind, unbind and pipeline bind unbind

Event handler sequencing is implement to target the DSP FW
sequence expectations to enable path from source to sink pipe for
Playback/Capture.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Hardik T Shah <hardik.t.shah@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-07 15:30:15 +01:00
Jeeja KP
f7590d4f15 ASoC: Intel: Skylake: Add module configuration helpers
To configure a module, driver needs to send input and output PCM
params for a module in DSP. The FE PCM params come from hw_params
ie from user, for a BE they also come from hw_params but from
BE-link fixups.
So based on PCM params required driver has to find a converter
module (src/updown/format) and then do the conversion and
calculate PCM params in these pipelines In this patch we add the
helper modules which allow driver to do these calculations.

Signed-off-by: Hardik T Shah <hardik.t.shah@intel.com>
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-07 15:30:15 +01:00
Jeeja KP
e4e2d2f452 ASoC: Intel: Skylake: Add pipe and modules handlers
SKL driver needs to instantiate pipelines and modules in the DSP.
The topology in the DSP is modelled as DAPM graph with a PGA
representing a module instance and mixer representing a pipeline
for a group of modules along with the mixer itself.

Here we start adding building block for handling these. We add
resource checks (memory/compute) for pipelines, find the modules
in a pipeline, init modules in a pipe and lastly bind/unbind
modules in a pipe These will be used by pipe event handlers in
subsequent patches

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-07 15:30:15 +01:00
Jeeja KP
5b97c0f18a ASoC: Intel: Skylake: Remove unused CPU dais
We need to create CPU DAI for each endpoint instance. For this we
should have one DMIC DAI, one HDA DAI and SSP DAI.  Thus, DMIC23,
HDA-SPK/AMIC was not required so this patch removes them

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-09-19 09:27:52 -07:00
Jeeja KP
c9b1e834bc ASoC: Intel: Skylake: Add pipe management helpers
To manage DSP we need to create processing pipeline and on cleanup destroy
them. So we add create and destroy routines for pipelines The pipelines need
to to be executed so we add pipeline run and stop routines
All these send required IPCs to DSP using IPC routines added earlier

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-07 14:26:03 +01:00
Jeeja KP
beb73b266a ASoC: Intel: Skylake: Add DSP module init and binding routines
A module needs to be instantiated and then connected with other modules. On
cleanup we need to disconnect the module.
This is achieved by helpers module init, bind and unbind which are added
here

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-07 14:26:02 +01:00
Hardik T Shah
a0ffe48bb5 ASoC: Intel: Skylake: Add helpers for SRC and converter modules
SRC and converter modules are required to do frequency and channel
conversion in DSP. Both take base module configuration and additional SRC
and converter parameters. The helpers here are added to calculate the values
for these modules

Signed-off-by: Hardik T Shah <hardik.t.shah@intel.com>
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-07 14:26:02 +01:00
Jeeja KP
23db472bba ASoC: Intel: Skylake: Add helpers for DSP module configuration
This adds helper functions to calculate parameters required for base module
format and copier module. A generic module is modelled by base module.
Copier module is responsible for getting/sending data to FE (host DMAs) and
BE (link HDA DMA, SSP, PDM)
This also ads module pin management helpers which help in finding pins to
use or freeing them up

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-07 14:26:02 +01:00
Jeeja KP
aba3dd5ace ASoC: Intel: Skylake: Use acpi header for NHLT header
Instead of defining own acpi header, use the available acpi
header defined in acpi framework.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-07 14:26:01 +01:00
Jeeja KP
9f2dd0270d ASoC: Intel: Skylake: Fix the NHLT rate size
Sampling rate type needs to be u32 instead of u8, nhlt wav format
description expected u32 for rate, passing u8 will fetch NULL
config in skl_get_ep_blob().

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-07 14:26:01 +01:00
Jeeja KP
d255b09555 ASoC: Intel: Skylake: Add dsp and ipc init helpers
This helper function will be used by the Skylake driver for dsp and
ipc initialization if processing pipe capability is supported.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-23 17:39:01 +01:00
Jeeja KP
473eb87adc ASoC: Intel: Skylake: Add NHLT support to get BE config
The Non-HD Audio Endpoint Description table contains the link
configuration information for the DSP. This is specific to Non HDA
links only, like I2s and PDM

Skylake driver will use NHLT table to retrieve the configuration based
on the link type, format, channel and rate. This configuration is
passed to DSP FW

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-23 17:39:00 +01:00
Omair M Abdullah
28f3b6f113 ASoC: Intel: Skylake: Print error code in IPC for SKL
Signed-off-by: Omair M Abdullah <omair.m.abdullah@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-16 21:46:50 +01:00
Subhransu S. Prusty
a750ba5f5a ASoC: Intel: Skylake: Add SKL DSP initialization
This adds the dsp and ipc initialization for the Skylake platform.
It also requests firmware and uses code loader dma to load it.

Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-16 21:46:50 +01:00
Subhransu S. Prusty
6cb0033380 ASoC: Intel: Skylake: Process code loader DMA interrupt
The code loader DMA interrupt is received by main interrupt handler which
dispatches it to cldma routines

Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-16 21:46:50 +01:00
Vinod Koul
3e40a78461 ASoC: Intel: Skylake: Add code loader DMA APIs
This patch adds the last piece of code loader DMA APIs by adding the code
loader DMA APIs for the driver to use

Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-16 21:46:50 +01:00
Vinod Koul
914426c865 ASoC: Intel: Skylake: add code loader DMA operations
This patch starts adding code loader DMA handling internal operations for
setting up bdle, controller, spb, cleanup routines and buffer filling

Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-16 21:46:50 +01:00
Vinod Koul
e30903877f ASoC: Intel: Skylake: Add code loader DMA registers
Skylake has a DMA controller for loading DSP code and modules to memory.
Add the register defines for this DMA

Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-16 21:46:50 +01:00
Subhransu S. Prusty
b662680252 ASoC: Intel: Skylake: Add dsp loader ops
The ops is initialized during the dsp registration and used for the
allocating dma buffers.

Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-16 21:46:50 +01:00
Subhransu S. Prusty
e973e31a02 ASoC: Intel: Add DSP init and boot up functionality for SKL
This patch adds code to enable, disable and boot DSP core.
Also provide some helpers to reset and power up/down the core.

Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-09 18:33:23 +01:00
Subhransu S. Prusty
b81fd26359 ASoC: Intel: Add Skylake IPC library
This adds base SKL IPC library which uses common SST IPC lib.
Here we add definition for IPC types, sending and receiving IPC messages
from aDSP, handling interrupt, sending different types of messages etc

Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-09 18:33:23 +01:00
Jeeja KP
0505700104 ASoC: Intel: Add support for decoupled mode in skl driver
Decoupled mode is where audio link is broken to frontend HDA and backend
(hda/i2s/dmic/hdmi) links. This patch adds support for decoupled mode and
then adds dais, dai ops for be/fe cpu dais and interrupt handler change to
support decoupled mode

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-09 11:54:26 +01:00
Jeeja KP
eb965e3686 ASoC: Intel: Add makefile support for SKL driver
This adds makefile and Kconfig to enable Skylake HD audio PCM driver

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-09 11:54:26 +01:00
Jeeja KP
d8c2dab838 ASoC: Intel: Add Skylake HDA audio driver
This patch follows up by adding the HDA controller operations. This
code is mostly derived from Intel HDA PCI driver without legacy bits

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-09 11:54:26 +01:00
Jeeja KP
a40e693c7f ASoC: Intel: Add Skylake HDA platform driver
This patch starts to add the Skylake HDA platform driver by defining
SoC CPU dais, DMA driver ops and implements ALSA operations

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-09 11:54:26 +01:00
Subhransu S. Prusty
3582f9ae07 ASoC: Intel: Define SKL ADSP IPC and general purpose registers
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Kp, Jeeja <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-08 19:46:48 +01:00