Commit Graph

447 Commits

Author SHA1 Message Date
Thierry Reding
328ec69e7f drm/tegra: Output cleanup functions cannot fail
The tegra_output_exit() and tegra_output_remove() functions cannot fail,
so make them return void.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:49 +01:00
Thierry Reding
ea130b240d drm/tegra: Remove remnants of the output midlayer
The tegra_output midlayer is now completely gone and output drivers use
it purely as a helper library.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:49 +01:00
Thierry Reding
4009c22420 drm/tegra: debugfs cleanup cannot fail
The debugfs cleanup code never fails, so no error is returned. Therefore
the functions can all return void instead.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:48 +01:00
Thierry Reding
6fad8f66d7 drm/tegra: sor: Demidlayer
Implement encoder and connector within the eDP driver itself using the
Tegra output helpers rather than using the Tegra output as midlayer. By
doing so one level of indirection is removed and output drivers become
more flexible while keeping the majority of the advantages provided by
the common output helpers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:48 +01:00
Thierry Reding
5b901e78b2 drm/tegra: dsi: Demidlayer
Implement encoder and connector within the DSI driver itself using the
Tegra output helpers rather than using the Tegra output as midlayer. By
doing so one level of indirection is removed and output drivers become
more flexible while keeping the majority of the advantages provided by
the common output helpers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:48 +01:00
Thierry Reding
596827196f drm/tegra: hdmi: Demidlayer
Implement encoder and connector within the HDMI driver itself using the
Tegra output helpers rather than using the Tegra output as midlayer. By
doing so one level of indirection is removed and output drivers become
more flexible while keeping the majority of the advantages provided by
the common output helpers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:47 +01:00
Thierry Reding
3b0e585548 drm/tegra: rgb: Demidlayer
Implement encoder and connector within the RGB driver itself using the
Tegra output helpers rather than using the Tegra output as midlayer. By
doing so one level of indirection is removed and output drivers become
more flexible while keeping the majority of the advantages provided by
the common output helpers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:47 +01:00
Thierry Reding
c5a107d327 drm/tegra: Add tegra_dc_setup_clock() helper
This is a small helper that performs the basic steps required by all
output drivers to prepare the display controller for use with a given
encoder.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:46 +01:00
Thierry Reding
d5bae6f33e drm/tegra: output: Make ->setup_clock() optional
In order to transition output drivers to using the struct tegra_output
as a helper rather than midlayer, make this callback optional. Instead
drivers should implement the equivalent as part of ->mode_fixup(). For
the conversion to atomic modesetting a new callback ->atomic_check()
should be implemented that updates the display controller's state with
the corresponding parent clock, rate and shift clock divider.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:46 +01:00
Thierry Reding
132085d84f drm/tegra: Convert output midlayer to helpers
The output layer was initially designed to help reduce the amount of
code duplicated in output drivers. An unfortunate side-effect of that
was that it turned into a midlayer and it became difficult to make the
output drivers work without bending over backwards to fit into the
midlayer.

This commit starts to convert the midlayer into a helper library by
exporting most of the common functions so that they can be used by the
output drivers directly. Doing so will allow output drivers to reuse
common code paths but more easily override them where necessary.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:45 +01:00
Thierry Reding
50a246aa13 drm/tegra: dc: No longer disable planes at CRTC disable
The DRM core should take care of disabling all unneeded planes, so there
is no need to do this explicitly.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:45 +01:00
Thierry Reding
f991421490 drm/tegra: Move tegra_drm_mode_funcs to the core
This structure will be extended using non-framebuffer related callbacks
in subsequent patches, so it should move to a more central location.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:44 +01:00
Thierry Reding
86df256f30 drm/tegra: dc: Wait for idle when disabled
When disabling the display controller, stop it and wait for it to become
idle. Doing so ensures that no further accesses to the framebuffer occur
and the buffers can be safely unmapped or freed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:43 +01:00
Thierry Reding
36904adf21 drm/tegra: Stop CRTC at CRTC disable time
Previously output drivers would all stop the display controller in their
disable path. However with the transition to atomic modesetting the
display controller needs to be kept running until all planes have been
disabled so that software can properly determine (using VBLANK counts)
when it is safe to remove the framebuffers associated with the planes.

Moving this code into the display controller's disable path also gets
rid of the duplication of this into all output drivers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:43 +01:00
Thierry Reding
62b9e06321 drm/tegra: Use tegra_commit_dc() in output drivers
All output drivers have open-coded variants of this function, so export
it to remove some code duplication.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:43 +01:00
Dan Carpenter
2cb207e413 drm/tegra: gem: oops in error handling
kfree(ERR_PTR(-ENOMEM)) will not work very well.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:41 +01:00
Dan Carpenter
8643bc6d8e drm/tegra: dc: Fix bad irqsave/restore in tegra_dc_finish_page_flip()
We can't save two values to the IRQ flags at the same time so the IRQs
are not enabled at the end.  This kind of bug is easy to miss in testing
if the function is normally called with IRQs disabled so we wouldn't
enable IRQs anyway.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:40 +01:00
David Ung
2dafd63682 drm/tegra: dsi: Adjust D-PHY timing
Compliance testing shows that HS Trail is off by -12%. Increase the HS
Trail time to make this test pass.

Signed-off-by: David Ung <davidu@nvidia.com>
[treding@nvidia.com: update specification references, add comment]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:40 +01:00
Thierry Reding
201106d83e drm/tegra: dsi: Reset across ->exit()/->init()
This allows a DRM driver unload/reload cycle to completely reset the DSI
controller and may help in situations where it's broken.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:39 +01:00
Thierry Reding
92f0e073ed drm/tegra: dsi: Soft-reset controller on ->disable
This reset is necessary to properly clean up the internal state of the
controller.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:39 +01:00
Thierry Reding
9c0b4ca112 drm/tegra: dsi: Registers are 32-bit
Use a sized unsigned 32-bit data type (u32) to store register contents.
The DSI registers are 32 bits wide irrespective of the architecture's
data width.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:38 +01:00
Thierry Reding
4ee8cee0c5 drm/tegra: hdmi: Registers are 32-bit
Use a sized unsigned 32-bit data type (u32) to store register contents.
The HDMI registers are 32 bits wide irrespective of the architecture's
data width.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:37 +01:00
Thierry Reding
fb35c6b60e drm/tegra: dc: Return planar flag for non-YUV modes
This prevents the compiler from warning about using a variable that is
possibly uninitialized.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:37 +01:00
Thierry Reding
d700ba7a66 drm/tegra: dc: Describe register copies
Most of the display controller's registers are double-buffered, a few of
them are triple-buffered. The ASSEMBLY shadow copy is latched intto the
ACTIVE copy for double-buffered registers. For triple-buffered registers
the ASSEMBLY copy is first latched into the ARM copy.

Latching into the ACTIVE copy happens immediately if the controller is
inactive. Otherwise the latching happens on the next frame boundary. The
latching of the ASSEMBLY into the ARM copy happens immediately. Latching
is controlled by a set of *_ACT_REQ and *_UPDATE bits in the
DC_CMD_STATE_CONTROL register.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:37 +01:00
Thierry Reding
42d0659ba7 drm/tegra: dc: Initialize border color
Tegra114 and earlier support specifying the color of the border (i.e.
the active area of the screen that is not covered by any of the overlay
windows). By default this is set to a light blue, so set it to black to
comply with the requirements set by atomic modesetting.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:36 +01:00
Dan Carpenter
bf19b885f9 drm/tegra: Check for NULL pointer instead of IS_ERR()
iommu_domain_alloc() returns NULL on error, it never returns error
pointers.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:36 +01:00
Thierry Reding
518e6227af drm/tegra: plane: Use proper possible_crtcs mask
The possible_crtcs mask needs to be a mask of CRTC indices. There is no
guarantee that the DRM indices match the hardware pipe number, so the
mask must be computed from the CRTC index.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:35 +01:00
Thierry Reding
aa942f6ac4 drm/tegra: Remove redundant zeroing out of memory
The DRM core now zeroes out the memory associated with CRTC, encoder and
connector objects upon cleanup, so there's no need to explicitly do that
in drivers anymore.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:34 +01:00
Thierry Reding
8c8cb58ed6 drm/tegra: gem: Use iommu_map_sg()
The iommu_map_sg() function is now available in the IOMMU API, so drop
the open-coded variant.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:34 +01:00
Thierry Reding
f4c5cf88fb gpu: host1x: Provide a proper struct bus_type
Previously the struct bus_type exported by the host1x infrastructure was
only a very basic skeleton. Turn that implementation into a more full-
fledged bus to support proper probe ordering and power management.

Note that the bus infrastructure needs to be available before any of the
drivers can be registered. This is automatically ensured if all drivers
are built as loadable modules (via symbol dependencies). If all drivers
are built-in there are no such guarantees and the link order determines
the initcall ordering. Adjust drivers/gpu/Makefile to make sure that the
host1x bus infrastructure is initialized prior to any of its users (only
drm/tegra currently).

v2: Fix building host1x and tegra-drm as modules
    Reported-by: Dave Airlie <airlied@gmail.com>

Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:09:14 +01:00
Dave Airlie
e5202a2289 Merge tag 'topic/core-stuff-2014-12-19' of git://anongit.freedesktop.org/drm-intel into drm-next
Misc drm patches with mostly polish patches from Thierry, with a bit of
generic mode validation from Ville and a few other oddball things.

* tag 'topic/core-stuff-2014-12-19' of git://anongit.freedesktop.org/drm-intel: (25 commits)
  drm: Include drm_crtc_helper.h in DocBook
  drm: Make drm_crtc_helper.h standalone includible
  drm: Move IRQ related fields to proper section
  drm: Remove stale comment
  drm: Do basic sanity checks for user modes
  drm: Perform basic sanity checks on probed modes
  drm: Reorganize probed mode validation
  drm/doc: Remove duplicate "by"
  drm/info: Remove unused code
  drm/cache: Use wbinvd helpers
  drm/plane-helper: Test for plane disable earlier
  drm/doc: Document drm_add_modes_noedid() usage
  drm: bit of spell-check / editorializing.
  drm: Prefer sizeof(type) over sizeof type
  drm: Remove useless else block
  drm: Remove unneeded braces for single statement blocks
  drm: Do not assign in if condition
  drm: Prefer kmalloc_array() over kmalloc() with multiply
  drm: Prefer kcalloc() over kzalloc() with multiply
  drm: Miscellaneous checkpatch whitespace cleanups
  ...
2015-01-09 09:13:41 +10:00
Sean Paul
93396d0f9c drm/tegra: dc: Select root window for event dispatch
In finish pageflip, the driver was not selecting the root window when
dispatching events. This exposed a race where a plane update would
change the window selection and cause tegra_dc_finish_page_flip to check
the wrong base address.

This patch also protects access to the window selection register as well
as the registers affected by it.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-12-17 14:27:39 +01:00
Thierry Reding
73c42c7976 drm/tegra: gem: Use the proper size for GEM objects
If the requested buffer size wasn't a multiple of the page size, the
IOMMU code would round down the size to the next multiple of the page
size, thereby causing translation errors. To fix this we no longer pass
around the requested size but reuse the computed size of the GEM object.
This is already rounded to the next page boundary, so mapping that size
works out fine.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-12-17 14:27:38 +01:00
Thierry Reding
a04251fc94 drm/tegra: gem: Flush buffer objects upon allocation
Buffers obtained via shmem may still have associated cachelines. If they
aren't properly flushed they may cause framebuffer corruption if the
cache gets flushed after the application has drawn to it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-12-17 14:27:37 +01:00
Thierry Reding
6b59cc1c86 drm/tegra: dc: Fix a potential race on page-flip completion
Page-flip completion could race with page-flip submission, so extend the
critical section to include all accesses to page-flip related data.

Reported-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-12-17 14:27:36 +01:00
Thierry Reding
ed7dae58de drm/tegra: dc: Consistently use the same pipe
The hardware pipe numbers don't always match the DRM CRTC indices. This
can happen for example if the first display controller defers probe,
causing it to be registered with DRM after the second display
controller. When that happens the hardware pipe numbers and DRM CRTC
indices become different. Make sure that the CRTC index is always used
when accessing per-CRTC VBLANK data. This can be ensured by using the
drm_crtc_vblank_*() API, which will do the right thing automatically
given a struct drm_crtc *.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-12-17 14:27:36 +01:00
Thierry Reding
c422f31d56 drm/tegra: Remove dummy ->load_lut() implementation
The ->load_lut() callback is optional, therefore a dummy implementation
is not needed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-12-10 13:58:05 +01:00
Dave Airlie
e8115e79aa Linux 3.18-rc7
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Merge tag 'v3.18-rc7' into drm-next

This fixes a bunch of conflicts prior to merging i915 tree.

Linux 3.18-rc7

Conflicts:
	drivers/gpu/drm/exynos/exynos_drm_drv.c
	drivers/gpu/drm/i915/i915_drv.c
	drivers/gpu/drm/i915/intel_pm.c
	drivers/gpu/drm/tegra/dc.c
2014-12-02 10:58:33 +10:00
Dave Airlie
b0654103f5 drm/tegra: Changes for v3.19-rc1
The highlights in this pull request are:
 
   * IOMMU support: The Tegra DRM driver can now deal with discontiguous
     buffers if an IOMMU exists in the system. That means it can allocate
     using drm_gem_get_pages() and will map them into IOVA space via the
     IOMMU API. Similarly, non-contiguous PRIME buffers can be imported
     from a different driver, which allows better integration with gk20a
     (nouveau) and less hacks.
 
   * Universal planes: This is precursory work for atomic modesetting and
     will allow hardware cursor support to be implemented on pre-Tegra114
     where RGB cursors were not supported.
 
   * DSI ganged-mode support: The DSI controller can now gang up with a
     second DSI controller to drive high resolution DSI panels.
 
 Besides those bigger changes there is a slew of fixes, cleanups, plugged
 memory leaks and so on.
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Merge tag 'drm/tegra/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux into drm-next

drm/tegra: Changes for v3.19-rc1

The highlights in this pull request are:

  * IOMMU support: The Tegra DRM driver can now deal with discontiguous
    buffers if an IOMMU exists in the system. That means it can allocate
    using drm_gem_get_pages() and will map them into IOVA space via the
    IOMMU API. Similarly, non-contiguous PRIME buffers can be imported
    from a different driver, which allows better integration with gk20a
    (nouveau) and less hacks.

  * Universal planes: This is precursory work for atomic modesetting and
    will allow hardware cursor support to be implemented on pre-Tegra114
    where RGB cursors were not supported.

  * DSI ganged-mode support: The DSI controller can now gang up with a
    second DSI controller to drive high resolution DSI panels.

Besides those bigger changes there is a slew of fixes, cleanups, plugged
memory leaks and so on.

* tag 'drm/tegra/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux: (44 commits)
  drm/tegra: gem: Check before freeing CMA memory
  drm/tegra: fb: Add error codes to error messages
  drm/tegra: fb: Properly release GEM objects on failure
  drm/tegra: Detach panel when a connector is removed
  drm/tegra: Plug memory leak
  drm/tegra: gem: Use more consistent data types
  drm/tegra: fb: Do not destroy framebuffer
  drm/tegra: gem: dumb: pitch and size are outputs
  drm/tegra: Enable the hotplug interrupt only when necessary
  drm/tegra: dc: Universal plane support
  drm/tegra: dc: Registers are 32 bits wide
  drm/tegra: dc: Factor out DC, window and cursor commit
  drm/tegra: Add IOMMU support
  drm/tegra: Fix error handling cleanup
  drm/tegra: gem: Use dma_mmap_writecombine()
  drm/tegra: gem: Remove redundant drm_gem_free_mmap_offset()
  drm/tegra: gem: Cleanup tegra_bo_create_with_handle()
  drm/tegra: gem: Extract tegra_bo_alloc_object()
  drm/tegra: dsi: Set up PHY_TIMING & BTA_TIMING registers earlier
  drm/tegra: dsi: Replace 1000000 by USEC_PER_SEC
  ...
2014-11-15 09:38:55 +10:00
Thierry Reding
7e0180e357 drm/tegra: gem: Check before freeing CMA memory
dma_free_writecombine() must not be called on a buffer that couldn't be
allocated. Check for a valid virtual address before attempting to free
the memory to avoid a crash.

Reported-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:34 +01:00
Thierry Reding
cb10c81fdf drm/tegra: fb: Add error codes to error messages
This helps in determining what errors happened at specifics points in
the initialization sequence.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:34 +01:00
Thierry Reding
b88f005ea3 drm/tegra: fb: Properly release GEM objects on failure
When fbdev initialization fails, make sure to unreference the GEM
objects properly. Note that we can't do this in the general error
unwinding path because ownership of the GEM object references is
transferred to the framebuffer upon creation.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:33 +01:00
Thierry Reding
9aaa0cebcb drm/tegra: Detach panel when a connector is removed
When the DRM device is torn down and the connector is removed, make sure
to detach the panel to make sure there are no dangling pointers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:33 +01:00
Thierry Reding
1053f4dd82 drm/tegra: Plug memory leak
Free the DRM device-private memory upon driver unload to make sure the
memory doesn't leak.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:32 +01:00
Thierry Reding
71c38629d6 drm/tegra: gem: Use more consistent data types
Use size_t consistently for sizes and u32/u64 instead of uint32_t and
uint64_t.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:32 +01:00
Thierry Reding
3feaf3e5ae drm/tegra: fb: Do not destroy framebuffer
Drop a reference instead of directly calling the framebuffer .destroy()
callback at fbdev free time. This is necessary to make sure the object
isn't destroyed if anyone else still has a reference.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:32 +01:00
Thierry Reding
dc6057ecb3 drm/tegra: gem: dumb: pitch and size are outputs
When creating a dumb buffer object using the DRM_IOCTL_MODE_CREATE_DUMB
IOCTL, only the width, height, bpp and flags parameters are inputs. The
caller is not guaranteed to zero out or set handle, pitch and size, so
the driver must not treat these values as possible inputs.

Fixes a bug where running the Weston compositor on Tegra DRM would cause
an attempt to allocate a 3 GiB framebuffer to be allocated.

Fixes: de2ba664c3 ("gpu: host1x: drm: Add memory manager and fb")
Cc: stable@vger.kernel.org
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:31 +01:00
Thierry Reding
8fc8f7da97 drm/tegra: Enable the hotplug interrupt only when necessary
The hotplug handling needs access to the DRM device, which only appears
at ->init() time. Disable interrupts up until that time. Similarly, when
an output is removed, disable the hotplug interrupt again because the
DRM device (and with it the hotplug infrastructure) is going away.

Also make sure to only access the DRM device if it's available. Given
the above change for the hotplug interrupt this should really never
happen, but the extra check doesn't hurt either.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:31 +01:00
Thierry Reding
c7679306a9 drm/tegra: dc: Universal plane support
This allows the primary plane and cursor to be exposed as regular
DRM/KMS planes, which is a prerequisite for atomic modesetting and gives
userspace more flexibility over controlling them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:28 +01:00
Thierry Reding
03a6056976 drm/tegra: dc: Registers are 32 bits wide
Using an unsigned long type will cause these variables to become 64-bit
on 64-bit SoCs. In practice this should always work, but there's no need
for carrying around the additional 32 bits.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:17:03 +01:00
Thierry Reding
205d48edee drm/tegra: dc: Factor out DC, window and cursor commit
The sequence to commit changes to the DC, window or cursor configuration
is repetitive and can be extracted into separate functions for ease of
use.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:17:01 +01:00
Thierry Reding
df06b759f2 drm/tegra: Add IOMMU support
When an IOMMU device is available on the platform bus, allocate an IOMMU
domain and attach the display controllers to it. The display controllers
can then scan out non-contiguous buffers by mapping them through the
IOMMU.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:14:48 +01:00
Thierry Reding
1d1e6fe9b5 drm/tegra: Fix error handling cleanup
The DRM driver's ->load() implementation didn't do a good job (no job at
all really) cleaning up on failure. Fix that by undoing any prior setup
when an error occurs. This requires a bit of rework to make it possible
to clean up fbdev midway.

This was tested by injecting errors at various points during the
initialization sequence and verifying that error cleanup didn't crash
and no memory leaked (using kmemleak).

Reported-by: Stéphane Marchesin <marcheu@chromium.org>
Reported-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:14:48 +01:00
Thierry Reding
53ea72132d drm/tegra: gem: Use dma_mmap_writecombine()
Use the existing API rather than open-coding equivalent functionality
in the driver.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:14:48 +01:00
Thierry Reding
e55a8bd8ea drm/tegra: gem: Remove redundant drm_gem_free_mmap_offset()
The drm_gem_object_release() function already performs this cleanup, so
there is no reason to do it explicitly.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:14:47 +01:00
Thierry Reding
a8b48df592 drm/tegra: gem: Cleanup tegra_bo_create_with_handle()
There is only a single location where the function needs to do cleanup.
Skip the error unwinding path and call the cleanup function directly
instead.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:14:47 +01:00
Thierry Reding
c28d4a317f drm/tegra: gem: Extract tegra_bo_alloc_object()
This function implements the common buffer object allocation used for
both allocation and import paths.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:14:46 +01:00
Sean Paul
7e3bc3a98f drm/tegra: dsi: Set up PHY_TIMING & BTA_TIMING registers earlier
Make sure the DSI PHY_TIMING and BTA_TIMING registers are initialized
when the clocks are set up as opposed to when the output is enabled.
This makes sure that the PHY timings are properly set up when the panel
is prepared and that DCS commands sent at that time use the appropriate
timings.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:44 +01:00
Thierry Reding
030611ecc5 drm/tegra: dsi: Replace 1000000 by USEC_PER_SEC
Using the symbolic constant instantly provides a lot more context.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:41 +01:00
Thierry Reding
369bc65b6b drm/tegra: dsi: Replace 1000000000UL by NSEC_PER_SEC
Using the symbolic constant instantly provides a lot more context.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:39 +01:00
Thierry Reding
0fffdf6ca9 drm/tegra: dsi: Implement host transfers
Add support for sending MIPI DSI command packets from the host to a
peripheral. This is required for panels that need configuration before
they accept video data.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:36 +01:00
Thierry Reding
e94236cde4 drm/tegra: dsi: Add ganged mode support
Implement ganged mode support for the Tegra DSI driver. The DSI host
controller to gang up with is specified via a phandle in the device tree
and the resolved DSI host controller used for the programming of the
ganged-mode registers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:28 +01:00
Thierry Reding
3f6b406f7d drm/tegra: dsi: Split out tegra_dsi_set_timeout()
In preparation for adding ganged-mode support, this commit splits out
the tegra_dsi_set_timeout() function so that it can be reused for the
slave DSI controller.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:26 +01:00
Thierry Reding
337b443d58 drm/tegra: dsi: Add command mode support
Add support for DC-driven command mode. This is a mode where the video
stream sent by the display controller is packed into DCS command packets
(write_memory_start and write_memory_continue) by the DSI controller. It
can be used for panels with a remote framebuffer and is useful to save
power when used with a dynamic refresh rate (not yet supported by the
driver).

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:23 +01:00
Thierry Reding
563eff1f98 drm/tegra: dsi: Refactor in preparation for command mode
For command mode panels, the DSI controller needs to be enabled and
configured so that panel drivers can send commands prior to the video
stream being enabled.

Move code from the monolithic output enable/disable functions into
smaller, reusable units to allow more fine-grained control over the
controller state.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:20 +01:00
Thierry Reding
d2d0a9d212 drm/tegra: dsi: Properly cleanup on probe failure
The driver wasn't even attempting to do any cleanup when probing failed.
Fix this by releasing any resources acquired up to the point of failure
and putting the device back into the original state (reset, clocks off).

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:18 +01:00
Thierry Reding
ba3df97922 drm/tegra: dsi: Mark connector hotpluggable
DSI panels can always be hotplugged via the DSI bus' attach/detach
infrastructure, so unconditionally mark the connector hotpluggable.

While at it, also make sure that when a panel is detached the connector
is marked unconnected before calling into the DRM hotplug helpers to
reflect the correct state.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:16 +01:00
Thierry Reding
41a8e72e0e drm/tegra: dsi: Leave parent clock alone
The common clock framework will take care of preparing and enabling the
parent of the DSI clock automatically.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:13 +01:00
Thierry Reding
183ef2883d drm/tegra: dsi: Do not manage clock on enable/disable
In preparation for supporting command mode panels, don't disable the
clock when the output is disabled. The output will be enabled only after
the panel has been programmed in command mode, so the clock must always
remain on.

As a side-effect, pad calibration now only needs to be done at driver
probe time, since neither power nor controller state will go away before
driver removal. While at it, use a 32-bit variable to store register
content because the registers are 32-bit even on 64-bit Tegra.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:10 +01:00
Thierry Reding
976cebc35b drm/tegra: dsi: Make FIFO depths host parameters
Rather than hardcoding them as macros, make the host and video FIFO
depths parameters so that they can be more easily adjusted if a new
generation of the Tegra SoC changes them.

While at it, set the depth of the video FIFO to the correct value of
1920 *words* rather than *bytes*.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:07 +01:00
Sean Paul
0bfad39671 drm/tegra: DPMS off/on in encoder prepare/commit
Previously the panel and output were only enabled on encoder->dpms(). If
userspace called dpms on before doing a modeset, the driver would get into
a state where the connector had a dpms state of ON, but the encoder and output
were not enabled (because the encoder is not yet attached to the connector).
Subsequent dpms ON calls are ignored b/c the connector's state already matches
the desired state.

This patch enables/disables the panel and output on modeset as well, so we
can catch the above case.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:04 +01:00
Thierry Reding
dc670e49e7 drm/tegra: Do not enable output on .mode_set()
The output is already enabled in .dpms(), doing it in .mode_set() too
can cause noticeable flicker.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:02 +01:00
Thierry Reding
9c0127004f drm/tegra: dc: Add powergate support
Both display controllers are in their own power partition. Currently the
driver relies on the assumption that these partitions are on (which is
the hardware default). However some bootloaders may disable them, so the
driver must make sure to turn them back on to avoid hangs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:11:59 +01:00
Thierry Reding
db4fd5197b drm/tegra: Depend on COMMON_CLK
The introduction of the COMPILE_TEST dependency in commit 158b50aefa
(drm/tegra: Increase compile test coverage) removes the dependency on
COMMON_CLK (implicitly selected via ARCH_TEGRA, ARCH_MULTI_V7 and
ARCH_MULTIPLATFORM).

Reported-by: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:10:27 +01:00
Thierry Reding
8ff64c17f3 drm/tegra: dc: Add missing call to drm_vblank_on()
When the CRTC is enabled, make sure the VBLANK machinery is enabled.
Failure to do so will cause drm_vblank_get() to not enable the VBLANK on
the CRTC and VBLANK-synchronized page-flips won't work.

While at it, get rid of the legacy drm_vblank_pre_modeset() and
drm_vblank_post_modeset() calls that are replaced by drm_vblank_on()
and drm_vblank_off().

Reported-by: Alexandre Courbot <acourbot@nvidia.com>
Tested-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 14:07:50 +01:00
Daniel Vetter
3cb9ae4fd8 drm: Move drm_crtc_init from drm_crtc.h to drm_plane_helper.h
Just a bit of OCD cleanup on headers - this function isn't the core
interface any more but just a helper for drivers who haven't yet
transitioned to universal planes. Put the declaration at the right
spot and sprinkle necessary #includes over all drivers.

Maybe this helps to encourage driver maintainers to do the switch.

v2: Fix #include ordering for tegra, reported by 0-day builder.

v3: Include required headers, reported by Thierry.

Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Thierry Reding <treding@nvidia.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2014-11-05 00:14:55 +01:00
Daniel Vetter
d9fc9413f9 drm: Extract <drm/drm_gem.h>
v2: Don't forget git add, noticed by David.

Cc: David Herrmann <dh.herrmann@gmail.com>

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Acked-by: David Herrmann <dh.herrmann@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-24 11:43:41 +10:00
Sonika Jindal
eeb82a5cdb drm/tegra: Renaming DP training vswing pre emph defines
Rename the defines to have levels instead of values for vswing and
pre-emph levels as the values may differ in other scenarios like low vswing of
eDP1.4 where the values are different.

Done using following cocci patch for each define:
@@
@@

 # define DP_TRAIN_VOLTAGE_SWING_400     (0 << 0)
+ # define DP_TRAIN_VOLTAGE_SWING_LEVEL_0     (0 << 0)

...

Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
Acked-by: Dave Airlie <airlied@gmail.com>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-03 11:05:41 +02:00
Linus Torvalds
44c916d58b ARM: SoC cleanups for 3.17
This merge window brings a good size of cleanups on various
 platforms. Among the bigger ones:
 
 * Removal of Samsung s5pc100 and s5p64xx platforms. Both of these have
   lacked active support for quite a while, and after asking around nobody
   showed interest in keeping them around. If needed, they could be
   resurrected in the future but it's more likely that we would prefer
   reintroduction of them as DT and multiplatform-enabled platforms
   instead.
 * OMAP4 controller code register define diet. They defined a lot of registers
   that were never actually used, etc.
 * Move of some of the Tegra platform code (PMC, APBIO, fuse, powergate)
   to drivers/soc so it can be shared with 64-bit code. This also converts them
   over to traditional driver models where possible.
 * Removal of legacy gpio-samsung driver, since the last users have been
   removed (moved to pinctrl)
 
 Plus a bunch of smaller changes for various platforms that sort of
 dissapear in the diffstat for the above. clps711x cleanups, shmobile
 header file refactoring/moves for multiplatform friendliness, some misc
 cleanups, etc.
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Merge tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC cleanups from Olof Johansson:
 "This merge window brings a good size of cleanups on various platforms.
  Among the bigger ones:

   - Removal of Samsung s5pc100 and s5p64xx platforms.  Both of these
     have lacked active support for quite a while, and after asking
     around nobody showed interest in keeping them around.  If needed,
     they could be resurrected in the future but it's more likely that
     we would prefer reintroduction of them as DT and
     multiplatform-enabled platforms instead.

   - OMAP4 controller code register define diet.  They defined a lot of
     registers that were never actually used, etc.

   - Move of some of the Tegra platform code (PMC, APBIO, fuse,
     powergate) to drivers/soc so it can be shared with 64-bit code.
     This also converts them over to traditional driver models where
     possible.

   - Removal of legacy gpio-samsung driver, since the last users have
     been removed (moved to pinctrl)

  Plus a bunch of smaller changes for various platforms that sort of
  dissapear in the diffstat for the above.  clps711x cleanups, shmobile
  header file refactoring/moves for multiplatform friendliness, some
  misc cleanups, etc"

* tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (117 commits)
  drivers: CCI: Correct use of ! and &
  video: clcd-versatile: Depend on ARM
  video: fix up versatile CLCD helper move
  MAINTAINERS: Add sdhci-st file to ARCH/STI architecture
  ARM: EXYNOS: Fix build breakge with PM_SLEEP=n
  MAINTAINERS: Remove Kirkwood
  ARM: tegra: Convert PMC to a driver
  soc/tegra: fuse: Set up in early initcall
  ARM: tegra: Always lock the CPU reset vector
  ARM: tegra: Setup CPU hotplug in a pure initcall
  soc/tegra: Implement runtime check for Tegra SoCs
  soc/tegra: fuse: fix dummy functions
  soc/tegra: fuse: move APB DMA into Tegra20 fuse driver
  soc/tegra: Add efuse and apbmisc bindings
  soc/tegra: Add efuse driver for Tegra
  ARM: tegra: move fuse exports to soc/tegra/fuse.h
  ARM: tegra: export apb dma readl/writel
  ARM: tegra: Use a function to get the chip ID
  ARM: tegra: Sort includes alphabetically
  ARM: tegra: Move includes to include/soc/tegra
  ...
2014-08-08 11:00:26 -07:00
Linus Torvalds
a7d7a143d0 Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull DRM updates from Dave Airlie:
 "Like all good pull reqs this ends with a revert, so it must mean we
  tested it,

[ Ed. That's _one_ way of looking at it ]

  This pull is missing nouveau, Ben has been stuck trying to track down
  a very longstanding bug that revealed itself due to some other
  changes.  I've asked him to send you a direct pull request for nouveau
  once he cleans things up.  I'm away until Monday so don't want to
  delay things, you can make a decision on that when he sends it, I have
  my phone so I can ack things just not really merge much.

  It has one trivial conflict with your tree in armada_drv.c, and also
  the pull request contains some component changes that are already in
  your tree, the base tree from Russell went via Greg's tree already,
  but some stuff still shows up in here that doesn't when I merge my
  tree into yours.

  Otherwise all pretty standard graphics fare, one new driver and
  changes all over the place.

  New drivers:
   - sti kms driver for STMicroelectronics chipsets stih416 and stih407.

  core:
   - lots of cleanups to the drm core
   - DP MST helper code merged
   - universal cursor planes.
   - render nodes enabled by default

  panel:
   - better panel interfaces
   - new panel support
   - non-continuous cock advertising ability

  ttm:
   - shrinker fixes

  i915:
   - hopefully ditched UMS support
   - runtime pm fixes
   - psr tracking and locking - now enabled by default
   - userptr fixes
   - backlight brightness fixes
   - MST support merged
   - runtime PM for dpms
   - primary planes locking fixes
   - gen8 hw semaphore support
   - fbc fixes
   - runtime PM on SOix sleep state hw.
   - mmio base page flipping
   - lots of vlv/chv fixes.
   - universal cursor planes

  radeon:
   - Hawaii fixes
   - display scalar support for non-fixed mode displays
   - new firmware format support
   - dpm on more asics by default
   - GPUVM improvements
   - uncached and wc GTT buffers
   - BOs > visible VRAM

  exynos:
   - i80 interface support
   - module auto-loading
   - ipp driver consolidated.

  armada:
   - irq handling in crtc layer only
   - crtc renumbering
   - add component support
   - DT interaction changes.

  tegra:
   - load as module fixes
   - eDP bpp and sync polarity fixed
   - DSI non-continuous clock mode support
   - better support for importing buffers from nouveau

  msm:
   - mdp5/adq8084 v1.3 hw enablement
   - devicetree clk changse
   - ifc6410 board working

  tda998x:
   - component support
   - DT documentation update

  vmwgfx:
   - fix compat shader namespace"

* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (551 commits)
  Revert "drm: drop redundant drm_file->is_master"
  drm/panel: simple: Use devm_gpiod_get_optional()
  drm/dsi: Replace upcasting macro by function
  drm/panel: ld9040: Replace upcasting macro by function
  drm/exynos: dp: Modify driver to support drm_panel
  drm/exynos: Move DP setup into commit()
  drm/panel: simple: Add AUO B133HTN01 panel support
  drm/panel: simple: Support delays in panel functions
  drm/panel: simple: Add proper definition for prepare and unprepare
  drm/panel: s6e8aa0: Add proper definition for prepare and unprepare
  drm/panel: ld9040: Add proper definition for prepare and unprepare
  drm/tegra: Add support for panel prepare and unprepare routines
  drm/exynos: dsi: Add support for panel prepare and unprepare routines
  drm/exynos: dpi: Add support for panel prepare and unprepare routines
  drm/panel: simple: Add dummy prepare and unprepare routines
  drm/panel: s6e8aa0: Add dummy prepare and unprepare routines
  drm/panel: ld9040: Add dummy prepare and unprepare routines
  drm/panel: Provide convenience wrapper for .get_modes()
  drm/panel: add .prepare() and .unprepare() functions
  drm/panel: simple: Remove simple-panel compatible
  ...
2014-08-07 17:36:12 -07:00
Dave Airlie
fa1d0ee69c drm/tegra: Changes for v3.17-rc1
Mostly some cleanup all over the place. Pitch alignment limitations of
 the display controller are now honored and job submission is 64-bit
 safe.
 
 The SOR output (used for eDP) properly configures sync signal polarities
 according to the display mode rather than hard-coding them to some value
 and the number of bits per color is now taken from the panel rather than
 hard-coded to properly support 24-bit vs. 18-bit panels.
 
 The DSI controller now properly supports non-continuous clock mode.
 
 GEM objects can now have their flags and tiling mode modified via IOCTLs
 to allow buffers imported from Nouveau to be properly displayed. Newer
 generations of the Tegra display controller can also detile block linear
 buffers at scan-out time.
 
 Finally the driver now properly exports MODULE_DEVICE_TABLEs to allow it
 to be automatically loaded when built as a module.
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Merge tag 'drm/tegra/for-3.17-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next

drm/tegra: Changes for v3.17-rc1

Mostly some cleanup all over the place. Pitch alignment limitations of
the display controller are now honored and job submission is 64-bit
safe.

The SOR output (used for eDP) properly configures sync signal polarities
according to the display mode rather than hard-coding them to some value
and the number of bits per color is now taken from the panel rather than
hard-coded to properly support 24-bit vs. 18-bit panels.

The DSI controller now properly supports non-continuous clock mode.

GEM objects can now have their flags and tiling mode modified via IOCTLs
to allow buffers imported from Nouveau to be properly displayed. Newer
generations of the Tegra display controller can also detile block linear
buffers at scan-out time.

Finally the driver now properly exports MODULE_DEVICE_TABLEs to allow it
to be automatically loaded when built as a module.

* tag 'drm/tegra/for-3.17-rc1' of git://anongit.freedesktop.org/tegra/linux:
  drm/tegra: add MODULE_DEVICE_TABLEs
  drm/tegra: dc - Reset controller on driver remove
  drm/tegra: Properly align stride for framebuffers
  drm/tegra: sor - Configure proper sync polarities
  drm/tegra: sor - Use bits-per-color from panel
  drm/tegra: Make job submission 64-bit safe
  drm/tegra: Allow non-authenticated processes to create buffer objects
  drm/tegra: Add SET/GET_FLAGS IOCTLs
  drm/tegra: Add SET/GET_TILING IOCTLs
  drm/tegra: Implement more tiling modes
  drm/tegra: dsi - Handle non-continuous clock flag
  drm/tegra: sor - missing unlock on error
2014-08-07 19:53:22 +10:00
Dave Airlie
0c6287ec12 drm/panel: Changes for v3.17-rc1
Panels can now be more finely controlled via .prepare() and .unprepare()
 callbacks in addition to .enable() and .disable(). New kerneldoc details
 what they are supposed to do and when they should be called.
 
 The simple panel driver gained support for a couple of new panels and it
 is now possible to specify additional delays during power up and power
 down sequences if panels require it.
 
 DSI devices can now advertise that they support non-continuous clock
 mode which will allow DSI host controllers to disable the high speed
 clock after transmissions to save power.
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Merge tag 'drm/panel/for-3.17-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next

drm/panel: Changes for v3.17-rc1

Panels can now be more finely controlled via .prepare() and .unprepare()
callbacks in addition to .enable() and .disable(). New kerneldoc details
what they are supposed to do and when they should be called.

The simple panel driver gained support for a couple of new panels and it
is now possible to specify additional delays during power up and power
down sequences if panels require it.

DSI devices can now advertise that they support non-continuous clock
mode which will allow DSI host controllers to disable the high speed
clock after transmissions to save power.

* tag 'drm/panel/for-3.17-rc1' of git://anongit.freedesktop.org/tegra/linux: (30 commits)
  drm/panel: simple: Use devm_gpiod_get_optional()
  drm/dsi: Replace upcasting macro by function
  drm/panel: ld9040: Replace upcasting macro by function
  drm/exynos: dp: Modify driver to support drm_panel
  drm/exynos: Move DP setup into commit()
  drm/panel: simple: Add AUO B133HTN01 panel support
  drm/panel: simple: Support delays in panel functions
  drm/panel: simple: Add proper definition for prepare and unprepare
  drm/panel: s6e8aa0: Add proper definition for prepare and unprepare
  drm/panel: ld9040: Add proper definition for prepare and unprepare
  drm/tegra: Add support for panel prepare and unprepare routines
  drm/exynos: dsi: Add support for panel prepare and unprepare routines
  drm/exynos: dpi: Add support for panel prepare and unprepare routines
  drm/panel: simple: Add dummy prepare and unprepare routines
  drm/panel: s6e8aa0: Add dummy prepare and unprepare routines
  drm/panel: ld9040: Add dummy prepare and unprepare routines
  drm/panel: Provide convenience wrapper for .get_modes()
  drm/panel: add .prepare() and .unprepare() functions
  drm/panel: simple: Remove simple-panel compatible
  drm/panel: simple: Add Innolux N116BGE panel support
  ...
2014-08-07 19:51:52 +10:00
Ajay Kumar
0407ed8afe drm/tegra: Add support for panel prepare and unprepare routines
Modify tegra output driver to support the new panel calls:
prepare and unprepare.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-06 16:44:12 +02:00
Stephen Warren
ef70728c7a drm/tegra: add MODULE_DEVICE_TABLEs
When tegra-drm.ko is built as a module, these MODULE_DEVICE_TABLEs allow
the module to be auto-loaded since the module will match the devices
instantiated from device tree.

(Notes for stable: in 3.14+, just git rm any conflicting file, since they
are added in later kernels. For 3.13 and below, manual merging will be
needed)

Cc: <stable@vger.kernel.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04 10:07:39 +02:00
Thierry Reding
5482d75a65 drm/tegra: dc - Reset controller on driver remove
Since the device will no longer be used, may as well keep it in reset to
potentially save some power and make sure it is in a clean state the
next time it's probed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04 10:07:38 +02:00
Thierry Reding
d1f3e1e0b3 drm/tegra: Properly align stride for framebuffers
Tegra20 and Tegra30 both required the buffer line stride to be aligned
on 8 byte boundaries. Tegra114 and Tegra124 increased the alignment to
64 bytes. Introduce a parameter to specify the alignment requirements
for each display controller and round up the pitch of newly allocated
framebuffers appropriately.

Originally-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04 10:07:38 +02:00
Thierry Reding
3f4f3b5fed drm/tegra: sor - Configure proper sync polarities
Program the sync signal polarities according to the display mode.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04 10:07:37 +02:00
Stéphane Marchesin
054b1bd161 drm/tegra: sor - Use bits-per-color from panel
This change uses the value of bits-per-color from panel to remove one
more hardcoded value.

Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04 10:07:37 +02:00
Thierry Reding
961e3beae3 drm/tegra: Make job submission 64-bit safe
Job submission currently relies on the fact that struct drm_tegra_reloc
and struct host1x_reloc are the same size and uses a simple call to the
copy_from_user() function to copy them to kernel space. This causes the
handle to be stored in the buffer object field, which then needs a cast
to a 32 bit integer to resolve it to a proper buffer object pointer and
store it back in the buffer object field.

On 64-bit architectures that will no longer work, since pointers are 64
bits wide whereas handles will remain 32 bits. This causes the sizes of
both structures to because different and copying will no longer work.

Fix this by adding a new function, host1x_reloc_get_user(), that copies
the structures field by field.

While at it, use substructures for the command and target buffers in
struct host1x_reloc for better readability. Also use unsized types to
make it more obvious that this isn't part of userspace ABI.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04 10:07:36 +02:00
Thierry Reding
bd4f236024 drm/tegra: Allow non-authenticated processes to create buffer objects
This matches what other drivers do for equivalent IOCTLs.

Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Tested-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04 10:07:36 +02:00
Thierry Reding
7b12908787 drm/tegra: Add SET/GET_FLAGS IOCTLs
The DRM_TEGRA_GEM_SET_FLAGS IOCTL can be used to set the flags of a
buffer object after it has been allocated or imported. Flags associated
with a buffer object can be queried using the DRM_TEGRA_GEM_GET_FLAGS
IOCTL.

Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Tested-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04 10:07:35 +02:00
Thierry Reding
7678d71fb4 drm/tegra: Add SET/GET_TILING IOCTLs
Currently the tiling parameters of buffer objects can only be set at
allocation time, and only a single tiled mode is supported. This new
DRM_TEGRA_GEM_SET_TILING IOCTL allows more modes to be set and also
allows the tiling mode to be changed after the allocation. This will
enable the Tegra DRM driver to import buffers from a GPU and directly
scan them out by configuring the display controller appropriately.

To complement this, the DRM_TEGRA_GEM_GET_TILING IOCTL can query the
current tiling mode of a buffer object. This is necessary when importing
buffers via handle (as is done in Mesa for example) so that userspace
can determine the proper parameters for the 2D or 3D engines.

Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Tested-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04 10:07:34 +02:00
Thierry Reding
c134f019ab drm/tegra: Implement more tiling modes
Tegra124 supports a block-linear mode in addition to the regular pitch
linear and tiled modes. Add support for these by moving the internal
representation into a structure rather than a simple flag.

Tested-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04 10:07:34 +02:00
Alexandre Courbot
0c6b1e4ba7 drm/tegra: dsi - Handle non-continuous clock flag
Handle the MIPI_DSI_CLOCK_NONCONTINUOUS flag and only set TX-only
clock behavior when this flag is present to allow panels requiring
continuous clock mode to operate with this driver.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04 10:07:33 +02:00
Dan Carpenter
2263c460be drm/tegra: sor - missing unlock on error
We should unlock before returning the error code.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04 10:07:33 +02:00
Thierry Reding
7232398abc ARM: tegra: Convert PMC to a driver
This commit converts the PMC support code to a platform driver. Because
the boot process needs to call into this driver very early, also set up
a minimal environment via an early initcall.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-07-17 14:58:43 +02:00
Thierry Reding
306a7f9139 ARM: tegra: Move includes to include/soc/tegra
In order to not clutter the include/linux directory with SoC specific
headers, move the Tegra-specific headers out into a separate directory.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-07-17 13:26:47 +02:00
Maarten Lankhorst
3aac4502fd dma-buf: use reservation objects
This allows reservation objects to be used in dma-buf. it's required
for implementing polling support on the fences that belong to a dma-buf.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Acked-by: Mauro Carvalho Chehab <m.chehab@samsung.com> #drivers/media/v4l2-core/
Acked-by: Thomas Hellstrom <thellstrom@vmware.com> #drivers/gpu/drm/ttm
Acked-by: Sumit Semwal <sumit.semwal@linaro.org>
Acked-by: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Vincent Stehlé <vincent.stehle@laposte.net> #drivers/gpu/drm/armada/
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-07-08 13:03:20 -07:00
Thierry Reding
e2215321ff drm/tegra: Implement race-free hotplug detection
A race condition currently exists on Tegra, where it can happen that a
monitor attached via HDMI isn't detected during the initial FB helper
setup, but the hotplug event happens too early to be processed by the
poll helpers because they haven't been initialized yet. This happens
because on some boards the HDMI driver can control the regulator that
supplies the +5V pin on the HDMI connector. Therefore depending on the
timing between the initialization of the HDMI driver and the rest of
DRM, it's possible that the monitor returns the hotplug signal right
within the window where we would miss it.

Unfortunately, drm_kms_helper_poll_init() will wreak havoc when called
before at least some parts of the FB helpers have been set up.

This commit fixes this by splitting out the minimum of initialization
required to make drm_kms_helper_poll_init() work into a separate
function that can be called early. It is then safe to move all of the
poll helper initialization to an earlier point in time (before the
HDMI output driver has a chance to enable the +5V supply). That way if
the hotplug signal is returned before the initial FB helper setup, the
monitor will be forcefully detected at that point, and if the hotplug
signal is returned after that it will be properly handled by the poll
helpers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-07-08 11:31:36 +10:00
Thierry Reding
10a2310265 drm: Introduce drm_fb_helper_prepare()
To implement hotplug detection in a race-free manner, drivers must call
drm_kms_helper_poll_init() before hotplug events can be triggered. Such
events can be triggered right after any of the encoders or connectors
are initialized. At the same time, if the drm_fb_helper_hotplug_event()
helper is used by a driver, then the poll helper requires some parts of
the FB helper to be initialized to prevent a crash.

At the same time, drm_fb_helper_init() requires information that is not
necessarily available at such an early stage (number of CRTCs and
connectors), so it cannot be used yet.

Add a new helper, drm_fb_helper_prepare(), that initializes the bare
minimum needed to allow drm_kms_helper_poll_init() to execute and any
subsequent hotplug events to be processed properly.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-07-08 11:31:28 +10:00
Thierry Reding
3a4938799d drm: Constify struct drm_fb_helper_funcs
There's no need for this to be modifiable. Make it const so that it can
be put into the .rodata section.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-07-08 11:31:15 +10:00
Thomas Wood
34ea3d3863 drm: add register and unregister functions for connectors
Introduce generic functions to register and unregister connectors. This
provides a common place to add and remove associated user space
interfaces.

Signed-off-by: Thomas Wood <thomas.wood@intel.com>
Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-06-19 08:55:28 +02:00
Thierry Reding
1f64ae7c5a drm/tegra: sor - Remove obsolete comment
According to the DP specification the disparity of the first symbol
should always be negative. It is therefore safe to assume that panels
will conform to that and therefore parameterizing this field should
never be necessary.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-09 12:02:51 +02:00
Thierry Reding
0c90a18466 drm/tegra: sor - Enable only the necessary number of lanes
Instead of always enabling all four lanes, enable only the number probed
from the link.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-09 12:02:50 +02:00
Thierry Reding
899451b787 drm/tegra: sor - Power on only the necessary lanes
Power on only those lanes required for the specified link.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-09 12:02:50 +02:00
Thierry Reding
d6922295e2 drm/tegra: sor - Do not program interlaced mode registers
Interlaced mode is currently not supported on the SOR, so don't program
any associated registers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-09 12:02:49 +02:00
Thierry Reding
a4263fed28 drm/tegra: sor - Do not hardcode link speed
Use the speed probed from the link at runtime rather than relying on a
hardcoded default.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-09 12:02:48 +02:00
Thierry Reding
7890b576ed drm/tegra: sor - Do not hardcode number of blank symbols
The number of HBLANK and VBLANK symbols can be computed at runtime so
that they can be set appropriately depending on the video mode and DP
link.

These values are used by the packet generation logic to determine how
many audio samples can be transferred during the blanking intervals.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-09 12:02:48 +02:00
Thierry Reding
34fa183bac drm/tegra: sor - Don't hardcode link parameters
The currently hardcoded link parameters don't work on all eDP panels, so
compute the parameters at runtime depending on the mode and panel type
to allow the driver to cope with a wider variety of panels.

Note that the number of bits per pixel of the panel is still hardcoded,
but this can be addressed in a separate patch.

This is largely based on a patch by Stéphane Marchesin but the algorithm
was largely rewritten to be more readable and concise.

Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-09 12:02:47 +02:00
Stéphane Marchesin
ca185c68ed drm/tegra: sor - Change power down ordering
Lanes are powered up in decreasing order. Power them down in increasing
order for consistency.

Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-09 12:02:47 +02:00
Stéphane Marchesin
143b1df23e drm/tegra: sor - Fix copy/paste error
The comment above mentions link A/B but this isn't what the code does,
so let's fix that.

Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-09 12:02:41 +02:00
Stéphane Marchesin
ccb8b12c4b drm/tegra: sor - Remove pixel clock rounding
The code currently rounds up the clock to the next MHZ, which is
rounding up a 69.5MHz clock to 70MHz on my machine. This in turn
prevents the display from syncing. Removing this rounding fixes eDP
for me.

Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-09 12:02:31 +02:00
Thierry Reding
1b0c7b4840 drm/tegra: sor - Make debugfs setup consistent
Other output drivers set up debugfs slightly differently. Bring the SOR
driver in line with those for consistency.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-06 08:38:31 +02:00
Thierry Reding
9578184efa drm/tegra: sor - Recursively remove debugfs tree
Removing only the root directory will fail when there are still files in
it. Instead of manually removing all files, remove the whole directory
recursively.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-06 08:38:30 +02:00
Thierry Reding
7c4633861f drm/tegra: dp - Mark the connector as hotplug capable
Doing so allows the hotplug events generated by the connector to be
properly handled by the DRM poll helpers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:14:48 +02:00
Thierry Reding
2fff79d38b drm/tegra: dp - Implement hotplug detection in work queue
Calling the drm_helper_hpd_irq_event() helper can sleep, so instead of
invoking it directly from the interrupt handler, schedule a work queue
and run it from there.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:14:48 +02:00
Thierry Reding
e687651bc1 drm/tegra: Add hardware cursor support
Enable hardware cursor support on Tegra124. Earlier generations support
the hardware cursor to some degree as well, but not in a way that can be
generically exposed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:14:47 +02:00
Thierry Reding
9910f5c455 drm/tegra: Remove host1x drm_bus implementation
The DRM core can now cope with drivers that don't have an associated
struct drm_bus, so the host1x implementation is no longer useful.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:14:46 +02:00
Thierry Reding
540457cc1f drm/tegra: gem - Make tegra_bo_import() static
The function is never used outside of the source file and therefore can
be locally scoped.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:36 +02:00
Thierry Reding
fb7be70e73 drm/tegra: hdmi - Add Tegra124 support
Tegra124 is mostly backwards-compatible with Tegra114. However, Tegra124
supports a few more features (e.g. interlacing, ...). Introduce a new
compatible string and TMDS tables to cope with these differences.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:35 +02:00
Thierry Reding
86f5c52dc9 drm/tegra: sor - Protect CRC debugfs against enable state
Accessing the CRC debugfs file will hang the system if the SOR is not
enabled, so make sure that it is stays enabled until the CRC has been
read.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:35 +02:00
Thierry Reding
76245adbc1 drm/tegra: dsi - Do not needlessly recompute pclk
In some cases the pixel clock used to not be correct, which is why it
had to be recomputed. It turns out that the reason why it wasn't correct
is that it was used wrongly. If used correctly there's not need for the
recomputation.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:34 +02:00
Thierry Reding
91eded9b48 drm/tegra: dc - Compute shift clock divider in output drivers
The shift clock divider is highly dependent on the type of output, so
push computation of it down into the output drivers. The old code used
to work merely by accident.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:33 +02:00
Thierry Reding
dbb3f2f751 drm/tegra: dc - Move around shift clock programming
Program the shift clock divider in tegra_crtc_setup_clk() since that's
where the divider is computed, so passing it around can be avoided.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:32 +02:00
Thierry Reding
cb825d89f5 drm/tegra: dsi - Reset controller on driver unload
Assert the DSI controller's reset when the driver is unloaded to reduce
power consumption and to put the controller into a known state for
subsequent driver reloads.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:31 +02:00
Thierry Reding
79eb7e5dab drm/tegra: dsi - Fix typo when disabling controller
When disabling the DSI controller, the code wasn't really doing what it
was supposed to.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:31 +02:00
Thierry Reding
334ae6b527 drm/tegra: dsi - Add enable guard
To prevent the enable or disable operations to potentially be run
multiple times, add guards to return early when the output is already
in the targetted state.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:30 +02:00
Thierry Reding
17297a2813 drm/tegra: dsi - Initialize proper packet sequences
The packet sequencer needs to be programmed depending on the video mode
of the attached peripheral. Add support for non-burst video modes with
sync events (as opposed to sync pulses) and select either sequence
depending on the video mode.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:29 +02:00
Thierry Reding
3b077afb3a drm/tegra: dsi - Implement VDD supply support
The DSI controllers are powered by a (typically 1.2V) regulator. Usually
this is always on, so there was no need to support enabling or disabling
it thus far. But in order not to consume any power when DSI is inactive,
give the driver a chance to enable or disable the supply as needed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:28 +02:00
Thierry Reding
bcfc7acbca drm/tegra: dsi - Remove unneeded code
A bunch of registers are initialized to 0 upon during driver probe. It
turns out that none of these are actually needed, so they can simply be
dropped.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:27 +02:00
Thierry Reding
f7d6889b79 drm/tegra: dsi - Use internal pixel format
The pixel format enumeration values used by the Tegra DSI controller
don't match those defined by the DSI framework. Make sure to convert
them to the internal format before writing it to the register.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:26 +02:00
Thierry Reding
7e2464304b drm/tegra: hdmi - Fix disable sequence
For some reason when the PW*_ENABLE and PM*_ENABLE fields are cleared
during disable, the HDMI output stops working properly. Resetting and
initializing doesn't help.

Comment out those accesses for now until it has been determined what to
do about them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:26 +02:00
Thierry Reding
9cbfc73e11 drm/tegra: hdmi - Disable LVDS mode
Disable LVDS mode according to register documentation. It seems like
this has no effect on the operation of HDMI, but it's probably a good
idea to do this anyway.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:25 +02:00
Thierry Reding
8c8282c04d drm/tegra: hdmi - Use proper power-up sequence
This reflects the power-up sequence as described in the documentation,
but it doesn't seem to be strictly necessary to get HDMI to work.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:24 +02:00
Thierry Reding
d06e7f8f66 drm/tegra: hdmi - Clean up clock usage
Clocks are never enabled or disabled in atomic context, so we can use
the clk_prepare_enable() and clk_disable_unprepare() helpers instead.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:23 +02:00
Thierry Reding
8868568718 drm/tegra: hdmi - Reverse regulator enable ordering
Schematics indicate that the AVDD_HDMI_PLL supply should be enabled
prior to the AVDD_HDMI supply.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:22 +02:00
Thierry Reding
80b9213913 drm/tegra: hdmi - Remove duplicate code
The generic Tegra output code already sets up the clocks properly, so
there's no need to do it again when the HDMI output is enabled.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:21 +02:00
Thierry Reding
fb50a116bb drm/tegra: hdmi - Add connector supply support
Revert commit 18ebc0f404 "drm/tegra: hdmi: Enable VDD earlier for
hotplug/DDC" and instead add a new supply for the +5V pin on the HDMI
connector.

The vdd-supply property refers to the regulator that supplies the
AVDD_HDMI input on Tegra, rather than the +5V HDMI connector pin. This
was never a problem before, because all boards had that pin hooked up to
a regulator that was always on. Starting with Dalmore and continuing
with Venice2, the +5V pin is controllable via a GPIO. For reasons
unknown, the GPIO ended up as the controlling GPIO of the AVDD_HDMI
supply in the Dalmore and Venice2 DTS files. But that's not correct.
Instead, a separate supply must be introduced so that the +5V pin can be
controlled separately from the supplies that feed the HDMI block within
Tegra.

A new hdmi-supply property is introduced that takes the place of the
vdd-supply and vdd-supply is only enabled when HDMI is enabled rather
than all the time.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:21 +02:00
Thierry Reding
0444c0ff3c drm/tegra: dc - Use proper H/V ref-to-sync values
For HDMI compliance both of these values need to be set to 1.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:20 +02:00
Thierry Reding
501bcbd1b2 drm/tegra: dc - Do not touch power control register
Setting the bits in this register is dependent on the output type driven
by the display controller. All output drivers already set these properly
so there is no need to do it here again.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:19 +02:00
Thierry Reding
10288eea88 drm/tegra: dc - Reshuffle code to get rid of prototypes
The tegra_dc_format() and tegra_dc_setup_window() functions are only
used internally by the display controller driver. Move them upwards in
order to make them static and get rid of the function prototypes.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:18 +02:00
Thierry Reding
eba66501ac drm/tegra: dc - Rename INVERT_V to V_DIRECTION
V_DIRECTION is the name of the field in the documentation, so use that
for consistency. Also add the H_DIRECTION field for completeness.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:17 +02:00
Thierry Reding
a82752e199 drm/tegra: sor - Add CRC debugfs support
The SOR allows the computation of a 32 bit CRC of the content that it
transmits. This functionality is exposed via debugfs and is useful to
verify proper operation of the SOR.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:17 +02:00
Thierry Reding
f925390efc drm/tegra: dc - Add YUYV support
YUYV is UYVY with swapped bytes. Luckily the Tegra DC hardware can swap
bytes during scan-out, so supporting YUYV is simply a matter of writing
the correct value to the byteswap register.

This patch modifies tegra_dc_format() to return the byte swap parameter
via an output parameter in addition to returning the pixel format. Many
other formats can potentially be supported in a similar way.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:16 +02:00
Thierry Reding
688c59afbf drm/tegra: Cleanup header file
Remove extern keyword from function prototypes since it isn't needed and
drop an unnecessary forward declaration.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:09:15 +02:00
Rob Clark
5ea1f752ae drm: add drm_fb_helper_restore_fbdev_mode_unlocked()
All drm_fb_helper_restore_fbdev_mode() call sites, save one, do the same
locking.  Simplify this into drm_fb_helper_restore_fbdev_mode_unlocked().

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-06-05 10:02:40 +10:00
Dave Airlie
4f71d0cb76 drm/dp: add a hw mutex around the transfer functions. (v2)
This should avoid races between connector probing and HPD
irqs in the future, currently mode_config.mutex blocks this
possibility.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-06-05 09:54:29 +10:00
Dave Airlie
444c9a08bf Merge branch 'drm-init-cleanup' of git://people.freedesktop.org/~danvet/drm into drm-next
Next pull request, this time more of the drm de-midlayering work. The big
thing is that his patch series here removes everything from drm_bus except
the set_busid callback. Thierry has a few more patches on top of this to
make that one optional to.

With that we can ditch all the non-pci drm_bus implementations, which
Thierry has already done for the fake tegra host1x drm_bus.

Reviewed by Thierry, Laurent and David and now also survived some testing
on my intel boxes to make sure the irq fumble is fixed correctly ;-) The
last minute rebase was just to add the r-b tags from Thierry for the 2
patches I've redone.

* 'drm-init-cleanup' of git://people.freedesktop.org/~danvet/drm:
  drm/<drivers>: don't set driver->dev_priv_size to 0
  drm: Remove dev->kdriver
  drm: remove drm_bus->get_name
  drm: rip out dev->devname
  drm: inline drm_pci_set_unique
  drm: remove bus->get_irq implementations
  drm: pass the irq explicitly to drm_irq_install
  drm/irq: Look up the pci irq directly in the drm_control ioctl
  drm/irq: track the irq installed in drm_irq_install in dev->irq
  drm: rename dev->count_lock to dev->buf_lock
  drm: Rip out totally bogus vga_switcheroo->can_switch locking
  drm: kill drm_bus->bus_type
  drm: remove drm_dev_to_irq from drivers
  drm/irq: remove cargo-culted locking from irq_install/uninstall
  drm/irq: drm_control is a legacy ioctl, so pci devices only
  drm/pci: fold in irq_by_busid support
  drm/irq: simplify irq checks in drm_wait_vblank
2014-05-01 09:32:21 +10:00
Dave Airlie
917db41045 drm/tegra: Fixes for v3.15-rc3
A single fix for some framebuffer reference counting fallout caused by
 the primary plane helpers introduced in 3.15-rc1.
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Merge tag 'drm/tegra/for-3.15-rc3' of git://anongit.freedesktop.org/tegra/linux into drm-next

drm/tegra: Fixes for v3.15-rc3

A single fix for some framebuffer reference counting fallout caused by
the primary plane helpers introduced in 3.15-rc1.

* tag 'drm/tegra/for-3.15-rc3' of git://anongit.freedesktop.org/tegra/linux:
  drm/tegra: restrict plane loops to legacy planes
2014-04-28 09:16:37 +10:00
Daniel Vetter
2b4c36612e drm/tegra: restrict plane loops to legacy planes
In Matt Ropers primary plane series a set of prep patches like

commit af2b653bfb
Author: Matt Roper <matthew.d.roper@intel.com>
Date:   Tue Apr 1 15:22:32 2014 -0700

    drm/i915: Restrict plane loops to only operate on overlay planes (v2)

ensured that all exisiting users of the mode_config->plane_list
wouldn't change behaviour. Unfortunately tegra seems to have fallen
through the cracks. Fix it.

This regression was introduced in

commit e13161af80
Author: Matt Roper <matthew.d.roper@intel.com>
Date:   Tue Apr 1 15:22:38 2014 -0700

    drm: Add drm_crtc_init_with_planes() (v2)

The result was that we've unref'ed the fb for the primary plane twice,
leading to a use-after free bug. This is because the drm core will
already set crtc->primary->fb to NULL and do the unref for us, and the
crtc disable hook is called by the drm crtc helpers for exactly this
case.

Aside: Now that the fbdev helpers clean up planes there's no longer a
need to do this in drivers. So this could probably be nuked entirely
in linux-next.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-24 15:04:30 +02:00
Daniel Vetter
5829d1834e drm: rip out dev->devname
This was only ever used to pretty-print the irq driver name. And on
kms systems due to set_version bonghits we never set up the prettier
name, ever. Which make this a bit pointless.

Also, we can always dig out the driver-instance/irq relationship
through other means, so this isn't that useful. So just rip it out to
simplify the set_version/set_busid insanity a bit.

Also delete the temporary busname from drm_pci_set_busid, it's now
unused.

v2: Rebase on top of the new host1x drm_bus for tegra.

Reviewed-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-23 10:32:52 +02:00
Daniel Vetter
42b21049fc drm: kill drm_bus->bus_type
Completely unused. Hooray, midlayer mistakes that didn't cause work to
undo!

v2: Rebase on top of the recent tegra changes which added a host1x drm
bus.

Reviewed-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-22 11:41:13 +02:00
Thierry Reding
1ca2030563 drm/tegra: dp: Support address-only I2C-over-AUX transactions
Certain types of I2C-over-AUX transactions require that only the address
is transferred. Detect this by looking at the AUX message's size and set
the address-only bit appropriately.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-08 16:12:36 +02:00
Dave Airlie
82c68b6ccd drm/tegra: Changes for v3.15-rc1
Implement eDP support for Tegra124 and support the PRIME vmap()/vunmap()
 operations.
 
 A symbol that is required for upcoming V4L2 support is now exported by
 the host1x driver.
 
 Relicense drivers under the GPL v2 for consistency. One exception is the
 public header file, which is relicensed under MIT to abide by the common
 rule.
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Merge tag 'drm/tegra/for-3.15-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next

drm/tegra: Changes for v3.15-rc1

Implement eDP support for Tegra124 and support the PRIME vmap()/vunmap()
operations.

A symbol that is required for upcoming V4L2 support is now exported by
the host1x driver.

Relicense drivers under the GPL v2 for consistency. One exception is the
public header file, which is relicensed under MIT to abide by the common
rule.

* tag 'drm/tegra/for-3.15-rc1' of git://anongit.freedesktop.org/tegra/linux:
  drm/tegra: Use standard GPL v2 license text
  drm/tegra: Relicense under GPL v2
  drm/tegra: Relicense public header under MIT
  drm/tegra: Add eDP support
  gpu: host1x: export host1x_syncpt_incr_max() function
  drm/tegra: prime: Add vmap support
2014-04-05 16:13:08 +10:00
Thierry Reding
d105a6c97e drm/tegra: Use standard GPL v2 license text
Use the more canonical and concise variant of the GPL v2 license text.

Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-04 09:12:51 +02:00
Thierry Reding
9a2ac2dcdc drm/tegra: Relicense under GPL v2
The majority of the code in this driver is licensed under the GPL v2, so
relicense the rest under GPL v2 as well for consistency.

Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-04 09:12:51 +02:00
Thierry Reding
6b6b604215 drm/tegra: Add eDP support
Add support for eDP functionality found on Tegra124 and later SoCs. Only
fast link training is currently supported.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-04 09:12:50 +02:00
Thierry Reding
d40326f4b9 drm/tegra: prime: Add vmap support
This is trivial to support since all GEM objects are mapped into kernel
space anyway.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-04 09:12:49 +02:00
Matt Roper
f4510a2752 drm: Replace crtc fb with primary plane fb (v3)
Now that CRTC's have a primary plane, there's no need to track the
framebuffer in the CRTC.  Replace all references to the CRTC fb with the
primary plane's fb.

This patch was generated by the Coccinelle semantic patching tool using
the following rules:

        @@ struct drm_crtc C; @@
        -   (C).fb
        +   C.primary->fb

        @@ struct drm_crtc *C; @@
        -   (C)->fb
        +   C->primary->fb

v3: Generate patch via coccinelle.  Actual removal of crtc->fb has been
    moved to a subsequent patch.

v2: Fixup several lingering crtc->fb instances that were missed in the
    first patch iteration.  [Rob Clark]

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2014-04-01 20:18:28 -04:00
Dave Airlie
bcc298bc92 Linux 3.14-rc7
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Merge tag 'v3.14-rc7' into drm-next

Linux 3.14-rc7

Backmerge to help out Intel guys.
2014-03-18 19:12:31 +10:00
David Herrmann
099d1c290e drm: provide device-refcount
Lets not trick ourselves into thinking "drm_device" objects are not
ref-counted. That's just utterly stupid. We manage "drm_minor" objects on
each drm-device and each minor can have an unlimited number of open
handles. Each of these handles has the drm_minor (and thus the drm_device)
as private-data in the file-handle. Therefore, we may not destroy
"drm_device" until all these handles are closed.

It is *not* possible to reset all these pointers atomically and restrict
access to them, and this is *not* how this is done! Instead, we use
ref-counts to make sure the object is valid and not freed.

Note that we currently use "dev->open_count" for that, which is *exactly*
the same as a reference-count, just open coded. So this patch doesn't
change any semantics on DRM devices (well, this patch just introduces the
ref-count, anyway. Follow-up patches will replace open_count by it).

Also note that generic VFS revoke support could allow us to drop this
ref-count again. We could then just synchronously disable any fops->xy()
calls. However, this is not the case, yet, and no such patches are
in sight (and I seriously question the idea of dropping the ref-cnt
again).

Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
2014-03-16 12:25:17 +01:00
Dmitry Osipenko
b189153790 drm/tegra: Add guard to avoid double disable/enable of RGB outputs
Add guard to check whether RGB output is already enabled in the way it's
done for HDMI output. Fixes possible hang on trying to disable output twice
(first time during driver probe and second on fb registering).

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-02-12 07:50:38 +01:00
Paul Bolle
6e60163b9d drm/tegra: fix typo 'CONFIG_TEGRA_DRM_FBDEV'
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-02-12 07:50:37 +01:00
Dave Airlie
45ab1e0780 drm/tegra: Changes for v3.14-rc1 (update)
These patches fix some issues caused by the DRM panel support from the
 previous pull request and add two more panels (for the Toshiba AC100 as
 well as the Seaboard and Ventana).
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Merge tag 'drm/for-3.14-rc1-20140123' of git://anongit.freedesktop.org/tegra/linux into drm-next

drm/tegra: Changes for v3.14-rc1 (update)

These patches fix some issues caused by the DRM panel support from the
previous pull request and add two more panels (for the Toshiba AC100 as
well as the Seaboard and Ventana).

* tag 'drm/for-3.14-rc1-20140123' of git://anongit.freedesktop.org/tegra/linux:
  drm/tegra: Obtain head number from DT
  drm/panel: update EDID BLOB in panel_simple_get_modes()
  gpu: host1x: Remove unnecessary include
  drm/tegra: Use proper data type
  drm/tegra: Clarify how panel modes override others
  drm/tegra: Fix possible CRTC mask for RGB outputs
  drm/i915: Use drm_encoder_crtc_ok()
  drm: Move drm_encoder_crtc_ok() to core
  drm: provide a helper for the encoder possible_crtcs mask
  drm/tegra: Don't check resource with devm_ioremap_resource()
  drm/panel: Add support for Chunghwa CLAA101WA01A panel
  drm/panel: Add support for Samsung LTN101NT05 panel
2014-01-29 12:03:56 +10:00
Thierry Reding
13411ddd31 drm/tegra: Obtain head number from DT
The head number of a given display controller is fixed in hardware and
required to program outputs appropriately. Relying on the driver probe
order to determine this number will not work, since that could yield a
situation where the second head was probed first and would be assigned
head number 0 instead of 1.

By explicitly specifying the head number in the device tree, it is no
longer necessary to rely on these assumptions. As a fallback, if the
property isn't available, derive the head number from the display
controller node's position in the device tree. That's somewhat more
reliable than the previous default but not a proper solution.

Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-23 15:51:32 +01:00
Thierry Reding
7236aa03ff drm/tegra: Use proper data type
The last argument to of_get_property() is a pointer to an int, rather
than size_t.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-14 14:39:38 +01:00
Thierry Reding
acde541324 drm/tegra: Clarify how panel modes override others
When a panel advertises one or more modes, they are used exclusively.
Other methods for obtaining the mode, such as DDC as used for HDMI or
binary EDID blobs embedded in the DT, are ignored. The panel drivers
should be providing this functionality if they want to expose it as
well.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-14 14:36:51 +01:00
Thierry Reding
456ac56b7d drm/tegra: Fix possible CRTC mask for RGB outputs
The mask of possible CRTCs that an output (DRM encoder) can be attached
to is relative to the position within the DRM device's list of CRTCs.
Deferred probing can cause this to not match the pipe number associated
with a CRTC. Use the newly introduced drm_crtc_mask() to compute the
mask by looking up the proper index of the given CRTC in the list.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-14 14:35:56 +01:00
Wolfram Sang
ff5009ef8d drm/tegra: Don't check resource with devm_ioremap_resource()
devm_ioremap_resource() does sanity checks on the given resource. No
need to duplicate this in the driver.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-14 14:34:14 +01:00
Dave Airlie
785e15ecef drm/tegra: Changes for v3.14-rc1
This series of changes brings DRM panel support as well as initial code
 to register DSI hosts and peripherals and bind them to DSI drivers. The
 panel and DSI code are both used by the simple panel driver.
 
 The Tegra-specific changes build on top of this work to add support for
 various panels found on Tegra boards. New drivers enable the DSI host
 found on Tegra114 and a special hardware block that calibrates the pads
 used for DSI and CSI. The host1x and the display controller drivers gain
 basic Tegra124 support. To round of the new features, the DRM driver now
 sports a very simple PRIME implementation.
 
 In addition there are various improvements such as the host1x API being
 exported so that client drivers (like the Tegra DRM driver) can be built
 as modules. HDMI now does better power management and legacy FBDEV can
 now be disabled via Kconfig (though it's still enabled by default). A
 few sparse warnings have been squashed and various parts of the code
 have become more robust.
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Merge tag 'drm/for-3.14-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next

drm/tegra: Changes for v3.14-rc1

This series of changes brings DRM panel support as well as initial code
to register DSI hosts and peripherals and bind them to DSI drivers. The
panel and DSI code are both used by the simple panel driver.

The Tegra-specific changes build on top of this work to add support for
various panels found on Tegra boards. New drivers enable the DSI host
found on Tegra114 and a special hardware block that calibrates the pads
used for DSI and CSI. The host1x and the display controller drivers gain
basic Tegra124 support. To round of the new features, the DRM driver now
sports a very simple PRIME implementation.

In addition there are various improvements such as the host1x API being
exported so that client drivers (like the Tegra DRM driver) can be built
as modules. HDMI now does better power management and legacy FBDEV can
now be disabled via Kconfig (though it's still enabled by default). A
few sparse warnings have been squashed and various parts of the code
have become more robust.

* tag 'drm/for-3.14-rc1' of git://anongit.freedesktop.org/tegra/linux: (121 commits)
  drm/tegra: fix compile w/ CONFIG_DYNAMIC_DEBUG
  drm/tegra: Add PRIME support
  drm/tegra: Relocate some output-specific code
  drm/tegra: Add Tegra124 DC support
  drm/tegra: Fix small leak on error in tegra_fb_alloc()
  drm/tegra: Make legacy fbdev support optional
  drm/tegra: Sort reverse-dependencies alphabetically
  drm/tegra: Fix return value check
  drm/tegra: Add DSI support
  drm/tegra: Disable outputs for power-saving
  drm/tegra: Track HDMI enable state
  drm/tegra: Fix HDMI audio frequency typo
  drm/tegra: Do not export tegra_bo_ops
  drm/tegra: Remove spurious blank line
  drm/tegra: Increase compile test coverage
  drm/tegra: Allow the driver to be built as a module
  gpu: host1x: Add Tegra124 support
  gpu: host1x: clk_round_rate() can return a zero upon error
  gpu: host1x: Fix build warnings
  gpu: host1x: Increase compile test coverage
  ...
2013-12-23 10:43:42 +10:00
Stephen Warren
81239c6f79 drm/tegra: fix compile w/ CONFIG_DYNAMIC_DEBUG
With CONFIG_DYNAMIC_DEBUG=y, the following compile error occurs:

drivers/gpu/drm/tegra/mipi-phy.c: In function ‘mipi_dphy_timing_validate’:
drivers/gpu/drm/tegra/mipi-phy.c:69:11: error: ‘EINVAL’ undeclared (first use in this function)
drivers/gpu/drm/tegra/mipi-phy.c:69:11: note: each undeclared identifier is reported only once for each function it appears in

Fix this by directly including the header that defines EINVAL.

Fixes: dec727399a ("drm/tegra: Add DSI support")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-20 15:56:33 +01:00
Thierry Reding
3800391db1 drm/tegra: Add PRIME support
Implement very basic PRIME support. This currently only works with
buffers that are contiguous in memory and will refuse to import any
physically non-contiguous buffers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-20 15:56:07 +01:00
Thierry Reding
72d3028615 drm/tegra: Relocate some output-specific code
Some of the code in the CRTC's mode setting code is specific to the RGB
output or needs to be called slightly differently depending on the type
of output. Push that code down into the output drivers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-20 15:56:07 +01:00
Thierry Reding
8620fc629a drm/tegra: Add Tegra124 DC support
Tegra124 and later support interlacing, but the driver doesn't support
it yet. Make sure interlacing stays disabled on hardware that supports
it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-20 15:56:06 +01:00
Dan Carpenter
6b7c79d191 drm/tegra: Fix small leak on error in tegra_fb_alloc()
If we don't have enough memory for ->planes then we leak "fb".

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-20 15:56:06 +01:00
Thierry Reding
60c2f709d9 drm/tegra: Make legacy fbdev support optional
A lot of the modern userspace is capable of working without the legacy
fbdev support. kmscon can be used as a replacement for the framebuffer
console, and KMS X drivers create their own framebuffers.

Most people don't have a system where all of this works yet, though, so
leave support enabled by default.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-20 15:56:05 +01:00
Thierry Reding
d30a91f8e2 drm/tegra: Sort reverse-dependencies alphabetically
Move the TEGRA_HOST1X and DRM_KMS_HELPER entries around to keep the list
sorted.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-20 15:56:05 +01:00
Wei Yongjun
85316eae48 drm/tegra: Fix return value check
In case of error, the devm_ioremap_resource() function returns ERR_PTR()
and never NULL. The NULL test in the return value check should therefore
be replaced with IS_ERR().

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-20 15:56:05 +01:00
Thierry Reding
dec727399a drm/tegra: Add DSI support
This commit adds support for both DSI outputs found on Tegra. Only very
minimal functionality is implemented, so advanced features like ganged
mode won't work.

Due to the lack of other test hardware, some sections of the driver are
hardcoded to work with Dalmore.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-20 15:56:04 +01:00
Thierry Reding
b5190022f7 drm/tegra: Disable outputs for power-saving
When an output is disabled, its DPMS mode is usually set to off. Instead
of only disabling the panel (if one is attached), turn the output off
entirely to save more power.

HDMI doesn't have any panels attached, so it previously didn't save any
power at all. With this commit, however, the complete HDMI interface
will be turned off, therefore allowing an attached monitor to go into a
standby mode.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-19 09:29:55 +01:00
Thierry Reding
365765fc29 drm/tegra: Track HDMI enable state
The DRM core doesn't track enable and disable state of encoders and/or
connectors, so calls to the output's .enable() and .disable() are not
guaranteed to be balanced. Track the enable state internally so that
calls to regulator and clock frameworks remain balanced.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-19 09:29:55 +01:00
Thierry Reding
17a8b6b037 drm/tegra: Fix HDMI audio frequency typo
The correct check is for 48 kHz, not 480 kHz. Found by Coverity.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-19 09:29:54 +01:00
Thierry Reding
425c0fdc42 drm/tegra: Do not export tegra_bo_ops
These buffer object operations are never used outside of the GEM
implementation so there is no use in exporting them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-19 09:29:54 +01:00
Thierry Reding
f1f34ad564 drm/tegra: Remove spurious blank line
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-19 09:29:54 +01:00
Thierry Reding
158b50aefa drm/tegra: Increase compile test coverage
The ARCH_MULTIPLATFORM dependency was introduced back when Tegra didn't
support multiplatform yet as a means to allow the driver to be easily
compile-tested along with other DRM drivers. In the meantime, the new
COMPILE_TEST Kconfig option has been introduced for exactly that
purpose, so use that instead to clarify the intention.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-19 09:29:53 +01:00
Thierry Reding
fac8f15817 drm/tegra: Allow the driver to be built as a module
All APIs that the driver uses are exported, so the driver can now be
built as a module.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-19 09:29:53 +01:00
Paul Walmsley
23a0e27aac gpu: host1x: clk_round_rate() can return a zero upon error
Treat both negative and zero return values from clk_round_rate() as
errors.  This is needed since subsequent patches will convert
clk_round_rate()'s return value to be an unsigned type, rather than a
signed type, since some clock sources can generate rates higher than
(2^31)-1 Hz.

Eventually, when calling clk_round_rate(), only a return value of zero
will be considered a error.  All other values will be considered valid
rates.  The comparison against values less than 0 is kept to preserve
the correct behavior in the meantime.

Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com>
Cc: Mikko Perttunen <mperttunen@nvidia.com>
Cc: Arto Merilainen <amerilainen@nvidia.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Terje Bergström <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-19 09:29:52 +01:00
Daniel Vetter
b3f2333de8 drm: restrict the device list for shadow attached drivers
There's really no need for the drm core to keep a list of all
devices of a given driver - the linux device model keeps perfect
track of this already for us.

The exception is old legacy ums drivers using pci shadow attaching.
So rename the lists to make the use case clearer and rip out everything
else.

v2: Rebase on top of David Herrmann's drm device register changes.
Also drop the bogus dev_set_drvdata for platform drivers that somehow
crept into the original version - drivers really should be in full
control of that field.

v3: Initialize driver->legacy_dev_list outside of the loop, spotted by
David Herrmann.

v4: Rebase on top of the newly created host1x drm_bus for tegra.

Cc: David Herrmann <dh.herrmann@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-12-18 11:08:36 +10:00
Thierry Reding
9be7d864cf drm/tegra: Implement panel support
Use the DRM panel framework to attach a panel to an output. If the panel
attached to a connector supports supports the backlight brightness
accessors, a property will be available to allow the brightness to be
modified from userspace.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-17 18:10:00 +01:00
Thierry Reding
b03bb79d4f ARM: tegra: implement common DMA and resets DT bindings
This series converts the Tegra DTs and drivers to use the common/
 standard DMA and reset bindings, rather than custom bindings. It also
 adds complete documentation for the Tegra clock bindings without
 actually changing any binding definitions.
 
 This conversion relies on a few sets of patches in branches from outside
 the Tegra tree:
 
 1) A patch to add an DMA channel request API which allows deferred probe
    to be implemented.
 
 2) A patch to implement a common part of the of_xlate function for DMA
    controllers.
 
 3) Some ASoC patches (which in turn rely on (1) above), which support
    deferred probe during DMA channel allocation.
 
 4) The Tegra clock driver changes for 3.14.
 
 Consequently, this branch is based on a merge of all of those external
 branches.
 
 In turn, this branch is or will be pulled into a few places that either
 rely on features introduced here, or would otherwise conflict with the
 patches:
 
 a) Tegra's own for-3.14/powergate and for-4.14/dt branches, to avoid
    conflicts.
 
 b) The DRM tree, which introduces new code that relies on the reset
    controller framework introduced in this branch, and to avoid
    conflicts.
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Merge tag 'tegra-for-3.14-dmas-resets-rework' into drm/for-next

ARM: tegra: implement common DMA and resets DT bindings

This series converts the Tegra DTs and drivers to use the common/
standard DMA and reset bindings, rather than custom bindings. It also
adds complete documentation for the Tegra clock bindings without
actually changing any binding definitions.

This conversion relies on a few sets of patches in branches from outside
the Tegra tree:

1) A patch to add an DMA channel request API which allows deferred probe
   to be implemented.

2) A patch to implement a common part of the of_xlate function for DMA
   controllers.

3) Some ASoC patches (which in turn rely on (1) above), which support
   deferred probe during DMA channel allocation.

4) The Tegra clock driver changes for 3.14.

Consequently, this branch is based on a merge of all of those external
branches.

In turn, this branch is or will be pulled into a few places that either
rely on features introduced here, or would otherwise conflict with the
patches:

a) Tegra's own for-3.14/powergate and for-4.14/dt branches, to avoid
   conflicts.

b) The DRM tree, which introduces new code that relies on the reset
   controller framework introduced in this branch, and to avoid
   conflicts.
2013-12-17 18:09:16 +01:00
Stephen Warren
80b28791ff ARM: tegra: pass reset to tegra_powergate_sequence_power_up()
Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
2013-12-11 16:43:11 -07:00
Stephen Warren
ca48080a03 drm/tegra: use reset framework
Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
2013-12-11 16:43:04 -07:00
Dan Carpenter
9a991600e3 drm/tegra: return -EFAULT if copy_from_user() fails
copy_from_user() returns the number of bytes remaining if it fails, but
we want to return -EFAULT here.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-03 10:14:03 +01:00
Thierry Reding
9ab34151a9 drm/tegra: Force cast to __iomem to make sparse happy
The fbdev screen memory pointer is annotated __iomem, so cast the kernel
virtual address to that address space to make the warning go away.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-03 10:05:04 +01:00
Thierry Reding
9b57f5f2c5 drm/tegra: Make tegra_drm_driver static
There is no need to access it from other files now that the driver has
been decoupled from host1x.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-03 10:04:56 +01:00
Thierry Reding
a7ed68fcc7 drm/tegra: Fix address space mismatches
sparse complains because __user annotations aren't placed consistently.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-03 10:04:42 +01:00
Thierry Reding
7602fa1d29 drm/tegra: Tightly bind RGB output to DC
Previously the association to a DC was done via the encoder's .crtc
field. That has the disadvantage that when an encoder is detached from
its CRTC, that field is set to NULL, leading to situations where it is
impossible to access the DC registers required by the RGB output.

However, the coupling between DC and RGB output is really fixed on
Tegra. While they can be detached logically in DRM, the RGB output can
rely on the DC's existence.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-03 10:04:22 +01:00
Thierry Reding
37826519c4 drm/tegra: Make CRTC upcasting safer
When upcasting a NULL CRTC object, propagate the NULL pointer instead of
some invalid pointer. This allows subsequent code to check that the cast
object is valid.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-03 10:04:15 +01:00
Dave Airlie
90c37067b7 drm/tegra: Changes for v3.13-rc1
The biggest part of the changes is the decoupling of the host1x and DRM
 drivers followed by the move of Tegra DRM back to drivers/gpu/drm/tegra
 from whence it came. There is a lot of cleanup as well, and the drivers
 can now be properly unloaded and reloaded.
 
 HDMI support for the Tegra114 SoC was contributed by Mikko Perttunen.
 
 gr2d support was extended to Tegra114 and the gr3d driver that has been
 in the works for quite some time finally made it in. All pieces to run
 an OpenGL driver on top of an upstream kernel are now available.
 
 Support for syncpoint bases was added by Arto Merilainen. This is useful
 for synchronizing between command streams from different engines such as
 gr2d and gr3d.
 
 Erik Faye-Lund and Wei Yongjun contributed various small fixes. Thanks!
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Merge tag 'drm/for-3.13-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next

drm/tegra: Changes for v3.13-rc1

The biggest part of the changes is the decoupling of the host1x and DRM
drivers followed by the move of Tegra DRM back to drivers/gpu/drm/tegra
from whence it came. There is a lot of cleanup as well, and the drivers
can now be properly unloaded and reloaded.

HDMI support for the Tegra114 SoC was contributed by Mikko Perttunen.

gr2d support was extended to Tegra114 and the gr3d driver that has been
in the works for quite some time finally made it in. All pieces to run
an OpenGL driver on top of an upstream kernel are now available.

Support for syncpoint bases was added by Arto Merilainen. This is useful
for synchronizing between command streams from different engines such as
gr2d and gr3d.

Erik Faye-Lund and Wei Yongjun contributed various small fixes. Thanks!

* tag 'drm/for-3.13-rc1' of git://anongit.freedesktop.org/tegra/linux: (45 commits)
  drm/tegra: Reserve syncpoint base for gr3d
  drm/tegra: Reserve base for gr2d
  drm/tegra: Deliver syncpoint base to user space
  gpu: host1x: Add syncpoint base support
  gpu: host1x: Add 'flags' field to syncpt request
  drm/tegra: Disable clock on probe failure
  gpu: host1x: Disable clock on probe failure
  drm/tegra: Support bottom-up buffer objects
  drm/tegra: Add support for tiled buffer objects
  drm/tegra: Add 3D support
  drm/tegra: Introduce tegra_drm_submit()
  drm/tegra: Use symbolic names for gr2d registers
  drm/tegra: Start connectors with correct DPMS mode
  drm/tegra: hdmi: Enable VDD earlier for hotplug/DDC
  drm/tegra: hdmi: Fix build warnings
  drm/tegra: hdmi: Detect DVI-only displays
  drm/tegra: Add Tegra114 HDMI support
  drm/tegra: hdmi: Parameterize based on compatible property
  drm/tegra: hdmi: Rename tegra{2,3} to tegra{20,30}
  gpu: host1x: Add support for Tegra114
  ...
2013-11-05 16:21:00 +10:00
Thierry Reding
977386a04b drm/tegra: Reserve syncpoint base for gr3d
Request a syncpoint base to be associated with the gr3d syncpoint.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:49 +01:00
Arto Merilainen
61644dc7df drm/tegra: Reserve base for gr2d
This patch modifies the gr2d to reserve a base for syncpoint.

Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:48 +01:00
Arto Merilainen
c54a169b52 drm/tegra: Deliver syncpoint base to user space
This patch adds a separate ioctl for delivering syncpoint base number
to user space. If the syncpoint does not have an associated base, the
function returns -ENXIO.

Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:48 +01:00
Arto Merilainen
8736fe8153 gpu: host1x: Add 'flags' field to syncpt request
Functions host1x_syncpt_request() and _host1x_syncpt_alloc() have
been taking a separate boolean flag ('client_managed') for indicating
if the syncpoint value should be tracked by the host1x driver.

This patch converts the field into generic 'flags' field so that
we can easily add more information while requesting a syncpoint.
Clients are adapted to use the new interface accordingly.

Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:47 +01:00
Wei Yongjun
b0084031f2 drm/tegra: Disable clock on probe failure
Add a missing clk_disable_unprepare() before returning from the driver's
.probe() function on error.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:47 +01:00
Thierry Reding
db7fbdfd25 drm/tegra: Support bottom-up buffer objects
The gr3d engine renders images bottom-up. Allow buffers that are used
for 3D content to be marked as such and implement support in the display
controller to present them properly.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:46 +01:00
Thierry Reding
773af77fc4 drm/tegra: Add support for tiled buffer objects
The gr2d and gr3d engines work more efficiently on buffers with a tiled
memory layout. Allow created buffers to be marked as tiled so that the
display controller can scan them out properly.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:46 +01:00
Thierry Reding
5f60ed0d84 drm/tegra: Add 3D support
Initialize and power the 3D unit on Tegra20, Tegra30 and Tegra114 and
register a channel with the Tegra DRM driver so that the unit can be
used from userspace.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:45 +01:00
Thierry Reding
c40f0f1afc drm/tegra: Introduce tegra_drm_submit()
Command stream submissions are the same across all devices that expose
a channel to userspace, so move the code into a generic function.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:45 +01:00
Thierry Reding
497c56a581 drm/tegra: Use symbolic names for gr2d registers
Instead of using magic numbers for the registers which contain memory
addresses in the firewall table, using symbolic names.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:44 +01:00
Thierry Reding
f8c3325584 drm/tegra: Start connectors with correct DPMS mode
A connector's DPMS mode isn't initialized by default, therefore using a
default of 0 (DRM_MODE_DPMS_ON). This can cause problems in that the DRM
core won't explicitly turn on a connector because it thinks that it is
already on.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:44 +01:00
Mikko Perttunen
18ebc0f404 drm/tegra: hdmi: Enable VDD earlier for hotplug/DDC
The VDD regulator used to be enabled only at tegra_output_hdmi_enable,
which is called after a sink is detected. However, the HDMI hotplug pin
works by returning the voltage supplied by the VDD pin, so this meant
that the hotplug pin was never asserted and the sink was not detected
unless the VDD regulator was set to be always on.

This patch moves the enable to the tegra_hdmi_init() function to make
sure the regulator will get enabled and therefore ensure proper hotplug
detection.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:44 +01:00
Thierry Reding
ef284c7549 drm/tegra: hdmi: Fix build warnings
These seem to show up when building for architectures other than ARM,
which I guess will never happen. The reason why the kbuild test bot ran
into these was a missing dependency which has hence been fixed. Still it
doesn't hurt to fix them anyway.

Reported-by: kbuild test bot <fengguang.wu@intel.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:43 +01:00
Mikko Perttunen
9f1591231a drm/tegra: hdmi: Detect DVI-only displays
Use EDID data to determine whether the display supports HDMI or DVI
only. The HDMI output used to assume to be connected to HDMI displays,
but that broke support for DVI displays that don't understand the
interspersed audio/other data.

To be on the safe side, default to DVI if no EDID data is available.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
[treding@nvidia.com: move detection to separate function]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:43 +01:00
Mikko Perttunen
7d1d28aca0 drm/tegra: Add Tegra114 HDMI support
Tegra114 TMDS configuration requires a new peak_current field and the
driver current override bit has changed position.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:42 +01:00
Thierry Reding
59af0595f4 drm/tegra: hdmi: Parameterize based on compatible property
Use a structure to parameterize the code to handle differences between
the HDMI hardware on various SoC generations. This removes the need to
clutter the code with checks for individual compatible values.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:42 +01:00
Thierry Reding
f27db9615a drm/tegra: hdmi: Rename tegra{2,3} to tegra{20,30}
Everything related to Tegra uses Tegra20 and Tegra30 instead of Tegra2
and Tegra3, respectively. Rename the TMDS arrays in the HDMI driver for
consistency.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:42 +01:00
Thierry Reding
59d29c0ec9 drm/tegra: Allocate resources at probe time
Since the .init() and .exit() functions are executed whenever the DRM
driver is loaded or unloaded, care must be taken not to use them for
resource allocation. Otherwise deferred probing cannot be used, since
the .init() and .exit() are not run at probe time. Similarly the code
that frees resources must be run at .remove() time. If it is run from
the .exit() function, it can release resources multiple times.

To handle this more consistently, rename the tegra_output_parse_dt()
function to tegra_output_probe() and introduce tegra_output_remove()
which can be used to free output-related resources.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:41 +01:00
Thierry Reding
f002abc19a drm/tegra: Properly cleanup and zero out resources
When the DRM driver is unloaded, all the associated resources must be
cleaned up and zeroed out. This is necessary because of the architecture
of the Tegra DRM driver, where not all subdrivers are unloaded along
with the DRM driver. Therefore device-managed managed won't be freed and
memory cannot be assumed to have been cleared (because it hasn't been
reallocated using kzalloc()) by the time the DRM driver is reloaded. It
is therefore necessary to zero out the structures to prevent strange
errors (such as slab corruptions) from occurring.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:40 +01:00
Thierry Reding
dee8268f8f drm/tegra: Move driver to DRM tree
In order to make subsystem-wide changes easier, move the Tegra DRM
driver back into the DRM tree.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:40 +01:00
Terje Bergstrom
4231c6b01a drm/tegra: Move drm to live under host1x
Make drm part of host1x driver.

Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Tested-by: Erik Faye-Lund <kusmabite@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2013-04-22 12:39:11 +02:00
Paul Bolle
36c1813bb4 drm/tegra: drop "select DRM_HDMI"
Commit ac24c2204a ("drm/tegra: Use generic
HDMI infoframe helpers") added "select DRM_HDMI" to the DRM_TEGRA
Kconfig entry. But there is no Kconfig symbol named DRM_HDMI. The select
statement for that symbol is a nop. Drop it.

What was needed to use HDMI functionality was to select HDMI (which this
entry already did through depending on DRM) and to include linux/hdmi.h
(which this commit also did).

Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Acked-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-03-08 08:36:01 +10:00
Linus Torvalds
fffddfd6c8 Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull drm merge from Dave Airlie:
 "Highlights:

   - TI LCD controller KMS driver

   - TI OMAP KMS driver merged from staging

   - drop gma500 stub driver

   - the fbcon locking fixes

   - the vgacon dirty like zebra fix.

   - open firmware videomode and hdmi common code helpers

   - major locking rework for kms object handling - pageflip/cursor
     won't block on polling anymore!

   - fbcon helper and prime helper cleanups

   - i915: all over the map, haswell power well enhancements, valleyview
     macro horrors cleaned up, killing lots of legacy GTT code,

   - radeon: CS ioctl unification, deprecated UMS support, gpu reset
     rework, VM fixes

   - nouveau: reworked thermal code, external dp/tmds encoder support
     (anx9805), fences sleep instead of polling,

   - exynos: all over the driver fixes."

Lovely conflict in radeon/evergreen_cs.c between commit de0babd60d
("drm/radeon: enforce use of radeon_get_ib_value when reading user cmd")
and the new changes that modified that evergreen_dma_cs_parse()
function.

* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (508 commits)
  drm/tilcdc: only build on arm
  drm/i915: Revert hdmi HDP pin checks
  drm/tegra: Add list of framebuffers to debugfs
  drm/tegra: Fix color expansion
  drm/tegra: Split DC_CMD_STATE_CONTROL register write
  drm/tegra: Implement page-flipping support
  drm/tegra: Implement VBLANK support
  drm/tegra: Implement .mode_set_base()
  drm/tegra: Add plane support
  drm/tegra: Remove bogus tegra_framebuffer structure
  drm: Add consistency check for page-flipping
  drm/radeon: Use generic HDMI infoframe helpers
  drm/tegra: Use generic HDMI infoframe helpers
  drm: Add EDID helper documentation
  drm: Add HDMI infoframe helpers
  video: Add generic HDMI infoframe helpers
  drm: Add some missing forward declarations
  drm: Move mode tables to drm_edid.c
  drm: Remove duplicate drm_mode_cea_vic()
  gma500: Fix n, m1 and m2 clock limits for sdvo and lvds
  ...
2013-02-25 16:46:44 -08:00
Dave Airlie
28ee46184f Merge branch 'drm/hdmi-for-3.9' of git://anongit.freedesktop.org/tegra/linux into drm-next
Thierry writes:
"Remove a duplicate implementation of the CEA VIC lookup and move the CEA
and other mode tables to drm_edid.c to make it more difficult to create
duplicates of the tables.

Add some helpers to pack CEA-861/HDMI AVI, audio and SPD infoframes into
binary buffers that can easily be written into hardware registers. A new
helper function makes it easy construct an AVI infoframe from a DRM
display mode.

Convert the Tegra and Radeon drivers to use the new HDMI helpers."
* 'drm/hdmi-for-3.9' of git://anongit.freedesktop.org/tegra/linux:
  drm/radeon: Use generic HDMI infoframe helpers
  drm/tegra: Use generic HDMI infoframe helpers
  drm: Add EDID helper documentation
  drm: Add HDMI infoframe helpers
  video: Add generic HDMI infoframe helpers
  drm: Add some missing forward declarations
  drm: Move mode tables to drm_edid.c
  drm: Remove duplicate drm_mode_cea_vic()
2013-02-24 12:39:42 +10:00
Thierry Reding
e450fcc666 drm/tegra: Add list of framebuffers to debugfs
This list is most useful to inspect whether framebuffer reference
counting works as expected. The code is loosely based on the i915
implementation.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2013-02-22 08:21:37 +01:00
Thierry Reding
84ff6b2708 drm/tegra: Fix color expansion
bpp stores the number of bytes per pixel, but color expansion needs to
be enabled for less than 24 bits per pixel.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2013-02-22 08:21:35 +01:00
Thierry Reding
3b9e71eae5 drm/tegra: Split DC_CMD_STATE_CONTROL register write
The Tegra TRM says that the ACT_REQ and UPDATE fields cannot be
programmed at the same time so they are updated in two consecutive
writes instead.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2013-02-22 08:21:32 +01:00
Thierry Reding
3c03c46ac8 drm/tegra: Implement page-flipping support
All the necessary support bits like .mode_set_base() and VBLANK are now
available, so page-flipping case easily be implemented on top.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2013-02-22 08:21:27 +01:00
Thierry Reding
6e5ff99899 drm/tegra: Implement VBLANK support
Implement support for the VBLANK IOCTL. Note that Tegra is somewhat
special in this case because it doesn't use the generic IRQ support
provided by the DRM core (DRIVER_HAVE_IRQ) but rather registers one
interrupt handler for each display controller.

While at it, clean up the way that interrupts are enabled to ensure
that the VBLANK interrupt only gets enabled when required.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2013-02-22 08:21:23 +01:00
Thierry Reding
23fb47404e drm/tegra: Implement .mode_set_base()
The sequence for replacing the scanout buffer is much shorter than a
full mode change operation so implementing this callback considerably
speeds up cases where only a new framebuffer is to be scanned out.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2013-02-22 08:21:17 +01:00
Thierry Reding
f34bc78741 drm/tegra: Add plane support
Add support for the B and C planes which support RGB and YUV pixel
formats and can be used as overlays or hardware cursor. Currently 32-bit
XRGB as well as UYVY, YUV420 and YUV422 pixel formats are advertised.
Other formats should be easy to add but these are the most common ones
and should cover the majority of use-cases.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2013-02-22 08:21:12 +01:00
Thierry Reding
894752bb57 drm/tegra: Remove bogus tegra_framebuffer structure
Tegra uses the CMA FB helpers so framebuffers passed to the driver need
to use the corresponding functions to access the underlying GEM objects.

This used to work because struct tegra_framebuffer was sufficiently
similar to struct drm_fb_cma but that isn't guaranteed to stay that way.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2013-02-22 08:21:10 +01:00
Thierry Reding
ac24c2204a drm/tegra: Use generic HDMI infoframe helpers
Use the generic HDMI infoframe helpers to get rid of the NVIDIA Tegra
reimplementation.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2013-02-22 08:20:18 +01:00
Linus Torvalds
bab588fcfb arm-soc: soc-specific updates
This is a larger set of new functionality for the existing SoC families,
 including:
 
 * vt8500 gains support for new CPU cores, notably the Cortex-A9 based wm8850
 * prima2 gains support for the "marco" SoC family, its SMP based cousin
 * tegra gains support for the new Tegra4 (Tegra114) family
 * socfpga now supports a newer version of the hardware including SMP
 * i.mx31 and bcm2835 are now using DT probing for their clocks
 * lots of updates for sh-mobile
 * OMAP updates for clocks, power management and USB
 * i.mx6q and tegra now support cpuidle
 * kirkwood now supports PCIe hot plugging
 * tegra clock support is updated
 * tegra USB PHY probing gets implemented diffently
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Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC-specific updates from Arnd Bergmann:
 "This is a larger set of new functionality for the existing SoC
  families, including:

   - vt8500 gains support for new CPU cores, notably the Cortex-A9 based
     wm8850

   - prima2 gains support for the "marco" SoC family, its SMP based
     cousin

   - tegra gains support for the new Tegra4 (Tegra114) family

   - socfpga now supports a newer version of the hardware including SMP

   - i.mx31 and bcm2835 are now using DT probing for their clocks

   - lots of updates for sh-mobile

   - OMAP updates for clocks, power management and USB

   - i.mx6q and tegra now support cpuidle

   - kirkwood now supports PCIe hot plugging

   - tegra clock support is updated

   - tegra USB PHY probing gets implemented diffently"

* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (148 commits)
  ARM: prima2: remove duplicate v7_invalidate_l1
  ARM: shmobile: r8a7779: Correct TMU clock support again
  ARM: prima2: fix __init section for cpu hotplug
  ARM: OMAP: Consolidate OMAP USB-HS platform data (part 3/3)
  ARM: OMAP: Consolidate OMAP USB-HS platform data (part 1/3)
  arm: socfpga: Add SMP support for actual socfpga harware
  arm: Add v7_invalidate_l1 to cache-v7.S
  arm: socfpga: Add entries to enable make dtbs socfpga
  arm: socfpga: Add new device tree source for actual socfpga HW
  ARM: tegra: sort Kconfig selects for Tegra114
  ARM: tegra: enable ARCH_REQUIRE_GPIOLIB for Tegra114
  ARM: tegra: Fix build error w/ ARCH_TEGRA_114_SOC w/o ARCH_TEGRA_3x_SOC
  ARM: tegra: Fix build error for gic update
  ARM: tegra: remove empty tegra_smp_init_cpus()
  ARM: shmobile: Register ARM architected timer
  ARM: MARCO: fix the build issue due to gic-vic-to-irqchip move
  ARM: shmobile: r8a7779: Correct TMU clock support
  ARM: mxs_defconfig: Select CONFIG_DEVTMPFS_MOUNT
  ARM: mxs: decrease mxs_clockevent_device.min_delta_ns to 2 clock cycles
  ARM: mxs: use apbx bus clock to drive the timers on timrotv2
  ...
2013-02-21 15:27:22 -08:00
Daniel Vetter
203cb50143 drm/tegra: don't set up initial fbcon config twice
drm_fbdev_cma_init does the inital fbcon setup by calling down into
drm_fb_helper_initial_config, so no need at all to restore the just
set up configuration right away ...

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-02-14 00:07:53 +01:00
Prashant Gaikwad
61fd290d21 ARM: tegra: migrate to new clock code
Migrate Tegra clock support to drivers/clk/tegra, this involves
moving:
1. definition of tegra_cpu_car_ops to clk.c
2. definition of reset functions to clk-peripheral.c
3. change parent of cpu clock.
4. Remove legacy clock initialization.
5. Initialize clocks using DT.
6. Remove all instance of mach/clk.h

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: use to_clk_periph_gate().]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:07 -07:00
Thierry Reding
d4ed60259e drm: Convert to devm_ioremap_resource()
Convert all uses of devm_request_and_ioremap() to the newly introduced
devm_ioremap_resource() which provides more consistent error handling.

devm_ioremap_resource() provides its own error messages so all explicit
error messages can be removed from the failure code paths.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Cc: David Airlie <airlied@linux.ie>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-01-25 12:21:46 -08:00
Dave Airlie
d5757dbe79 Revert "drm: tegra: protect DC register access with mutex"
This reverts commit 83c0bcb694.

Lucas pointed out this was a mistake, and I missed the discussion,
so just revert it out to save a rebase.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-12-30 21:58:20 +10:00
Lucas Stach
500df2e5d8 drm: tegra: program only one window during modeset
The intention is to program exactly WIN_A, not WIN_A and possibly
others.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-12-30 14:01:35 +10:00
Lucas Stach
e39250aa52 drm: tegra: clean out old gem prototypes
There is no gem.c anymore, those functions are implemented by the
drm_cma_helpers now.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-12-30 14:01:34 +10:00
Lucas Stach
fa416ddc0a drm: tegra: remove redundant tegra2_tmds_config entry
The 720p and 1080p entries are completely redundant, as we are matching
the table entries against <=pclk.
Also generalize the comment, as we are using those table entries even
when driving other modes than the standard TV ones.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-12-30 14:01:33 +10:00
Lucas Stach
83c0bcb694 drm: tegra: protect DC register access with mutex
Window properties are programmed through a shared aperture and have to
happen atomically. Also we do the read-update-write dance on some of the
shared regs.
To make sure that different functions don't stumble over each other
protect the register access with a mutex.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-12-30 14:01:33 +10:00
Lucas Stach
4026bfb39a drm: tegra: don't leave clients host1x member uninitialized
No real problem for now, as nothing is using this, but leaving it
unitialized is asking for trouble later on.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-12-30 14:01:32 +10:00
Lucas Stach
4049508988 drm: tegra: fix front_porch <-> back_porch mixup
Fixes wrong picture offset observed when using HDMI output with a
Technisat HD TV.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Mark Zhang <markz@nvidia.com>
Tested-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-12-30 14:01:31 +10:00
Thierry Reding
219e81536c drm: tegra: Add Tegra30 support
Add support for host1x, the display controllers and HDMI on the Tegra30
SoC.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Tested-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-11-28 20:07:02 +10:00
Thierry Reding
ac8f7c4894 drm: tegra: Use framebuffer pitch as line stride
Instead of using the stride derived from the display mode, use the pitch
associated with the currently active framebuffer. This fixes a bug where
the LCD display content would be skewed when enabling HDMI with a video
mode different from that of the LCD.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Mark Zhang <markz@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-11-28 20:05:46 +10:00
Thierry Reding
edec4af4c3 drm: tegra: Add HDMI support
This commit adds support for the HDMI output on the Tegra20 SoC. Only
one such output is available, but it can be driven by either of the two
display controllers.

A lot of work on this patch has been contributed by NVIDIA's Mark Zhang
<markz@nvidia.com> and many other people at NVIDIA were very helpful in
getting the HDMI support and surrounding infrastructure to work.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Zhang <markz@nvidia.com>
Reviewed-by: Mark Zhang <markz@nvidia.com>
Tested-by: Mark Zhang <markz@nvidia.com>
Tested-and-acked-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-11-20 15:43:53 +10:00
Thierry Reding
d8f4a9eda0 drm: Add NVIDIA Tegra20 support
This commit adds a KMS driver for the Tegra20 SoC. This includes basic
support for host1x and the two display controllers found on the Tegra20
SoC. Each display controller can drive a separate RGB/LVDS output.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Zhang <markz@nvidia.com>
Reviewed-by: Mark Zhang <markz@nvidia.com>
Tested-by: Mark Zhang <markz@nvidia.com>
Tested-and-acked-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-11-20 15:43:41 +10:00