mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 07:16:43 +07:00
drm/tegra: dc - Reshuffle code to get rid of prototypes
The tegra_dc_format() and tegra_dc_setup_window() functions are only used internally by the display controller driver. Move them upwards in order to make them static and get rid of the function prototypes. Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding
parent
eba66501ac
commit
10288eea88
@ -29,6 +29,254 @@ static inline struct tegra_plane *to_tegra_plane(struct drm_plane *plane)
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return container_of(plane, struct tegra_plane, base);
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}
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static unsigned int tegra_dc_format(uint32_t format, uint32_t *swap)
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{
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/* assume no swapping of fetched data */
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if (swap)
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*swap = BYTE_SWAP_NOSWAP;
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switch (format) {
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case DRM_FORMAT_XBGR8888:
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return WIN_COLOR_DEPTH_R8G8B8A8;
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case DRM_FORMAT_XRGB8888:
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return WIN_COLOR_DEPTH_B8G8R8A8;
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case DRM_FORMAT_RGB565:
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return WIN_COLOR_DEPTH_B5G6R5;
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case DRM_FORMAT_UYVY:
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return WIN_COLOR_DEPTH_YCbCr422;
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case DRM_FORMAT_YUYV:
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if (swap)
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*swap = BYTE_SWAP_SWAP2;
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return WIN_COLOR_DEPTH_YCbCr422;
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case DRM_FORMAT_YUV420:
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return WIN_COLOR_DEPTH_YCbCr420P;
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case DRM_FORMAT_YUV422:
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return WIN_COLOR_DEPTH_YCbCr422P;
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default:
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break;
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}
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WARN(1, "unsupported pixel format %u, using default\n", format);
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return WIN_COLOR_DEPTH_B8G8R8A8;
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}
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static bool tegra_dc_format_is_yuv(unsigned int format, bool *planar)
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{
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switch (format) {
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case WIN_COLOR_DEPTH_YCbCr422:
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case WIN_COLOR_DEPTH_YUV422:
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if (planar)
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*planar = false;
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return true;
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case WIN_COLOR_DEPTH_YCbCr420P:
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case WIN_COLOR_DEPTH_YUV420P:
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case WIN_COLOR_DEPTH_YCbCr422P:
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case WIN_COLOR_DEPTH_YUV422P:
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case WIN_COLOR_DEPTH_YCbCr422R:
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case WIN_COLOR_DEPTH_YUV422R:
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case WIN_COLOR_DEPTH_YCbCr422RA:
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case WIN_COLOR_DEPTH_YUV422RA:
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if (planar)
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*planar = true;
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return true;
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}
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return false;
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}
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static inline u32 compute_dda_inc(unsigned int in, unsigned int out, bool v,
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unsigned int bpp)
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{
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fixed20_12 outf = dfixed_init(out);
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fixed20_12 inf = dfixed_init(in);
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u32 dda_inc;
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int max;
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if (v)
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max = 15;
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else {
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switch (bpp) {
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case 2:
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max = 8;
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break;
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default:
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WARN_ON_ONCE(1);
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/* fallthrough */
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case 4:
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max = 4;
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break;
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}
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}
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outf.full = max_t(u32, outf.full - dfixed_const(1), dfixed_const(1));
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inf.full -= dfixed_const(1);
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dda_inc = dfixed_div(inf, outf);
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dda_inc = min_t(u32, dda_inc, dfixed_const(max));
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return dda_inc;
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}
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static inline u32 compute_initial_dda(unsigned int in)
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{
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fixed20_12 inf = dfixed_init(in);
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return dfixed_frac(inf);
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}
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static int tegra_dc_setup_window(struct tegra_dc *dc, unsigned int index,
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const struct tegra_dc_window *window)
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{
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unsigned h_offset, v_offset, h_size, v_size, h_dda, v_dda, bpp;
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unsigned long value;
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bool yuv, planar;
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/*
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* For YUV planar modes, the number of bytes per pixel takes into
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* account only the luma component and therefore is 1.
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*/
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yuv = tegra_dc_format_is_yuv(window->format, &planar);
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if (!yuv)
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bpp = window->bits_per_pixel / 8;
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else
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bpp = planar ? 1 : 2;
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value = WINDOW_A_SELECT << index;
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tegra_dc_writel(dc, value, DC_CMD_DISPLAY_WINDOW_HEADER);
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tegra_dc_writel(dc, window->format, DC_WIN_COLOR_DEPTH);
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tegra_dc_writel(dc, window->swap, DC_WIN_BYTE_SWAP);
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value = V_POSITION(window->dst.y) | H_POSITION(window->dst.x);
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tegra_dc_writel(dc, value, DC_WIN_POSITION);
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value = V_SIZE(window->dst.h) | H_SIZE(window->dst.w);
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tegra_dc_writel(dc, value, DC_WIN_SIZE);
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h_offset = window->src.x * bpp;
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v_offset = window->src.y;
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h_size = window->src.w * bpp;
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v_size = window->src.h;
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value = V_PRESCALED_SIZE(v_size) | H_PRESCALED_SIZE(h_size);
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tegra_dc_writel(dc, value, DC_WIN_PRESCALED_SIZE);
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/*
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* For DDA computations the number of bytes per pixel for YUV planar
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* modes needs to take into account all Y, U and V components.
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*/
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if (yuv && planar)
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bpp = 2;
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h_dda = compute_dda_inc(window->src.w, window->dst.w, false, bpp);
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v_dda = compute_dda_inc(window->src.h, window->dst.h, true, bpp);
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value = V_DDA_INC(v_dda) | H_DDA_INC(h_dda);
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tegra_dc_writel(dc, value, DC_WIN_DDA_INC);
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h_dda = compute_initial_dda(window->src.x);
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v_dda = compute_initial_dda(window->src.y);
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tegra_dc_writel(dc, h_dda, DC_WIN_H_INITIAL_DDA);
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tegra_dc_writel(dc, v_dda, DC_WIN_V_INITIAL_DDA);
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tegra_dc_writel(dc, 0, DC_WIN_UV_BUF_STRIDE);
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tegra_dc_writel(dc, 0, DC_WIN_BUF_STRIDE);
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tegra_dc_writel(dc, window->base[0], DC_WINBUF_START_ADDR);
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if (yuv && planar) {
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tegra_dc_writel(dc, window->base[1], DC_WINBUF_START_ADDR_U);
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tegra_dc_writel(dc, window->base[2], DC_WINBUF_START_ADDR_V);
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value = window->stride[1] << 16 | window->stride[0];
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tegra_dc_writel(dc, value, DC_WIN_LINE_STRIDE);
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} else {
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tegra_dc_writel(dc, window->stride[0], DC_WIN_LINE_STRIDE);
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}
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if (window->bottom_up)
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v_offset += window->src.h - 1;
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tegra_dc_writel(dc, h_offset, DC_WINBUF_ADDR_H_OFFSET);
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tegra_dc_writel(dc, v_offset, DC_WINBUF_ADDR_V_OFFSET);
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if (window->tiled) {
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value = DC_WIN_BUFFER_ADDR_MODE_TILE_UV |
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DC_WIN_BUFFER_ADDR_MODE_TILE;
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} else {
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value = DC_WIN_BUFFER_ADDR_MODE_LINEAR_UV |
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DC_WIN_BUFFER_ADDR_MODE_LINEAR;
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}
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tegra_dc_writel(dc, value, DC_WIN_BUFFER_ADDR_MODE);
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value = WIN_ENABLE;
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if (yuv) {
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/* setup default colorspace conversion coefficients */
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tegra_dc_writel(dc, 0x00f0, DC_WIN_CSC_YOF);
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tegra_dc_writel(dc, 0x012a, DC_WIN_CSC_KYRGB);
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tegra_dc_writel(dc, 0x0000, DC_WIN_CSC_KUR);
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tegra_dc_writel(dc, 0x0198, DC_WIN_CSC_KVR);
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tegra_dc_writel(dc, 0x039b, DC_WIN_CSC_KUG);
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tegra_dc_writel(dc, 0x032f, DC_WIN_CSC_KVG);
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tegra_dc_writel(dc, 0x0204, DC_WIN_CSC_KUB);
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tegra_dc_writel(dc, 0x0000, DC_WIN_CSC_KVB);
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value |= CSC_ENABLE;
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} else if (window->bits_per_pixel < 24) {
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value |= COLOR_EXPAND;
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}
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if (window->bottom_up)
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value |= V_DIRECTION;
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tegra_dc_writel(dc, value, DC_WIN_WIN_OPTIONS);
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/*
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* Disable blending and assume Window A is the bottom-most window,
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* Window C is the top-most window and Window B is in the middle.
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*/
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tegra_dc_writel(dc, 0xffff00, DC_WIN_BLEND_NOKEY);
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tegra_dc_writel(dc, 0xffff00, DC_WIN_BLEND_1WIN);
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switch (index) {
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case 0:
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tegra_dc_writel(dc, 0x000000, DC_WIN_BLEND_2WIN_X);
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tegra_dc_writel(dc, 0x000000, DC_WIN_BLEND_2WIN_Y);
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tegra_dc_writel(dc, 0x000000, DC_WIN_BLEND_3WIN_XY);
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break;
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case 1:
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tegra_dc_writel(dc, 0xffff00, DC_WIN_BLEND_2WIN_X);
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tegra_dc_writel(dc, 0x000000, DC_WIN_BLEND_2WIN_Y);
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tegra_dc_writel(dc, 0x000000, DC_WIN_BLEND_3WIN_XY);
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break;
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case 2:
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tegra_dc_writel(dc, 0xffff00, DC_WIN_BLEND_2WIN_X);
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tegra_dc_writel(dc, 0xffff00, DC_WIN_BLEND_2WIN_Y);
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tegra_dc_writel(dc, 0xffff00, DC_WIN_BLEND_3WIN_XY);
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break;
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}
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tegra_dc_writel(dc, WIN_A_UPDATE << index, DC_CMD_STATE_CONTROL);
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tegra_dc_writel(dc, WIN_A_ACT_REQ << index, DC_CMD_STATE_CONTROL);
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return 0;
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}
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static int tegra_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
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struct drm_framebuffer *fb, int crtc_x,
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int crtc_y, unsigned int crtc_w,
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@ -338,46 +586,6 @@ static bool tegra_crtc_mode_fixup(struct drm_crtc *crtc,
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return true;
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}
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static inline u32 compute_dda_inc(unsigned int in, unsigned int out, bool v,
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unsigned int bpp)
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{
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fixed20_12 outf = dfixed_init(out);
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fixed20_12 inf = dfixed_init(in);
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u32 dda_inc;
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int max;
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if (v)
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max = 15;
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else {
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switch (bpp) {
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case 2:
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max = 8;
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break;
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default:
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WARN_ON_ONCE(1);
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/* fallthrough */
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case 4:
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max = 4;
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break;
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}
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}
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outf.full = max_t(u32, outf.full - dfixed_const(1), dfixed_const(1));
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inf.full -= dfixed_const(1);
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dda_inc = dfixed_div(inf, outf);
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dda_inc = min_t(u32, dda_inc, dfixed_const(max));
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return dda_inc;
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}
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static inline u32 compute_initial_dda(unsigned int in)
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{
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fixed20_12 inf = dfixed_init(in);
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return dfixed_frac(inf);
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}
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static int tegra_dc_set_timings(struct tegra_dc *dc,
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struct drm_display_mode *mode)
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{
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@ -446,214 +654,6 @@ static int tegra_crtc_setup_clk(struct drm_crtc *crtc,
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return 0;
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}
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static bool tegra_dc_format_is_yuv(unsigned int format, bool *planar)
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{
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switch (format) {
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case WIN_COLOR_DEPTH_YCbCr422:
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case WIN_COLOR_DEPTH_YUV422:
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if (planar)
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*planar = false;
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return true;
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case WIN_COLOR_DEPTH_YCbCr420P:
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case WIN_COLOR_DEPTH_YUV420P:
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case WIN_COLOR_DEPTH_YCbCr422P:
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case WIN_COLOR_DEPTH_YUV422P:
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case WIN_COLOR_DEPTH_YCbCr422R:
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case WIN_COLOR_DEPTH_YUV422R:
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case WIN_COLOR_DEPTH_YCbCr422RA:
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case WIN_COLOR_DEPTH_YUV422RA:
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if (planar)
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*planar = true;
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return true;
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}
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return false;
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}
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int tegra_dc_setup_window(struct tegra_dc *dc, unsigned int index,
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const struct tegra_dc_window *window)
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{
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unsigned h_offset, v_offset, h_size, v_size, h_dda, v_dda, bpp;
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unsigned long value;
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bool yuv, planar;
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/*
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* For YUV planar modes, the number of bytes per pixel takes into
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* account only the luma component and therefore is 1.
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*/
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yuv = tegra_dc_format_is_yuv(window->format, &planar);
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if (!yuv)
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bpp = window->bits_per_pixel / 8;
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else
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bpp = planar ? 1 : 2;
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value = WINDOW_A_SELECT << index;
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tegra_dc_writel(dc, value, DC_CMD_DISPLAY_WINDOW_HEADER);
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tegra_dc_writel(dc, window->format, DC_WIN_COLOR_DEPTH);
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tegra_dc_writel(dc, window->swap, DC_WIN_BYTE_SWAP);
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value = V_POSITION(window->dst.y) | H_POSITION(window->dst.x);
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tegra_dc_writel(dc, value, DC_WIN_POSITION);
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value = V_SIZE(window->dst.h) | H_SIZE(window->dst.w);
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tegra_dc_writel(dc, value, DC_WIN_SIZE);
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h_offset = window->src.x * bpp;
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v_offset = window->src.y;
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h_size = window->src.w * bpp;
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v_size = window->src.h;
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value = V_PRESCALED_SIZE(v_size) | H_PRESCALED_SIZE(h_size);
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tegra_dc_writel(dc, value, DC_WIN_PRESCALED_SIZE);
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/*
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* For DDA computations the number of bytes per pixel for YUV planar
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* modes needs to take into account all Y, U and V components.
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*/
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if (yuv && planar)
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bpp = 2;
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h_dda = compute_dda_inc(window->src.w, window->dst.w, false, bpp);
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v_dda = compute_dda_inc(window->src.h, window->dst.h, true, bpp);
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value = V_DDA_INC(v_dda) | H_DDA_INC(h_dda);
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tegra_dc_writel(dc, value, DC_WIN_DDA_INC);
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h_dda = compute_initial_dda(window->src.x);
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v_dda = compute_initial_dda(window->src.y);
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tegra_dc_writel(dc, h_dda, DC_WIN_H_INITIAL_DDA);
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tegra_dc_writel(dc, v_dda, DC_WIN_V_INITIAL_DDA);
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tegra_dc_writel(dc, 0, DC_WIN_UV_BUF_STRIDE);
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tegra_dc_writel(dc, 0, DC_WIN_BUF_STRIDE);
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tegra_dc_writel(dc, window->base[0], DC_WINBUF_START_ADDR);
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if (yuv && planar) {
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tegra_dc_writel(dc, window->base[1], DC_WINBUF_START_ADDR_U);
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tegra_dc_writel(dc, window->base[2], DC_WINBUF_START_ADDR_V);
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value = window->stride[1] << 16 | window->stride[0];
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tegra_dc_writel(dc, value, DC_WIN_LINE_STRIDE);
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} else {
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tegra_dc_writel(dc, window->stride[0], DC_WIN_LINE_STRIDE);
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}
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if (window->bottom_up)
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v_offset += window->src.h - 1;
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tegra_dc_writel(dc, h_offset, DC_WINBUF_ADDR_H_OFFSET);
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tegra_dc_writel(dc, v_offset, DC_WINBUF_ADDR_V_OFFSET);
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if (window->tiled) {
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value = DC_WIN_BUFFER_ADDR_MODE_TILE_UV |
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DC_WIN_BUFFER_ADDR_MODE_TILE;
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} else {
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value = DC_WIN_BUFFER_ADDR_MODE_LINEAR_UV |
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DC_WIN_BUFFER_ADDR_MODE_LINEAR;
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}
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tegra_dc_writel(dc, value, DC_WIN_BUFFER_ADDR_MODE);
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value = WIN_ENABLE;
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if (yuv) {
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/* setup default colorspace conversion coefficients */
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tegra_dc_writel(dc, 0x00f0, DC_WIN_CSC_YOF);
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tegra_dc_writel(dc, 0x012a, DC_WIN_CSC_KYRGB);
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tegra_dc_writel(dc, 0x0000, DC_WIN_CSC_KUR);
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tegra_dc_writel(dc, 0x0198, DC_WIN_CSC_KVR);
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tegra_dc_writel(dc, 0x039b, DC_WIN_CSC_KUG);
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tegra_dc_writel(dc, 0x032f, DC_WIN_CSC_KVG);
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tegra_dc_writel(dc, 0x0204, DC_WIN_CSC_KUB);
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tegra_dc_writel(dc, 0x0000, DC_WIN_CSC_KVB);
|
||||
|
||||
value |= CSC_ENABLE;
|
||||
} else if (window->bits_per_pixel < 24) {
|
||||
value |= COLOR_EXPAND;
|
||||
}
|
||||
|
||||
if (window->bottom_up)
|
||||
value |= V_DIRECTION;
|
||||
|
||||
tegra_dc_writel(dc, value, DC_WIN_WIN_OPTIONS);
|
||||
|
||||
/*
|
||||
* Disable blending and assume Window A is the bottom-most window,
|
||||
* Window C is the top-most window and Window B is in the middle.
|
||||
*/
|
||||
tegra_dc_writel(dc, 0xffff00, DC_WIN_BLEND_NOKEY);
|
||||
tegra_dc_writel(dc, 0xffff00, DC_WIN_BLEND_1WIN);
|
||||
|
||||
switch (index) {
|
||||
case 0:
|
||||
tegra_dc_writel(dc, 0x000000, DC_WIN_BLEND_2WIN_X);
|
||||
tegra_dc_writel(dc, 0x000000, DC_WIN_BLEND_2WIN_Y);
|
||||
tegra_dc_writel(dc, 0x000000, DC_WIN_BLEND_3WIN_XY);
|
||||
break;
|
||||
|
||||
case 1:
|
||||
tegra_dc_writel(dc, 0xffff00, DC_WIN_BLEND_2WIN_X);
|
||||
tegra_dc_writel(dc, 0x000000, DC_WIN_BLEND_2WIN_Y);
|
||||
tegra_dc_writel(dc, 0x000000, DC_WIN_BLEND_3WIN_XY);
|
||||
break;
|
||||
|
||||
case 2:
|
||||
tegra_dc_writel(dc, 0xffff00, DC_WIN_BLEND_2WIN_X);
|
||||
tegra_dc_writel(dc, 0xffff00, DC_WIN_BLEND_2WIN_Y);
|
||||
tegra_dc_writel(dc, 0xffff00, DC_WIN_BLEND_3WIN_XY);
|
||||
break;
|
||||
}
|
||||
|
||||
tegra_dc_writel(dc, WIN_A_UPDATE << index, DC_CMD_STATE_CONTROL);
|
||||
tegra_dc_writel(dc, WIN_A_ACT_REQ << index, DC_CMD_STATE_CONTROL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
unsigned int tegra_dc_format(uint32_t format, uint32_t *swap)
|
||||
{
|
||||
/* assume no swapping of fetched data */
|
||||
if (swap)
|
||||
*swap = BYTE_SWAP_NOSWAP;
|
||||
|
||||
switch (format) {
|
||||
case DRM_FORMAT_XBGR8888:
|
||||
return WIN_COLOR_DEPTH_R8G8B8A8;
|
||||
|
||||
case DRM_FORMAT_XRGB8888:
|
||||
return WIN_COLOR_DEPTH_B8G8R8A8;
|
||||
|
||||
case DRM_FORMAT_RGB565:
|
||||
return WIN_COLOR_DEPTH_B5G6R5;
|
||||
|
||||
case DRM_FORMAT_UYVY:
|
||||
return WIN_COLOR_DEPTH_YCbCr422;
|
||||
|
||||
case DRM_FORMAT_YUYV:
|
||||
if (swap)
|
||||
*swap = BYTE_SWAP_SWAP2;
|
||||
|
||||
return WIN_COLOR_DEPTH_YCbCr422;
|
||||
|
||||
case DRM_FORMAT_YUV420:
|
||||
return WIN_COLOR_DEPTH_YCbCr420P;
|
||||
|
||||
case DRM_FORMAT_YUV422:
|
||||
return WIN_COLOR_DEPTH_YCbCr422P;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
WARN(1, "unsupported pixel format %u, using default\n", format);
|
||||
return WIN_COLOR_DEPTH_B8G8R8A8;
|
||||
}
|
||||
|
||||
static int tegra_crtc_mode_set(struct drm_crtc *crtc,
|
||||
struct drm_display_mode *mode,
|
||||
struct drm_display_mode *adjusted,
|
||||
|
||||
@ -164,9 +164,6 @@ struct tegra_dc_window {
|
||||
};
|
||||
|
||||
/* from dc.c */
|
||||
unsigned int tegra_dc_format(uint32_t format, unsigned int *swap);
|
||||
int tegra_dc_setup_window(struct tegra_dc *dc, unsigned int index,
|
||||
const struct tegra_dc_window *window);
|
||||
void tegra_dc_enable_vblank(struct tegra_dc *dc);
|
||||
void tegra_dc_disable_vblank(struct tegra_dc *dc);
|
||||
void tegra_dc_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user