Add device tree binding for the BCM6345 interrupt controller.
This controller is similar to the SMP-capable BCM7038 and
the BCM3380 but with packed interrupt registers.
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11804/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Document the devicetree bindings for the UART peripheral found on
Microchip PIC32 class devices.
Signed-off-by: Andrei Pistirica <andrei.pistirica@microchip.com>
Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12100/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Add irq_chip support for both IPI and "normal" interrupts of the CIU3
controller. Document the device tree binding for the CIU3.
Some functions are non-static as they will be used by follow-on
support for MSI-X.
Signed-off-by: David Daney <david.daney@cavium.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: devicetree@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12500/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Some definitions to support the PCM5102A codec
by Texas Instruments.
Signed-off-by: Florian Meier <florian.meier@koalo.de>
Changes to original patch by Florian Meier:
* rebased (Makefile and Kconfig
* fixed checkpath errors (spaces, newlines)
* added dt-binding documentation
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
This patch updates the device-tree binding doc for
adding support for AXI CDMA.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This patch updates the device-tree binding doc for
adding support for AXI DMA.
Also this patch differentiates required properties b/w
DMA and VDMA.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This is the first NFC pull request for 4.7. With this one we
mainly have:
- Support for NXP's pn532 NFC chipset. The pn532 is based on the same
microcontroller as the pn533, but it talks to the host through i2c
instead of USB. By separating the pn533 driver into core and PHY
parts, we can not add the i2c layer and support the pn532 chipset.
- Support for NCI's loopback mode. This is a testing mode where each
packet received by the NFCC is sent back to the DH, allowing the
host to test that the controller can receive and send data.
- A few ACPI related fixes for the STMicro drivers, in order to match
the device tree naming scheme.
- A bunch of cleanups for the st-nci and the st21nfca STMicro drivers.
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Merge tag 'nfc-next-4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/nfc-next
Samuel Ortiz says:
====================
NFC 4.7 pull request
This is the first NFC pull request for 4.7. With this one we
mainly have:
- Support for NXP's pn532 NFC chipset. The pn532 is based on the same
microcontroller as the pn533, but it talks to the host through i2c
instead of USB. By separating the pn533 driver into core and PHY
parts, we can not add the i2c layer and support the pn532 chipset.
- Support for NCI's loopback mode. This is a testing mode where each
packet received by the NFCC is sent back to the DH, allowing the
host to test that the controller can receive and send data.
- A few ACPI related fixes for the STMicro drivers, in order to match
the device tree naming scheme.
- A bunch of cleanups for the st-nci and the st21nfca STMicro drivers.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Resetting the switch is something the driver does, not the framework.
So move the parsing of this property into the driver.
There are no in kernel users of this property, so moving it does not
break anything. There is however a board which will make use of this
property making its way into the kernel.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Allow Marvell switches to be mdio devices. Currently the driver just
allocate the private structure and detects what device is on the
bus. Later patches will make them register with the DSA framework.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
- New board support of LS1043a-QDS from Freescale/NXP
- Add new compatible for LS1043A and LS2080A GPIO devices
- Update device tree bindings and sources for LS2080A fsl-mc device
- Update QSPI and DSPI support on LS1043A and LS2080A
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Merge tag 'imx-dt64-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64
Merge "The Freescale/NXP arm64 device tree updates for 4.7" from Shawn Guo:
- New board support of LS1043a-QDS from Freescale/NXP
- Add new compatible for LS1043A and LS2080A GPIO devices
- Update device tree bindings and sources for LS2080A fsl-mc device
- Update QSPI and DSPI support on LS1043A and LS2080A
* tag 'imx-dt64-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: ls2080a: fsl-mc dt node updates
Documentation: fsl-mc: binding updates for MSIs, ranges, PHYs
arm64: dts: ls1043a: add the DTS node for QSPI support
Documentation: fsl-quadspi: Add fsl,ls1043a-qspi compatible string
arm64: dts: ls2080a: Add compatible "fsl,ls2080a-gpio" for ls2080a gpio nodes
arm64: dts: ls1043a: Add compatible "fsl,qoriq-gpio" for ls1043a gpio nodes
arm64: dts: ls2080a: update the DTS for QSPI and DSPI support
Documentation: fsl: dspi: Add fsl,ls2080a-dspi compatible string
arm64: dts: ls1043a-rdb: add the DTS for DSPI support
arm64: dts: add LS1043a-QDS board support
Documentation: DT: Add entry for Freescale LS1043a-QDS board
Complement the GM20B GPU device tree node on Tegra210 with missing
properties to make it usable.
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Merge tag 'tegra-for-4.7-gm20b' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64
Merge "arm64: tegra: Enable GM20B GPU on Tegra210" from Thierry Reding:
Complement the GM20B GPU device tree node on Tegra210 with missing
properties to make it usable.
* tag 'tegra-for-4.7-gm20b' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Add IOMMU node to GM20B on Tegra210
arm64: tegra: Add reference clock to GM20B on Tegra210
dt-bindings: Add documentation for GM20B GPU
dt-bindings: gk20a: Document iommus property
dt-bindings: gk20a: Fix typo in compatible name
Adds device tree bindings for the GPIO and AON controllers found on the
Tegra186 SoC.
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Merge tag 'tegra-for-4.7-gpio' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64
Merge "dt-bindings: gpio: tegra: Add Tegra186 support" from Thierry Reding:
Adds device tree bindings for the GPIO and AON controllers found on the
Tegra186 SoC.
* tag 'tegra-for-4.7-gpio' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Add DT binding for Tegra186 GPIO controllers
ARM: tegra: Fix naming in GPIO DT binding header
- switch to label in the mvebu arm64 device tree
- use new clock binding on Armada 7K/8K
- improve SPI and I2C description on Armada 7K/8k
- add CP110 block adding PCIe, SATA and USB3
- add XOR support on Armada 3700
- few more little fix
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Merge tag 'mvebu-dt64-4.7-1' of git://git.infradead.org/linux-mvebu into next/dt64
Merge "mvebu dt64 for 4.7" from Gregory CLEMENT:
- switch to label in the mvebu arm64 device tree
- use new clock binding on Armada 7K/8K
- improve SPI and I2C description on Armada 7K/8k
- add CP110 block adding PCIe, SATA and USB3
- add XOR support on Armada 3700
- few more little fix
* tag 'mvebu-dt64-4.7-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: add XOR node for Armada 3700 SoC
arm64: dts: marvell: Use a SoC-specific compatible for xHCI on Armada37xx
arm64: dts: marvell: Rename armada-37xx USB node
arm64: dts: marvell: Clean up armada-3720-db
arm64: dts: marvell: enable several CP interfaces on Armada 7040-DB
arm64: dts: marvell: initial DT description of Armada 7K/8K CP110 master
arm64: dts: marvell: use the proper I2C controller compatible string for 7K/8K
arm64: dts: marvell: improve SPI flash description on Armada 7040-DB
arm64: dts: marvell: use new clock binding on Armada AP806
arm64: dts: marvell: add UART aliases and define stdout-path
arm64: dts: marvell: rename armada-ap806 XOR nodes
arm64: dts: marvell: clean up armada-7040-db
dts for the evaluation board of this chip and similar to the arm32
side also move the rk3368 thermal data into the core soc dtsi, as
there really is no need to keep it separate.
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Merge tag 'v4.7-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64
Merge "Rockchip dts64 updates for v4.7 - part2" from Heiko Stübner:
Adding the new rk3399 core devicetree support as well as a board
dts for the evaluation board of this chip and similar to the arm32
side also move the rk3368 thermal data into the core soc dtsi, as
there really is no need to keep it separate.
* tag 'v4.7-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
dt-bindings: document rockchip rk3399-evb board
arm64: dts: rockchip: add dts file for RK3399 evaluation board
arm64: dts: rockchip: add core dtsi file for RK3399 SoCs
dt-bindings: rockchip-dw-mshc: add description for rk3399
clk: rockchip: export some necessary rk3399 clock ids
clk: rockchip: rename rga clock-id on rk3399
clk: rockchip: add general gpu soft-reset on rk3399
arm64: dts: rockchip: move the rk3368 thermal data into rk3368.dtsi
clk: rockchip: fix checkpatch errors in rk3399 dt-binding header
clk: rockchip: add dt-binding header for rk3399
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Merge tag 'aspeed-for-4.7-dts' of https://github.com/shenki/linux into next/dt
Merge "aspeed devicetree for 4.7" from Joel Stanley:
This device trees for a pair of Aspeed BMC SoCs and the boards that
they sit in.
* tag 'aspeed-for-4.7-dts' of https://github.com/shenki/linux:
arm/dst: Add Aspeed ast2500 device tree
arm/dts: Add Aspeed ast2400 device tree
doc/devicetree: Add Aspeed and Tyan to vendor-prefixes
to the binding-change that made it into 4.6, adds rk3288 i2c controller
nodes and moves the rk3288 thermal data into the soc dtsi, as there
really is no need to have that separate file.
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Merge tag 'v4.7-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Merge "Rockchip dts32 updates for v4.7 - part2" from Heiko Stübner:
This adds the rk3288-miqi as new board, adapts the edp-phy settings
to the binding-change that made it into 4.6, adds rk3288 i2c controller
nodes and moves the rk3288 thermal data into the soc dtsi, as there
really is no need to have that separate file.
* tag 'v4.7-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: move the rk3288 thermal data into rk3288.dtsi
ARM: dts: rockchip: add MiQi board from mqmaker
dt-bindings: add vendor-prefix for mqmaker
ARM: dts: rockchip: move rk3288 edp phy under the GRF
ARM: dts: rockchip: make rk3288-grf a simple-mfd
ARM: dts: rockchip: add i2c nodes for RK3228 SoCs
This patch adds the device tree bindings for the Western Digital's
MyBook Live memory-mapped GPIO controllers.
The gpios will be supported by gpio-mmio code of the
GPIO generic library.
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Make it possible to name the producer side of a GPIO line using
a "gpio-line-names" property array, modeled on the
"clock-output-names" property from the clock bindings.
This naming is especially useful for:
- Debugging: lines are named after function, not just opaque
offset numbers.
- Exploration: systems where some or all GPIO lines are available
to end users, such as prototyping, one-off's "makerspace usecases"
users are helped by the names of the GPIO lines when tinkering.
This usecase has been surfacing recently.
The gpio-line-names attribute is completely optional.
Example output from lsgpio on a patched Snowball tree:
GPIO chip: gpiochip6, "8000e180.gpio", 32 GPIO lines
line 0: unnamed unused
line 1: "AP_GPIO161" "extkb3" [kernel]
line 2: "AP_GPIO162" "extkb4" [kernel]
line 3: "ACCELEROMETER_INT1_RDY" unused [kernel]
line 4: "ACCELEROMETER_INT2" unused
line 5: "MAG_DRDY" unused [kernel]
line 6: "GYRO_DRDY" unused [kernel]
line 7: "RSTn_MLC" unused
line 8: "RSTn_SLC" unused
line 9: "GYRO_INT" unused
line 10: "UART_WAKE" unused
line 11: "GBF_RESET" unused
line 12: unnamed unused
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Amit Kucheria <amit.kucheria@linaro.org>
Cc: David Mandala <david.mandala@linaro.org>
Cc: Lee Campbell <leecam@google.com>
Cc: devicetree@vger.kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Michael Welling <mwelling@ieee.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
In netdevice.h we removed the structure in net-next that is being
changes in 'net'. In macsec.c and rtnetlink.c we have overlaps
between fixes in 'net' and the u64 attribute changes in 'net-next'.
The mlx5 conflicts have to do with vxlan support dependencies.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Merge tag 'v4.6-rc7' into patchwork
Linux 4.6-rc7
* tag 'v4.6-rc7': (185 commits)
Linux 4.6-rc7
parisc: fix a bug when syscall number of tracee is __NR_Linux_syscalls
x86/tsc: Read all ratio bits from MSR_PLATFORM_INFO
mailmap: add John Paul Adrian Glaubitz
byteswap: try to avoid __builtin_constant_p gcc bug
lib/stackdepot: avoid to return 0 handle
mm: fix kcompactd hang during memory offlining
modpost: fix module autoloading for OF devices with generic compatible property
proc: prevent accessing /proc/<PID>/environ until it's ready
mm/zswap: provide unique zpool name
mm: thp: kvm: fix memory corruption in KVM with THP enabled
MAINTAINERS: fix Rajendra Nayak's address
mm, cma: prevent nr_isolated_* counters from going negative
mm: update min_free_kbytes from khugepaged after core initialization
huge pagecache: mmap_sem is unlocked when truncation splits pmd
rapidio/mport_cdev: fix uapi type definitions
mm: memcontrol: let v2 cgroups follow changes in system swappiness
mm: thp: correct split_huge_pages file permission
maintainers: update rmk's email address(es)
writeback: Fix performance regression in wb_over_bg_thresh()
...
The MAXIM PMIC MAX77620 and MAX20024 are power management IC
which supports RTC, GPIO, DCDC/LDO regulators, interrupt,
watchdog etc.
Add DT binding document for the different functionality of
this device.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Implements generic PM domain support on top of the existing Tegra power-
gate API. Drivers are thus allowed to move away from the Tegra-specific
API and towards using generic power domains directly.
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Merge tag 'tegra-for-4.7-genpd' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Merge "soc/tegra: Add generic PM domain support" from Thierry Reding:
Implements generic PM domain support on top of the existing Tegra power-
gate API. Drivers are thus allowed to move away from the Tegra-specific
API and towards using generic power domains directly.
* tag 'tegra-for-4.7-genpd' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Add generic PM domain support
dt-bindings: Add power domain info for NVIDIA PMC
This set of patches introduces a driver for the XUSB controller found on
NVIDIA Tegra SoCs. When loaded with a firmware (available via the linux-
firmware repository), it provides an XHCI-compatible interface.
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Merge tag 'tegra-for-4.7-xhci' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Merge "usb: host: xhci-tegra: Changes for v4.7-rc1" from Thierry Reding:
This set of patches introduces a driver for the XUSB controller found on
NVIDIA Tegra SoCs. When loaded with a firmware (available via the linux-
firmware repository), it provides an XHCI-compatible interface.
* tag 'tegra-for-4.7-xhci' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
usb: xhci: tegra: Add Tegra210 support
usb: xhci: Add NVIDIA Tegra XUSB controller driver
dt-bindings: usb: xhci-tegra: Add Tegra210 XUSB controller support
dt-bindings: usb: Add NVIDIA Tegra XUSB controller binding
These patches update the Tegra PCIe host bridge controller device tree
bindings and driver to cope with per-lane PHYs on Tegra124 and later.
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Merge tag 'tegra-for-4.7-pci' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Merge "PCI: tegra: Changes for v4.7-rc1" from Thierry Reding:
These patches update the Tegra PCIe host bridge controller device tree
bindings and driver to cope with per-lane PHYs on Tegra124 and later.
* tag 'tegra-for-4.7-pci' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
PCI: tegra: Support per-lane PHYs
dt-bindings: pci: tegra: Update for per-lane PHYs
This set of patches adds support for the Tegra XUSB pad controller. The
controller provides a set of pads (lanes) that are used for I/O by other
IP blocks within Tegra SoCs (PCIe, SATA and XUSB).
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Merge tag 'tegra-for-4.7-phy' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Merge "phy: tegra: Changes for v4.7-rc1" from Thierry Reding:
This set of patches adds support for the Tegra XUSB pad controller. The
controller provides a set of pads (lanes) that are used for I/O by other
IP blocks within Tegra SoCs (PCIe, SATA and XUSB).
* tag 'tegra-for-4.7-phy' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
phy: tegra: Add Tegra210 support
phy: Add Tegra XUSB pad controller support
dt-bindings: phy: tegra-xusb-padctl: Add Tegra210 support
dt-bindings: phy: Add NVIDIA Tegra XUSB pad controller binding
phy: core: Allow children node to be overridden
clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs
settings that get lost and reset on power-domain power cycles.
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Merge tag 'v4.7-rockchip-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers
Merge "Rockchip driver updates for v4.7 - part2" from Heiko Stübner:
Ability to save and restore the power-domain quality of service
settings that get lost and reset on power-domain power cycles.
* tag 'v4.7-rockchip-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
soc: rockchip: power-domain: support qos save and restore
dt-bindings: modify document of Rockchip power domains
Johan Hedberg says:
====================
pull request: bluetooth-next 2016-05-07
Here are a few more Bluetooth patches for the 4.7 kernel:
- NULL pointer fix in hci_intel driver
- New Intel Bluetooth controller id in btusb driver
- Added device tree binding documentation for Marvel's bt-sd8xxx
- Platform specific wakeup interrupt support for btmrvl driver
Please let me know if there are any issues pulling. Thanks.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Adding EZchip NPS400 support.
Internal interrupts are handled by Multi Thread Manager (MTM)
Once interrupt is serviced MTM is acked for deactivating the interrupt.
External interrupts are handled by MTM as well as at Global Interrupt
Controller (GIC) e.g. serial and network devices.
Signed-off-by: Noam Camus <noamc@ezchip.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Vineet Gupta <vgupta@synopsys.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Add internal tick generator which is shared by all cores.
Each cluster of cores view it through dedicated address.
This is used for SMP system where all CPUs synced by same
clock source.
Signed-off-by: Noam Camus <noamc@ezchip.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: John Stultz <john.stultz@linaro.org>
Acked-by: Vineet Gupta <vgupta@synopsys.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
ARC Timers have historically been probed directly.
As precursor to start probing Timers thru DT introduce these bindings
Note that to keep series bisectable, these bindings are not yet used in
code.
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: devicetree@vger.kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Pull libata fixes from Tejun Heo:
"An ahci driver addition and updates to ahci port enable handling for
some platform devices"
* 'for-4.6-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata:
ata: add AMD Seattle platform driver
ARM: dts: apq8064: add ahci ports-implemented mask
ata: ahci-platform: Add ports-implemented DT bindings.
libahci: save port map for forced port map
Add entries for all supported chip variants into the of_match list, so that
the matching driver_info can be selected when using dt.
Signed-off-by: Julian Scheel <julian@jusst.de>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Add device tree binding documentation for the adv7180 video decoder family.
Signed-off-by: Julian Scheel <julian@jusst.de>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Calling a GPIO LEDs is quite likely to work even if the kernel
has paniced, so they are ideal to blink in this situation.
This commit adds support for the new "panic-indicator"
firmware property, allowing to mark a given LED to blink on
a kernel panic.
Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com>
It's desirable to specify which LEDs are to be blinked on a kernel
panic. Therefore, introduce a devicetree boolean property to mark
which LEDs should be treated this way, if possible.
Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Acked-by: Rob Herring <rob@kernel.org>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com>
Document the DT bindings for controlling ARM PL310 Power Control
settings.
Discussion on the binding wording:
http://archive.arm.linux.org.uk/lurker/message/20160427.143444.5141d302.en.html
Signed-off-by: Brad Mouring <brad.mouring@ni.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
On mx6ul the General Purpose Register 1 (GPR1) contains the following
bits for configuring the direction of the SAI MCLKs:
SAI1_MCLK_DIR, SAI2_MCLK_DIR, SAI3_MCLK_DIR
Introduce the "fsl,sai-mclk-direction-output" optional property to allow
configuring the SAI_MCLK outputs.
Tested on a imx6ul-evk board.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
MX6UL may need to configure the General Purpose Register 1 (GPR1), so
it is better to add a new compatible string to differentiate.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Some Layerscape SoCs use a simple MSI controller implementation.
It contains only two SCFG register to trigger and describe a
group 32 MSI interrupts. The patch adds bindings to describe
the controller.
Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Conflicts:
net/ipv4/ip_gre.c
Minor conflicts between tunnel bug fixes in net and
ipv6 tunnel cleanups in net-next.
Signed-off-by: David S. Miller <davem@davemloft.net>
Due to erratum #27704, the CN88xx SMMUv2 implementation supports only
shared ASID and VMID numberspaces.
This patch ensures that ASID and VMIDs are unique across all SMMU
instances on affected Cavium systems.
Signed-off-by: Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com>
Signed-off-by: Akula Geethasowjanya <Geethasowjanya.Akula@caviumnetworks.com>
[will: commit message, comments and formatting]
Signed-off-by: Will Deacon <will.deacon@arm.com>
Armada 3700 SoC comprise a single XOR engine compliant with the ones used
in older Marvell SoC's like Armada XP or 38x. The only thing that needs
modification is the Mbus configuration, which has to be done on two
levels: global and in device. The first one is inherited from the
bootloader. The latter can be opened in a default way, leaving
arbitration to the bus controller. Hence filled mbus_dram_target_info
structure is not needed.
Patch "dmaengine: mv_xor: optimize performance by using a subset
of the XOR channels" introduced limitation for using XOR engines and
channels vs number of available CPU's. Those constraints do not however
fit Armada 3700 architecture with two possible CPU's and single,
dual-channel engine. Hence in this commit an adjustment for setting
maximum available channels is added.
This patch enables XOR access to DRAM by opening default window to 4GB
space with specific attribute.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Major changes:
brcmfmac
* add support for nl80211 BSS_SELECT feature
mwifiex
* add platform specific wakeup interrupt support
ath10k
* implement set_tsf() for 10.2.4 branch
* remove rare MSI range support
* remove deprecated firmware API 1 support
ath9k
* add module parameter to invert LED polarity
wcn36xx
* fixes to get the driver properly working on Dragonboard 410c
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Merge tag 'wireless-drivers-next-for-davem-2016-05-02' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next
Kalle Valo says:
====================
wireless-drivers patches for 4.7
Major changes:
brcmfmac
* add support for nl80211 BSS_SELECT feature
mwifiex
* add platform specific wakeup interrupt support
ath10k
* implement set_tsf() for 10.2.4 branch
* remove rare MSI range support
* remove deprecated firmware API 1 support
ath9k
* add module parameter to invert LED polarity
wcn36xx
* fixes to get the driver properly working on Dragonboard 410c
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
This patch adds the detailed corrleation between sub-blocks and power line
for Exynos5422.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com>
This patch adds NoC (Network on Chip) Probe driver which provides
the primitive values to get the performance data. The packets that the Network
on Chip (NoC) probes detects are transported over the network infrastructure.
Exynos542x bus has multiple NoC probes to provide bandwidth information about
behavior of the SoC that you can use while analyzing system performance.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the detailed correlation between sub-blocks and power line
for Exynos3250, Exynos4210 and Exynos4x12.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch updates the documentation for passive bus devices and adds the
detailed example of Exynos3250.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the documentation for generic exynos bus frequency
driver.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
I.MX6+ has a dedicated bit for resetting PCIe core, which should be used
instead of a regular reset sequence since using the latter will hang the
SoC.
This commit is based on c34068d48273e24d392d9a49a38be807954420ed from
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git
Tested-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Add device tree binding documentation for MARVELL's bluetooth sdio
(sd8897 and sd8997) chip.
Signed-off-by: Xinming Hu <huxm@marvell.com>
Signed-off-by: Amitkumar Karwar <akarwar@marvell.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Pull networking fixes from David Miller:
1) MODULE_FIRMWARE firmware string not correct for iwlwifi 8000 chips,
from Sara Sharon.
2) Fix SKB size checks in batman-adv stack on receive, from Sven
Eckelmann.
3) Leak fix on mac80211 interface add error paths, from Johannes Berg.
4) Cannot invoke napi_disable() with BH disabled in myri10ge driver,
fix from Stanislaw Gruszka.
5) Fix sign extension problem when computing feature masks in
net_gso_ok(), from Marcelo Ricardo Leitner.
6) lan78xx driver doesn't count packets and packet lengths in its
statistics properly, fix from Woojung Huh.
7) Fix the buffer allocation sizes in pegasus USB driver, from Petko
Manolov.
8) Fix refcount overflows in bpf, from Alexei Starovoitov.
9) Unified dst cache handling introduced a preempt warning in
ip_tunnel, fix by resetting rather then setting the cached route.
From Paolo Abeni.
10) Listener hash collision test fix in soreuseport, from Craig Gallak
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (47 commits)
gre: do not pull header in ICMP error processing
net: Implement net_dbg_ratelimited() for CONFIG_DYNAMIC_DEBUG case
tipc: only process unicast on intended node
cxgb3: fix out of bounds read
net/smscx5xx: use the device tree for mac address
soreuseport: Fix TCP listener hash collision
net: l2tp: fix reversed udp6 checksum flags
ip_tunnel: fix preempt warning in ip tunnel creation/updating
samples/bpf: fix trace_output example
bpf: fix check_map_func_compatibility logic
bpf: fix refcnt overflow
drivers: net: cpsw: use of_phy_connect() in fixed-link case
dt: cpsw: phy-handle, phy_id, and fixed-link are mutually exclusive
drivers: net: cpsw: don't ignore phy-mode if phy-handle is used
drivers: net: cpsw: fix segfault in case of bad phy-handle
drivers: net: cpsw: fix parsing of phy-handle DT property in dual_emac config
MAINTAINERS: net: Change maintainer for GRETH 10/100/1G Ethernet MAC device driver
gre: reject GUE and FOU in collect metadata mode
pegasus: fixes reported packet length
pegasus: fixes URB buffer allocation size;
...
Add a decription of the PPI partitioning support.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Will Deacon <will.deacon@arm.com>
Link: http://lkml.kernel.org/r/1460365075-7316-6-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Merge tag 'v4.6-rc6' into patchwork
Linux 4.6-rc6
* tag 'v4.6-rc6': (762 commits)
Linux 4.6-rc6
EDAC: i7core, sb_edac: Don't return NOTIFY_BAD from mce_decoder callback
Documentation/sysctl/vm.txt: update numa_zonelist_order description
lib/stackdepot.c: allow the stack trace hash to be zero
rapidio: fix potential NULL pointer dereference
mm/memory-failure: fix race with compound page split/merge
ocfs2/dlm: return zero if deref_done message is successfully handled
Ananth has moved
kcov: don't profile branches in kcov
kcov: don't trace the code coverage code
mm: wake kcompactd before kswapd's short sleep
.mailmap: add Frank Rowand
mm/hwpoison: fix wrong num_poisoned_pages accounting
mm: call swap_slot_free_notify() with page lock held
mm: vmscan: reclaim highmem zone if buffer_heads is over limit
numa: fix /proc/<pid>/numa_maps for THP
mm/huge_memory: replace VM_NO_THP VM_BUG_ON with actual VMA check
mailmap: fix Krzysztof Kozlowski's misspelled name
thp: keep huge zero page pinned until tlb flush
mm: exclude HugeTLB pages from THP page_mapped() logic
...
There several changes are done here:
- Convert the property to be in bytes
Besides that this is a common practice for such property, the use of a value
in bytes much more convenient than handling the encoded one.
- Rename data_width to data-width in the device tree bindings
The change leaves the support for the old format as well just in case someone
will use a newer kernel with an old device tree blob.
- While here, replace dwc_fast_ffs() by __ffs()
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Add a pinctrl binding to specify different pin settings for high speed
modes and UHS modes.
Signed-off-by: Lars Persson <larper@axis.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Implement voltage switch, supporting modes up to SDR-50.
Based on work by Shinobu Uehara, Rob Taylor, William Towle and Ian Molton.
Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The following patch adds the required match table for device tree support
(and while at, fix the indent). It's also possible to specify the
MAC address in the DT blob.
Also add the corresponding binding documentation file.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
This patch changes property port-id to reg in dsaf port node,
removes property cpld-ctrl-reg, and fixes some typos.
Signed-off-by: Yisen Zhuang <yisen.zhuang@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Extend the Tegra XUSB controller device tree binding with Tegra210
support.
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add device-tree binding documentation for the XUSB controller present
on Tegra124 and later SoCs. This controller supports USB 3.0 via an xHCI
compliant interface.
Based on work by Andrew Bresticker <abrestic@chromium.org>.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Mathias Nyman <mathias.nyman@intel.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The XUSB pad controller allows PCIe lanes to be controlled individually,
providing fine-grained control over their power state. Previous attempts
at describing the XUSB pad controller in DT had erroneously assumed that
all PCIe lanes were driven by the same PHY, and hence the PCI host
controller would reference only a single PHY.
Moving to a representation of per-lane PHYs requires that the operating
system driver for the PCI host controller have access to the set of PHY
devices that make up the connection of each root port in order to power
up and down all of the lanes as necessary.
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Extend the binding to cover the set of feature found in Tegra210.
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The NVIDIA Tegra XUSB pad controller provides a set of pads, each with a
set of lanes that are used for PCIe, SATA and USB.
A binding exists for the XUSB pad controller already, but it turned out
not to be flexible enough to describe all aspects of the controller. In
particular, the addition of XUSB support (for SuperSpeed USB) has shown
that the existing binding is no longer suitable. Mark the old binding
as deprecated and link to the new binding.
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
- Fix few typos for address-cells and interrupt-names
- Update dra7 voltage rail limits
- Update compatible string for pcf8575 for both nxp and ti prefix
- Add omap5 configuration for gpadc
- Update dra7 for qspi to remove pinmux as it needs to be done by
the bootloader in isolation. Also update the qspi for 64MHz
frequency.
- Add support for Baltos ir2110 and ir3220
- Add industrial and commercial grade thermal thresholds for am57xx
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Merge tag 'omap-for-v4.7/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "Part two of device tree changes for omaps for v4.7 merge window" from Tony Lindgren:
- Fix few typos for address-cells and interrupt-names
- Update dra7 voltage rail limits
- Update compatible string for pcf8575 for both nxp and ti prefix
- Add omap5 configuration for gpadc
- Update dra7 for qspi to remove pinmux as it needs to be done by
the bootloader in isolation. Also update the qspi for 64MHz
frequency.
- Add support for Baltos ir2110 and ir3220
- Add industrial and commercial grade thermal thresholds for am57xx
* tag 'omap-for-v4.7/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am57xx-idk: Include Industrial grade thermal thresholds
ARM: dts: am57xx-beagle-x15: Include the commercial grade thresholds
ARM: dts: am57xx: Introduce industrial grade thermal thresholds
ARM: dts: am57xx: Introduce commercial grade thermal thresholds
ARM: dts: add DTS for Baltos IR2110
ARM: dts: add DTS for Baltos IR3220
ARM: dts: split am335x-baltos-ir5221 into dts and dtsi files
ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz
ARM: dts: dra7x: Remove QSPI pinmux
ARM: dts: omap5-board-common: describe gpadc for Palmas
ARM: dts: twl6030: describe gpadc
ARM: dts: dra7xx: Fix compatible string for PCF8575 chip
ARM: dts: AM57xx/DRA7: Update SoC voltage rail limits to match data sheet
ARM: dts: OMAP36xx: : DT spelling s/#address-cell/#address-cells/
ARM: dts: omap5-cm-t54: DT spelling s/interrupt-name/interrupt-names/
ARM: dts: omap5-board-common: DT spelling s/interrupt-name/interrupt-names/
The phy-handle, phy_id, and fixed-link properties are mutually exclusive,
and only one need be specified. Make this clear in the binding doc.
Also mark the phy_id property as deprecated, as phy-handle should be
used instead.
Signed-off-by: David Rivshin <drivshin@allworx.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This moves Samsung SROM controller code from arm/mach-exynos into to
separate driver under drivers/memory/samsung. In the future this driver
will be re-used on ARM64 Exynos platform.
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Merge tag 'samsung-drivers-exynos-srom-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers
Merge "Samsung soc/drivers update for v4.7" from Krzysztof Kozłowski:
This moves Samsung SROM controller code from arm/mach-exynos into to
separate driver under drivers/memory/samsung. In the future this driver
will be re-used on ARM64 Exynos platform.
* tag 'samsung-drivers-exynos-srom-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
memory: samsung: exynos-srom: Add support for bank configuration
ARM: EXYNOS: Remove SROM related register settings from mach-exynos
MAINTAINERS: Add maintainers entry for drivers/memory/samsung
memory: Add support for Exynos SROM driver
dt-bindings: EXYNOS: Add exynos-srom device tree binding
ARM: dts: change SROM node compatible from generic to model specific
- Fix its node without msi-cells for hip05
- Add nor flash node for hip05 D02 board
- Add initial dts for hip06 D03 board
- Reorder and add the hip06 D03 binding in the binding document
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Merge tag 'hip0x-dt-for-4.7' of git://github.com/hisilicon/linux-hisi into next/dt64
Merge "ARM64: DT: Hisilicon hip05 and hip06 updates for 4.7" Wei Xu:
- Fix its node without msi-cells for hip05
- Add nor flash node for hip05 D02 board
- Add initial dts for hip06 D03 board
- Reorder and add the hip06 D03 binding in the binding document
* tag 'hip0x-dt-for-4.7' of git://github.com/hisilicon/linux-hisi:
Documentation: arm64: Add Hisilicon Hip06 D03 dts binding
arm64: dts: Add initial dts for Hisilicon Hip06 D03 board
arm64: dts: hip05: Add nor flash support
arm64: dts: hip05: fix its node without msi-cells
This fixes several spelling mistakes in the Documentation/ tree, which
are caught by checkpatch.pl's spell checking.
Signed-off-by: Kees Cook <keescook@chromium.org>
Reviewed-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
This includes a few functional changes:
* new representation of MIC, SIC1 and SIC2 interrupt controllers,
* disabled by default SPI1, SPI2, SSP0 and SSP1 SPI controllers in
shared lpc32xx.dtsi file,
* added clock sources for SPI1 and SPI2,
* set default clock rate of HCLK PLL to main osc rate multiplied by 16.
Also there are some non-functional changes:
* flatten board DTS files by exploiting device node labels,
* add 'partitions' device node for NAND SLC / MTD OF,
* correct Atmel vendor prefix to describe on board AT24 EEPROMs,
* rename board DTS files by adding SoC name prefix.
Since now DTS files of LPC32xx boards match "^lpc32[2345]0-" pattern.
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Merge tag 'lpc32xx-dt-4.7' of git://github.com/vzapolskiy/linux-lpc32xx into next/dt
Merge "NXP LPC32xx device tree updates for v4.7" from Vladimir Zapolskiy:
This includes a few functional changes:
* new representation of MIC, SIC1 and SIC2 interrupt controllers,
* disabled by default SPI1, SPI2, SSP0 and SSP1 SPI controllers in
shared lpc32xx.dtsi file,
* added clock sources for SPI1 and SPI2,
* set default clock rate of HCLK PLL to main osc rate multiplied by 16.
Also there are some non-functional changes:
* flatten board DTS files by exploiting device node labels,
* add 'partitions' device node for NAND SLC / MTD OF,
* correct Atmel vendor prefix to describe on board AT24 EEPROMs,
* rename board DTS files by adding SoC name prefix.
Since now DTS files of LPC32xx boards match "^lpc32[2345]0-" pattern.
* tag 'lpc32xx-dt-4.7' of git://github.com/vzapolskiy/linux-lpc32xx:
ARM: dts: lpc32xx: phy3250: add SoC name prefix to board dts file
ARM: dts: lpc32xx: phy3250: add NAND partitions device node
ARM: dts: lpc32xx: phy3250: avoid extension of device nodes by absolute path
ARM: dts: lpc32xx: ea3250: add SoC name prefix to board dts file
ARM: dts: lpc32xx: ea3250: fix Atmel at24 eeprom vendor
ARM: dts: lpc32xx: ea3250: add NAND partitions device node
ARM: dts: lpc32xx: ea3250: avoid extension of device nodes by absolute path
ARM: dts: lpc32xx: reparent SIC1 and SIC2 interrupts from MIC
dt-bindings: interrupt-controllers: add description of SIC1 and SIC2
ARM: dts: lpc32xx: disabled ssp0/spi1 & ssp1/spi2 by default
ARM: dts: phy3250: enable ssp0
ARM: dts: lpc32xx: add clock properties to spi nodes
ARM: dts: lpc32xx: set default clock rate of HCLK PLL
This adds documentation of device tree bindings for the
timers found on ARM MPS2 platform.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
NXP LPC32xx has three interrupt controllers, namely root Main
Interrupt Controller (MIC) and two supplementary Sub Interrupt
Controllers (SIC1 and SIC2), four interrupt outputs from SIC1 and SIC2
are connected to MIC.
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Minor overlapping changes in the conflicts.
In the macsec case, the change of the default ID macro
name overlapped with the 64-bit netlink attribute alignment
fixes in net-next.
Signed-off-by: David S. Miller <davem@davemloft.net>
Pull i2c fixes from Wolfram Sang:
"I2C has one buildfix, one ABBA deadlock fix, and three simple 'add ID'
patches"
* 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: exynos5: Fix possible ABBA deadlock by keeping I2C clock prepared
i2c: cpm: Fix build break due to incompatible pointer types
i2c: ismt: Add Intel DNV PCI ID
i2c: xlp9xx: add support for Broadcom Vulcan
i2c: rk3x: add support for rk3228
- LOCKDEP now words for ARCv2 builds
- Enabling DT reserved-memory binding to work (for forthcoming HDMI driver)
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Merge tag 'arc-4.6-rc6-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
Pull ARC fixes from Vineet Gupta:
- lockdep now works for ARCv2 builds
- enable DT reserved-memory binding (for forthcoming HDMI driver)
* tag 'arc-4.6-rc6-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
ARC: add support for reserved memory defined by device tree
ARC: support generic per-device coherent dma mem
Documentation: dt: arc: fix spelling mistakes
ARCv2: Enable LOCKDEP
Even if the Armada 37xx does not any specific setup, the device tree
binding documentation requires to use a SoC-specific version
corresponding to the platform first followed by the generic version.
This patch introduce this new compatible string and updates the
documentation accordingly.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This patch adds documentation for the devicetree bindings used by
the DT files of Hisilicon Hip06 D03 board.
Meanwhile, reorder the soc/board name alphabetically.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
recent regressions. Changes are across several platforms, so
I'm listing every change separately here.
Regressions since 4.5:
- A correction of the psci firmware DT binding, to prevent
users from relying on unintended semantics
- Actually getting the newly merged clock driver for some OMAP
platforms to work
- A revert of patches for the Qualcomm BAM, these need to be
reworked for 4.7 to avoid breaking boards other than the one
they were intended for
- A correction for the I2C device nodes on the Socionext Uniphier
platform
- i.MX SDHCI was broken for non-DT platforms due to a change
with the setting of the DMA mask
- A revert of a patch that accidentally added a nonexisting
clock on the Rensas "Porter" board
- A couple of OMAP fixes that are all related to suspend after
the power domain changes for dra7
- On Mediatek, revert part of the power domain initialization
changes that broke mt8173-evb
Fixes for older bugs:
- Workaround for an "external abort" in the omap34xx
suspend/resume code.
- The USB1/eSATA should not be listed as an excon device on
am57xx-beagle-x15 (broken since v4.0)
- A v4.5 regression in the TI AM33xx and AM43XX DT specifying
incorrect DMA request lines for the GPMC
- The jiffies calibration on Renesas platforms was incorrect
for some modern CPU cores.
- A hardware errata woraround for clockdomains on TI DRA7
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"Here are the latest bug fixes for ARM SoCs, mostly addressing recent
regressions. Changes are across several platforms, so I'm listing
every change separately here.
Regressions since 4.5:
- A correction of the psci firmware DT binding, to prevent users from
relying on unintended semantics
- Actually getting the newly merged clock driver for some OMAP
platforms to work
- A revert of patches for the Qualcomm BAM, these need to be reworked
for 4.7 to avoid breaking boards other than the one they were
intended for
- A correction for the I2C device nodes on the Socionext Uniphier
platform
- i.MX SDHCI was broken for non-DT platforms due to a change with the
setting of the DMA mask
- A revert of a patch that accidentally added a nonexisting clock on
the Rensas "Porter" board
- A couple of OMAP fixes that are all related to suspend after the
power domain changes for dra7
- On Mediatek, revert part of the power domain initialization changes
that broke mt8173-evb
Fixes for older bugs:
- Workaround for an "external abort" in the omap34xx suspend/resume
code.
- The USB1/eSATA should not be listed as an excon device on
am57xx-beagle-x15 (broken since v4.0)
- A v4.5 regression in the TI AM33xx and AM43XX DT specifying
incorrect DMA request lines for the GPMC
- The jiffies calibration on Renesas platforms was incorrect for some
modern CPU cores.
- A hardware errata woraround for clockdomains on TI DRA7"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
drivers: firmware: psci: unify enable-method binding on ARM {64,32}-bit systems
arm64: dts: uniphier: fix I2C nodes of PH1-LD20
ARM: shmobile: timer: Fix preset_lpj leading to too short delays
Revert "ARM: dts: porter: Enable SCIF_CLK frequency and pins"
ARM: dts: r8a7791: Don't disable referenced optional clocks
Revert "ARM: OMAP: Catch callers of revision information prior to it being populated"
ARM: OMAP3: Fix external abort on 36xx waking from off mode idle
ARM: dts: am57xx-beagle-x15: remove extcon_usb1
ARM: dts: am437x: Fix GPMC dma properties
ARM: dts: am33xx: Fix GPMC dma properties
Revert "soc: mediatek: SCPSYS: Fix double enabling of regulators"
ARM: mach-imx: sdhci-esdhc-imx: initialize DMA mask
ARM: DRA7: clockdomain: Implement timer workaround for errata i874
ARM: OMAP: Catch callers of revision information prior to it being populated
ARM: dts: dra7: Correct clock tree for sys_32k_ck
ARM: OMAP: DRA7: Provide proper class to omap2_set_globals_tap
ARM: OMAP: DRA7: wakeupgen: Skip SAR save for wakeupgen
Revert "dts: msm8974: Add dma channels for blsp2_i2c1 node"
Revert "dts: msm8974: Add blsp2_bam dma node"
ARM: dts: Add clocks for dm814x ADPLL
According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on
DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas
MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better
throughput.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
IO-domain handling is part of the general register files, so should live
under the grf directly. This change allows the grf to be a simple-mfd and
the io-domains fetching the syscon regmap from that parent-node.
The old binding is of course preserved, though deprecated.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This commit adds the Device Tree binding documentation that allows to
describe the PCIe controller found in Marvell Armada 7K/8K SoCs.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Rob Herring <rob@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>