mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 15:50:53 +07:00
mvebu dt64 for 4.7
- switch to label in the mvebu arm64 device tree - use new clock binding on Armada 7K/8K - improve SPI and I2C description on Armada 7K/8k - add CP110 block adding PCIe, SATA and USB3 - add XOR support on Armada 3700 - few more little fix -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEABECAAYFAlcjbaAACgkQCwYYjhRyO9VaVgCghxZq/0qnD5+k5ouUvSYwXiOo EV8AoIL6w3bn64kY93M0o8RtrG4WLe+h =Pilg -----END PGP SIGNATURE----- Merge tag 'mvebu-dt64-4.7-1' of git://git.infradead.org/linux-mvebu into next/dt64 Merge "mvebu dt64 for 4.7" from Gregory CLEMENT: - switch to label in the mvebu arm64 device tree - use new clock binding on Armada 7K/8K - improve SPI and I2C description on Armada 7K/8k - add CP110 block adding PCIe, SATA and USB3 - add XOR support on Armada 3700 - few more little fix * tag 'mvebu-dt64-4.7-1' of git://git.infradead.org/linux-mvebu: arm64: dts: marvell: add XOR node for Armada 3700 SoC arm64: dts: marvell: Use a SoC-specific compatible for xHCI on Armada37xx arm64: dts: marvell: Rename armada-37xx USB node arm64: dts: marvell: Clean up armada-3720-db arm64: dts: marvell: enable several CP interfaces on Armada 7040-DB arm64: dts: marvell: initial DT description of Armada 7K/8K CP110 master arm64: dts: marvell: use the proper I2C controller compatible string for 7K/8K arm64: dts: marvell: improve SPI flash description on Armada 7040-DB arm64: dts: marvell: use new clock binding on Armada AP806 arm64: dts: marvell: add UART aliases and define stdout-path arm64: dts: marvell: rename armada-ap806 XOR nodes arm64: dts: marvell: clean up armada-7040-db
This commit is contained in:
commit
3a005c1d59
@ -4,6 +4,7 @@ Required properties:
|
||||
- compatible: should be one or more of
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||||
|
||||
- "generic-xhci" for generic XHCI device
|
||||
- "marvell,armada3700-xhci" for Armada 37xx SoCs
|
||||
- "marvell,armada-375-xhci" for Armada 375 SoCs
|
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- "marvell,armada-380-xhci" for Armada 38x SoCs
|
||||
- "renesas,xhci-r8a7790" for r8a7790 SoC
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||||
|
@ -60,27 +60,19 @@ memory {
|
||||
device_type = "memory";
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||||
reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
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||||
};
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||||
|
||||
soc {
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||||
internal-regs {
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||||
/*
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||||
* Exported on the micro USB connector CON32
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* through an FTDI
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*/
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uart0: serial@12000 {
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status = "okay";
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};
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/* CON31 */
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usb3@58000 {
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status = "okay";
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};
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/* CON3 */
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sata@e0000 {
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status = "okay";
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};
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};
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};
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};
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||||
|
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/* CON3 */
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&sata {
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status = "okay";
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};
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/* Exported on the micro USB connector CON32 through an FTDI */
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&uart0 {
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status = "okay";
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};
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|
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/* CON31 */
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&usb3 {
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status = "okay";
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};
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|
@ -59,5 +59,4 @@ cpu@1 {
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enable-method = "psci";
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};
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};
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};
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|
@ -105,14 +105,28 @@ uart0: serial@12000 {
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status = "disabled";
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};
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usb3@58000 {
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compatible = "generic-xhci";
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usb3: usb@58000 {
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compatible = "marvell,armada3700-xhci",
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"generic-xhci";
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reg = <0x58000 0x4000>;
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interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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sata@e0000 {
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xor@60900 {
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compatible = "marvell,armada-3700-xor";
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reg = <0x60900 0x100
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0x60b00 0x100>;
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xor10 {
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interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
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};
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xor11 {
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interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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sata: sata@e0000 {
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compatible = "marvell,armada-3700-ahci";
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reg = <0xe0000 0x2000>;
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interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
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|
@ -46,6 +46,7 @@
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*/
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#include "armada-ap806-dual.dtsi"
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#include "armada-cp110-master.dtsi"
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/ {
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model = "Marvell Armada 7020";
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|
@ -51,42 +51,98 @@ / {
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compatible = "marvell,armada7040-db", "marvell,armada7040",
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"marvell,armada-ap806-quad", "marvell,armada-ap806";
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|
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@00000000 {
|
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device_type = "memory";
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reg = <0x0 0x0 0x0 0x80000000>;
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};
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||||
};
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ap806 {
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config-space {
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spi@510600 {
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status = "okay";
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&i2c0 {
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status = "okay";
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clock-frequency = <100000>;
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};
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spi-flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "n25q128a13";
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reg = <0>; /* Chip select 0 */
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spi-max-frequency = <10000000>;
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&spi0 {
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status = "okay";
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partition@0 {
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label = "U-Boot";
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reg = <0 0x200000>;
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||||
};
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partition@400000 {
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label = "Filesystem";
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reg = <0x200000 0xce0000>;
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};
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};
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spi-flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "U-Boot";
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reg = <0 0x200000>;
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};
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i2c@511000 {
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status = "okay";
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clock-frequency = <100000>;
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};
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serial@512000 {
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status = "okay";
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partition@400000 {
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label = "Filesystem";
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reg = <0x200000 0xce0000>;
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||||
};
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||||
};
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||||
};
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};
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&uart0 {
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status = "okay";
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};
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&cpm_pcie2 {
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status = "okay";
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};
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&cpm_i2c0 {
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status = "okay";
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clock-frequency = <100000>;
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};
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&cpm_spi1 {
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status = "okay";
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spi-flash@0 {
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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compatible = "jedec,spi-nor";
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reg = <0x0>;
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spi-max-frequency = <20000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "U-Boot";
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reg = <0x0 0x200000>;
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};
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partition@400000 {
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label = "Filesystem";
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reg = <0x200000 0xe00000>;
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};
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};
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};
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};
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&cpm_sata0 {
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status = "okay";
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};
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&cpm_usb3_0 {
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status = "okay";
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};
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&cpm_usb3_1 {
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status = "okay";
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};
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|
@ -46,6 +46,7 @@
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*/
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#include "armada-ap806-quad.dtsi"
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#include "armada-cp110-master.dtsi"
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/ {
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model = "Marvell Armada 7040";
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|
@ -46,6 +46,7 @@
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||||
*/
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#include "armada-ap806-dual.dtsi"
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#include "armada-cp110-master.dtsi"
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/ {
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model = "Marvell Armada 8020";
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|
@ -46,6 +46,7 @@
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||||
*/
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#include "armada-ap806-quad.dtsi"
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#include "armada-cp110-master.dtsi"
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/ {
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model = "Marvell Armada 8040";
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|
@ -68,4 +68,3 @@ cpu@001 {
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||||
};
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||||
};
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||||
};
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|
@ -79,6 +79,4 @@ cpu@101 {
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enable-method = "psci";
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||||
};
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};
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||||
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||||
};
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|
@ -54,12 +54,16 @@ / {
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||||
#address-cells = <2>;
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#size-cells = <2>;
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aliases {
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serial0 = &uart0;
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serial1 = &uart1;
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};
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psci {
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compatible = "arm,psci-0.2";
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method = "smc";
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};
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ap806 {
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#address-cells = <2>;
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#size-cells = <2>;
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@ -136,7 +140,7 @@ odmi: odmi@300000 {
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marvell,spi-base = <128>, <136>, <144>, <152>;
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};
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xor0@400000 {
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xor@400000 {
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compatible = "marvell,mv-xor-v2";
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reg = <0x400000 0x1000>,
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<0x410000 0x1000>;
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@ -144,7 +148,7 @@ xor0@400000 {
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dma-coherent;
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};
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xor1@420000 {
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xor@420000 {
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compatible = "marvell,mv-xor-v2";
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reg = <0x420000 0x1000>,
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<0x430000 0x1000>;
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@ -152,7 +156,7 @@ xor1@420000 {
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dma-coherent;
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};
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xor2@440000 {
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xor@440000 {
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compatible = "marvell,mv-xor-v2";
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reg = <0x440000 0x1000>,
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<0x450000 0x1000>;
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@ -160,7 +164,7 @@ xor2@440000 {
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dma-coherent;
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};
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xor3@460000 {
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xor@460000 {
|
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compatible = "marvell,mv-xor-v2";
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reg = <0x460000 0x1000>,
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<0x470000 0x1000>;
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@ -175,63 +179,51 @@ spi0: spi@510600 {
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#size-cells = <0>;
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cell-index = <0>;
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interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
|
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clocks = <&ringclk 2>;
|
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clocks = <&ap_syscon 3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@511000 {
|
||||
compatible = "marvell,mv64xxx-i2c";
|
||||
compatible = "marvell,mv78230-i2c";
|
||||
reg = <0x511000 0x20>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
|
||||
timeout-ms = <1000>;
|
||||
clocks = <&ringclk 2>;
|
||||
clocks = <&ap_syscon 3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
serial@512000 {
|
||||
uart0: serial@512000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x512000 0x100>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg-io-width = <1>;
|
||||
clocks = <&ringclk 2>;
|
||||
clocks = <&ap_syscon 3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
serial@512100 {
|
||||
uart1: serial@512100 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x512100 0x100>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg-io-width = <1>;
|
||||
clocks = <&ringclk 2>;
|
||||
clocks = <&ap_syscon 3>;
|
||||
status = "disabled";
|
||||
|
||||
};
|
||||
|
||||
dfx-server@6f8000 {
|
||||
compatible = "simple-mfd", "syscon";
|
||||
reg = <0x6f8000 0x70000>;
|
||||
|
||||
coreclk: clk@204 {
|
||||
compatible = "marvell,armada-ap806-core-clock";
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "ddr", "ring", "cpu";
|
||||
};
|
||||
|
||||
ringclk: clk@250 {
|
||||
compatible = "marvell,armada-ap806-ring-clock";
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "ring-0", "ring-2",
|
||||
"ring-3", "ring-4",
|
||||
"ring-5";
|
||||
clocks = <&coreclk 1>;
|
||||
};
|
||||
ap_syscon: system-controller@6f4000 {
|
||||
compatible = "marvell,ap806-system-controller",
|
||||
"syscon";
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "ap-cpu-cluster-0",
|
||||
"ap-cpu-cluster-1",
|
||||
"ap-fixed", "ap-mss";
|
||||
reg = <0x6f4000 0x1000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
|
228
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
Normal file
228
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
Normal file
@ -0,0 +1,228 @@
|
||||
/*
|
||||
* Copyright (C) 2016 Marvell Technology Group Ltd.
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPLv2 or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of the
|
||||
* License, or (at your option) any later version.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Device Tree file for Marvell Armada CP110 Master.
|
||||
*/
|
||||
|
||||
/ {
|
||||
cp110-master {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
compatible = "simple-bus";
|
||||
interrupt-parent = <&gic>;
|
||||
ranges;
|
||||
|
||||
config-space {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
interrupt-parent = <&gic>;
|
||||
ranges = <0x0 0x0 0xf2000000 0x2000000>;
|
||||
|
||||
cpm_syscon0: system-controller@440000 {
|
||||
compatible = "marvell,cp110-system-controller0",
|
||||
"syscon";
|
||||
reg = <0x440000 0x1000>;
|
||||
#clock-cells = <2>;
|
||||
core-clock-output-names =
|
||||
"cpm-apll", "cpm-ppv2-core", "cpm-eip",
|
||||
"cpm-core", "cpm-nand-core";
|
||||
gate-clock-output-names =
|
||||
"cpm-audio", "cpm-communit", "cpm-nand",
|
||||
"cpm-ppv2", "cpm-sdio", "cpm-mg-domain",
|
||||
"cpm-mg-core", "cpm-xor1", "cpm-xor0",
|
||||
"cpm-gop-dp", "none", "cpm-pcie_x10",
|
||||
"cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor",
|
||||
"cpm-sata", "cpm-sata-usb", "cpm-main",
|
||||
"cpm-sd-mmc", "none", "none",
|
||||
"cpm-slow-io", "cpm-usb3h0", "cpm-usb3h1",
|
||||
"cpm-usb3dev", "cpm-eip150", "cpm-eip197";
|
||||
};
|
||||
|
||||
cpm_sata0: sata@540000 {
|
||||
compatible = "marvell,armada-8k-ahci";
|
||||
reg = <0x540000 0x30000>;
|
||||
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpm_syscon0 1 15>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpm_usb3_0: usb3@500000 {
|
||||
compatible = "marvell,armada-8k-xhci",
|
||||
"generic-xhci";
|
||||
reg = <0x500000 0x4000>;
|
||||
dma-coherent;
|
||||
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpm_syscon0 1 22>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpm_usb3_1: usb3@510000 {
|
||||
compatible = "marvell,armada-8k-xhci",
|
||||
"generic-xhci";
|
||||
reg = <0x510000 0x4000>;
|
||||
dma-coherent;
|
||||
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpm_syscon0 1 23>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpm_spi0: spi@700600 {
|
||||
compatible = "marvell,armada-380-spi";
|
||||
reg = <0x700600 0x50>;
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
cell-index = <1>;
|
||||
clocks = <&cpm_syscon0 0 3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpm_spi1: spi@700680 {
|
||||
compatible = "marvell,armada-380-spi";
|
||||
reg = <0x700680 0x50>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <2>;
|
||||
clocks = <&cpm_syscon0 1 21>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpm_i2c0: i2c@701000 {
|
||||
compatible = "marvell,mv78230-i2c";
|
||||
reg = <0x701000 0x20>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpm_syscon0 1 21>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpm_i2c1: i2c@701100 {
|
||||
compatible = "marvell,mv78230-i2c";
|
||||
reg = <0x701100 0x20>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpm_syscon0 1 21>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
cpm_pcie0: pcie@f2600000 {
|
||||
compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
|
||||
reg = <0 0xf2600000 0 0x10000>,
|
||||
<0 0xf6f00000 0 0x80000>;
|
||||
reg-names = "ctrl", "config";
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
device_type = "pci";
|
||||
dma-coherent;
|
||||
|
||||
bus-range = <0 0xff>;
|
||||
ranges =
|
||||
/* downstream I/O */
|
||||
<0x81000000 0 0xf9000000 0 0xf9000000 0 0x10000
|
||||
/* non-prefetchable memory */
|
||||
0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
|
||||
num-lanes = <1>;
|
||||
clocks = <&cpm_syscon0 1 13>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpm_pcie1: pcie@f2620000 {
|
||||
compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
|
||||
reg = <0 0xf2620000 0 0x10000>,
|
||||
<0 0xf7f00000 0 0x80000>;
|
||||
reg-names = "ctrl", "config";
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
device_type = "pci";
|
||||
dma-coherent;
|
||||
|
||||
bus-range = <0 0xff>;
|
||||
ranges =
|
||||
/* downstream I/O */
|
||||
<0x81000000 0 0xf9010000 0 0xf9010000 0 0x10000
|
||||
/* non-prefetchable memory */
|
||||
0x82000000 0 0xf7000000 0 0xf7000000 0 0xf00000>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
num-lanes = <1>;
|
||||
clocks = <&cpm_syscon0 1 11>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpm_pcie2: pcie@f2640000 {
|
||||
compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
|
||||
reg = <0 0xf2640000 0 0x10000>,
|
||||
<0 0xf8f00000 0 0x80000>;
|
||||
reg-names = "ctrl", "config";
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
device_type = "pci";
|
||||
dma-coherent;
|
||||
|
||||
bus-range = <0 0xff>;
|
||||
ranges =
|
||||
/* downstream I/O */
|
||||
<0x81000000 0 0xf9020000 0 0xf9020000 0 0x10000
|
||||
/* non-prefetchable memory */
|
||||
0x82000000 0 0xf8000000 0 0xf8000000 0 0xf00000>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
num-lanes = <1>;
|
||||
clocks = <&cpm_syscon0 1 12>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
Loading…
Reference in New Issue
Block a user