Commit Graph

9860 Commits

Author SHA1 Message Date
Claudiu Manoil
927d7f8575 arm64: dts: fsl: ls1028a: Add PCI IERC node and ENETC endpoints
The LS1028A SoC features a PCI Integrated Endpoint Root Complex
(IERC) defining several integrated PCI devices, including the ENETC
ethernet controller integrated endpoints (IEPs). The IERC implements
ECAM (Enhanced Configuration Access Mechanism) to provide access
to the PCIe config space of the IEPs. This means the the IEPs
(including ENETC) do not support the standard PCIe BARs, instead
the Enhanced Allocation (EA) capability structures in the ECAM space
are used to fix the base addresses in the system, and the PCI
subsystem uses these structures for device enumeration and discovery.
The "ranges" entries contain basic information from these EA capabily
structures required by the kernel for device enumeration.

The current patch also enables the first 2 ENETC PFs (Physiscal
Functions) and the associated VFs (Virtual Functions), 2 VFs for
each PF.  Each of these ENETC PFs has an external ethernet port
on the LS1028A SoC.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2019-03-01 11:21:32 -08:00
Peng Fan
b855b58ac1 arm64: mmu: drop paging_init comments
The comments could not reflect the code, and it is easy to get
what this function does from a straight-line reading of the code.
So let's drop the comments

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-03-01 16:40:07 +00:00
Will Deacon
6bd288569b arm64: debug: Ensure debug handlers check triggering exception level
Debug exception handlers may be called for exceptions generated both by
user and kernel code. In many cases, this is checked explicitly, but
in other cases things either happen to work by happy accident or they
go slightly wrong. For example, executing 'brk #4' from userspace will
enter the kprobes code and be ignored, but the instruction will be
retried forever in userspace instead of delivering a SIGTRAP.

Fix this issue in the most stable-friendly fashion by simply adding
explicit checks of the triggering exception level to all of our debug
exception handlers.

Cc: <stable@vger.kernel.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-03-01 16:23:38 +00:00
Will Deacon
b9a4b9d084 arm64: debug: Don't propagate UNKNOWN FAR into si_code for debug signals
FAR_EL1 is UNKNOWN for all debug exceptions other than those caused by
taking a hardware watchpoint. Unfortunately, if a debug handler returns
a non-zero value, then we will propagate the UNKNOWN FAR value to
userspace via the si_addr field of the SIGTRAP siginfo_t.

Instead, let's set si_addr to take on the PC of the faulting instruction,
which we have available in the current pt_regs.

Cc: <stable@vger.kernel.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-03-01 16:23:17 +00:00
Catalin Marinas
3cd0ddb3de Revert "arm64: uaccess: Implement unsafe accessors"
This reverts commit 0bd3ef34d2.

There is ongoing work on objtool to identify incorrect uses of
user_access_{begin,end}. Until this is sorted, do not enable the
functionality on arm64. Also, on ARMv8.2 CPUs with hardware PAN and UAO
support, there is no obvious performance benefit to the unsafe user
accessors.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-03-01 14:19:06 +00:00
Arnd Bergmann
6089e65618 Qualcomm ARM64 Fixes for 5.0-rc8
* Fix TZ memory area size to avoid crashes during boot
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Merge tag 'qcom-fixes-for-5.0-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into arm/fixes

Qualcomm ARM64 Fixes for 5.0-rc8

* Fix TZ memory area size to avoid crashes during boot

* tag 'qcom-fixes-for-5.0-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  arm64: dts: qcom: msm8998: Extend TZ reserved memory area
2019-03-01 15:08:16 +01:00
Arnd Bergmann
366e37e4da arm64: avoid clang warning about self-assignment
Building a preprocessed source file for arm64 now always produces
a warning with clang because of the page_to_virt() macro assigning
a variable to itself.

Adding a new temporary variable avoids this issue.

Fixes: 2813b9c029 ("kasan, mm, arm64: tag non slab memory allocated via pagealloc")
Reviewed-by: Andrey Konovalov <andreyknvl@google.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-02-28 18:16:00 +00:00
Anders Roxell
a29c782349 arm64: Kconfig.platforms: fix warning unmet direct dependencies
When ARCH_MXC get enabled, ARM64_ERRATUM_845719 will be selected and
this warning will happen when COMPAT isn't set.

WARNING: unmet direct dependencies detected for ARM64_ERRATUM_845719
  Depends on [n]: COMPAT [=n]
  Selected by [y]:
  - ARCH_MXC [=y]

Rework to add 'if COMPAT' before ARM64_ERRATUM_845719 gets selected,
since ARM64_ERRATUM_845719 depends on COMPAT.

Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Anders Roxell <anders.roxell@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-02-28 18:06:48 +00:00
Will Deacon
2c97a9cc35 arm64: io: Hook up __io_par() for inX() ordering
Ensure that inX() provides the same ordering guarantees as readX()
by hooking up __io_par() so that it maps directly to __iormb().

Reported-by: Andrew Murray <andrew.murray@arm.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-02-28 17:24:27 +00:00
Zhang Lei
3e32131abc arm64: Add workaround for Fujitsu A64FX erratum 010001
On the Fujitsu-A64FX cores ver(1.0, 1.1), memory access may cause
an undefined fault (Data abort, DFSC=0b111111). This fault occurs under
a specific hardware condition when a load/store instruction performs an
address translation. Any load/store instruction, except non-fault access
including Armv8 and SVE might cause this undefined fault.

The TCR_ELx.NFD1 bit is used by the kernel when CONFIG_RANDOMIZE_BASE
is enabled to mitigate timing attacks against KASLR where the kernel
address space could be probed using the FFR and suppressed fault on
SVE loads.

Since this erratum causes spurious exceptions, which may corrupt
the exception registers, we clear the TCR_ELx.NFDx=1 bits when
booting on an affected CPU.

Signed-off-by: Zhang Lei <zhang.lei@jp.fujitsu.com>
[Generated MIDR value/mask for __cpu_setup(), removed spurious-fault handler
 and always disabled the NFDx bits on affected CPUs]
Signed-off-by: James Morse <james.morse@arm.com>
Tested-by: zhang.lei <zhang.lei@jp.fujitsu.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-02-28 16:24:25 +00:00
Takashi Iwai
70395a96bd ASoC: More changes for v5.1
Another batch of changes for ASoC, no big core changes - it's mainly
 small fixes and improvements for individual drivers.
 
  - A big refresh and cleanup of the Samsung drivers, fixing a number of
    issues which allow the driver to be used with a wider range of
    userspaces.
  - Fixes for the Intel drivers to make them more standard so less likely
    to get bitten by core issues.
  - New driver for Cirrus Logic CS35L26.
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Merge tag 'asoc-v5.1-2' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next

ASoC: More changes for v5.1

Another batch of changes for ASoC, no big core changes - it's mainly
small fixes and improvements for individual drivers.

 - A big refresh and cleanup of the Samsung drivers, fixing a number of
   issues which allow the driver to be used with a wider range of
   userspaces.
 - Fixes for the Intel drivers to make them more standard so less likely
   to get bitten by core issues.
 - New driver for Cirrus Logic CS35L26.
2019-02-28 13:30:55 +01:00
Ingo Molnar
0614621d89 Merge branch 'linus' into locking/core, to pick up fixes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-02-28 07:50:39 +01:00
Eric Biggers
f86d17e9ef crypto: arm64/chacha - fix hchacha_block_neon() for big endian
On big endian arm64 kernels, the xchacha20-neon and xchacha12-neon
self-tests fail because hchacha_block_neon() outputs little endian words
but the C code expects native endianness.  Fix it to output the words in
native endianness (which also makes it match the arm32 version).

Fixes: cc7cf991e9 ("crypto: arm64/chacha20 - add XChaCha20 support")
Signed-off-by: Eric Biggers <ebiggers@google.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-02-28 14:37:48 +08:00
Eric Biggers
4b6d196c9c crypto: arm64/chacha - fix chacha_4block_xor_neon() for big endian
The change to encrypt a fifth ChaCha block using scalar instructions
caused the chacha20-neon, xchacha20-neon, and xchacha12-neon self-tests
to start failing on big endian arm64 kernels.  The bug is that the
keystream block produced in 32-bit scalar registers is directly XOR'd
with the data words, which are loaded and stored in native endianness.
Thus in big endian mode the data bytes end up XOR'd with the wrong
bytes.  Fix it by byte-swapping the keystream words in big endian mode.

Fixes: 2fe55987b2 ("crypto: arm64/chacha - use combined SIMD/ALU routine for more speed")
Signed-off-by: Eric Biggers <ebiggers@google.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-02-28 14:37:48 +08:00
Thomas Gleixner
cfbe271667 y2038: additional syscall ABI cleanup
This is a follow-up to the y2038 syscall patches already merged in the tip
 tree.  As the final 32-bit RISC-V syscall ABI is still being decided on,
 this is the last chance to make a few corrections to leave out interfaces
 based on 32-bit time_t along with the old off_t and rlimit types.
 
 The series achieves this in a few steps:
 
 - A couple of bug fixes for minor regressions I introduced
   in the original series
 
 - A couple of older patches from Yury Norov that I had never
   merged in the past, these fix up the openat/open_by_handle_at and
   getrlimit/setrlimit syscalls to disallow the old versions of off_t
   and rlimit.
 
 - Hiding the deprecated system calls behind an #ifdef in
   include/uapi/asm-generic/unistd.h
 
 - Change arch/riscv to drop all these ABIs.
 
 Originally, the plan was to also leave these out on C-Sky, but that now
 has a glibc port that uses the older interfaces, so we need to leave
 them in place.
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Merge tag 'y2038-syscall-abi' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/playground into timers/2038

Pull additional syscall ABI cleanup for y2038 from Arnd Bergmann:

This is a follow-up to the y2038 syscall patches already merged in the tip
tree.  As the final 32-bit RISC-V syscall ABI is still being decided on,
this is the last chance to make a few corrections to leave out interfaces
based on 32-bit time_t along with the old off_t and rlimit types.

The series achieves this in a few steps:

- A couple of bug fixes for minor regressions I introduced
  in the original series

- A couple of older patches from Yury Norov that I had never
  merged in the past, these fix up the openat/open_by_handle_at and
  getrlimit/setrlimit syscalls to disallow the old versions of off_t
  and rlimit.

- Hiding the deprecated system calls behind an #ifdef in
  include/uapi/asm-generic/unistd.h

- Change arch/riscv to drop all these ABIs.

Originally, the plan was to also leave these out on C-Sky, but that now
has a glibc port that uses the older interfaces, so we need to leave
them in place.
2019-02-27 21:45:27 +01:00
Brian Norris
5364a0b4f4 arm64: dts: rockchip: move QCA6174A wakeup pin into its USB node
Currently, we don't coordinate BT USB activity with our handling of the
BT out-of-band wake pin, and instead just use gpio-keys. That causes
problems because we have no way of distinguishing wake activity due to a
BT device (e.g., mouse) vs. the BT controller (e.g., re-configuring wake
mask before suspend). This can cause spurious wake events just because
we, for instance, try to reconfigure the host controller's event mask
before suspending.

We can avoid these synchronization problems by handling the BT wake pin
directly in the btusb driver -- for all activity up until BT controller
suspend(), we simply listen to normal USB activity (e.g., to know the
difference between device and host activity); once we're really ready to
suspend the host controller, there should be no more host activity, and
only *then* do we unmask the GPIO interrupt.

This is already supported by btusb; we just need to describe the wake
pin in the right node.

We list 2 compatible properties, since both PID/VID pairs show up on
Scarlet devices, and they're both essentially identical QCA6174A-based
modules.

Also note that the polarity was wrong before: Qualcomm implemented WAKE
as active high, not active low. We only got away with this because
gpio-keys always reconfigured us as bi-directional edge-triggered.

Finally, we have an external pull-up and a level-shifter on this line
(we didn't notice Qualcomm's polarity in the initial design), so we
can't do pull-down. Switch to pull-none.

Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
2019-02-27 08:50:15 +01:00
Marc Gonzalez
6e53330909 arm64: dts: qcom: msm8998: Extend TZ reserved memory area
My console locks up as soon as Linux writes to [88800000,88f00000[
AFAIU, that memory area is reserved for trustzone.

Extend TZ reserved memory range, to prevent Linux from stepping on
trustzone's toes.

Cc: stable@vger.kernel.org # 4.20+
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Fixes: c783394956 ("arm64: dts: qcom: msm8998: Add smem related nodes")
Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-02-26 23:32:11 -06:00
Julien Thierry
4caf8758b6 arm64: Rename get_thread_info()
The assembly macro get_thread_info() actually returns a task_struct and is
analogous to the current/get_current macro/function.

While it could be argued that thread_info sits at the start of
task_struct and the intention could have been to return a thread_info,
instances of loads from/stores to the address obtained from
get_thread_info() use offsets that are generated with
offsetof(struct task_struct, [...]).

Rename get_thread_info() to state it returns a task_struct.

Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-02-26 16:57:59 +00:00
Julien Grall
47224e51ab arm64: Remove documentation about TIF_USEDFPU
TIF_USEDFPU is not defined as thread flags for Arm64. So drop it from
the documentation.

Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Julien Grall <julien.grall@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-02-26 16:41:10 +00:00
David S. Miller
70f3522614 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Three conflicts, one of which, for marvell10g.c is non-trivial and
requires some follow-up from Heiner or someone else.

The issue is that Heiner converted the marvell10g driver over to
use the generic c45 code as much as possible.

However, in 'net' a bug fix appeared which makes sure that a new
local mask (MDIO_AN_10GBT_CTRL_ADV_NBT_MASK) with value 0x01e0
is cleared.

Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24 12:06:19 -08:00
Linus Torvalds
9053d2db8b ARM: SoC fixes for 5.0
Only a handful of device tree fixes, all simple enough:
 
 NVIDIA Tegra:
  - Fix a regression for booting on chromebooks
 
 TI OMAP:
  - Two fixes PHY mode on am335x reference boards
 
 Marvell mvebu:
  - A regression fix for Armada XP NAND flash controllers
  - An incorrect reset signal on the clearfog board
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "Only a handful of device tree fixes, all simple enough:

  NVIDIA Tegra:
   - Fix a regression for booting on chromebooks

  TI OMAP:
   - Two fixes PHY mode on am335x reference boards

  Marvell mvebu:
   - A regression fix for Armada XP NAND flash controllers
   - An incorrect reset signal on the clearfog board"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  ARM: tegra: Restore DT ABI on Tegra124 Chromebooks
  ARM: dts: am335x-evm: Fix PHY mode for ethernet
  ARM: dts: am335x-evmsk: Fix PHY mode for ethernet
  arm64: dts: clearfog-gt-8k: fix SGMII PHY reset signal
  ARM: dts: armada-xp: fix Armada XP boards NAND description
2019-02-22 16:48:37 -08:00
Paolo Bonzini
71783e09b4 KVM/arm updates for Linux v5.1
- A number of pre-nested code rework
 - Direct physical timer assignment on VHE systems
 - kvm_call_hyp type safety enforcement
 - Set/Way cache sanitisation for 32bit guests
 - Build system cleanups
 - A bunch of janitorial fixes
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Merge tag 'kvmarm-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into kvm-next

KVM/arm updates for Linux v5.1

- A number of pre-nested code rework
- Direct physical timer assignment on VHE systems
- kvm_call_hyp type safety enforcement
- Set/Way cache sanitisation for 32bit guests
- Build system cleanups
- A bunch of janitorial fixes
2019-02-22 17:45:05 +01:00
Arnd Bergmann
2f8b1ce19e mvebu fixes for 5.0 (part 2)
Fix PHY reset signal on clearfog gt 8K (Armada 8040 based)
 Fix NAND description on Armada XP boards which was broken since a few
 release
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Merge tag 'mvebu-fixes-5.0-2' of git://git.infradead.org/linux-mvebu into arm/fixes

mvebu fixes for 5.0 (part 2)

Fix PHY reset signal on clearfog gt 8K (Armada 8040 based)
Fix NAND description on Armada XP boards which was broken since a few
release

* tag 'mvebu-fixes-5.0-2' of git://git.infradead.org/linux-mvebu:
  arm64: dts: clearfog-gt-8k: fix SGMII PHY reset signal
  ARM: dts: armada-xp: fix Armada XP boards NAND description

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-22 14:58:41 +01:00
Dave Martin
c88b093693 arm64: KVM: Fix architecturally invalid reset value for FPEXC32_EL2
Due to what looks like a typo dating back to the original addition
of FPEXC32_EL2 handling, KVM currently initialises this register to
an architecturally invalid value.

As a result, the VECITR field (RES1) in bits [10:8] is initialised
with 0, and the two reserved (RES0) bits [6:5] are initialised with
1.  (In the Common VFP Subarchitecture as specified by ARMv7-A,
these two bits were IMP DEF.  ARMv8-A removes them.)

This patch changes the reset value from 0x70 to 0x700, which
reflects the architectural constraints and is presumably what was
originally intended.

Cc: <stable@vger.kernel.org> # 4.12.x-
Cc: Christoffer Dall <christoffer.dall@arm.com>
Fixes: 62a89c4495 ("arm64: KVM: 32bit handling of coprocessor traps")
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-02-22 09:59:20 +00:00
Sameer Pujar
11ce430830 arm64: tegra: custom name for hda sound card
"nvidia,model" property is added to pass custom name for hda sound card.
This is parsed in hda driver and used for card name. This aligns with the
way with which sound cards are named in general.

This patch populates above for jetson-tx1, jetson-tx2 and jetson-xavier.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2019-02-22 10:46:37 +01:00
Eric Biggers
fa5fd3afc7 crypto: arm64/aes-blk - update IV after partial final CTR block
Make the arm64 ctr-aes-neon and ctr-aes-ce algorithms update the IV
buffer to contain the next counter after processing a partial final
block, rather than leave it as the last counter.  This makes these
algorithms pass the updated AES-CTR tests.

Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-02-22 12:47:27 +08:00
Linus Torvalds
d6622d913a arm64 fixes for 5.0
- Fix handling of PSTATE.SSBS bit in sigreturn()
 
 - Fix version checking of the GIC during early boot
 
 - Fix clang builds failing due to use of NEON in the crypto code
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Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull late arm64 fixes from Will Deacon:
 "Three small arm64 fixes for 5.0.

  They fix a build breakage with clang introduced in 4.20, an oversight
  in our sigframe restoration relating to the SSBS bit and a boot fix
  for systems with newer revisions of our interrupt controller.

  Summary:

   - Fix handling of PSTATE.SSBS bit in sigreturn()

   - Fix version checking of the GIC during early boot

   - Fix clang builds failing due to use of NEON in the crypto code"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: Relax GIC version check during early boot
  arm64/neon: Disable -Wincompatible-pointer-types when building with Clang
  arm64: fix SSBS sanitization
2019-02-21 09:11:36 -08:00
Andrey Konovalov
3f41b60938 kasan: fix random seed generation for tag-based mode
There are two issues with assigning random percpu seeds right now:

1. We use for_each_possible_cpu() to iterate over cpus, but cpumask is
   not set up yet at the moment of kasan_init(), and thus we only set
   the seed for cpu #0.

2. A call to get_random_u32() always returns the same number and produces
   a message in dmesg, since the random subsystem is not yet initialized.

Fix 1 by calling kasan_init_tags() after cpumask is set up.

Fix 2 by using get_cycles() instead of get_random_u32(). This gives us
lower quality random numbers, but it's good enough, as KASAN is meant to
be used as a debugging tool and not a mitigation.

Link: http://lkml.kernel.org/r/1f815cc914b61f3516ed4cc9bfd9eeca9bd5d9de.1550677973.git.andreyknvl@google.com
Signed-off-by: Andrey Konovalov <andreyknvl@google.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Andrey Ryabinin <aryabinin@virtuozzo.com>
Cc: Alexander Potapenko <glider@google.com>
Cc: Dmitry Vyukov <dvyukov@google.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2019-02-21 09:01:00 -08:00
Xiaowei Bao
7b9d3d11c0 arm64: dts: Add the PCIE EP node in dts
Add the PCIE EP node in dts for ls1046a.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Minghuan Lian <minghuan.lian@nxp.com>
Reviewed-by: Zhiqiang Hou <zhiqiang.hou@nxp.com>
Reviewed-by: Rob Herring <robh+dt@kernel.org>
2019-02-21 10:40:41 +00:00
Arnd Bergmann
94224c2517 Actions ARM64 DT changes for v5.1:
- Add interrupt properties to S900 pinctrl node
 - Add Reset controller support for S700
 - Add Reset controller support for S900
 - Add pinctrl support for S700
 - Add I2C support for S700
 - Enable I2C0 and I2C1 for s700-cubieboard7
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Merge tag 'actions-arm64-dt-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions into arm/dt

Actions ARM64 DT changes for v5.1:

- Add interrupt properties to S900 pinctrl node
- Add Reset controller support for S700
- Add Reset controller support for S900
- Add pinctrl support for S700
- Add I2C support for S700
- Enable I2C0 and I2C1 for s700-cubieboard7

* tag 'actions-arm64-dt-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions:
  arm64: dts: actions: s700-cubieboard7: Enable I2C0 and I2C1
  arm64: dts: actions: s700: Add I2C controller nodes
  arm64: dts: actions: Add pinctrl node for Actions Semi S700
  arm64: dts: actions: Add Reset Controller support for S900 SoC
  arm64: dts: actions: Add Reset Controller support for S700 SoC
  arm64: dts: actions: Add interrupt properties to pinctrl node for S900

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-20 16:38:27 +01:00
Christoph Hellwig
ff4c25f26a dma-mapping: improve selection of dma_declare_coherent availability
This API is primarily used through DT entries, but two architectures
and two drivers call it directly.  So instead of selecting the config
symbol for random architectures pull it in implicitly for the actual
users.  Also rename the Kconfig option to describe the feature better.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Paul Burton <paul.burton@mips.com> # MIPS
Acked-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-02-20 07:26:35 -07:00
Vladimir Murzin
74698f6971 arm64: Relax GIC version check during early boot
Updates to the GIC architecture allow ID_AA64PFR0_EL1.GIC to have
values other than 0 or 1. At the moment, Linux is quite strict in the
way it handles this field at early boot stage (cpufeature is fine) and
will refuse to use the system register CPU interface if it doesn't
find the value 1.

Fixes: 021f653791 ("irqchip: gic-v3: Initial support for GICv3")
Reported-by: Chase Conklin <Chase.Conklin@arm.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-02-20 14:05:37 +00:00
David S. Miller
375ca548f7 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Two easily resolvable overlapping change conflicts, one in
TCP and one in the eBPF verifier.

Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-20 00:34:07 -08:00
Zenghui Yu
1b44471b55 KVM: arm64: Fix comment for KVM_PHYS_SHIFT
Since Suzuki K Poulose's work on Dynamic IPA support, KVM_PHYS_SHIFT will
be used only when machine_type's bits[7:0] equal to 0 (by default). Thus
the outdated comment should be fixed.

Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-02-19 21:05:55 +00:00
Masahiro Yamada
05277f368c KVM: arm/arm64: Prefix header search paths with $(srctree)/
Currently, the Kbuild core manipulates header search paths in a crazy
way [1].

To fix this mess, I want all Makefiles to add explicit $(srctree)/ to
the search paths in the srctree. Some Makefiles are already written in
that way, but not all. The goal of this work is to make the notation
consistent, and finally get rid of the gross hacks.

Having whitespaces after -I does not matter since commit 48f6e3cf5b
("kbuild: do not drop -I without parameter").

[1]: https://patchwork.kernel.org/patch/9632347/

Acked-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-02-19 21:05:53 +00:00
Masahiro Yamada
3644a35b02 KVM: arm/arm64: Remove -I. header search paths
The header search path -I. in kernel Makefiles is very suspicious;
it allows the compiler to search for headers in the top of $(srctree),
where obviously no header file exists.

I was able to build without these extra header search paths.

Acked-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-02-19 21:05:52 +00:00
Ard Biesheuvel
793acf870e arm64: KVM: Describe data or unified caches as having 1 set and 1 way
On SMP ARM systems, cache maintenance by set/way should only ever be
done in the context of onlining or offlining CPUs, which is typically
done by bare metal firmware and never in a virtual machine. For this
reason, we trap set/way cache maintenance operations and replace them
with conditional flushing of the entire guest address space.

Due to this trapping, the set/way arguments passed into the set/way
ops are completely ignored, and thus irrelevant. This also means that
the set/way geometry is equally irrelevant, and we can simply report
it as 1 set and 1 way, so that legacy 32-bit ARM system software (i.e.,
the kind that only receives odd fixes) doesn't take a performance hit
due to the trapping when iterating over the cachelines.

Acked-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-02-19 21:05:49 +00:00
Ard Biesheuvel
f7f2b15c3d arm64: KVM: Expose sanitised cache type register to guest
We currently permit CPUs in the same system to deviate in the exact
topology of the caches, and we subsequently hide this fact from user
space by exposing a sanitised value of the cache type register CTR_EL0.

However, guests running under KVM see the bare value of CTR_EL0, which
could potentially result in issues with, e.g., JITs or other pieces of
code that are sensitive to misreported cache line sizes.

So let's start trapping cache ID instructions if there is a mismatch,
and expose the sanitised version of CTR_EL0 to guests. Note that CTR_EL0
is treated as an invariant to KVM user space, so update that part as well.

Acked-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-02-19 21:05:48 +00:00
Christoffer Dall
64cf98fa55 KVM: arm/arm64: Move kvm_is_write_fault to header file
Move this little function to the header files for arm/arm64 so other
code can make use of it directly.

Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-02-19 21:05:45 +00:00
Andre Przywara
84135d3d18 KVM: arm/arm64: consolidate arch timer trap handlers
At the moment we have separate system register emulation handlers for
each timer register. Actually they are quite similar, and we rely on
kvm_arm_timer_[gs]et_reg() for the actual emulation anyways, so let's
just merge all of those handlers into one function, which just marshalls
the arguments and then hands off to a set of common accessors.
This makes extending the emulation to include EL2 timers much easier.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[Fixed 32-bit VM breakage and reduced to reworking existing code]
Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
[Fixed 32bit host, general cleanup]
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-02-19 21:05:40 +00:00
Marc Zyngier
09838de943 KVM: arm64: Reuse sys_reg() macro when searching the trap table
Instead of having an open-coded macro, reuse the sys_reg() macro
that does the exact same thing (the encoding is slightly different,
but the ordering property is the same).

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
2019-02-19 21:05:39 +00:00
Marc Zyngier
b98c079ba4 KVM: arm64: Fix ICH_ELRSR_EL2 sysreg naming
We previously incorrectly named the define for this system register.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
2019-02-19 21:05:39 +00:00
Christoffer Dall
e329fb75d5 KVM: arm/arm64: Factor out VMID into struct kvm_vmid
In preparation for nested virtualization where we are going to have more
than a single VMID per VM, let's factor out the VMID data into a
separate VMID data structure and change the VMID allocator to operate on
this new structure instead of using a struct kvm.

This also means that udate_vttbr now becomes update_vmid, and that the
vttbr itself is generated on the fly based on the stage 2 page table
base address and the vmid.

We cache the physical address of the pgd when allocating the pgd to
avoid doing the calculation on every entry to the guest and to avoid
calling into potentially non-hyp-mapped code from hyp/EL2.

If we wanted to merge the VMID allocator with the arm64 ASID allocator
at some point in the future, it should actually become easier to do that
after this patch.

Note that to avoid mapping the kvm_vmid_bits variable into hyp, we
simply forego the masking of the vmid value in kvm_get_vttbr and rely on
update_vmid to always assign a valid vmid value (within the supported
range).

Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
[maz: minor cleanups]
Reviewed-by: Julien Thierry <julien.thierry@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-02-19 21:05:35 +00:00
Marc Zyngier
32f1395519 arm/arm64: KVM: Statically configure the host's view of MPIDR
We currently eagerly save/restore MPIDR. It turns out to be
slightly pointless:
- On the host, this value is known as soon as we're scheduled on a
  physical CPU
- In the guest, this value cannot change, as it is set by KVM
  (and this is a read-only register)

The result of the above is that we can perfectly avoid the eager
saving of MPIDR_EL1, and only keep the restore. We just have
to setup the host contexts appropriately at boot time.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
2019-02-19 21:05:35 +00:00
Marc Zyngier
7cba8a8d0d arm64: KVM: Drop VHE-specific HYP call stub
We now call VHE code directly, without going through any central
dispatching function. Let's drop that code.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
2019-02-19 21:05:28 +00:00
Marc Zyngier
18fc7bf8e0 arm64: KVM: Allow for direct call of HYP functions when using VHE
When running VHE, there is no need to jump via some stub to perform
a "HYP" function call, as there is a single address space.

Let's thus change kvm_call_hyp() and co to perform a direct call
in this case. Although this results in a bit of code expansion,
it allows the compiler to check for type compatibility, something
that we are missing so far.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
2019-02-19 21:05:24 +00:00
Marc Zyngier
7aa8d14641 arm/arm64: KVM: Introduce kvm_call_hyp_ret()
Until now, we haven't differentiated between HYP calls that
have a return value and those who don't. As we're about to
change this, introduce kvm_call_hyp_ret(), and change all
call sites that actually make use of a return value.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
2019-02-19 21:05:24 +00:00
Arnd Bergmann
c8ce48f065 asm-generic: Make time32 syscall numbers optional
We don't want new architectures to even provide the old 32-bit time_t
based system calls any more, or define the syscall number macros.

Add a new __ARCH_WANT_TIME32_SYSCALLS macro that gets enabled for all
existing 32-bit architectures using the generic system call table,
so we don't change any current behavior.
Since this symbol is evaluated in user space as well, we cannot use
a Kconfig CONFIG_* macro but have to define it in uapi/asm/unistd.h.

On 64-bit architectures, the same system call numbers mostly refer to
the system calls we want to keep, as they already pass 64-bit time_t.

As new architectures no longer provide these, we need new exceptions
in checksyscalls.sh.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-19 21:27:32 +01:00
Baruch Siach
bdd22a41d5 arm64: dts: clearfog-gt-8k: fix SGMII PHY reset signal
The PHY reset signal goes to mpp43 on CP0.

Fixes: babc5544c2 ("arm64: dts: clearfog-gt-8k: 1G eth PHY reset signal")
Reported-by: Denis Odintsov <oversun@me.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-02-19 16:09:11 +01:00
Yury Norov
80d7da1cac asm-generic: Drop getrlimit and setrlimit syscalls from default list
The newer prlimit64 syscall provides all the functionality of getrlimit
and setrlimit syscalls and adds the pid of target process, so future
architectures won't need to include getrlimit and setrlimit.

Therefore drop getrlimit and setrlimit syscalls from the generic syscall
list unless __ARCH_WANT_SET_GET_RLIMIT is defined by the architecture's
unistd.h prior to including asm-generic/unistd.h, and adjust all
architectures using the generic syscall list to define it so that no
in-tree architectures are affected.

Cc: Arnd Bergmann <arnd@arndb.de>
Cc: linux-arch@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-hexagon@vger.kernel.org
Cc: uclinux-h8-devel@lists.sourceforge.jp
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Mark Salter <msalter@redhat.com> [c6x]
Acked-by: James Hogan <james.hogan@imgtec.com> [metag]
Acked-by: Ley Foon Tan <lftan@altera.com> [nios2]
Acked-by: Stafford Horne <shorne@gmail.com> [openrisc]
Acked-by: Will Deacon <will.deacon@arm.com> [arm64]
Acked-by: Vineet Gupta <vgupta@synopsys.com> #arch/arc bits
Signed-off-by: Yury Norov <ynorov@marvell.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-19 10:10:06 +01:00
Nathan Chancellor
0738c8b591 arm64/neon: Disable -Wincompatible-pointer-types when building with Clang
After commit cc9f8349cb ("arm64: crypto: add NEON accelerated XOR
implementation"), Clang builds for arm64 started failing with the
following error message.

arch/arm64/lib/xor-neon.c:58:28: error: incompatible pointer types
assigning to 'const unsigned long *' from 'uint64_t *' (aka 'unsigned
long long *') [-Werror,-Wincompatible-pointer-types]
                v3 = veorq_u64(vld1q_u64(dp1 +  6), vld1q_u64(dp2 + 6));
                                         ^~~~~~~~
/usr/lib/llvm-9/lib/clang/9.0.0/include/arm_neon.h:7538:47: note:
expanded from macro 'vld1q_u64'
  __ret = (uint64x2_t) __builtin_neon_vld1q_v(__p0, 51); \
                                              ^~~~

There has been quite a bit of debate and triage that has gone into
figuring out what the proper fix is, viewable at the link below, which
is still ongoing. Ard suggested disabling this warning with Clang with a
pragma so no neon code will have this type of error. While this is not
at all an ideal solution, this build error is the only thing preventing
KernelCI from having successful arm64 defconfig and allmodconfig builds
on linux-next. Getting continuous integration running is more important
so new warnings/errors or boot failures can be caught and fixed quickly.

Link: https://github.com/ClangBuiltLinux/linux/issues/283
Suggested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-02-18 10:54:47 +00:00
Mark Rutland
f54dada827 arm64: fix SSBS sanitization
In valid_user_regs() we treat SSBS as a RES0 bit, and consequently it is
unexpectedly cleared when we restore a sigframe or fiddle with GPRs via
ptrace.

This patch fixes valid_user_regs() to account for this, updating the
function to refer to the latest ARM ARM (ARM DDI 0487D.a). For AArch32
tasks, SSBS appears in bit 23 of SPSR_EL1, matching its position in the
AArch32-native PSR format, and we don't need to translate it as we have
to for DIT.

There are no other bit assignments that we need to account for today.
As the recent documentation describes the DIT bit, we can drop our
comment regarding DIT.

While removing SSBS from the RES0 masks, existing inconsistent
whitespace is corrected.

Fixes: d71be2b6c0 ("arm64: cpufeature: Detect SSBS and advertise to userspace")
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-02-18 10:54:47 +00:00
Baolin Wang
0419a75b18 arm64: dts: sprd: Remove wildcard compatible string
Remove wildcard compatible string.

Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-18 11:33:57 +01:00
Baolin Wang
02643475a8 arm64: dts: sprd: Add SC27XX fuel gauge device
Add Spreadtrum SC27XX fuel gauge device node to calculate the
battery capacity.

Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-18 11:33:21 +01:00
Baolin Wang
a479540953 arm64: dts: sprd: Add SC2731 charger device
Add charger device node and related battery node for SC2731 PMIC.

Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-18 11:33:01 +01:00
Baolin Wang
640e2c51bd arm64: dts: sprd: Add ADC calibration support
This patch adds phandles to the calibration cells provided by the Efuse
device, which is used to calibrate the ADC channel scales.

Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-18 11:32:47 +01:00
Baolin Wang
5863dbe071 arm64: dts: sprd: Remove PMIC INTC irq trigger type
The Spreadtrum PMIC INTC controller has no registers to set trigger type,
since it is always high level trigger as default. So remove its child
devices' irq trigger type setting and change #interrupt-cells to 1.

Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-18 11:32:11 +01:00
Arnd Bergmann
e88dc153ee rockpro64 regulator improvements, rock960 improvements (tsadc, wifi, hdmi
audio), nanopi4 bluetooth support and rk3328-roc-cc gmac improvement.
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Merge tag 'v5.1-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

rockpro64 regulator improvements, rock960 improvements (tsadc, wifi, hdmi
audio), nanopi4 bluetooth support and rk3328-roc-cc gmac improvement.

* tag 'v5.1-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: Enable tsadc device on rock960
  arm64: dts: rockchip: Add on-board WiFi/BT support for Rock960 boards
  arm64: dts: rockchip: fix rk3328-roc-cc gmac2io stability issues
  arm64: dts: rockchip: rockpro64 dts add usb regulator
  arm64: dts: rockchip: rockpro64 dts remove unused lcd-reset pinmux
  arm64: dts: rockchip: rockpro64 dts make regulator more readable
  arm64: dts: rockchip: Add nanopi4 bluetooth
  arm64: dts: rockchip: enable mali power supply on rk3399-rockpro64
  arm64: dts: rockchip: Enable HDMI audio devices on rk3399-rock960

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-18 11:20:31 +01:00
Ezequiel Garcia
02260a619e arm64: dts: rockchip: Enable tsadc device on rock960
Enable the thermal sensor. This device also provides
temperature shutdown protection. The shutdown value is
set at 110C, as tested by the vendor.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-02-17 23:59:05 +01:00
Linus Walleij
8fab3d713c gpio updates for v5.1
- support for a new variant of pca953x
 - documentation fix from Wolfram
 - some tegra186 name changes
 - two minor fixes for madera and altera-a10sr
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Merge tag 'gpio-v5.1-updates-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into devel

gpio updates for v5.1

- support for a new variant of pca953x
- documentation fix from Wolfram
- some tegra186 name changes
- two minor fixes for madera and altera-a10sr
2019-02-17 21:59:33 +01:00
Linus Torvalds
2fee036af0 Merge branch 'efi-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull EFI fixes from Ingo Molnar:
 "This tree reverts a GICv3 commit (which was broken) and fixes it in
  another way, by adding a memblock build-time entries quirk for ARM64"

* 'efi-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  efi/arm: Revert "Defer persistent reservations until after paging_init()"
  arm64, mm, efi: Account for GICv3 LPI tables in static memblock reserve table
2019-02-17 09:22:01 -08:00
Linus Torvalds
ed0a0ec98f A somewhat bigger ARM update, and the usual smattering
of x86 bug fixes.
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Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

Pull KVM fixes from Paolo Bonzini:
 "A somewhat bigger ARM update, and the usual smattering of x86 bug
  fixes"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
  kvm: vmx: Fix entry number check for add_atomic_switch_msr()
  KVM: x86: Recompute PID.ON when clearing PID.SN
  KVM: nVMX: Restore a preemption timer consistency check
  x86/kvm/nVMX: read from MSR_IA32_VMX_PROCBASED_CTLS2 only when it is available
  KVM: arm64: Forbid kprobing of the VHE world-switch code
  KVM: arm64: Relax the restriction on using stage2 PUD huge mapping
  arm: KVM: Add missing kvm_stage2_has_pmd() helper
  KVM: arm/arm64: vgic: Always initialize the group of private IRQs
  arm/arm64: KVM: Don't panic on failure to properly reset system registers
  arm/arm64: KVM: Allow a VCPU to fully reset itself
  KVM: arm/arm64: Reset the VCPU without preemption and vcpu state loaded
  arm64: KVM: Don't generate UNDEF when LORegion feature is present
  KVM: arm/arm64: vgic: Make vgic_cpu->ap_list_lock a raw_spinlock
  KVM: arm/arm64: vgic: Make vgic_dist->lpi_list_lock a raw_spinlock
  KVM: arm/arm64: vgic: Make vgic_irq->irq_lock a raw_spinlock
2019-02-17 08:28:49 -08:00
Ard Biesheuvel
582a32e708 efi/arm: Revert "Defer persistent reservations until after paging_init()"
This reverts commit eff8962888, which
deferred the processing of persistent memory reservations to a point
where the memory may have already been allocated and overwritten,
defeating the purpose.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Mike Rapoport <rppt@linux.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-efi@vger.kernel.org
Link: http://lkml.kernel.org/r/20190215123333.21209-3-ard.biesheuvel@linaro.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-02-16 15:02:03 +01:00
Ard Biesheuvel
8a5b403d71 arm64, mm, efi: Account for GICv3 LPI tables in static memblock reserve table
In the irqchip and EFI code, we have what basically amounts to a quirk
to work around a peculiarity in the GICv3 architecture, which permits
the system memory address of LPI tables to be programmable only once
after a CPU reset. This means kexec kernels must use the same memory
as the first kernel, and thus ensure that this memory has not been
given out for other purposes by the time the ITS init code runs, which
is not very early for secondary CPUs.

On systems with many CPUs, these reservations could overflow the
memblock reservation table, and this was addressed in commit:

  eff8962888 ("efi/arm: Defer persistent reservations until after paging_init()")

However, this turns out to have made things worse, since the allocation
of page tables and heap space for the resized memblock reservation table
itself may overwrite the regions we are attempting to reserve, which may
cause all kinds of corruption, also considering that the ITS will still
be poking bits into that memory in response to incoming MSIs.

So instead, let's grow the static memblock reservation table on such
systems so it can accommodate these reservations at an earlier time.
This will permit us to revert the above commit in a subsequent patch.

[ mingo: Minor cleanups. ]

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Mike Rapoport <rppt@linux.ibm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-efi@vger.kernel.org
Link: http://lkml.kernel.org/r/20190215123333.21209-2-ard.biesheuvel@linaro.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-02-16 15:02:03 +01:00
Parthiban Nallathambi
9175a8116f
arm64: dts: actions: s700-cubieboard7: Enable I2C0 and I2C1
Add pinctrl definitions for Actions Semiconductor S700 I2C controllers.
Pinctrl definitions are only available for I2C0, I2C1 and I2C2.
Enable I2C0 (PMIC), I2C1 (gyro, touchscreen) in cubieboard7.

Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-02-16 11:32:46 +05:30
Parthiban Nallathambi
7cf0aacfa8
arm64: dts: actions: s700: Add I2C controller nodes
Add I2C controller nodes for Actions Semiconductor S700 SoC.

Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-02-16 11:32:46 +05:30
Saravanan Sekar
7cdf8446ed
arm64: dts: actions: Add pinctrl node for Actions Semi S700
Add pinctrl nodes for Actions Semi S700 SoC

Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Signed-off-by: Saravanan Sekar <sravanhome@gmail.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-02-16 11:32:46 +05:30
Manivannan Sadhasivam
7cac6c0cb3
arm64: dts: actions: Add Reset Controller support for S900 SoC
Add reset controller property and bindings header for the
Actions Semi S900 SoC DTS.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-02-16 11:32:46 +05:30
Manivannan Sadhasivam
782976299a
arm64: dts: actions: Add Reset Controller support for S700 SoC
Add reset controller property and bindings header for the
Actions Semi S700 SoC DTS.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-02-16 11:32:46 +05:30
Manivannan Sadhasivam
ccb01374a8
arm64: dts: actions: Add interrupt properties to pinctrl node for S900
Add interrupt properties to pinctrl node for Actions Semi S900 SoC.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2019-02-16 11:32:09 +05:30
David S. Miller
3313da8188 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
The netfilter conflicts were rather simple overlapping
changes.

However, the cls_tcindex.c stuff was a bit more complex.

On the 'net' side, Cong is fixing several races and memory
leaks.  Whilst on the 'net-next' side we have Vlad adding
the rtnl-ness support.

What I've decided to do, in order to resolve this, is revert the
conversion over to using a workqueue that Cong did, bringing us back
to pure RCU.  I did it this way because I believe that either Cong's
races don't apply with have Vlad did things, or Cong will have to
implement the race fix slightly differently.

Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-15 12:38:38 -08:00
Arnd Bergmann
29cf2ee3b5 Qualcomm ARM64 Updates for v5.1
* Add MSM8998 RPMCC, I2C, and USB related nodes
 * Add MSM8996 rpmpd node
 * Fix typo in MSM8996 pin definitions
 * Disable MSM8996 VFE smmu to fix security violation
 * Add I2C, SPI, rpmcc, uart, and WCN3990 wlan nodes on QCS404
 * Enable SDCC1 HS400 support on QCS404
 * Add a multitude of nodes on SDM845:
   SD, UFS, USB, LPASS, SCM, QSPI, PDC, DPU, videocc, GPU, RPMh
   bus interconnect, WCN3990 WLAN
 * Add gpio ranges to SDM845 TLMM
 * Fix regulator load on sdcard on MSM8998-mtp board
 * Add thermal trip points to cpufreq
 * Add SDM845 IOMMU info for SDHC, USB, and WLAN
 * Fix MSM8916 clock cell argument
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Merge tag 'qcom-arm64-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into arm/dt

Qualcomm ARM64 Updates for v5.1

* Add thermal trip points to cpufreq
* Add SDM845 IOMMU info for SDHC, USB, and WLAN
* Fix MSM8916 clock cell argument

* tag 'qcom-arm64-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  arm64: dts: sdm845: Fixup dependency on RPMPD includes
  arm64: dts: sdm845: Add clocks and iommus to WCN3990 WLAN node
  arm64: dts: qcom: sdm845: Define iommus for USB controllers
  arm64: dts: qcom: sdm845: Define IOMMU for sdhc 2
  arm64: dts: sdm845: wireup the thermal trip points to cpufreq
  arm64: dts: msm8916: remove bogus argument to the cpu clock

[arnd: I've pulled the earlier branch again after an update, this
 adds the stuff listed above, and fixes a build error from the missing
 dependency, as I requested]

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 20:47:14 +01:00
Arnd Bergmann
cfe9930e94 Merge tag 'amlogic-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/fixes
Amlogic SoC Kconfig updates for v5.1:
- arm64: meson: enable g12a clock controller
- drop unneeded COMMON_CLK_AMLOGIC

* tag 'amlogic-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  arm64: meson: enable g12a clock controller
  ARM: meson: remove COMMON_CLK_AMLOGIC selection
  arm64: meson: remove COMMON_CLK_AMLOGIC selection

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 20:38:15 +01:00
Arnd Bergmann
ad75174f39 Merge tag 'imx-soc-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX SoC changes for 5.1:
 - Support cpuidle for i.MX7ULP, states WFI, WAIT and STOP get added.
 - Support SoC revision detecting for i.MX7ULP by reading JTAG_ID
   register from SIM module.
 - Select PM and GPCv2 irqchip driver options for i.MX8 support, as they
   are essential for building an i.MX8 based system.
 - Skip build of ssi-fiq code if SND_SOC_IMX_PCM_FIQ is not enabled.

* tag 'imx-soc-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: imx8mq: select PM support
  arm64: imx8mq: select GPCv2 irqchip driver
  ARM: imx: add i.MX7ULP SoC revision support
  ARM: imx: add i.MX7ULP cpuidle support
  ARM: imx: don't build ssi-fiq if not required

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 20:38:14 +01:00
Arnd Bergmann
0fe8f1e5bb AM654x SoC updates for v5.1 (part 2)
Contains a few DT updates on top of part 1 of the pull:
 
 - MSMC RAM support (on-chip SRAM)
 - Main system control module support
 - USB support
 - ADC support
 
 There is an extra dt-binding update included, which has been acked
 by Rob.
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Merge tag 'am654-for-v5.1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into HEAD

AM654x SoC updates for v5.1 (part 2)

Contains a few DT updates on top of part 1 of the pull:

- MSMC RAM support (on-chip SRAM)
- Main system control module support
- USB support
- ADC support

There is an extra dt-binding update included, which has been acked
by Rob.

* tag 'am654-for-v5.1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux:
  arm64: dts: ti: k3-am65-mcu: Add ADC nodes
  dt-bindings: input: ti-tsc-adc: Add new compatible for AM654 SoCs
  arm64: dts: ti: k3-am654-base-board: enable USB1
  arm64: dts: ti: k3-am6: add USB support
  arm64: dts: ti: am654: Add Main System Control Module node
  arm64: dts: ti: k3-am65: Add MSMC RAM node

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 20:32:01 +01:00
Andy Gross
08585d21de arm64: dts: sdm845: Fixup dependency on RPMPD includes
This patch fixes a dependency issue with the RPMPD dt bindings.  This
temporarily removes the include file and adds hardcoded values for the
OPPs until the other changes full land.  This will be addressed in 5.2.

Fixes: 5b6f186f0a ("arm64: dts: sdm845: Add rpmh powercontroller node")

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-02-15 13:13:51 -06:00
Catalin Marinas
0543371a57 Merge branch 'for-next/perf' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux
* 'for-next/perf' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux:
  perf: xgene: Remove set but not used variable 'config'
  arm64: perf: remove misleading comment
  dt-bindings: arm: Convert PMU binding to json-schema
2019-02-15 18:34:41 +00:00
Arnd Bergmann
4e5ddaa8c0 Allwinner arm64 defconfig changes for 5.1
Two new additions to arm64's defconfig to support A64 boards.
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Merge tag 'sunxi-config64-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/defconfig

Allwinner arm64 defconfig changes for 5.1

Two new additions to arm64's defconfig to support A64 boards.

* tag 'sunxi-config64-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  arm64: defconfig: Enable SUN6I Camera sensor interface
  arm64: defconfig: Enable I2C_GPIO

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 16:51:26 +01:00
Arnd Bergmann
bf86784276 Renesas ARM64 Based SoC Defconfig Updates for v5.1
Enable:
 * PCM3168A support which is required for audio on Kingfisher daughterboards
 * R-Car thermal support
 * Gen3 PCIe PHY support
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Merge tag 'renesas-arm64-defconfig-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/defconfig

Renesas ARM64 Based SoC Defconfig Updates for v5.1

Enable:
* PCM3168A support which is required for audio on Kingfisher daughterboards
* R-Car thermal support
* Gen3 PCIe PHY support

* tag 'renesas-arm64-defconfig-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  arm64: defconfig: select Kingfisher Sound related configs
  arm64: defconfig: Enable R-Car thermal driver
  arm64: defconfig: Enable CONFIG_PHY_RCAR_GEN3_PCIE

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 16:50:41 +01:00
Arnd Bergmann
94e4d309ea arm64: tegra: Default configuration changes for v5.1-rc1
Enables the TCU driver to be built into the kernel, so that the TCU can
 be used as debug serial on Jetson Xavier. This also enables the MAX8973
 regulator driver that is required for CPU frequency scaling on Tegra210.
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Merge tag 'tegra-for-5.1-arm64-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/defconfig

arm64: tegra: Default configuration changes for v5.1-rc1

Enables the TCU driver to be built into the kernel, so that the TCU can
be used as debug serial on Jetson Xavier. This also enables the MAX8973
regulator driver that is required for CPU frequency scaling on Tegra210.

* tag 'tegra-for-5.1-arm64-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: defconfig: Enable Tegra TCU
  arm64: defconfig: Enable MAX8973 regulator

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 16:48:42 +01:00
Arnd Bergmann
ae4dbf8ced i.MX defconfig updates for 5.1:
- Enable a number of i.MX SoC and driver options in arm64 defconfig.
    The built-in drivers include: clock, pinctrl, power domain, serial,
    MBox, SCU, Ethernet, MMC, regulator and watchdog, which are mostly
    essential for building an useful kernel image for i.MX8 platform,
    booting with rootfs on NFS or eMMC.
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Merge tag 'imx-defconfig-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/defconfig

i.MX defconfig updates for 5.1:
 - Enable a number of i.MX SoC and driver options in arm64 defconfig.
   The built-in drivers include: clock, pinctrl, power domain, serial,
   MBox, SCU, Ethernet, MMC, regulator and watchdog, which are mostly
   essential for building an useful kernel image for i.MX8 platform,
   booting with rootfs on NFS or eMMC.

* tag 'imx-defconfig-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: defconfig: Add IMX2+ watchdog
  arm64: defconfig: Enable PFUZE100 regulator
  arm64: defconfig: enable NXP FlexSPI driver
  arm64: defconfig: Add i.MX8MQ boot necessary configs
  arm64: defconfig: add imx8qxp support
  arm64: defconfig: add i.MX system controller RTC support

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 16:47:27 +01:00
Arnd Bergmann
87503c012a UniPhier ARM64 SoC DT updates for v5.1
- Add PCI Express controller nodes
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Merge tag 'uniphier-dt64-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into arm/dt

UniPhier ARM64 SoC DT updates for v5.1

- Add PCI Express controller nodes

* tag 'uniphier-dt64-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
  arm64: dts: uniphier: sort labels in the same order as in dtsi
  arm64: dts: uniphier: Add PCIe host controller and PHY nodes

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 16:20:03 +01:00
Arnd Bergmann
69733808a4 arm64: dts: zynqmp: DT changes for v5.1
- Extend timeout for wifi to power up on Ultra96
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Merge tag 'zynqmp-dt-for-v5.1' of https://github.com/Xilinx/linux-xlnx into arm/dt

arm64: dts: zynqmp: DT changes for v5.1

- Extend timeout for wifi to power up on Ultra96

* tag 'zynqmp-dt-for-v5.1' of https://github.com/Xilinx/linux-xlnx:
  arm64: dts: zcu100-revC: Give wifi some time after power-on

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 16:11:55 +01:00
Arnd Bergmann
b217a721e9 i.MX arm64 device tree changes for 5.1:
- Add initial i.MX8QXP SoC and MEK board support.
  - Various device additions to i.MX8MQ SoC and EVK board support:
    RTC, QuadSPI, PMU, ECSPI, PWM, GPC power domain, USB etc.
  - Use generic node name for m25p80 flash on layerscape devices.
  - Add num-viewport property for layerscape PCIe devices, and
    incr-burst-type-adjustment for USB3 devices.
  - Add LS1012AX based Oxalis board support.
  - Add fsl-mc, FlexSPI device and dma-ranges property for LX2160A SoC.
  - Add SMMU device and missing dma-coherent property in fsl-mc for
    LS1088 SoC.
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Merge tag 'imx-dt64-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX arm64 device tree changes for 5.1:
 - Add initial i.MX8QXP SoC and MEK board support.
 - Various device additions to i.MX8MQ SoC and EVK board support:
   RTC, QuadSPI, PMU, ECSPI, PWM, GPC power domain, USB etc.
 - Use generic node name for m25p80 flash on layerscape devices.
 - Add num-viewport property for layerscape PCIe devices, and
   incr-burst-type-adjustment for USB3 devices.
 - Add LS1012AX based Oxalis board support.
 - Add fsl-mc, FlexSPI device and dma-ranges property for LX2160A SoC.
 - Add SMMU device and missing dma-coherent property in fsl-mc for
   LS1088 SoC.

* tag 'imx-dt64-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (30 commits)
  arm64: dts: imx8mq: specify dma-ranges
  arm64: dts: imx8mq: Add ARM PMU node
  arm64: dts: imx8mq: Add RTC support
  arm64: dts: imx8mq-evk: Enable the QuadSPI controller
  arm64: dts: imx8mq: Add QuadSPI controller
  arm64: dts: imx8mq: Add ECSPI support
  arm64: dts: imx8mq-evk: Add fsl,magic-packet property
  arm64: dts: imx8mq-evk: add missing MDIO / PHY nodes
  arm64: dts: imx8mq-evk: enable USB nodes for USB3 host
  arm64: dts: imx8mq: add USB nodes
  arm64: dts: imx8mq: properly describe IRQ hierarchy
  arm64: dts: lx2160a: update fspi node
  arm64: dts: freescale: Add devicetree for Oxalis
  arm64: dts: lx2160a: add FlexSPI node property
  arm64: dts: imx8qxp: Fix MU4_INT number
  arm64: dts: imx8mq: add GPC power domains
  arm64: dts: imx8mq: Add pwm device nodes
  arm64: dts: imx: add i.MX8QXP system controller RTC support
  arm64: dts: imx: add imx8qxp mek support
  arm64: dts: imx: add imx8qxp support
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 16:11:01 +01:00
Arnd Bergmann
e7b984912d arm64: dts: Amlogic updates for v5.1
- new board: G12a-based x96 max
 - G12a: add peripheral clock controller and clock measure support
 - s400: fix SD/eMMC max rate issues
 - s400: audio: add sp/dif in support
 - GX: support simplefb
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Merge tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt

arm64: dts: Amlogic updates for v5.1
- new board: G12a-based x96 max
- G12a: add peripheral clock controller and clock measure support
- s400: fix SD/eMMC max rate issues
- s400: audio: add sp/dif in support
- GX: support simplefb

* tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  arm64: dts: meson: add g12a x96 max board
  dt-bindings: arm: amlogic: add amediatech x96-max bindings
  arm64: dts: meson: g12a: add peripheral clock controller
  arm64: dts: meson: g12a: add clk measure support
  arm64: dts: meson: axg: add clk measure support
  arm64: dts: meson: fix g12a buses
  arm64: dts: meson-axg: add efuse device
  arm64: dts: meson: s400: fix emmc maximum rate
  arm64: dts: meson: s400: enable sdr104 on sdio
  arm64: dts: meson-gx: add support for simplefb
  dt-bindings: meson: add specific simplefb bindings
  arm64: dts: meson-gx: Add canvas provider node to the vpu
  arm64: dts: meson-axg: s400: add spdifin to the sound card
  arm64: dts: meson-axg: s400: add spdif-dir codec
  arm64: dts: meson-axg: add spdifin

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 16:04:21 +01:00
Arnd Bergmann
1c2950563a mvebu dt64 for 5.1 (part 1)
- Interrupt support to Armada 7K/8K thermal nodes
  - Armada 37xx related patches allowing to enable suspend to RAM
    (USB2, USB3, PCIe, SATA, DSA)
  - uDPU board support (Armada-3720 based):single-port FTTdp
     distribution point unit
  - Fixes for EspressoBin Ethernet support when using U-Boot mainline
  - cleanup for partitions under flashes nodes
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Merge tag 'mvebu-dt64-5.1-1' of git://git.infradead.org/linux-mvebu into arm/dt

mvebu dt64 for 5.1 (part 1)

 - Interrupt support to Armada 7K/8K thermal nodes
 - Armada 37xx related patches allowing to enable suspend to RAM
   (USB2, USB3, PCIe, SATA, DSA)
 - uDPU board support (Armada-3720 based):single-port FTTdp
    distribution point unit
 - Fixes for EspressoBin Ethernet support when using U-Boot mainline
 - cleanup for partitions under flashes nodes

* tag 'mvebu-dt64-5.1-1' of git://git.infradead.org/linux-mvebu:
  arm64: dts: marvell: armada-37xx: link USB hosts with their PHYs
  arm64: dts: marvell: armada-3720-espressobin: declare SATA PHY property
  arm64: dts: marvell: armada-3720-espressobin: declare PCIe PHY
  arm64: dts: marvell: armada-37xx: declare the COMPHY node
  arm64: dts: marvell: Remove unnecessary #address-cells/#size-cells under flashes
  arm64: dts: armada-3720-espressobin: Set mv88e6341 cpu port as RGMII-ID
  arm64: dts: armada-3720-espressobin: Configure RGMII and SMI pins
  arm64: dts: marvell: Add device tree for uDPU board
  arm64: dts: marvell: armada-3720-espressobin: declare PCIe warm reset pin
  arm64: dts: marvell: armada-37xx: declare PCIe reset pin
  arm64: dts: marvell: armada-37xx: declare USB2 UTMI PHYs
  arm64: dts: marvell: armada-37xx: fix USB2 memory region
  arm64: dts: marvell: armada-37xx: declare SATA clock
  arm64: dts: marvell: armada-37xx: fix SATA node scope
  arm64: dts: marvell: add interrupt support to cp110 thermal node
  arm64: dts: marvell: add interrupt support to ap806 thermal node

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 16:00:46 +01:00
Arnd Bergmann
1de741634b mt2712:
Add device nodes for usb3, iommu, smi, i2c, spi, pwm,
 mmc, NAND flash and PCIe
 
 mt6797:
 add pinctrl node
 enable uart pins on x20 board
 enable uart pins on EVB
 
 mt7622:
 Add all CPUs to the cooling maps
 
 mt7623a:
 Remove unused binding description
 
 mt7629:
 Add binding description for the SoC and the BananaPi
 based on this chip
 
 mt8173:
 Add all CPUs to the cooling maps
 
 mt8183:
 Add binding description for the SoC
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Merge tag 'v5.0-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt

mt2712:
Add device nodes for usb3, iommu, smi, i2c, spi, pwm,
mmc, NAND flash and PCIe

mt6797:
add pinctrl node
enable uart pins on x20 board
enable uart pins on EVB

mt7622:
Add all CPUs to the cooling maps

mt7623a:
Remove unused binding description

mt7629:
Add binding description for the SoC and the BananaPi
based on this chip

mt8173:
Add all CPUs to the cooling maps

mt8183:
Add binding description for the SoC

* tag 'v5.0-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  dt-bindings: arm: mediatek: add support for MT7622 BPI-R64 and MT7629 RFB
  dt-bindings: arm: mediatek: remove unused "mediatek, mt7623a"
  dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform
  arm64: dts: add pcie nodes for MT2712
  arm64: dts: add nand nodes for MT2712
  arm64: dts: add mmc nodes for MT2712
  arm64: dts: add pwm nodes for MT2712
  arm64: dts: add spi nodes for MT2712
  arm64: dts: add i2c nodes for MT2712
  arm64: dts: add iommu/smi nodes for MT2712
  arm64: dts: Add USB3 related nodes for MT2712
  ARM64: dts: mediatek: Add all CPUs in cooling maps
  arm64: dts: Add uart for mt6797 EVB
  arm64: dts: mediatek: x20: Add pinmux support for UART1
  arm64: dts: mediatek: mt6797: Add pinctrl support

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 15:59:45 +01:00
Arnd Bergmann
1228c051ba arm64: tegra: Device tree changes for v5.1-rc1
This contains a couple of fixes to existing device trees, enables CPU
 frequency scaling on various Tegra210 boards, enables the TCU as debug
 serial port on Jetson Xavier, adds various improvements for SDMMC on
 Tegra210, Tegra186 and Tegra194 boards and finally adds initial support
 for the NVIDIA Shield TV.
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Merge tag 'tegra-for-5.1-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

arm64: tegra: Device tree changes for v5.1-rc1

This contains a couple of fixes to existing device trees, enables CPU
frequency scaling on various Tegra210 boards, enables the TCU as debug
serial port on Jetson Xavier, adds various improvements for SDMMC on
Tegra210, Tegra186 and Tegra194 boards and finally adds initial support
for the NVIDIA Shield TV.

* tag 'tegra-for-5.1-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (25 commits)
  arm64: tegra: Update compatible for Tegra186 I2C
  arm64: tegra: Update compatible for Tegra210 I2C
  arm64: tegra: Support 200 MHz for SDMMC on Tegra194
  arm64: tegra: Add CQE Support for SDMMC4
  arm64: tegra: Add SDMMC auto-calibration settings
  arm64: tegra: Mark TCU as primary serial port on Tegra194 P2888
  arm64: tegra: Add nodes for TCU on Tegra194
  arm64: tegra: Enable DFLL clock on Smaug
  arm64: tegra: Add CPU power rail regulator on Smaug
  arm64: tegra: Enable DFLL clock on Jetson TX1
  arm64: tegra: Add pinmux for PWM-based DFLL support on P2597
  arm64: tegra: Add CPU clocks on Tegra210
  arm64: tegra: Add DFLL clock on Tegra210
  arm64: tegra: p2771-0000: Use TEGRA186_ prefix for GPIO names
  arm64: tegra: p3310: Use TEGRA186_ prefix for GPIO names
  arm64: tegra: p2597: Sort nodes by unit-address
  arm64: tegra: p2972: Sort nodes properly
  arm64: tegra: Add regulators for Tegra210 Darcy
  arm64: tegra: Add pinmux for Darcy board
  arm64: tegra: Add gpio-keys nodes for Darcy
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 15:52:12 +01:00
Arnd Bergmann
ec38fad35f Second Round of Renesas ARM64 Based SoC DT Updates for v5.1
* R-Car Gen3 SoC based Salvator-X, Salvator-XS and ULCB boards
   - Enable HS400 support for eMMC
 
 * R-Car E3 (r7a77990) SoC
   - Add OPPs table for cpu devices
 
 * RZ/G2E (r8a774c0) SoC
   - Describe TMU, CMT, SDHI devices in DT
   - Describe pincontrol support for SCIF2 device in DT
   - Add OPPs table for cpu devices
 
 * RZ/G2E (r8a774c0) based EK874 board and CAT875 sub-board,
   and CAT874 board
   - Initial support
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Merge tag 'renesas-arm64-dt2-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/dt

Second Round of Renesas ARM64 Based SoC DT Updates for v5.1

* R-Car Gen3 SoC based Salvator-X, Salvator-XS and ULCB boards
  - Enable HS400 support for eMMC

* R-Car E3 (r7a77990) SoC
  - Add OPPs table for cpu devices

* RZ/G2E (r8a774c0) SoC
  - Describe TMU, CMT, SDHI devices in DT
  - Describe pincontrol support for SCIF2 device in DT
  - Add OPPs table for cpu devices

* RZ/G2E (r8a774c0) based EK874 board and CAT875 sub-board,
  and CAT874 board
  - Initial support

* tag 'renesas-arm64-dt2-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  arm64: dts: renesas: cat875: Enable PCIe support
  arm64: dts: renesas: r8a774c0-cat874: Add pciec0 support
  arm64: dts: renesas: r8a774c0: Add TMU device nodes
  arm64: dts: renesas: r8a774c0: Add CMT device nodes
  arm64: dts: renesas: r8a774c0: Add OPPs table for cpu devices
  arm64: dts: renesas: r8a77990: Add OPPs table for cpu devices
  arm64: dts: renesas: enable HS400 on R-Car Gen3
  arm64: dts: renesas: cat875: Add ethernet support
  arm64: dts: renesas: r8a774c0-cat874: Add uSD support
  arm64: dts: renesas: r8a774c0-cat874: Add pincontrol support to scif2
  arm64: dts: renesas: Add Si-Linux EK874 board support
  arm64: dts: renesas: Add Si-Linux CAT874 board support

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 15:44:18 +01:00
Arnd Bergmann
175a366f70 Allwinner arm64 DT changes for 5.1, take 2
Our usual round of DT changes for the arm64 Allwinner SoCs:
   - Enabling of the various power supplies on most a64 boards
   - H6 SRAM controller support
   - A64 CSI support
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Merge tag 'sunxi-dt64-for-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt

Allwinner arm64 DT changes for 5.1, take 2

Our usual round of DT changes for the arm64 Allwinner SoCs:
  - Enabling of the various power supplies on most a64 boards
  - H6 SRAM controller support
  - A64 CSI support

* tag 'sunxi-dt64-for-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  arm64: dts: allwinner: a64: Enable PMIC power supplies on various boards
  arm64: dts: allwinner: a64: teres-i: enable power supplies
  arm64: dts: allwinner: h6: Add support for the SRAM C1 section
  dt-bindings: sram: sunxi: Add compatible for the H6 SRAM C1
  arm64: dts: allwinner: a64: Add A64 CSI controller
  arm64: dts: allwinner: h6: Move GIC device node fix base address ordering

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 15:41:29 +01:00
Arnd Bergmann
51098f76dd Allwinner H3 and H5 changes for 5.1
Our usual round of DT changes shared between arm and arm64.
 
 We have a bunch of changes for board, improving the eMMC support on the H5
 variant of the All-H3-CC, enabling HDMI and reworking the CSI driver.
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Merge tag 'sunxi-h3-h5-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt

Allwinner H3 and H5 changes for 5.1

Our usual round of DT changes shared between arm and arm64.

We have a bunch of changes for board, improving the eMMC support on the H5
variant of the All-H3-CC, enabling HDMI and reworking the CSI driver.

* tag 'sunxi-h3-h5-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  arm64: dts: allwinner: h5: libretech-all-h3-cc: Mark eMMC HS-DDR 3.3V capable
  ARM: dts: sunxi: h3/h5: Drop A31 fallback compatible for CSI controller
  ARM: dts: sun8i-h3: nanopi-m1-plus: enable HDMI

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 15:40:13 +01:00
Arnd Bergmann
f5691ad172 SoCFPGA DTS updates for v5.1
- Add SMMU node for Stratix10
 - Add vendor prefix fo Novtech
 - Add a new 96Boards Chameleon96 board that uses a Cyclone5 SoCFPGA
 - Add missing reset properties for all IP on Cyclone5 and Arria10
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Merge tag 'socfpga_dts_for_v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt

SoCFPGA DTS updates for v5.1
- Add SMMU node for Stratix10
- Add vendor prefix fo Novtech
- Add a new 96Boards Chameleon96 board that uses a Cyclone5 SoCFPGA
- Add missing reset properties for all IP on Cyclone5 and Arria10

* tag 'socfpga_dts_for_v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: dts: socfpga: update more missing reset properties
  ARM: dts: socfpga: update missing reset property peripherals
  ARM: dts: Add support for 96Boards Chameleon96 board
  dt-bindings: vendor-prefixes: Add Novtech Vendor Prefix
  arm64: dts: stratix10: Add Stratix10 SMMU support

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 15:38:59 +01:00
Arnd Bergmann
01a8ab4e5e ARM64: DT: Hisilicon SoCs DT updates for 5.1
* Hi6220 SoC and related boards:
   - Add DMA entries to enable DMA for Bluetooth transfers
   - Add power-on delay to make wifi stable
   - Revert HS200 mode to avoid eMMC controller resets and block read failures
 
 * Hi3660 SoC and related boards:
   - Fix SD card detection via setting cd-gpios correctly
 
 * Hi3798 SoC and related boards:
   - Fix malformed SPDX license identifier
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Merge tag 'hisi-arm64-dt-for-5.1v2' of git://github.com/hisilicon/linux-hisi into arm/dt

ARM64: DT: Hisilicon SoCs DT updates for 5.1

* Hi6220 SoC and related boards:
  - Add DMA entries to enable DMA for Bluetooth transfers
  - Add power-on delay to make wifi stable
  - Revert HS200 mode to avoid eMMC controller resets and block read failures

* Hi3660 SoC and related boards:
  - Fix SD card detection via setting cd-gpios correctly

* Hi3798 SoC and related boards:
  - Fix malformed SPDX license identifier

* tag 'hisi-arm64-dt-for-5.1v2' of git://github.com/hisilicon/linux-hisi:
  arm64: dts: hikey: Revert "Enable HS200 mode on eMMC"
  arm64: dts: hikey: Give wifi some time after power-on
  arm64: dts: hi3798cv200: fix malformed SPDX license identifier
  arm64: dts: hikey960: fix SDcard detection
  arm64: dts: hikey: Add DMA entries for Bluetooth UART

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 15:37:43 +01:00
Arnd Bergmann
2ab58c853e Qualcomm ARM64 Updates for v5.1
* Add MSM8998 RPMCC, I2C, and USB related nodes
 * Add MSM8996 rpmpd node
 * Fix typo in MSM8996 pin definitions
 * Disable MSM8996 VFE smmu to fix security violation
 * Add I2C, SPI, rpmcc, uart, and WCN3990 wlan nodes on QCS404
 * Enable SDCC1 HS400 support on QCS404
 * Add a multitude of nodes on SDM845:
   SD, UFS, USB, LPASS, SCM, QSPI, PDC, DPU, videocc, GPU, RPMh
   bus interconnect, WCN3990 WLAN
 * Add gpio ranges to SDM845 TLMM
 * Fix regulator load on sdcard on MSM8998-mtp board
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Merge tag 'qcom-arm64-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into arm/dt

Qualcomm ARM64 Updates for v5.1

* Add MSM8998 RPMCC, I2C, and USB related nodes
* Add MSM8996 rpmpd node
* Fix typo in MSM8996 pin definitions
* Disable MSM8996 VFE smmu to fix security violation
* Add I2C, SPI, rpmcc, uart, and WCN3990 wlan nodes on QCS404
* Enable SDCC1 HS400 support on QCS404
* Add a multitude of nodes on SDM845:
  SD, UFS, USB, LPASS, SCM, QSPI, PDC, DPU, videocc, GPU, RPMh
  bus interconnect, WCN3990 WLAN
* Add gpio ranges to SDM845 TLMM
* Fix regulator load on sdcard on MSM8998-mtp board

* tag 'qcom-arm64-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: (41 commits)
  arm64: dts: sdm845: Add interconnect provider DT nodes
  arm64: dts: qcom: msm8996: Disabled VFE SMMU
  arm64: dts: qcom: qcs404: Add rpmcc node
  arm64: dts: qcom: msm8998: Add rpmcc node
  arm64: dts: qcom: msm8998: Add USB-related nodes
  arm64: dts: qcom: qcs404: Add QUP I2C and SPI nodes
  arm64: dts: qcom: qcs404: Define remaining UARTs
  arm64: dts: qcom: qcs404: Specify pinctrl state for UART
  arm64: dts: qcom: sdm845: Fix lpasscc reg
  arm64: dts: qcom: sdm845: Remove the duplicate header inclusion
  arm64: dts: qcom: sdm845: Add reserve-memory nodes
  arm64: dts: qcom: sdm845: Add gpio-ranges to TLMM node
  arm64: dts: qcom: sdm845: Extend ranges and describe DMA space
  arm64: dts: qcom: sdm845: Increase address and size cells for soc
  arm64: dts: sdm845: Add rpmh powercontroller node
  arm64: dts: msm8996: Add rpmpd device node
  arm64: dts: sdm845: Add WCN3990 WLAN module device node
  arm64: dts: qcom: sdm845: Add PDC Global reset driver node
  arm64: dts: qcom: sdm845: Add SCM DT node
  arm64: dts: qcom: sdm845: Fix pcs_misc region address for UNI PHY
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 15:31:25 +01:00
Arnd Bergmann
e47d047e96 This pull request contains Broadcom ARM64-based SoCs Device Tree updates
for 5.1, please pull the following:
 
 - Stefan adds support for the Raspberry Pi 3 A+ by using the same
   mechanism of creating a symbolic reference to the ARM 32-bit DTS file
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Merge tag 'arm-soc/for-5.1/devicetree-arm64' of https://github.com/Broadcom/stblinux into arm/dt

This pull request contains Broadcom ARM64-based SoCs Device Tree updates
for 5.1, please pull the following:

- Stefan adds support for the Raspberry Pi 3 A+ by using the same
  mechanism of creating a symbolic reference to the ARM 32-bit DTS file

* tag 'arm-soc/for-5.1/devicetree-arm64' of https://github.com/Broadcom/stblinux:
  arm64: dts: broadcom: Add reference to RPi 3 A+
  ARM: dts: add Raspberry Pi 3 A+

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 15:28:45 +01:00
Arnd Bergmann
db49e22ae2 New boards are the Rock Pi 4, NanoPC-T4 and NanoPi-M4, with the last
two being part of a family and sharing bigger parts of the devicetree.
 rk3328 got sound-related upgrades and a wider patch drops mmc display-wp
 fields from nodes which shouldn't use it.
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Merge tag 'v5.1-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

New boards are the Rock Pi 4, NanoPC-T4 and NanoPi-M4, with the last
two being part of a family and sharing bigger parts of the devicetree.
rk3328 got sound-related upgrades and a wider patch drops mmc display-wp
fields from nodes which shouldn't use it.

* tag 'v5.1-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: clean up the abuse of disable-wp
  arm64: dts: rockchip: 'Fix' nanopi4 uSD card detect
  arm64: dts: rockchip: Add NanoPC-T4 IR receiver
  arm64: dts: rockchip: Refine nanopi4 differences
  arm64: dts: rockchip: Add DT for NanoPi M4
  arm64: dts: rockchip: add ROCK Pi 4 DTS support
  arm64: dts: rockchip: Add devicetree for NanoPC-T4
  arm64: dts: rockchip: enable analog audio node for rock64
  arm64: dts: rockchip: move rk3328 #sound-dai-cells to the soc dtsi
  arm64: dts: rockchip: add rk3328 ACODEC node

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 14:47:02 +01:00
Arnd Bergmann
e3ce67896c AM65x DT changes for v5.1. Includes:
- EMMC support for am654-evm board
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Merge tag 'am654-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into arm/dt

AM65x DT changes for v5.1. Includes:

- EMMC support for am654-evm board

* tag 'am654-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux:
  arm64: dts: ti: k3-am654-base-board: Add eMMC Support
  arm64: dts: ti: k3-am654: Add Support for eMMC host controller

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 14:06:11 +01:00
Arnd Bergmann
62a23bb006 i.MX fixes for 5.0, 3rd round:
It contains a fix for i.MX8MQ EVK board device tree, which makes the
 broken eMMC support work as expected.
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Merge tag 'imx-fixes-5.0-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.0, 3rd round:

It contains a fix for i.MX8MQ EVK board device tree, which makes the
broken eMMC support work as expected.

* tag 'imx-fixes-5.0-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: imx8mq: Fix boot from eMMC
2019-02-15 13:43:08 +01:00
Arnd Bergmann
d6780626db Fix for new dtc graph warnings and a regulator fix for rock64.
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Merge tag 'v5.0-rockchip-dts64fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes

Fix for new dtc graph warnings and a regulator fix for rock64.

* tag 'v5.0-rockchip-dts64fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: enable usb-host regulators at boot on rk3328-rock64
  arm64: dts: rockchip: fix graph_port warning on rk3399 bob kevin and excavator
2019-02-15 13:41:45 +01:00
Manivannan Sadhasivam
c72235c288 arm64: dts: rockchip: Add on-board WiFi/BT support for Rock960 boards
Add on-board WiFi/BT support for Rock960 boards such as Rock960 based
on AP6356S and Ficus based on AP6354 wireless modules.

Firmwares for the respective boards are available here:

http://people.linaro.org/~manivannan.sadhasivam/rock960_wifi/
http://people.linaro.org/~manivannan.sadhasivam/ficus_wifi/

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-02-15 10:35:06 +01:00