The Tegra USB driver has a number of issues:
1) The PHY driver isn't a true platform device, and doesn't implement
the standard USB PHY API.
2) struct device instance numbers were used to make decisions in the
driver, rather than being parameterized by DT or platform data.
This pull request solves issue (2), and lays the groundwork for solving
issue (1). The work on issue (1) involved introducing new DT nodes for
the USB PHYs, which in turn interacted with the Tegra common clock
framework changes, due to the move of clock lookups into device tree.
Hence, these USB driver changes are taken through the Tegra tree with
acks from USB maintainers.
This pull request is based on the previous pull request, with tag
tegra-for-3.9-soc-ccf.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRCYlsAAoJEMzrak5tbycxbp8QANOIUl1AD5R9wyHucs3O4RVN
xKzI0ch2N4lb8dRBNn5oZ/T0fU5m3Y2w+cAJD9INQZaiqbMsGjm7wcJeuy8IUbQL
cjBwYFOySCAIfRJZtLIYax+sB7/Eoa+un2SHtmWJPn/dWrPcJOp1wc+iNJHxVTLu
4kHgG1Rq3A7etorPmvaf5HkATmOKvzXoxrO9LyGdr3/dgEUDa50p4JBRC4V7osFy
Va9B4fOq777/k1aR59SMKOwLoVvw/u+YwYIMStmAflLnWduXRUbA400mc+nDVH+x
66r3JUZ5/0vzyMsLW8AnhbZWfAROedl4JfT9ZYVvsQmxSzIoyQl2dtt1GiDr7/j+
LSWgPT9BaY+masNiwxoFMMqLg+w0RUxkCGmVu0yYGK3xNmuSI9zeZxV+o3oPkyjQ
/IrOerPE45rd8EACBF9hRLI3mc6+kbS2RPXRl74jre7KHAzumVfZrsNb5M5ZbK1z
8h8ucs/7b62YgCTUhYvbWlvBFgcANq2N9r/AJF4TMMIWtpliHDOHGLu0V1Kd2r8c
hWsAB9dgaljcVV7rFXJhjlCJp7U6MkPmKi1lWg9jpYS5nDcCy5smOH1EEYzN6xS8
4e/YLgz/qkChW4cbQQNMRsLhjD+7ouHryTDLNmOZ/n1Rty8mFOqaQsRPl3OA/4DN
jPmL9AneLq4RM44Zdxe5
=8pTe
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.9-soc-usb' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc
From Stephen Warren:
ARM: tegra: USB driver cleanup
The Tegra USB driver has a number of issues:
1) The PHY driver isn't a true platform device, and doesn't implement
the standard USB PHY API.
2) struct device instance numbers were used to make decisions in the
driver, rather than being parameterized by DT or platform data.
This pull request solves issue (2), and lays the groundwork for solving
issue (1). The work on issue (1) involved introducing new DT nodes for
the USB PHYs, which in turn interacted with the Tegra common clock
framework changes, due to the move of clock lookups into device tree.
Hence, these USB driver changes are taken through the Tegra tree with
acks from USB maintainers.
This pull request is based on the previous pull request, with tag
tegra-for-3.9-soc-ccf.
* tag 'tegra-for-3.9-soc-usb' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
usb: host: tegra: make use of PHY pointer of HCD
ARM: tegra: Add reset GPIO information to PHY DT node
usb: host: tegra: don't touch EMC clock
usb: add APIs to access host registers from Tegra PHY
USB: PHY: tegra: Get rid of instance number to differentiate PHY type
USB: PHY: tegra: get rid of instance number to differentiate legacy controller
ARM: tegra: add clocks properties to USB PHY nodes
ARM: tegra: add DT nodes for Tegra USB PHY
usb: phy: remove unused APIs from Tegra PHY.
usb: host: tegra: Resetting PORT0 based on information received via DT.
ARM: tegra: Add new DT property to USB node.
usb: phy: use kzalloc to allocate struct tegra_usb_phy
ARM: tegra: remove USB address related macros from iomap.h
Tegra already supports the common clock framework, but had issues:
1) The clock driver was located in arch/arm/mach-tegra/ rather than
drivers/clk/.
2) A single "Tegra clock" type was implemented, rather than separate
clock types for PLL, mux, divider, ... type in HW.
3) Clock lookups by device drivers were still driven by device name
and connection ID, rather than through device tree.
This pull request solves all three issues. This required some DT changes
to add clocks properties, and driver changes to request clocks more
"correctly". Finally, this rework allows all AUXDATA to be removed from
Tegra board files, and various duplicate clock lookup entries to be
removed from the driver.
This pull request is based on the previous pull request, with tag
tegra-for-3.9-cleanup.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRCYtBAAoJEMzrak5tbycxKb8P/0cXt2X7mPfoApWV96bI2c9h
VE1wZYREcq0Au3hiNuMmPp1Nwous2zvrXRKXMvLoQi42KwpvZlFjlyn8+xACKmxO
okSJ+aXETzlGh85l5RlnFJMgq181Kn0nDhN5Iwy0FUEJ8/oqdS8fEz5mwQlHflX1
CLaquDVr/edr8LffvsFlxtSmeYNvZ2jYkSgroWeDhVR5Np1/LUCyh5y3edjVl/es
B0/keuZ2fnYZnEfqLTpBEARYDBimymuu8gIoHK5nvtz3d/GGu92sVeda4LuHt8eH
1N+f41ceDR2JG/MIJbLr6PGYmCkAGSM/5Vcfa33G+A7GQT0EVb8jLozGCdrCjaEG
OM33pN5wtv1M9gTLR9swITBWhbTpRWaHnXeZQF7ttaV8dvr/fuOzWBw47k8Jw0FJ
zjGta66kwW7WkT3HDNoM2RRzm9dlJr1xdHOzAaVJnX3VHtHcIvYzDi90Xv9Nn46D
E/qIpExmL4rMrb2+4MxT9CdbfzdBSmsnlRFoWZTIM1NPxA/97i7oAyYVAJ34LCNx
xWqwimhXK14LzGffpSHm9CSz8DHNbehDZRMQD0jGYMn61PFtDB+E/oEq5AEqneuC
KDht3Qdx/mPzJQPE8WV3d5FxeXfXDjj203x/i6x8TOdH8Bt4aoK9ajvPYBpA+2aE
4fPJIobLHGYN/F+GF1VJ
=s9hz
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.9-soc-ccf' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc
From Stephen Warren:
ARM: tegra: Common Clock Framework rework
Tegra already supports the common clock framework, but had issues:
1) The clock driver was located in arch/arm/mach-tegra/ rather than
drivers/clk/.
2) A single "Tegra clock" type was implemented, rather than separate
clock types for PLL, mux, divider, ... type in HW.
3) Clock lookups by device drivers were still driven by device name
and connection ID, rather than through device tree.
This pull request solves all three issues. This required some DT changes
to add clocks properties, and driver changes to request clocks more
"correctly". Finally, this rework allows all AUXDATA to be removed from
Tegra board files, and various duplicate clock lookup entries to be
removed from the driver.
This pull request is based on the previous pull request, with tag
tegra-for-3.9-cleanup.
* tag 'tegra-for-3.9-soc-ccf' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (31 commits)
clk: tegra30: remove unused TEGRA_CLK_DUPLICATE()s
clk: tegra20: remove unused TEGRA_CLK_DUPLICATE()s
ARM: tegra30: remove auxdata
ARM: tegra20: remove auxdata
ASoC: tegra: remove auxdata
staging: nvec: remove use of clk_get_sys
ARM: tegra: paz00: add clock information to DT
ARM: tegra: add clock properties to Tegra30 DT
ARM: tegra: add clock properties to Tegra20 DT
spi: tegra: do not use clock name to get clock
ARM: tegra: remove legacy clock code
ARM: tegra: migrate to new clock code
clk: tegra: add clock support for Tegra30
clk: tegra: add clock support for Tegra20
clk: tegra: add Tegra specific clocks
ARM: tegra: define Tegra30 CAR binding
ARM: tegra: define Tegra20 CAR binding
ARM: tegra: move tegra_cpu_car.h to linux/clk/tegra.h
ARM: tegra: add function to read chipid
ARM: tegra: fix compile error when disable CPU_IDLE
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Conflicts:
arch/arm/mach-tegra/board-dt-tegra20.c
arch/arm/mach-tegra/board-dt-tegra30.c
arch/arm/mach-tegra/common.c
arch/arm/mach-tegra/platsmp.c
drivers/clocksource/Makefile
This pull request contains various cleanup and minor changes to core
Tegra code:
* Tegra clocksource driver is moved to drivers/clocksource.
* Various typos, warning cleanup, statics cleanup, section mismatch
fixes, etc.
* Various small fixes/cleanups for CPU/hotplug/SMP code.
This pull request is based on a merge of v3.8-rc3 and at least part of
arm-soc's timer/cleanup branch.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRCYapAAoJEMzrak5tbycxp0kQAKYlx2XFf8lgv+V/zDRmzXvr
7dW1bByqBIqrhoOxYM+WGLtcVT+n23MbwXUsbRp2hKGzNSD4+VG05bBrEutfjdnf
bDiJeLkA+95e1Slx/BPzE7SYoOuNxR0YuVuFD8JkL+ykD0NtoJsoS3eUZB+7/bQ7
Ld9GscUndy7GDoo04Dr72OhVwESVHqahvSPWc5xPsE8ua6ZTiTg+x4UgzrbUpHoQ
CN3ABkJfeYr2pERSiZDJwuyWTDx/d9MHpcK2JNVht0AayIcXRUKUwKiJiUPtDsA1
RQvk3UB0iwA6lWnr+ApJtDpNQOfx7MbYY/VIRJ2krmZiOGl3fewMkNUhpTcs+wBJ
HumdCb9bDha+o8hYAthibhBurENP6ydwEpkinIANsj4HIQYwGNVaFBZaN9gbrtKs
8jgQsrjiZSwFSpyyMyuNy1mg2M3TI0WExEpTQx0KG41g49CvhlhrPpR6HfbjjpDb
9/Pw5J7nMrSNNjxYKMUKfBtnrceAaZ96riFZfDJmc1WTnv0OCfzfRfTkc3+6peE7
ItNHwux5p6M1DfPvMEZA9qwKbLSdZCGtKQ0vElJjQeqU+tXNtb2H9AEOYoZkTUSQ
7rdkJM9nDLWtXjb1vql8XEYsxD28nLGyOWnE5yOrM/qZ28sgfY7bmt9R0NGaoWRO
moveNklG/UDcANbi2LuU
=H2vV
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.9-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/cleanup
From Stephen Warren:
ARM: tegra: cleanup
This pull request contains various cleanup and minor changes to core
Tegra code:
* Tegra clocksource driver is moved to drivers/clocksource.
* Various typos, warning cleanup, statics cleanup, section mismatch
fixes, etc.
* Various small fixes/cleanups for CPU/hotplug/SMP code.
This pull request is based on a merge of v3.8-rc3 and at least part of
arm-soc's timer/cleanup branch.
* tag 'tegra-for-3.9-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: fix compile error when disable CPU_IDLE
ARM: tegra30: make the wait time of CPU power up to proportional to HZ
ARM: tegra: make device can run on UP
ARM: tegra: clean up the CPUINIT section
ARM: tegra: moving the clock gating procedure to tegra_cpu_kill
ARM: tegra: update the cache maintenance order for CPU shutdown
ARM: tegra30: fix power up sequence for boot_secondary
ARM: tegra: cpufreq: move clk_get/put out of function tegra_cpu_init/exit
ARM: tegra: fix Kconfig warnings when !SMP
ARM: tegra: Make variables static
clocksource: tegra: cosmetic: Fix error message
ARM: tegra: move timer.c to drivers/clocksource/
Signed-off-by: Olof Johansson <olof@lixom.net>
Trivial conflicts:
arch/arm/mach-tegra/board-dt-tegra20.c
arch/arm/mach-tegra/board-dt-tegra30.c
drivers/clocksource/Makefile
Newer Exynos4 SoC are equipped with a local camera ISP that
controls external raw image sensor directly. Such sensors
can be connected through FIMC-LITEn (and MIPI-CSISn) IPs to
the ISP, which then feeds image data to the FIMCn IP. Thus
there can be two busses associated with an image source
(sensor). Rename struct s5p_fimc_isp_info describing external
image sensor (video decoder) to struct fimc_source_info to
avoid confusion. bus_type is split into fimc_bus_type and
sensor_bus_type. The bus type enumeration is extended to
include both FIMC Writeback input types.
The bus_type enumeration and the data structure name in the
board files are modified according to the above changes.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
A fix for r8a7779 clocks.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJREH3GAAoJENfPZGlqN0++N2MP/3r5TBfXBowsC0IbIbu/MRQZ
mKvQh4W0E7O9i5n7EAgDTdyx1q9GjnhdZv1YKznjLRBe30m1d5yHEemNNWIz9FqH
fLQNmKQVxTpo/Ounn1i4assBRZInPbbt59EwZpKNZwGF4uNh14f/OPJ6DcmE3jF+
xwvLHtTlBamqjVpbD8yGXfAq5+VZLBW60+a8KWkDAiYHMLJ0rFnIbEnsaCH3ALNt
pI5D2GkJHxRRuc4xSn6+d7AstzyZ1AwqXBwZk7Niye4VWo9VxPygwaFkZqiTvviY
GRFCwG3GGcCMjiBPcnHNNRFv/Wsmm66441arKBFMTj0jAU4STF/6LU8d6e1Cvs56
C7a6xok5rQyEgShcAN8WQFSwiexIU4GJtxJ+JloziBU0tEWe2ZFiluw4X2BWWp0s
ecr5jkJw5ZqOx/MHhZn2WmjT7BcsFotwdBeKLB2J7WkD7ZoW0pUIPoe9gFE/r5in
/WdhiFbifDL/5E9viS66OpeTa+i2/vbdJAEeP0PJfB2W8OWPdztlEgj7Vy6F/2o9
cxlhUPSRPXdT54UNTIu36LxVd4oOu8XcZ1JHp8UCdCLmb9KkbLYbA+oHMaeSF1o5
WFbb3+t8cYMi2PWrde9yGfikNsd/QnNxosULBhAetRDMM7ECCBkGcl7eAeTYocSr
PG6tufypi9YHbJfmyUiD
=FX9R
-----END PGP SIGNATURE-----
Merge tag 'renesas-soc3-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Third round of Renesas ARM-based SoC changes for v3.9
A fix for r8a7779 clocks.
* tag 'renesas-soc3-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7779: Correct TMU clock support
With the recent twl related changes we can now get:
WARNING: arch/arm/mach-omap2/built-in.o(.text+0x15f88): Section mismatch in
reference from the function sdp3430_twl_gpio_setup() to the function
.init.text:omap_twl4030_audio_init()
The function sdp3430_twl_gpio_setup() references
the function __init omap_twl4030_audio_init().
This is often because sdp3430_twl_gpio_setup lacks a __init
annotation or the annotation of omap_twl4030_audio_init is wrong.
WARNING: arch/arm/mach-omap2/built-in.o(.text+0x16968): Section mismatch in
reference from the function zoom_twl_gpio_setup() to the function
.init.text:omap_twl4030_audio_init()
The function zoom_twl_gpio_setup() references
the function __init omap_twl4030_audio_init().
This is often because zoom_twl_gpio_setup lacks a __init
annotation or the annotation of omap_twl4030_audio_init is wrong.
Fix this by removing __init from omap_twl4030_audio_init() as
suggested by Peter Ujfalusi <peter.ujfalusi@ti.com>.
Signed-off-by: Tony Lindgren <tony@atomide.com>
- It fixes fec ptp clock pointer in device tree source.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJREL7uAAoJEFBXWFqHsHzO+1cH+QEeUwTqmlI2enO7XOxb4F5q
OijafxIi8+pYfQOZ6v/E70SaBaMyHQpG4WY3zQ+lrQlM/qCqAeEB/9KbkQU/1n8e
e1NF1Px/QisTcTF7qKwHhKurzgbuZ4vApX+IwCJyoGpYdEup9DxQxYvIqjUrwbdp
OdJ76kRkMkhj5D1WKRBOypStMRnDBr6e8Scc2iQspw8K9U1w+2g5kADGYGatEzOr
EcZ+EHIXJcBbX2938wakStshsanUlJEjdRbiQE8LQgaYYyHi9+S/xMvgDugwKbHY
OtOZ+vtQMOHeiusDQ01g7O3ZnsipWVMdk50hgBXxOZl4UHBHshQg5fG1dW+34Dw=
=2plf
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-3.8-4' of git://git.linaro.org/people/shawnguo/linux-2.6 into fixes
From Shawn Guo:
imx fixes for 3.8, take 4
- It fixes fec ptp clock pointer in device tree source.
* tag 'imx-fixes-3.8-4' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: dts: imx6: fix fec ptp clock slow 10 time
-Compile fix for !SMP
-More cpu cluster id related fixes
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJRDSkpAAoJEMhvYp4jgsXiSWYH/jy92oAHpKoNBZQ0wzOVXoa7
Lo9vkPaTexXY1SLNohrTiGDxWwm7LNfi6Lag3OtzyzAblcUAqd6ISyx2Nh7xN3Uu
L+3Y7CIBw9CqCAsrjOunMmKcawo/aiscAlhqOoYsmKGcbopQHEomui+yfDIX6NY+
v59xDXp1IyJHqDc9M3t2VJijfeCHnREIddt33gUeEcSfL7nyuvGf2DXuarAGN5N7
bHd7NxqZS2TNGxTbxuNZIlYuVUgqcVV16LLNlTGrBb27iiPJuIg3uHa6GVVO4n0U
czd388xl5Rca8LeD7rAvWPiHX2rIfyEyvWZO4KvRBC9H6+VgGvlyKtnoUPyNhn8=
=mUYd
-----END PGP SIGNATURE-----
Merge tag 'highbank-fixes-for-3.8' of git://sources.calxeda.com/kernel/linux into fixes
From Rob Herring:
highbank fixes for 3.8
-Compile fix for !SMP
-More cpu cluster id related fixes
* tag 'highbank-fixes-for-3.8' of git://sources.calxeda.com/kernel/linux:
ARM: highbank: mask cluster id from cpu_logical_map
ARM: scu: mask cluster id from cpu_logical_map
ARM: scu: add empty scu_enable for !CONFIG_SMP
The Nomadik Device Tree patch series accidentally
selected OF instead of USE_OF which led to problems
during compile:
arch/arm/kernel/devtree.c: In function 'arm_dt_memblock_reserve':
/home/elinwal/linux-arm-soc/arch/arm/kernel/devtree.c:43:7: error: 'initial_boot_params' undeclared (first use in this function)
(etc).
This fixes it up by selecting USE_OF instead.
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
are unused on ARM architecure. Samsung has some code setting up wdog
in arch_decomp_wdog(). But since CONFIG_S3C_BOOT_WATCHDOG is defined
nowhere, it will not run. Otherwise, system can not boot at all when
wdog is set up but no one pats it.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJQ9WSiAAoJEFBXWFqHsHzOkpYH/iHOomqWknjg0YjeUKmoqnk+
UnAiP/OD0pOuqdC3izSq5rAaxeCn2ESYhXWdHH3LQFNnhwDPOItagY3T1dBgJH0G
KvO3wDj0K1jUM6Nzt4hta4pnCc/KClyCcVjYrP5pE+bs3NzOzxvfj2tPc81lI0Iy
rnkMLWw6gVRllhecUezt3TOd/GfI7NwuyjjBOLelOerbImWFqLOCNIZSRQlazbyS
hFh4OkR7yoU6vEvPdmS4B4A5PWBHlxiUS6Wr4v+doGFPiFgR05tJodLnnJ/KGWmG
LFY99MyeBvcgiUlFcUpiVLYpWJh+7IB1LJH+IGNJbWFYC+Yvn/o9IRYO8kvuiYE=
=weNJ
-----END PGP SIGNATURE-----
Merge tag 'cleanup-decompwdog-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/cleanup
From Shawn Guo:
The series cleans up ARCH_HAS_DECOMP_WDOG and arch_decomp_wdog which
are unused on ARM architecure. Samsung has some code setting up wdog
in arch_decomp_wdog(). But since CONFIG_S3C_BOOT_WATCHDOG is defined
nowhere, it will not run. Otherwise, system can not boot at all when
wdog is set up but no one pats it.
* tag 'cleanup-decompwdog-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: samsung: remove unused arch_decomp_wdog() code
ARM: remove unused arch_decomp_wdog()
ARM: decompress: remove unused ARCH_HAS_DECOMP_WDOG
Signed-off-by: Olof Johansson <olof@lixom.net>
Since pinctrl-exynos can support exynos4 and exynos5 so changed
the option name to PINCTRL_EXYNOS for more clarity.
Cc: Thomas Abraham <Thomas.abraham@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add AB8540 sub driver to the ABx500 family, pins, pin groups and
gpio range.
As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add AB9540 sub driver to the ABx500 family, pins, pin groups and
gpio range.
As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add AB8505 sub driver to the ABx5x family.
As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Fix the use of USART on both at91sam9x5 and at91sam9n12. In DTS, the
atmel,use-dma-[rx|tx] property is present but a DMA channel cannot be used.
Indeed the connexion between the DMA engine and the slave is not implemented
yet in Device Tree.
Note however that this property is also used for PDC (private DMA) on older
SoCs. This is why the driver alone cannot determine the validity of this
property.
Reported-by: Douglas Gilbert <dgilbert@interlog.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: stable <stable@vger.kernel.org> [3.8+]
The mxc-timer on the imx25 needs to be derived from the AHB clock.
If a bootloader reparents this clock to the ipg_clk_highfreq, which according
to the datasheet is a valid operation, the system can/will produce lockups/
freezes after some time [1].
This can be forced with code like
while(1)
syscall(SYS_clock_gettime, CLOCK_REALTIME, &tp);
This was already fixed with the commit
"i.MX25 GPT clock fix: ensure correct the clock source" [2],
for 3.1-rc2, but was lost, when i.MX was converted to the common clock framework
("ARM i.MX25: implement clocks using common clock framework") [3]
[1]: http://lists.arm.linux.org.uk/lurker/message/20130129.161230.229bda17.en.html
[2]: 2012d9ca2a
[3]: 6bbaec5676
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Cc: stable@vger.kernel.org # v3.5+
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
spi-imx driver needs two clock: ipg and per. The first clock must be named and
the second must be added.
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Register ARM architected timer by default for all mach-shmobile
systems using late timer.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ptp should use enet_ref instead of pll6_enet
pll6_enet is fixed 500Mhz.
There are divider between enet_ref and pll6_enet
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
- use rtc-mv in mvebu armv7 SoCs
- add pci-e hotplug for kirkwood
Depends on:
- tags/mvebu_fixes_for_v3.8-rc6
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.19 (GNU/Linux)
iQEcBAABAgAGBQJRCqOnAAoJEAi3KVZQDZAewlUH/04tpMdf2rvgNP8uUVPVx62T
cXMga9qLTyXQ9hn31KP7fd/JPLRJFsG/+jy4x687EurJGIXXaWGNadjlE69DEPAZ
jt78sPa+Mo/xYD4XoNCr/ng1cbnTwc1ebSRSfN+nIjWynE8Do7tkOKxfJodTgQCM
XbE3EHfvAktKfJTsFDPsFwoIycEYxFsN4jQPwiCdPHVb24py3FWBy+qep7wtLfSO
gTnakEcOsQc7aFzrFdZ1ZnQ9KRlBYXVN636o4sQkM+UM9Vf7FAWBM4OCi2KP4trU
IlTzknoMAMYat+AtYzq1FcDmajeP/EgG6DbQh7lqUK0LEILn2rdAUlgN2QB3VIs=
=6oef
-----END PGP SIGNATURE-----
Merge tag 'drivers_for_v3.9' of git://git.infradead.org/users/jcooper/linux into next/soc
From Jason Cooper:
mvebu drivers for v3.9
- use rtc-mv in mvebu armv7 SoCs
- add pci-e hotplug for kirkwood
Depends on:
- tags/mvebu_fixes_for_v3.8-rc6
* tag 'drivers_for_v3.9' of git://git.infradead.org/users/jcooper/linux:
cpuidle: kirkwood: Move out of mach directory
rtc: Add support of rtc-mv for MVEBU SoCs
ARM: Kirkwood: Support basic hotplug for PCI-E
arm: mvebu: i2c come back in defconfig
arm: plat-orion: fix printing of "MPP config unavailable on this hardware"
Dove: activate GPIO interrupts in DT
- It's based on imx-cleanup-3.9 to avoid conflicts.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJRCRzjAAoJEFBXWFqHsHzOOTYH/2YiAhCXDoovJ++leTTBKoFO
kRx2gvV0oxQYAjvRX4IiiwcuWjbCQI8ugiKxeH9Vn+jwHD8jKqzTINEUVQfKUud6
s8AI1/EqKwKnEFYFs/Fg6WxZHuHpoL/clpRB/5wZw1KoChmte2OnVU7d9vOt67iN
l0P4nPR18iwU5LFoDCnqMX50Dp9C56KEF2JhzBCQKW9TtRclwpcBNy6AsHb/TNOe
/nHN+Ku6/3xQEz2MPQ9QdmgFxnp9Pr8R6leJNg1Vg6UGRYrKxy0zVo+oFEXAZuUw
v6gnhdlvO6Ki/IKHcWkw7Q7pUDTuB6SttirQE9mBlPdc0V3kTU82SVtX9WAQhSs=
=rVol
-----END PGP SIGNATURE-----
Merge tag 'imx6q-cpudile-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc
From Shawn Guo:
imx6q cpuidle support for 3.9
- It's based on imx-cleanup-3.9 to avoid conflicts.
* tag 'imx6q-cpudile-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: imx6q: support WAIT mode using cpuidle
ARM: imx: move imx6q_cpuidle_driver into a separate file
ARM: imx: mask gpc interrupts initially
ARM: imx: return zero in case next event gets a large increment
ARM: imx: Remove mx508 support
ARM: imx: Remove mach-mx51_3ds board
ARM: imx: use debug_ll_io_init() for imx6q
ARM: imx: remove unused imx6q_clock_map_io()
ARM: mach-imx: Kconfig: Do not select Babbage for MACH_IMX51_DT
Signed-off-by: Olof Johansson <olof@lixom.net>
Still, two delete/change conflicts caused by imx/cleanup:
arch/arm/mach-imx/mach-mx50_rdp.c
arch/arm/mach-imx/mach-mx51_3ds.c
Fix the issue:
tree: git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git next/soc
head: 6ed05a2aab
commit: af70fdc947 [4/8] Merge branch 'marco-timer-cleanup-rebase' of
git://gitorious.org/sirfprima2-kernel/sirfprima2-kernel into next/soc
config: make ARCH=arm prima2_defconfig
All error/warnings:
>> arch/arm/mach-prima2/platsmp.c:20:30: fatal error: asm/hardware/gic.h: No such file or directory
compilation terminated.
--
>> arch/arm/mach-prima2/common.c:15:30: fatal error: asm/hardware/gic.h: No such file or directory
compilation terminated.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Cc: Xie ChanglongX <changlongx.xie@intel.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
From Kukjin Kim:
AS I commented, this makes <mach/*.h> local so that they could be removed.
* 'next/cleanup-header' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (26 commits)
ARM: S3C64XX: Fix missing header error with CONFIG_CPU_IDLE enabled
ARM: S3C64XX: make regs-syscon-power.h local
ARM: S3C64XX: make regs-sys.h local
ARM: S3C64XX: make regs-srom.h local
ARM: S3C64XX: make regs-modem.h local
ARM: S3C64XX: make regs-gpio-memport.h local
ARM: S3C64XX: make crag6410.h local
ARM: S3C24XX: remove dsc.c and make regs-dsc.h local
ARM: S3C24XX: remove idle.h
ARM: S3C2412: cleanup regs-s3c2412.h
ARM: S3C2416: remove regs-s3c2416-mem.h and regs-s3c2416.h
ARM: S3C24XX: make vr1000-cpld.h, vr1000-irq.h and vr1000-map.h local
ARM: S3C24XX: make otom-map.h local
ARM: S3C24XX: make osiris-cpld.h and osiris-map.h local
ARM: S3C24XX: make h1940.h and h1940-latch.h local
ARM: S3C24XX: make gta02.h local
ARM: S3C24XX: make bast-cpld.h, bast-irq.h and bast-map.h local
ARM: S3C24XX: make anubis-cpld, anubis-irq and anubis-map local
ARM: SAMSUNG: cleanup mach/gpio-fns.h gpio-track.h and gpio-nrs.h
ARM: SAMSUNG: cleanup mach/regs-audss.h file
...
Signed-off-by: Olof Johansson <olof@lixom.net>
During code review it was noticed that the clock value for
TMU01 was incorrect and the value for TMU02 was missing.
For reference: As of 3.8-rc6 there are no in-tree consumes of these clocks.
Reported-by: Denis Oliver Kropp <dok@directfb.org>
Reviewed-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Newer versions of udev (such as 182) requires CONFIG_DEVTMPFS_MOUNT to be
selected, otherwise we get a stuck console:
Starting udev
Starting Bootlog daemon: bootlogd: cannot deduce real console device
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
timer resolution of ~32us is pretty low.
v2 has 32bits resolution, so we have quite some headroom, and
can use the 24MHz clock.
v1 has only 16bits, so we only increase v2.
So we just exchange the timrot clock in imx28.
On imx23 we have timrotv1 and everything stays the same.
Signed-off-by: Torben Hohn <torbenh@linutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Regenerate the mxs_defconfig to match recent kernel using the following
commands:
make mxs_defconfig
make savedefconfig
cp defconfig arch/arm/configs/mxs_defconfig
Then enable these features:
- MTD block access
- UBI and UBIFS
- JFFS2
- EXT2 and EXT4
- AT24 EEPROM support
- Support for most of the SPI flashes
- Support for ethernet PHYs that are usually used on mxs designs
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Extend imx6q DEBUG_LL uart port selection support to cover all i.MX
SoCs. The 'range' of the Kconfig option gets dropped, as users
looking at the option must know the uart number on his board. The
bottom line is that the build system will report an error if an
invalid port number is picked for given SoC.
The header arch/arm/include/debug/imx-uart.h is created to accommodate
all the uart base addresses. And the header will also be used for
other low-level debug facility later.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
It's improper to use combined symbol DEBUG_IMX31_IMX35_UART for
imx31 and imx35, because imx31 has 5 UARTs while imx35 only has 3.
So later when we add UART port selection for DEBUG_IMX31_IMX35_UART,
we will have problem.
Use separated Kconfig options for imx31 and imx35 debug uart selection.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
in question and other dts related changes, and will have them go via DT
branch to save the cross branch dependency.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJRB24TAAoJEFBXWFqHsHzO3RcH/22Qe0+BUjxj1NBrBjBee6YE
ymb2CIOaTM2PgAQJZDgqGa4zgbPK7bcLu6fSyyg+XzExaxZ/CQI0EuKjMSroiyoB
6tRB76dz9ESWO4QYrQH65QxdY5Bi3VYDXv9+NeOdl0lzHR1wJp/Eeqvx608+aKIa
ps5Db1OdJn5TZ1o8Ye+/m4BUFBp+6feTx3fFfgXdes61eZskJLokURQz9zA6qiDw
s6YCBt1lNSNG/duZD3uFichDSPi/h+YFWwinI+deakRUDNUIs4n8ofToc99N6zWd
iKTbWX1cWOJpAYHKHS2lCaKF0saIpqCt7jhz/wmyXwDCrSSWsmwQSpxc5xmhFXU=
=LfVI
-----END PGP SIGNATURE-----
Merge tag 'imx-cleanup-3.9' into imx/soc
Since header mach/regs-mem.h is used only into mach-s3c24xx/,
this patch moves the header file in local.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Since header mach/regs-power.h is used only into mach-s3c24xx/,
this patch moves the header file in local.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Since header mach/regs-s3c2412-mem.h is used only into mach-s3c24xx/,
this patch moves the header file in local.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
the fields must be null-terminated:
the caller may use it as null-terminted string, next.
Signed-off-by: Chen Gang <gang.chen@asianux.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch is for just moving plat-s3c24xx/*.c into mach-s3c24xx/, so
that we could remove plat-s3c24xx directory. But since the PLAT_S3C24XX
is used in drivers, the statement is not deleted and it will be sorted
out next time.
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Share the common irq code by simply defining a correct mapping declaration
for the s3c2443.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Previously the irq init used s3c24xx_init_irq and an additional
arch_initcall to add the cpu specific irqs.
To be able to simplyfy the irq init later, create a new function
s3c2443_init_irq, which then calls s3c24xx_init_irq but also adds
the cpu specific irqs.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Share the common irq code by simply defining a correct mapping declaration
for the s3c2416.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Previously the irq init used s3c24xx_init_irq and an additional
arch_initcall to add the cpu specific irqs.
To be able to simplyfy the irq init later, create a new function
s3c416_init_irq, which then calls s3c24xx_init_irq but also adds
the cpu specific irqs.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This gets rid of the use of static irq mappings there.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
With this the definition of s3c24xx_irq_syscore_ops can also move to
common.h from plat/pm.h and the definitions of s3c24xx_irq_suspend
and s3c24xx_irq_resume are also not necessary anymore in plat/pm.h
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Only alpha and sparc are unusual - they have ka_restorer in it.
And nobody needs that exposed to userland.
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Cubieboard has two LEDs available for use, a blue one (labeled LED1)
and a green one (labeled LED2).
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch adds support for SMP to mach-virt using the PSCI
infrastructure.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Add support for the smallest, dumbest possible platform, to be
used as a guest for KVM or other hypervisors.
It only mandates a GIC and architected timers. Fits nicely with
a multiplatform zImage. Uses very little silicon area.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
[will: fixed up conflicts with GIC move to drivers/irqchip/]
Signed-off-by: Will Deacon <will.deacon@arm.com>
policy->shared_type field was added only for SoCs with ACPI support:
commit 3b2d99429e
Author: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Date: Wed Dec 14 15:05:00 2005 -0500
P-state software coordination for ACPI core
http://bugzilla.kernel.org/show_bug.cgi?id=5737
Many non-ACPI systems are filling this field by mistake, which makes its usage
confusing. Lets clean it.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
For multicore SoC's, with cores sharing clock line, we are required to set
policy->cpus and policy->related_cpus with mask of cpus.
With following patch, we need to set policy->cpus with mask of all possible cpus
and policy->related_cpus would be filled automatically by the cpufreq core.
commit 4948b355e90080cd5ec1e91189f65a01e4186ef2
Author: Viresh Kumar <viresh.kumar@linaro.org>
Date: Tue Jan 29 14:39:08 2013 +0000
cpufreq: Simplify cpufreq_add_dev()
Current Tegra driver fills only ->related_cpus and not ->cpus, which looks to be
incorrect. Lets fix it.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Highbank processors depend on the external ECME to perform voltage
management based on a requested frequency. Communication between the
A9 cores and the ECME happens over the pl320 IPC channel.
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
The pl320 IPC allows for interprocessor communication between the
highbank A9 and the EnergyCore Management Engine. The pl320 implements
a straightforward mailbox protocol.
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Move clk setup to twd_local_timer_common_register and rely on
twd_timer_rate being 0 to force calibration if there is no clock.
Remove common_setup_called as it is no longer needed.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
The BeagleBone dev kit uses the built-in RTC module, so
it would be nice to have this built by default in the
omap2plus defconfig.
Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Adds tps65910 PMIC, lis3lv02d accelerometer, tsl2550 ambient light sensor,
tmp275 temperature sensor, matrix keypad, gbio based leds and D_CAN drivers
support. These peripherals are present on AM33XX family of devices (EVM,
BeagleBone and EVMSK). One has to manually enable these support to use the
drivers, so this patch enables all the drivers in omap2plus_defconfig
Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add needed platform data so that it's possible to use Retu and e.g. feed
Retu watchdog.
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The OMAP framebuffer driver now uses the standard dma allocator
instead of the (now removed) omap specific vram allocator.
Enable the Contiguous Memory Allocator by default to allow large
dma memory buffers allocation.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Many OMAP3 based boards such as Beagle, Overo and IGEP use
the TFP410 DPI-to-DVI chip. So, it's good to have it built
as a module by default on OMAP2+ config.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The IGEPv2 board has two user GPIO LEDs and one of them is
default to "on" to tell the user that the board booted correctly.
But to use these LEDs the config options CONFIG_LEDS_GPIO,
CONFIG_LEDS_TRIGGERS and CONFIG_LEDS_TRIGGER_DEFAULT_ON have to
be enabled.
Since only the default-on and default-off triggers were used
anyway, it is better to just use .default_state instead of
.default_trigger and not depend on CONFIG_LEDS_TRIGGER_*
Also, this is consistent with IGEPv2 Device Tree that uses
default-state instead of linux,default-trigger for the leds
device nodes. The LED names also have been updated to use the
same names used on omap3-igep0020.dtb.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch supports the TPS65910 PMU function on the AM3517 Craneboard.
The IRQ pin, SYS_NIRQ is dedicated connection between the AM3517 and
the TPS65910 PMU.
To handle the PMU IRQs, mux configuration is required.
Platform data configuration:
.IRQ number : SYS_NIRQ (M_IRQ_7)
.External clock source : external 32KHz clock is connected
Signed-off-by: Milo(Woogyom) Kim <milo.kim@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch enables the NAND device on the AM3517 Craneboard.
MTD partitions are created as below.
0x000000000000-0x000000080000 : "X-Loader"
0x000000080000-0x000000240000 : "U-Boot"
0x000000240000-0x000000280000 : "U-Boot Env"
0x000000280000-0x000000780000 : "Kernel"
0x000000780000-0x000010000000 : "File System"
Signed-off-by: Milo(Woogyom) Kim <milo.kim@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
cm-t3517 uses two MMC interfaces. Add support for both.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit 9725f44 (ARM: OMAP: Add DT support for timer driver) added
device-tree support for selecting a clockevent timer by property.
However, the code is currently ignoring the property passed and
selecting the first available timer found. Hence, for the OMAP3 beagle
board timer-12 is not being selected as expected. Fix this problem
by ensuring the timer property is passed to omap_get_timer_dt().
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
'omap_dma_reserve_channels' when used is suppose to be from command.
so, it alreay has value before 1st call of omap_system_dma_probe.
and it will never be changed again during running (not from ioctl).
but 'dma_lch_count' is zero before 1st call of omap_system_dma_probe.
so it will be failed for omap_dma_reserve_channels, when 1st call.
so, need use 'd->lch_count' instead of 'dma_lch_count' for judging.
Signed-off-by: Chen Gang <gang.chen@asianux.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
When applying RT patch on top of Linux, spinlocks are
implemented as RT-mutexes, which means they are preemptable.
Current GIC implementation on OMAP is using a spinlock
to protect against preemption. As it turns out, we need
to convert that lock into a raw_spinlock so that OMAP's
interrupt controller works as expected after RT-patch
is applied.
This patch is simply to decrease the amount of changes
RT-team needs to carry out of tree. It doesn't cause any
changes in behavior.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds device tree bindings for OMAP OneNAND devices.
Tested on an OMAP3 3430 IGEPv2 board.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
gpmc_onenand_init() will be called from another driver's probe() function,
so drop the __init annotation, in order to prevent section mismatches.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
If the GPMC probe fails, devices that use the GPMC (such as ethernet
chips, flash memories, etc) can still allocate a GPMC chip-select and
register the device. On the OMAP2420 H4 board, this was causing the
kernel to crash after the gpmc probe failed and the board attempted
to start networking. Prevent this by marking all the chip-selects as
reserved by default and only make them available for devices to request
if the GPMC probe succeeds.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
for_each_node_by_name() automatically calls of_node_put() on each
node passed; so don't do it explicitly unless there's an error.
Reported-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The Allwinner A10 has 9 banks of 32 GPIOs available, so it doesn't fit
in the usual 256 limit set by gpio.h. Increase this number to 288.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Implement timer_broadcast for the arm architecture, allowing for the use
of clock_event_device_drivers decoupled from the timer tick broadcast
mechanism.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Currently, the ARM backend must maintain a redundant list of timers for
the purpose of centralising timer broadcast functionality. This prevents
sharing timer drivers across architectures.
This patch moves the pain of dealing with timer broadcasts to the core
clockevents tick broadcast code, which already maintains its own list
of timers.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Commit 6bb27d7 "ARM: delete struct sys_timer" caused the following:
arch/arm/mach-imx/imx31-dt.c:56:2: warning: initialization from incompatible pointer type [enabled by default]
arch/arm/mach-imx/imx31-dt.c:56:2: warning: (near initialization for ‘__mach_desc_IMX31_DT.init_time’) [enabled by default]
This is because mx31_clocks_init_dt() returns int, whereas the .init_time
field prototype expects a function returning void. Implement a wrapper so
that the prototypes match.
Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
* Changes to allow unplugging of CPU0 by Ulrich Hecht.
* Changes to add reg and device_type properties to cpus
device trees entries by Simon Horman.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJRCgzaAAoJENfPZGlqN0++tgEP/RxzNKMXnJ6h6125DD8clPOj
ss8A10YEMlnJX7jtBVrKJeS2RQcsuAHkQ5wojOb/DqZQf5OeVO90n4JotNO9g9F6
cFMq/E6UEGK1zLZ+uauoexbQvVv6pPVL06aSncoVElrhSiu+509aybb5jHALNouc
BrJXzgSyJMlSgL//sqZYtuQraAZo4IWeyzwF8giJs4seyb39JhW5J3uEbCVFklyW
G4qLvoU3z95k96J70YhYYNrNE/1FezzEQyOrns1MnirGsohTn1XSuyt3jzaBzgyI
kMFBo1lYByOed9Qcysv+lUQgA2jO2vJ7VX0PQI20SGDHwzUu8J272Nq54se6gX9M
TKQbYg9LqvfE/He5H9AuIcnpHiVrYArIoGAE2gPsr/NEnGVVwEnCqF87gNe1NDWk
OIpeCbt3AuN4fae+C1G5ohXFmTTndrHybZZfjb5Jd3ty282gbER64MubiK9Kfocj
0KC0IS/Emz5TK/2CsBTq2uSFFG0SlNZw4JcIgH4EjWE71++dSYQwVWrucaB5JEps
q8EZWQd1JwRp0KehJN6MgpLMyG3ilFnErEC1O8U9iKcgxFVyLXB05fG2e5Yn6IBp
eoXVOxPvJpLQJlBvJ7mNIyykSs+txuerUyC3WlIRa6gjiEf95e9y2gca4pYcNesk
ED4IZ2whWihxC9HsI7nC
=l7OU
-----END PGP SIGNATURE-----
Merge tag 'renesas-soc2-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Second round of Renesas ARM-based SoC changes for v3.9
* Changes to allow unplugging of CPU0 by Ulrich Hecht.
* Changes to add reg and device_type properties to cpus
device trees entries by Simon Horman.
* tag 'renesas-soc2-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: mach-shmobile: sh73a0: allow unplugging of CPU0
ARM: mach-shmobile: add shmobile_cpu_disable_any()
ARM: mach-shmobile: emev2: Add reg and device_type properties to cpus
ARM: mach-shmobile: sh73a0: Add reg and device_type properties to cpus
Signed-off-by: Olof Johansson <olof@lixom.net>
* Fix to correct timer initialisation on the armadillo 800 eva board
from Hideki EIRAKU
* The remaining of the changes relate to updating boards to
make use of gpio_request_one(). These changes are from Laurent Pinchart.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJRCguPAAoJENfPZGlqN0++blQP/j9pXviM6HTBA5YyJQqmb8kl
sruUmBwHdG3lw1FzuLwxlnCpShOmQQDc2B4IJrDo4GTb84VWXdyxutgqLhXNJzew
zSZtIf7ikDILOQ0cpdaEQyAzTNODFA7Pt9pfea8Rt8cM/Ow/f//26w4bCeGZuIJQ
oDAeldQoa3lzs9j9U7qjnqdrt6SSXD/7XsDJBsdgbCVUpEljana1NNxEWr+tbPZ+
1rzYDRGUwLKieyM0NjcOMXAC52yN8izkSVr+QyDUdIds+mEw7YeGE35KPtWU9xpB
+PQMuCjYIv/w3++WMsFa4ReAn4tzQYjv57mlYk4wv/07czCRurIn932GmFWmJGFq
jJuGLD8JFs3sj7FtZwFBQix7xRTlzypO3ygUTa+F4BDl5W/Ad+nDNQh16E8JGXaG
AKBHoVCVE7UECj2Nz8HDGH0mWNntmdXQwolfQoGYbJ/RdYpG77SXKwvGJ3r+mo13
NVCzSEFF3kiROnTb8JcZjuejrmvt8494kynKS428YasXU78DDjbH1Y+rmFUy4aSE
KNg3/tPNlzeJJpWMrIfPLDdkd3Bw6yiktQFAxp0Qdc8GUcpD4SVHqN9WF+lWYt8c
ML80zFK9B3UUc745UN8BQT3ENvaHgXTTPImCOEp2s12S/wGiHrERKO/cQDXLxpA0
7OiUTDL2RjZ2K87jNbTZ
=b7uu
-----END PGP SIGNATURE-----
Merge tag 'renesas-boards2-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards
From Simon Horman:
Second round of Renesas ARM-based SoC board changes for v3.9
* Fix to correct timer initialisation on the armadillo 800 eva board
from Hideki EIRAKU
* The remaining of the changes relate to updating boards to
make use of gpio_request_one(). These changes are from Laurent Pinchart.
* tag 'renesas-boards2-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: armadillo800eva: set clock rates before timer init
ARM: shmobile: mackerel: Use gpio_request_one()
ARM: shmobile: kzm9g: Use gpio_request_one()
ARM: shmobile: bonito: Use gpio_request_one()
ARM: shmobile: kota2: Use gpio_request_one()
ARM: shmobile: armadillo800eva: Use gpio_set_value() to set GPIO value
ARM: shmobile: armadillo800eva: Use gpio_request_one()
ARM: shmobile: ap4evb: Use gpio_request_one()
ARM: shmobile: ag5evm: Use gpio_request_one()
Signed-off-by: Olof Johansson <olof@lixom.net>
With commit a0ae0240 (ARM: kernel: add device tree init map function),
the cpu id value may include the cluster id and is no longer 0-3, so we
need to mask it now to get the right hard cpu index.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
With commit a0ae0240 (ARM: kernel: add device tree init map function),
the cpu id value may include the cluster id and is no longer 0-3, so we
need to mask it in scu_power_mode to get the local cpu number. Since we
are only dealing with the cpu we are running on, the cluster id should
not ever be needed.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Add an empty version of scu_enable for !SMP builds. This fixes
compile error for highbank suspend code on !SMP builds.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Move the Kirkwood cpuidle driver out of arch/arm/mach-kirkwood and
into drivers/cpuidle. Convert the driver into a platform driver.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The core functionality of the arch_timer driver is not directly tied to
anything under arch/arm, and can be split out.
This patch factors out the core of the arch_timer driver, so it can be
shared with other architectures. A couple of functions are added so
that architecture-specific code can interact with the driver without
needing to touch its internals.
The ARM_ARCH_TIMER config variable is moved out to
drivers/clocksource/Kconfig, existing uses in arch/arm are replaced with
HAVE_ARM_ARCH_TIMER, which selects it.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Several bits in CNTKCTL reset to 0, including PL0VTEN. For architectures
using the generic timer which wish to have a fast gettimeofday vDSO
implementation, these bits must be set to 1 by the kernel. For
architectures without a vDSO, it's best to leave the bits set to 0 for
now to ensure that if and when support is added, it's implemented sanely
architecture wide.
As the bootloader might set PL0VTEN to a value that doesn't correspond
to that which the kernel prefers, we must explicitly set it to the
architecture port's preferred value.
This patch adds arch_counter_set_user_access, which sets the PL0 access
permissions to that required by the architecture. For arch/arm, this
currently means disabling all userspace access.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Currently, the arch_timer driver is tied to the arm port, as it relies
on code in arch/arm/smp.c to setup and teardown timers as cores are
hotplugged on and off. The timer is registered through an arm-specific
registration mechanism, preventing sharing the driver with the arm64
port.
This patch moves the driver to using a cpu notifier instead, making it
easier to port.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Without the isbs in arch_timer_get_cnt{p,v}ct the cpu may speculate
reads and return stale values. This could be bad for code sensitive to
changes in expected deltas between calls (e.g. the delay loop).
Without isbs in arch_timer_reg_write the processor may reorder
instructions around enabling/disabling of the timer or writing the
compare value, which we probably don't want.
This patch adds isbs to prevent those issues.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Currently the arch_timer register accessors are thrown together with
the main driver, preventing us from porting the driver to other
architectures.
This patch moves the register accessors into a header file, as with
the arm64 version. Constants required by the accessors are also moved.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
The CNTFRQ register is not duplicated for physical and virtual timers,
and accessing it as if it were is confusing.
Instead, use a separate accessor which doesn't take the access type
as a parameter.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
We're currently inconsistent with respect to our accesses to the
physical and virtual counters, mixing and matching the two.
This patch introduces and uses a function pointer for accessing the
correct counter based on whether we're using physical or virtual
interrupts. All current accesses to the counter accessors are redirected
through it.
When the driver is moved out to drivers/clocksource, there's the
possibility that code called before the timer code is initialised will
attempt to call arch_timer_read_counter (e.g. sched_clock for AArch64).
To avoid having to have to check whether the timer has been initialised
either in arch_timer_read_counter or one of it's callers, a default
implementation is assigned that simply returns 0.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
To ensure the correct size of types, use u64 for the return value of
arch_timer_get_cnt{p,v}ct, and u32 for arch_timer_rate, matching the
size of the registers these values are taken from. While we're changing
them anyway, simplify the implementation of arch_timer_get_cnt{p,v}ct.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
This check is a holdover from the pre-devicetree days. As the timer
is not probed except by platforms which register it via devicetree,
it's not strictly necessary.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
When we get the device_node for the arch timer, it's refcount is
automatically incremented in of_find_matching_node, but it is
never decremented.
This patch decrements the refcount on the node after we're finished
using it.
Reported-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
As per the Exynos5250 User Manual:
When there are pending interrupt events, WFI/WFE instruction are
ignored. To cancel the power-down sequence follow these steps:
1) Disable system power-down using CENTRAL_SEQ_CONFIGURATION register
2) Clear WAKEUP_STAT register
3) Enable interrupt service routine for CPU
Code for early wakeup for exynos already exists. Remove the panic
on suspend failure, clear the wakeup state register and return 1
from cpu_suspend to indicate a failed suspend (to a user daemon).
Older Samsung SoCs have similar panics and I have removed them all.
Haven't touched the S3C2410 sleep code.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
the buff is 256 limited, so need use vsnprintf instead of vsprintf
Signed-off-by: Chen Gang <gang.chen@asianux.com>
Cc: Ben Dooks <ben@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Fixes the following warning:
arch/arm/mach-s3c24xx/common-s3c2443.c:135:19: warning:
symbol 'clk_msysclk' was not declared. Should it be static?
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This series is a prerequisite for the functional powerdomain
conversion series.
Basic test logs for this branch are here:
http://www.pwsan.com/omap/testlogs/pm_cleanup_fixes_3.9/20130129150017/
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJRCEx/AAoJEMePsQ0LvSpLwcIP/00e6o2HkImtdoM+6O0SAcqf
adxz53y6byfeJkmg/RxsNiGAphp1Kjl0Pe9OViXH9GxrhgEYnUYiT0zQBLgjPIeC
6qiPbWW6+iey5955Tj+t1HPI0KmduJP9dkXCU9RNZ93h78TXCZQOSBwW5Y5Py0UR
7UyrtNy7Gs9ChLB+z+l3MPEv9aPbaWRhzWKAO9h93qxVvl+t3sQt72R+hiFNzJIv
EjJ6nGAGxXIfcdjxKfYm/4un0qYmG62U+FMs0pstP2rFqozEIa6m/OqShCHX18os
RCWWkt+ZcIbWOeDPBoYhgsMJ1L3K8TJ2P3GQqWPPP/y5rtTHZnegsf5W00dN3irP
QDN+mPPD4piiUnUgud8kPx4IH9ooaJhuXeyoIak1qszL3qpo6oMDTurQDxYWER/O
NC9/g+6i/2D32Nvr9KJKvOPAyLTgsc9n6DRB9J5NokH942wPWX36OZxVfWvJLlnn
W6FT+alw4DtUubLSjhXKhNLj40QlgMyNHEhqj04MiEADse8jvXnp+WVCSPypqSyg
7SPBKzC6g9eGOl9qjUwcytPwXTvlKiSai9MmEcCC2FzmgP21aFoUogsPu5hYugGc
gUfpsp6DKI+xOZDXlfT+BXSEavUT6uiwV1PX5eWhzgs2ew4sI9rR+zxYa3ORQIe5
zTYyz5eDkBk4kkJodVmC
=/cy+
-----END PGP SIGNATURE-----
Merge tag 'omap-cleanup-b-for-3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.9/pm
Several OMAP2+ power management fixes, optimizations, and cleanup.
This series is a prerequisite for the functional powerdomain
conversion series.
Basic test logs for this branch are here:
http://www.pwsan.com/omap/testlogs/pm_cleanup_fixes_3.9/20130129150017/
Unconditionally register the PCI-E bus, even if the link is currently
down. When the link is brought up the bus can be scanned through
/sys/bus/pci/rescan or otherwise. Since the HW has no interrupt for
link up, userspace will have to take care of the timing.
An earlier version of this was contingent on CONFIG_HOTPLUG, but
that is being removed from the kernel.
This also fixes printing the link up/down message to be displayed
on one line (structured logging broke this?)
Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
- add missing gpio interrupt lines to dove dt
- fix bad logic for printing MPP error message on orion boards
- build proper serial port driver after changing mvebu DT compatible property
- This is a change to mvebu_defconfig that I wouldn't usually push out as a
fix. However, the commit
b24212f arm: mvebu: Use dw-apb-uart instead of ns16650 as UART driver
changed the serial driver for the board in the dts file. without the patch
I've included in this pull, users won't see any log messages.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.19 (GNU/Linux)
iQEcBAABAgAGBQJRB+cvAAoJEAi3KVZQDZAej/MH/2eWE2N3eTs8PRshCUoEIQxd
4uConsKhPiIyNK1rHePGI4EY/M07yxYRO7/55ajK5J3NiqxO7N8n0RYIMFsgNoC9
LCPpi2Ts6Rpj87jqj7ION6pfCiIDPE+Lj4hNQAVTuQAMrh04UqaDLHwpfQztETxW
C6X9A8ae+fVFfVQN0AusStImklxv5hf4odUhqvSKd6gy6n20KtV4EQQN+t+OLSgx
IsRUVww6cfqYFNYDWhyWg8SLppIp9m44hluS8f/wPT9zh5Wf6XWnvAZz41cqaf44
FpzURzHQGcmetqPv/MWL9YSCMTSmBxLfW4totTq2wgldl6qQc7bJsF3R0HlsUgc=
=EA67
-----END PGP SIGNATURE-----
Merge tag 'tags/mvebu_fixes_for_v3.8-rc6' into mvebu/drivers
fixes for v3.8-rc6
- add missing gpio interrupt lines to dove dt
- fix bad logic for printing MPP error message on orion boards
- build proper serial port driver after changing mvebu DT compatible property
- This is a change to mvebu_defconfig that I wouldn't usually push out as a
fix. However, the commit
b24212f arm: mvebu: Use dw-apb-uart instead of ns16650 as UART driver
changed the serial driver for the board in the dts file. without the patch
I've included in this pull, users won't see any log messages.
This adds a subdriver for the AB8500 pinctrl portions.
As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.
Acked-by: Olof Johansson <olof@lixom.net>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the AB8500 core driver, which will be utilized by
the follow-on drivers for different ABx500 variants.
Sselect the driver from the DBX500_SOC, as this chip is
powering and clocking that SoC.
Cc: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The pin controller is an inherent part of the SoC, without
it the system will not boot, thus it needs to be selected
from Kconfig.
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The preference is to use '-' instead of '_' in compatible strings.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Move sp810 header to a more generic location,
mainly to share it with arm64
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJRCULAAAoJEL9jRaJfXa5PyysH/AsFbihoAGU0S7o+ggyN4S8m
5myEfbdMvgI5Hjcl/MgcVJAl6jFpDjmBH5ZPu+o8WzoP5L91C9F//kMRZqK0zATj
Y2OdMVNfVQG94bSsmjHryWF8W0RYcY2bQr0wJmgguNDpRLFsFdF3Rb58AWzG+2tP
KFxDg9u/CyhC/sv7BzoKI+J3ol5wEmv4BNMbPyjYG8L5TcBfe/IZqnl6KZ/QAw5i
QUFs3oXtT4/v8bnsxAym+VXIvjSHWs2t0CivfMyH+ZIgb3NbfJ1gIOCOJIk5XWTu
6L1yYyBBcRr60y9p4s2Nd4NxHZEB7pyZYuboUOxSmRNnEM54RT2Nkvcdon8j6Rw=
=uB7w
-----END PGP SIGNATURE-----
Merge tag 'vexpress/drivers-for-3.9' of git://git.linaro.org/people/pawelmoll/linux into next/drivers
From Pawel Moll:
Versatile Express related driver updates for 3.9:
* Move sp810 header to a more generic location,
mainly to share it with arm64
* tag 'vexpress/drivers-for-3.9' of git://git.linaro.org/people/pawelmoll/linux:
arm: Move sp810.h to include/linux/amba/
+ Linux 3.8-rc5
Signed-off-by: Olof Johansson <olof@lixom.net>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJRCOkwAAoJEAf03oE53VmQ9zoH+gN/1KDpr0i0sRn1mgjEBmqr
C87Kpj2ZCRYkfTtixsvlYitbwckQVGpHR1FBL9gy/LjdTTzMntjS2u/B371ssV/a
UgbdTh3jfol696ik1zZYXruoAugGbWWfrDtfLzSPKs9uD/XMFT3deWNxZ/f0lsTs
tj27sMoKXQXuEUweeHNFk8N7f9Dx4/rz3ova7vF9D9ZPtHbsY4IIdtUDggeIwyQU
E5VAjF/G/s7VGg7l1NcaHVqVm2qAD6/LKqwZiJGE5N/FAl/ST/Edkh5j8a8x0wrV
jAZ9XPk0vWc7QRjidS3c4zknchk/ui5fGjCgN2Wu8c1W1EbLpDHBUvGKg13suqo=
=5iXO
-----END PGP SIGNATURE-----
Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixes
From Nicolas Ferre:
Two little Device Tree fixes for USART on at91sam9x5.
* tag 'at91-fixes' of git://github.com/at91linux/linux-at91:
ARM: at91/at91sam9x5.dtsi: fix usart3 TXD
ARM: at91: at91sam9x5: fix usart3 pinctrl name
Since it is now used by code under drivers/clk/ it makes sense for this
file to be in a more generic location. This is required for building
vexpress support on arm64.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Pawel Moll <pawel.moll@arm.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Add WAIT mode (ARM core clock gating) support to imx6q cpuidle driver.
As WAIT mode is broken on imx6q TO 1.0 and 1.1, it only enables the
support for revision 1.2 with chicken bit set.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Move imx6q_cpuidle_driver into a separate file as more codes will
be added when WAIT mode gets implemented as cpuidle.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The return of v2_set_next_event() will lead to an infinite loop in
tick_handle_oneshot_broadcast() - "goto again;" with imx6q WAIT mode
(to be enabled). This happens because when global event did not expire
any CPU local events, the broadcast device will be rearmed to a CPU
local next_event, which could be far away from now and result in a
max_delta_tick programming in set_next_event().
Fix the problem by detecting those next events with increments larger
than 0x7fffffff, and simply return zero in that case.
It leaves mx1_2_set_next_event() unchanged since only v2_set_next_event()
will be running with imx6q WAIT mode support.
Thanks Russell King for helping understand the problem.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Comment for usart3 TXD (TXD3) is correct, dt code is wrong.
Signed-off-by: Douglas Gilbert <dgilbert@interlog.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The renaming of pinctrl_uart3 to pinctrl_usart3 was missed in
commit 9e3129e (ARM: at91: fix usart/uart namimg in pinctrl).
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Previously clock rates were set after initialization of timer.
Therefore the timer used the default extal1 clock rate (25MHz)
instead of the correct rate for this board (24MHz).
Signed-off-by: Hideki EIRAKU <hdk@igel.co.jp>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
sh73a0 deals fine with disabling any core, so we should permit it.
Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Method to disable any core to be used on platforms where CPU0 does not
need special treatment.
Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
- First an ACKed MFD patch deleting the only consumer
of these cpu_is* functions outside of mach-ux500
- Introduce a new local cpu_is_u8580() in this patch
set to avoid clashing with other patch sets.
- Finally de-globalize <mach/id.h>.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iQIcBAABAgAGBQJRCAvIAAoJEEEQszewGV1zANkQAJuEX2agV62ULfukOgATLm6A
KHvt04X8r9tsZwC6PFZYWtaD60/hUIgtFLfV5gj/RCJlpOqlCqN6+S8y55mmB/Az
Cmp2UwFQ0w9uSI+AtJWnwyd/ViGRzoARSJqX144XhITABTi4hu7ODWpNWrVbvOmX
Swy1qYBvsrm9L2abE0/I+O8k4YVHX1s73WocGquu6VCAXUWnDxeanrP79A/jARxa
vhKZcD/QDfvN71KKIREQTkh3MLQszrHMavVuI3d4aEqL8Pzxn28zUjjIFQDZYhfp
8KpuZe/Vys1+YY5ssd91C8puIi2hxabvniN/IbnYVK98V7jXx01CTSb0csUokWTA
8AIYA34HIEwLJohcOvSzbPw121M0pjqLKhyoqkMi7ExeEolAk3Z8d3FALZ96cbPF
WdwUQYx298hZqjsHJx42RozZeGPMxEbmgwxhvjePrIweFcbojyda/AnrFU02svLZ
AekYiEObCqsxSmZZ+y0ey3aETD0WmnRf58uPEzylV7ko4bEdxztw+joESv2ieZ2/
fPbRj45M4EPsqsCgQnNsGiBjPIvyKM9gon9Np4PwKHMLCYeRdkX7h5BOEx896mHv
IAmzR5h6Y/fd8yOckdK89hF0qBoLBlowbJKa39sKhBoe/pHkumcq92zrXs2pRFQy
KFBMEIIAEICgINOL8BLF
=zjvx
-----END PGP SIGNATURE-----
Merge tag 'ux500-no-idh' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/cleanup
From Linus Walleij:
Removal of the <mach/id.h> include from ux500
- First an ACKed MFD patch deleting the only consumer
of these cpu_is* functions outside of mach-ux500
- Introduce a new local cpu_is_u8580() in this patch
set to avoid clashing with other patch sets.
- Finally de-globalize <mach/id.h>.
* tag 'ux500-no-idh' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: de-globalize <mach/id.h>
ARM: ux500: Introduce cpu_is_u8580()
mfd: prcmu: delete pin control helpers
Signed-off-by: Olof Johansson <olof@lixom.net>
* Correct interrupt definitions for WDT node in
V2P-CA15 and V2P-CA15_A7 Device Trees
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJRCBNlAAoJEL9jRaJfXa5PMyEH/1IpQcrzX/7jXo1VEGLkUzn7
Pum+GFWxxbzMXi1CKvOEBbXQHpkTUoNbp3Nf2YVY70nym12SwTZviV27HuGlcyZA
E4AA9vcIbDMMFGhbYb2H0Xmb4Pd/+1mCveJ8Iji7I7zszAe7CVIJzwbF37/a4Q5F
r88CiEGyLieLIo+3VhQ9Q8dqN8LKABwIdFlmuily2nkjA+ZuyW3Gy3SWqC9VyVZG
9RcHJHLFDiQ0hnEsAS+pcgfrFjTwZ0coWZJ+I6sEMniiwAzjzhh9YZFK5nnSOLgn
T6nb1pNp50ZUEio0g9kZj9G/i9sb9zgzqEJrl3T2idciy87iF6cZVZDpVFeeOrw=
=pUdJ
-----END PGP SIGNATURE-----
Merge tag 'vexpress/fixes-for-3.9' of git://git.linaro.org/people/pawelmoll/linux into next/fixes-non-critical
From Pawel Moll:
Versatile Express related fixes for 3.9
* Correct interrupt definitions for WDT node in
V2P-CA15 and V2P-CA15_A7 Device Trees
* tag 'vexpress/fixes-for-3.9' of git://git.linaro.org/people/pawelmoll/linux:
ARM: vexpress: Fix wdt interrupt in ca15{-tc1,_a7} dts
Signed-off-by: Olof Johansson <olof@lixom.net>
- remove unneeded #includes for mach-dove
- remove unneeded #includes and code for the nsa310
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.19 (GNU/Linux)
iQEcBAABAgAGBQJRCD/aAAoJEAi3KVZQDZAe9OEIAKY9GROuovGad7LqScZqqoLH
qc0oPMyExqvFEQdcCs595T4A2MZB7D+enT2GmTZh5YvThBhdomeV6YqUzBZa303b
Y2WCiVzN7tWTstF1WP7ZsoCxB9Fsa/S7EFJsDF6yECXwkzaMgnHgW6IRBZSM3KXk
jdILsUFb1AwhT4mP+srVoXc+T8uOsKGY8f2wvs+zpm9jKaTmfAucvIMmj1oN3VZq
ldHBbXbmMHYNr0hk85uMUkcgcl2fySqZD49qAKOEGYGeHsGOJEynFmIBGmCwFVhz
xI6vFE9ND++E3Md/pAAM0KCTx7bj+n6P4tK2MfqDQIFmpiBm+LC0yV3K9HLy5EY=
=w8pr
-----END PGP SIGNATURE-----
Merge tag 'cleanup_for_v3.9_round2' of git://git.infradead.org/users/jcooper/linux into next/cleanup
From Jason Cooper:
cleanup for v3.9 round2
- remove unneeded #includes for mach-dove
- remove unneeded #includes and code for the nsa310
* tag 'cleanup_for_v3.9_round2' of git://git.infradead.org/users/jcooper/linux:
ARM: dove: cleanup includes
ARM: kirkwood: nsa310: cleanup includes and unneeded code
Fix some whitespace problems introduced by commit
da03ce65b5 ("OMAP3: powerdomain data:
add voltage domains"). Also, improve the documentation for the struct
powerdomain.flags field.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
The atomic usecounts seem to be confusing, and are no longer needed
since the operations that they are attached to really should take
place under lock. Replace the atomic counters with simple integers,
protected by the enclosing powerdomain spinlock.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Split the clkdm_(add|del)_(wk|sleep)dep() functions into lockless and
locking versions -- this will be needed in a subsequent patch. Also,
while here, remove the leading underscore, since these are not
currently static functions. And for functions that have
kerneldoc-style comment blocks, but which are missing the initial
'/**' tag, fix the tag to indicate that they are kerneldoc.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
There's no need to preserve the autodep handling code in
mach-omap2/cm2xxx.c, since no autodeps are defined for these chips.
Hopefully they'll never be needed, but if in some future case they are,
this code can be added back in.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add a per-powerdomain spinlock. Use that instead of the clockdomain
spinlock. Add pwrdm_lock()/pwrdm_unlock() functions to allow other
code to acquire or release the powerdomain spinlock without reaching
directly into the struct powerdomain.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Jean Pihet <jean.pihet@newoldbits.com>
Move omap_set_pwrdm_state() from the PM code to the powerdomain code,
and refactor it to split it up into several functions. A subsequent patch
will rename it to conform with the existing powerdomain function names.
This version includes some additional documentation, based on a
suggestion from Jean Pihet. It also modifies omap_set_pwrdm_state()
to not bail out early unless both the powerdomain current power state
and the next power state are equal. (Previously it would terminate
early if the next power state was equal to the target power state,
which was insufficiently rigorous.)
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Jean Pihet <jean.pihet@newoldbits.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Tero Kristo <t-kristo@ti.com>
Drop an unnecessary pwrdm_wait_transition() from mach-omap2/pm.c -
it's called by the subsequent pwrdm_state_switch().
Also get rid of pwrdm_wait_transition() in the powerdomain code - there's
no longer any need to export this function.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Don't attempt to put clockdomains to sleep; this should be handled by the
clock framework. It should be enough to program the next-power-state,
and then let the code in omap_pm_clkdms_setup() deal with the rest.
Start out by programming the MPU and CORE powerdomains to stay ON.
Then control the MPU and CORE powerdomain states directly in
omap2_enter_full_retention() and omap2_enter_mpu_retention(). Not the
most optimal way to do it, but certainly is the most conservative until
OMAP2xxx PM is working again.
Get rid of the open-coded PM_PWSTCTRL_MPU writes in
omap2_enter_mpu_retention(); use the powerdomain code instead.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
In clkdm_sleep(), the powerdomain should be eligible to switch power
states right after the call to the low-level clockdomain sleep
function. We should have been tracking that with the
pwrdm_state_switch() code, but we weren't, for whatever reason. Fix that.
This resolves the "pwrdm state mismatch(cam_pwrdm) 3 != 0" that appears
during the OMAP4460 Pandaboard-ES PM test, e.g. here:
http://www.pwsan.com/omap/testlogs/test_v3.8-rc5/20130126003323/pm/4460pandaes/4460pandaes_log.txt
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Fix the trace in the case a power domain did not hit the desired
state, as reported by Paul Walmsley.
Reported-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Jean Pihet <j-pihet@ti.com>
[paul@pwsan.com: split this fix off from the patch
"ARM: OMAP2+: PM debug: trace the functional power domains states"]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Avoid programming the MPU and CORE powerdomain next-power-state
registers if those powerdomains will never enter low-power states
(e.g., the state that people refer to as "C1").
To avoid making assumptions about CPUIdle states based on their order
in the list, use a flag to mark CPUIdle states that don't enter
powerdomain low-power states.
Avoid a previous-power-state register read on the MPU powerdomain
unless we know that the MPU was supposed to go OFF during the last
state transition. Previous-power-state register reads can be very
expensive, so it's worth avoiding these when possible.
Since the CORE_L3 clockdomain can't go inactive unless the MPU is active,
there's little point blocking autoidle on the CORE_L3 clockdomain in "C1"
state, since we've programmed the MPU clockdomain to stay active.
Remove the unnecessary code.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
This patch cleans unneccessary includes and reorders the remaining
includes in common dove code.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
After removing the unneeded linux/i2c.h, linux/of.h was needed for
of_machine_is_compatible(). i2c.h had included of.h.
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The patch: "ARM: use common irqchip_init for GIC init"
(sha1: 0529e315bb)
should also add linux/irqchip.h header.
Error message:
arch/arm/mach-zynq/common.c:99:14: error: 'irqchip_init'
undeclared here (not in a function)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- add missing gpio interrupt lines to dove dt
- fix bad logic for printing MPP error message on orion boards
- build proper serial port driver after changing mvebu DT compatible property
- This is a change to mvebu_defconfig that I wouldn't usually push out as a
fix. However, the commit
b24212f arm: mvebu: Use dw-apb-uart instead of ns16650 as UART driver
changed the serial driver for the board in the dts file. without the patch
I've included in this pull, users won't see any log messages.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.19 (GNU/Linux)
iQEcBAABAgAGBQJRB+cvAAoJEAi3KVZQDZAej/MH/2eWE2N3eTs8PRshCUoEIQxd
4uConsKhPiIyNK1rHePGI4EY/M07yxYRO7/55ajK5J3NiqxO7N8n0RYIMFsgNoC9
LCPpi2Ts6Rpj87jqj7ION6pfCiIDPE+Lj4hNQAVTuQAMrh04UqaDLHwpfQztETxW
C6X9A8ae+fVFfVQN0AusStImklxv5hf4odUhqvSKd6gy6n20KtV4EQQN+t+OLSgx
IsRUVww6cfqYFNYDWhyWg8SLppIp9m44hluS8f/wPT9zh5Wf6XWnvAZz41cqaf44
FpzURzHQGcmetqPv/MWL9YSCMTSmBxLfW4totTq2wgldl6qQc7bJsF3R0HlsUgc=
=EA67
-----END PGP SIGNATURE-----
Merge tag 'mvebu_fixes_for_v3.8-rc6' of git://git.infradead.org/users/jcooper/linux into fixes
From Jason Cooper:
fixes for v3.8-rc6
- add missing gpio interrupt lines to dove dt
- fix bad logic for printing MPP error message on orion boards
- build proper serial port driver after changing mvebu DT compatible property
- This is a change to mvebu_defconfig that I wouldn't usually push out as a
fix. However, the commit
b24212f arm: mvebu: Use dw-apb-uart instead of ns16650 as UART driver
changed the serial driver for the board in the dts file. without the patch
I've included in this pull, users won't see any log messages.
* tag 'mvebu_fixes_for_v3.8-rc6' of git://git.infradead.org/users/jcooper/linux:
arm: mvebu: i2c come back in defconfig
arm: plat-orion: fix printing of "MPP config unavailable on this hardware"
Dove: activate GPIO interrupts in DT
The irqs available on the machine and even the bit settings in the
irq registers differ a lot through all the s3c24xx subarchitectures.
This results in each subarch having its own irq init which adds its
specific irqs to the base ones created in plat-s3c24xx/irq.c.
This of course makes a future move to devicetree hard to implement.
Therefore this patch transforms the base irq handling to a declarative
style, where the irq types as well as its parent/child relationship
gets read from a predefined datastructure, which later on can hopefully
be easily represented in devicetree too.
It should also be easy to include the subarch specific irqs here
in later patches, reducing code size and duplication.
It should not affect anything outside of the file, as the original
irq numbers and their handling are preserved (hopefully) correctly.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
From Kukjin Kim:
This fixes compatible values for exynos pinctrl and crash on soft reset,
tick and alarm irq numbers on exynos5440 and uninitialized variable on
s3c24xx.
* 'v3.8-samsung-fixes-4' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: Fix crash on soft reset on EXYNOS5440
ARM: dts: fix tick and alarm irq numbers for exynos5440
ARM: dts: fix compatible value for exynos pinctrl
ARM: dts: Fix compatible value of pinctrl module on EXYNOS5440
ARM: S3C24XX: fix uninitialized variable warning
Signed-off-by: Olof Johansson <olof@lixom.net>
As the wdt nodes have the gic as their interrupt-parent, their
interrupts property should be 3 cells in format described in the gic
devicetree binding document.
This patch fixes the interrupts property in the wdt nodes to be in the
correct format.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Tegra114 has the GPIO controllers with 8 GPIO bank and each bank
supports 32 pins.
Add DT entry for GPIO controller. Tegra114 GPIO controller is
compatible with Tegra30 GPIO controller driver.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Select PINCTRL and PINCTRL_TEGRA114 for enabling Tegra114 pincontrol
driver for Tegra114 SoC.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Adding the generic ARM_CPUIDLE_WFI_STATE support for Tegra114.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Use functional name for DT entry instead of h/w name.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Use functional name for DT entry instead of h/w name.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The SDHCI and I2C subsytems and drivers are enabled.
Various filesystems are enabled for use with the SDHCI driver.
Various other options expected by distros are enabled. This allows the
"Raspbian" filesystem published by the Raspberry Pi Foundation to boot
to a serial console prompt.
This branch is based on v3.8-rc3.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRB2usAAoJEJuNpwkmVCGcvOcP/i5NjiYTtsXet91uv81am70b
/pMIXD+Li+nMN1hAUV2jhBo+sUyVjAnTtgLAvoJwD19w5Fz+SHZj3KB6dsp1cXKk
CqmNeS5CqPOk1QMbOr3dgHN7rRbaOxlv9MLoOI+IajStIHi8SdWGqa5XBIFqaap9
6Uf4+sTa4qz6Olt2O9ik4b0qiJqJ+JPByLjpoFBlHAv17Jt68eknP552JO5raW//
u1tEy4xCdrAZMmSVM8GjzzdoeZWZKOcsNPx7O+yLtV/hbOEqP76VFnUhHUOuPW62
t3t0dntddG15r3Q2/j5pm6r8AtFKF0gmTVCl0BzBBaiJ1NMt5N/AR6UrF56J5IBk
SHnnda9+npkukaR9UkiKZLfsuZ7cm8KLSRgd0S9TrRdZc+6y+2nhRwjBB3R2h94P
CmkfUWPtAXmps+uWK0ImhN1MoxpjlcqF18ZxA40/Do2yZbDEI/eJ4e/o5enTY7To
0oZZfRgRaCpSYGCjolSL+Q35bBkAO/9hsQlC7Rxh5PNEj/U7isMPFJwEhfnuGRFD
xwAZgzCdzKajxjIrFCNRDvfaxZQZnAx2UEUOPOm9fOEAWx927+0gSH5UAn7OuH+t
WgJj97MpA/zxJrMKE29OrOIWU/D0Q9oNf6MObhFBKBtmYwuxPbEfx2nkcEg2u50j
tRlZcQi5rvAOku0nj+Nv
=H8w8
-----END PGP SIGNATURE-----
Merge tag 'bcm2835-for-3.9-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi into next/boards
From Stephen Warren:
ARM: bcm2835: defconfig update
The SDHCI and I2C subsytems and drivers are enabled.
Various filesystems are enabled for use with the SDHCI driver.
Various other options expected by distros are enabled. This allows the
"Raspbian" filesystem published by the Raspberry Pi Foundation to boot
to a serial console prompt.
This branch is based on v3.8-rc3.
* tag 'bcm2835-for-3.9-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi:
ARM: bcm2835: defconfig updates
Signed-off-by: Olof Johansson <olof@lixom.net>
The SoC's SDHCI and MMC controllers are added to device tree, and enabled
in the Raspberry Pi board device tree. Some fixed clocks are added to the
device tree to support these drivers. These could be replaced by real
clocks in the future.
A hard-coded memreserve is removed from device tree; the bootloader should
specify the correct memory node content instead, since the memory layout
is dynamic.
This branch is based on v3.8-rc3.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRB2uRAAoJEJuNpwkmVCGcbWUP/0+t9FroP+QVadRuCiei9XG8
gAvnD8CG7/5Oxz488XctQHwZoxZStomfbvBhCUua+UjAcQoXLvpPbUfOwK2tObxo
OIDijyBtG/Ao8pG3VlL874+QXDv1tIi3GB02kV08FiL45bIXvOqkBFvZrG6MB/im
aug9YmA8GcBj6N0T/lTfSdhgDyjE3qPicJGdjemFac1O2QVTANya4wzg8ZdMOJe3
B60VzcsfegCKCZ+otNFiuh7MDpoVuT0N7H/JzrPZSu1jAjDfvo0nHUH2jNIHXtMZ
GUqQxG0+c5IyXnSp1QyRVmj1B56j9Y2Zxdv+FBqzVAM5U2tvozcXc2PIl1MP++nQ
lxknQa+NEqpyETaeRDwAKI0K5RWdPsiFk1QcM81IoUR5WXT4y/mMdIFsWzazmZ6s
HSxyytiMKiQ5uoA2+KN42FSXVn3DtR5qjAPKq1/+fdG9otdsYHZE000tFUYNrY3f
bZul35fuCMlpfccXOSJ9+0d+Jab4v0sGlp2/e3PK4UeEuEsg7N7RuF1d/DV6OX1G
CelMrdyny6W0thTYxFN2PAfH/xWFDirW6DzgtQYQbZF6plmu1teltJzaBXdsiYzd
YiWcKfzzWcBm9tAlVrAL6b0ljJZBLNZE62zJESEefifiqf7Yftk7aIjp7lLcZ2wp
Jbk5aIyY1oUE1pAf5UgA
=zsFG
-----END PGP SIGNATURE-----
Merge tag 'bcm2835-for-3.9-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi into next/dt
From Stephen Warren:
ARM: bcm2835: device tree updates
The SoC's SDHCI and MMC controllers are added to device tree, and enabled
in the Raspberry Pi board device tree. Some fixed clocks are added to the
device tree to support these drivers. These could be replaced by real
clocks in the future.
A hard-coded memreserve is removed from device tree; the bootloader should
specify the correct memory node content instead, since the memory layout
is dynamic.
This branch is based on v3.8-rc3.
* tag 'bcm2835-for-3.9-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi:
ARM: bcm2835: fix clock node aliasing in device tree
ARM: bcm2835: add I2C controllers to DT
ARM: bcm2835: add SDHCI node to DT
ARM: bcm2835 rpi: remove hard-coded memreserve from DT
Signed-off-by: Olof Johansson <olof@lixom.net>
This pull request simply converts the bcm2835 clocksource driver to use
the recently added CLKSRC_OF feature.
The branch is based on v3.8-rc3, followed by a merge of arm-soc's
timer/cleanup branch.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRB2z7AAoJEJuNpwkmVCGcpFoQAJy97s+9Zl0Azb2+aLKKUoDF
QQ4GYD5oRoJ8cIutoc9CgQ+eQ2dadjRx07Oi3CwicWABSYKEyj4huJNWrVPQ+TC7
/hDcMZdq9+hOwUU+U2xKTkiJi0CiLVnbnJQsJqNNPzv8JYwl+cBh7ow1OjNLf7qk
gYNDmnHhOZOX8PoDV93EvFXPeELOLBoaIs9uFwpbNfiQP9i3/CthYQm0aG3De+aG
XVNzwEPmivZbvUyHzldLU1DzoCbnPCuTdk+znuE0vwqlif12wZXJ63nRwD4nlDhu
mjt5DC3f3eTJsEGPbnxnJ5+jnx3XK82QzthYuoprYMVdSqPOfkiCboKn09IRYBQx
AMY3WEIOH+sYBpzcywhGAxh8iT5jtljerBHfIAqSkWkrURoK+PmlKUFZv/Gh90fg
9fxVBQxMkYhIGy8bXdNsiXJWRSzL3LTtFQ41qO60nwd/iEUOibDUcWaikMECCwn4
qSgOcFE+EX0EAbeR9vlO8t5RmTyo+8XRNCcuiAakMsSCXAFGfB097d7VzTSXFCK5
WyCTQUHbJNJTTuluShRKknhCYVt5tWqyfPEDfgMciyL8sT4Nvm7bv23d2S124bXA
fxXksAf/dif7GtaLSwVE5UKHnllsJm6EmSkEgjqj8hke60wiq0aaU8+GIjuW4dxW
R6NpKS950SlUjUnB6vPW
=gCCe
-----END PGP SIGNATURE-----
Merge tag 'bcm2835-for-3.9-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi into next/cleanup
From Stephen Warren:
ARM: bcm2835: cleanup
This pull request simply converts the bcm2835 clocksource driver to use
the recently added CLKSRC_OF feature.
The branch is based on v3.8-rc3, followed by a merge of arm-soc's
timer/cleanup branch.
* tag 'bcm2835-for-3.9-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi:
ARM: bcm2835: make use of CLKSRC_OF
Signed-off-by: Olof Johansson <olof@lixom.net>
The bcm2835 clock driver is enhanced to allow fixed clocks to be probed
from device tree.
A system power-off implementation is added.
This branch is based on v3.8-rc3.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRB2t5AAoJEJuNpwkmVCGcGpEP/RCuccnBem2L76YR357qtes+
eRUUyYVeway5W7gaM4h0L+QJfSSd+KxzvEWdrrNHSFXN+fpyLdGVz3R7uXn5m3Rs
ffrxyVEERNB+g3ASb5NOlDM29sSsakFX92EOGlR/ZPbgjLpiqBtzOu9I4NouZtSk
WxOWhZQ9xA2gyV238LkD+5OUmbu19GayXex8j123SMcIiM45JCvAeBtr9WykcXiW
DliXStZT73t/cL/t+TeqRX6cBfV8XLKwlh95vl3zBSwri2vjX8nTpuNgpKqByass
/j7c7XnZYUTmtvxPqSK3I20jNqpzWCmpP7jjcdp05belKr3c6JQpgaFtjdzpQ44Y
AbXTlHXuQC78jK0utE+ZE7gGt8WR0l+p4H0TLUt+3k5ny+TsVMFDpfVZlbqURr6k
iBLFgNCbpCDH+UXoLQb4HiQg5QaMKtDuQNztRJWwDAuyXMKWPN3alv9lGP/FUrIy
oGqZtthN9Dds6xLZOaZqVO/O5LJF9HweDM01PikhgK9jwiBZVTcrXWQHlb/IH/nN
beBfqaH8c0c/+QwQNSR4vSVS2b3r4u/mxUeufqcgtvbNfys9PRzntvV92qgEs/ma
tR6zKxvQADxlhi3vrRkC39L/zcMPWEDcyuqdAQ8FW6/4yljEUW3mHXY/H6eVkXCg
xPCSzREtfVcN5ULXxYKP
=Up/B
-----END PGP SIGNATURE-----
Merge tag 'bcm2835-for-3.9-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi into next/soc
From Stephen Warren:
ARM: bcm2835: SoC driver updates
The bcm2835 clock driver is enhanced to allow fixed clocks to be probed
from device tree.
A system power-off implementation is added.
This branch is based on v3.8-rc3.
* tag 'bcm2835-for-3.9-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi:
ARM: bcm2835: add a pm_power_off implementation
clk: bcm2835: probe for fixed-clock in device tree
Signed-off-by: Olof Johansson <olof@lixom.net>
This removes the file <mach/id.h> from the global kernel include
scope, making it a pure mach-ux500 detail. All ASIC specifics
needed by drivers shall henceforth be passed from either platform
data or the device tree.
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Detect the subrevision v1 of U8540 and U8580.
DB8580 is the FDSOI variant of DB8540. Some differences
with DB8540 related to clocks will need to be checked with
a cpu_is_u8580() function.
Signed-off-by: Maxime Coquelin <maxime.coquelin@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
in question and other dts related changes, and will have them go via DT
branch to save the cross branch dependency.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJRB24TAAoJEFBXWFqHsHzO3RcH/22Qe0+BUjxj1NBrBjBee6YE
ymb2CIOaTM2PgAQJZDgqGa4zgbPK7bcLu6fSyyg+XzExaxZ/CQI0EuKjMSroiyoB
6tRB76dz9ESWO4QYrQH65QxdY5Bi3VYDXv9+NeOdl0lzHR1wJp/Eeqvx608+aKIa
ps5Db1OdJn5TZ1o8Ye+/m4BUFBp+6feTx3fFfgXdes61eZskJLokURQz9zA6qiDw
s6YCBt1lNSNG/duZD3uFichDSPi/h+YFWwinI+deakRUDNUIs4n8ofToc99N6zWd
iKTbWX1cWOJpAYHKHS2lCaKF0saIpqCt7jhz/wmyXwDCrSSWsmwQSpxc5xmhFXU=
=LfVI
-----END PGP SIGNATURE-----
Merge tag 'imx-cleanup-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/cleanup
From Shawn Guo:
IMX cleanup for 3.9:
* Remove lluart.c by using debug_ll_io_init()
* Remove mach-mx51_3ds board support
* Remove imx50 support which has been BROKEN for cycles
* Other trival cleanups
* tag 'imx-cleanup-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: imx: Remove mx508 support
ARM: imx: Remove mach-mx51_3ds board
ARM: imx: use debug_ll_io_init() for imx6q
ARM: imx: remove unused imx6q_clock_map_io()
ARM: mach-imx: Kconfig: Do not select Babbage for MACH_IMX51_DT
Signed-off-by: Olof Johansson <olof@lixom.net>
Change/delete conflicts due to some of the previous sweeping cleanups in:
arch/arm/mach-imx/mach-mx50_rdp.c
arch/arm/mach-imx/mach-mx51_3ds.c
This patch set converts the Nomadik (mach-nomadik) to
Device Tree and delete the old board files, paving the
road for single zImage.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.13 (GNU/Linux)
iQIcBAABAgAGBQJRBvtsAAoJEEEQszewGV1zTrIP/05jEYiH/M3VsyL36V+QeTVb
vKdAa9vaCkd6xex3wYujzlLaWO/uw5MZfftaV1TLIe0U9bLk0vm6Pq3z7UB4OxTo
iQzCg8UNxsrVe1FvOUHZXR+YQwAgN4fkZHf+FxxV5TNHJ/Kpx6qNgskAc5xAa5CC
fc62WEq9LBliiremeNKcuyB2odjQA9Gbdw9URkeZW/OrnB7uFZBnfp1+MEZrzwH3
dXKBPAIdcFBNdlDTSasclWaoBakIQ2nktUFQaOS4bpYyZ6+Z4GyREkVcHG9UdCEN
2OEE6FWQR5/0PM20DWmURN4gS3fufSAloauBz6dfOIi9D7HdpHXcMcvTj4GQFnY6
K2hGA5nQCz3lKxFUtxpJImiZiFnuGapPYwEUZqcponXLRqfykyEE4ts0jpwWNnor
rbPiLcvEKwaK4VV1UR7LlAhq5IfnH9z8Q1BWk3sW0nhXuMiM+anxr2N9awGlXCq4
uzrjwNi5GA+zUgFClGbc9xw4rndJl0MRoXQ/JDtsgRuFWL7lGNKFV2fnLKopaYbu
xZ5uXbTWfLXxQXEidq7GIiG43xP/LZ26VA8fzJFncGxLrLuf5ME9A1kyXjCT8kPw
VJKeVJVjdTszXio8kop6UHTrluBk8W4Th0FcfHQv+WO6bcq+7lhjVxBh02n71JaV
MiJ7MrkZbHANKCew4esm
=Ip5x
-----END PGP SIGNATURE-----
Merge tag 'nmk-dt-on-cleanups' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt
From Linus Walleij:
Nomadik Device Tree conversion rebased on ARM SoC cleanup branch
This patch set converts the Nomadik (mach-nomadik) to
Device Tree and delete the old board files, paving the
road for single zImage.
* tag 'nmk-dt-on-cleanups' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: nomadik: get rid of <mach/hardware.h>
ARM: nomadik: delete old board files
ARM: nomadik: add I2C devices to the device tree
ARM: nomadik: migrate MMC/SD card support to device tree
ARM: nomadik: convert SMSC91x ethernet to device tree
ARM: nomadik: move GPIO and pinctrl to device tree
ARM: nomadik: add FSMC NAND
ARM: nomadik: move remaining PrimeCells to device tree
ARM: nomadik: move pin maps to cpu file
ARM: nomadik: initial devicetree support
ARM: nomadik: move last custom calls to pinctrl
Signed-off-by: Olof Johansson <olof@lixom.net>
This pull requests adds support for pinctrl, NAND
and RTC support when DA850 is booting using DT.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iQIcBAABAgAGBQJRB4JyAAoJEGFBu2jqvgRN0ccP/ibALUoVeCcs5wu7Po+PlFiE
tutRRO32+Rc/Zc8DRt/rWG45QtwNMrJIDNUdT0wojmzX+77adko/LJqf4laxWUpH
X2zoIwSv1A8i80nShEDkek+jNKgfS+blVvnn7FB7nwLU5vAtKMU1v4xlKzMYexbq
L99Uaqw61czUW5u5FnRy99oV01l/ASUF09BEfTxgqMTli7abwFqnf8tgzQ3gkclJ
plNcdgeIWxG8PaZJN2Y3cuzkipwJTqbyum+MxHShO1jDvUKnf6gAevn10qyOHT1P
yYjA0Uqm3ipFms1afOeD3Ix2HBwWdzdjsIzOptn8VjOhZBCp2UDNB7IfgfcDt0+Q
ypMeEtSK1vKzbz8VlW7vOD2lmSpGlnJgxjhDgGhxgmAjeNmsKHmsINzkPpLgyDok
FrOb/SlKlfoKiot256y0BERcIFakXdRFNYtWXQtvzlrQjmLvDrTN/M6Hs2bTkITD
b92oXNSeYmb2ImH8qA76/z+JloxS42Jx/MvfzC7Hv+F/ioQqITKdExBElT+GYB6D
91RaSzL0vlcnwlOdsbn+crxn9CXMLzHkuGcN4onBz020AMWPXc9G6d+lxElU8n9t
SgFzKmHxiXbi3zNIT1vHYlIKSrbg6z659/mp2e5s1XXcewzJlEkT+irAOKgG6DrZ
LWA9UPsbsvRUZzdLqk9K
=pukh
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v3.9/dt' of git://gitorious.org/linux-davinci/linux-davinci into next/dt
From Sekhar Nori:
DaVinci DT changes for v3.9
This pull requests adds support for pinctrl, NAND
and RTC support when DA850 is booting using DT.
* tag 'davinci-for-v3.9/dt' of git://gitorious.org/linux-davinci/linux-davinci:
ARM: davinci: da850: add RTC DT entries
ARM: davinci: da850: move interrupt-parent property to soc node
ARM: davinci: da8xx defconfig: enable pinctrl config option
ARM: davinci: da850: add NAND driver DT entries
ARM: davinci: da850: add pinctrl driver DT entries
This pull request has defconfig changes which enable
newer filesystems to boot on DaVinci and also enable
runtime pm by default.
Another patch is included to cleanup a checkpatch error
in existing board files.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iQIcBAABAgAGBQJRB4UyAAoJEGFBu2jqvgRNycsP/0KaQpDyNs4wtgjhaSpS9ARz
w5kCAJMAU8jVI0ZSGDfMlwznzvc6VVnRK4BBdO1dQRt8m+l0gDpRmMiT47aP1XKF
iEqtg1+7PZXCt8YzBO2HlYiHvy6YYF5JUj5tOJAM5MnjZ7Z/Ywu+Kin/xbc+BHUX
p9nw+DxH8quiYxdJ5TE18b9htTAwOeX5Xl8iwIFFeMG59WKMeiDxiJIB3wKA4frs
uQ2DYKG6Zuocg5CbYLXbvWZMlU+ZSh7KaLzm62tiVW9G7ZFNT40IcK3v675Bc/dk
bi+nG2rmwsfcrGZ/QMQger++T70mt7fYUusA7mp6lj7FVsSkUZfDjOdHOrwzC05q
OlzckZFBAf5xoqB6b16+AxUyZ5mgGZQ7+XP/9mY0vBtePK1DUCbrMLnbBCU2kw6P
1DaeobsCrggStxLkbngTjcR5eDuR6qD15de/gRUFB3dJOcRVnW1hSQjpBLhzVQnQ
czeic311looWG6LATybMlHHFqryfpXbWhZUeEA0ooAuBP83ebCqMLUL6jTrn2kvL
hT5oIzhItNuX+7UngL2QTfd5CAtNlFC4ARW8r9HX6nZjIDFKnhPr5mGwevfL8D2k
+ObM0/nr4ztCmreF32ztGM2/NYGlpFLqziZVsY2FZ5/mh59TQRbcIU64WcLayD5z
O0oXZYOBJHj8vLWdkysB
=8V/t
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v3.9/board' of git://gitorious.org/linux-davinci/linux-davinci into next/boards
From Sekhar Nori:
DaVinci board updates for v3.9
This pull request has defconfig changes which enable
newer filesystems to boot on DaVinci and also enable
runtime pm by default.
Another patch is included to cleanup a checkpatch error
in existing board files.
* tag 'davinci-for-v3.9/board' of git://gitorious.org/linux-davinci/linux-davinci:
ARM: davinci: da850 board: change pr_warning() to pr_warn()
ARM: davinci: defconfig: enable pm_runtime
ARM: davinci: defconfig: enable devtmpfs and devtmpfs automount
Signed-off-by: Olof Johansson <olof@lixom.net>
This pull request:
1) Fixes a bug with the way SPI devices were registered on DA850
2) Adds support for DSP clock and resetting the DSP on DA850
3) Fixes checkpatch issue with some existing files.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iQIcBAABAgAGBQJRB4xgAAoJEGFBu2jqvgRNIdMP/2tB1Of5vHyIrXw9LViGVLwt
SQr6Ny89vb+2i83/rlvOEweRBOLOCxBgP9sruWrfLy4WJcT5AqCxHXy3rFAZAESt
Zeg2LheEOcO1iFHPfGd5nCejrP9mUYQ5sYHrFXDAJ1XEhzNAwXiULsXaSXaoD4rG
VfmKBxdf2T4nonkvpgqS37YZQAtFnmYCzd/dTg67Dp0SYazHV141NLxF1nYbLsYl
VubB7k/svGxtqZ1XhbiP+vA7t6seGInPC7+MzKy0tUkDp3l6pa8+mB0H9HDBNQAc
Bc9sVz2Ib8NCgyrDjtdu3Mw0FKj5mLxh81sWKJsgmx3v5yNUGIlHh3zukfHUv455
hMRMkJDSGPhhsyrB5rWfTiDSD+cbUoiNQPBr4JsAFmivlximE14Ev69Jc2MKL53Q
xvuCQUT9OrHvcZekj1K7Hf6cU6LOn0qdFen39vDqD24SwN1SIi26mInHnQnsuS72
D3EhaJw3QwZNH3gzstnqwRfhQSgwCTG0+2ecgijuvcsBo/paAWw7WZOHKhCzmlP0
wJKI1NmKLggnEbY/WffKUz5q3SsOo0NhsawTOh1wO6US1njPrYiQcu42h72aWVO3
bZsItc7MCX6Rw+D9sLvOJcgWxAu6AWYBzJgHzUugF5dzmbgv5WjynUDDcx4057p8
mgmWzsfv/kJvIimThWhd
=J9AI
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v3.9/soc' of git://gitorious.org/linux-davinci/linux-davinci into next/soc
From Sekhar Nori:
DaVinci SoC changes for v3.9
This pull request:
1) Fixes a bug with the way SPI devices were registered on DA850
2) Adds support for DSP clock and resetting the DSP on DA850
3) Fixes checkpatch issue with some existing files.
* tag 'davinci-for-v3.9/soc' of git://gitorious.org/linux-davinci/linux-davinci:
ARM: davinci: da850: add dsp clock definition
ARM: davinci: psc: introduce reset API
ARM: davinci: psc.c: change pr_warning() to pr_warn()
ARM: davinci: devices-da8xx.c: change pr_warning() to pr_warn()
ARM: davinci: da8xx_register_spi() should not register SPI board info
Signed-off-by: Olof Johansson <olof@lixom.net>
From Simon Horman, a series of SoC updates for shmobile.
* 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7779: scif .irqs used SCIx_IRQ_MUXED()
ARM: mach-shmobile: sh73a0: Initialise MMCIF using DT
ARM: mach-shmobile: sh73a0: Minimal setup using DT
ARM: mach-shmobile: sh73a0: Allow initialisation of GIC by DT
ARM: SH-Mobile: sh73a0: Add CPU Hotplug
ARM: SH-Mobile: sh73a0: Secondary CPUs handle own SCU flags
ARM: shmobile: r8a7740: Add CPU sleep suspend
ARM: shmobile: sh73a0: Add CPU sleep suspend
ARM: shmobile: add function declarations for sh7372 DT helper functions
ARM: sh7372: fix cache clean / invalidate order
ARM: sh7372: add clock lookup entries for DT-based devices
ARM: mach-shmobile: sh73a0 external IRQ wake update
ARM: shmobile: sh73a0: fixup div4_clks bitmap
ARM: shmobile: r8a7740: add TMU timer support
ARM: shmobile: Remove duplicate inclusion of dma-mapping.h in setup-r8a7740.c
Signed-off-by: Olof Johansson <olof@lixom.net>
Fix trivial conflict in board_bcm due to Simon resolving the same conflict
with one less line of whitespace. Keeping end result common with what
we already have in arm-soc.
Conflicts:
arch/arm/mach-bcm/board_bcm.c
From Simon Horman, updates to a few shmobile boards.
* 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Include sh73a0 DTSI in kzm9g
ARM: shmobile: Include DTSI of r8a7740 to armadillo800eva
ARM: shmobile: kzm9g: Use of_machine_is_compatible()
ARM: shmobile: add sample amixer settings for armadillo800eva
ARM: shmobile: add sample amixer settings for ap4evb
ARM: shmobile: fix sample amixer settings for mackerel
ARM: mackerel: include the correct .dtsi file
Signed-off-by: Olof Johansson <olof@lixom.net>
From Simon Horman, two more defconfig updates for shmobile.
* 'defconfig2' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: mach-shmobile: mackerel: enable VFP in defconfig
ARM: mach-shmobile: armadillo: defconfig: Enable CEU
From Simon Horman. Based on agreement between me, Paul Mundt, Linus
Walleij and Simon, we're mergning this large branch of pinctrl conversion
through arm-soc, even though it contains the corresponding conversions
for arch/sh. Main reason for this is tight dependencies (that will now
mostly be broken) between the arch/sh and mach-shmobile implementations.
There will be more of this in 3.10 to do device-tree bindings, but this is
the initial conversion.
* 'pfc' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (80 commits)
sh-pfc: Move sh_pfc.h from include/linux/ to driver directory
sh-pfc: Remove pinmux_info definition
sh: Remove unused sh_pfc_register_info() function
sh: shx3: pinmux: Use driver-provided pinmux info
sh: sh7786: pinmux: Use driver-provided pinmux info
sh: sh7785: pinmux: Use driver-provided pinmux info
sh: sh7757: pinmux: Use driver-provided pinmux info
sh: sh7734: pinmux: Use driver-provided pinmux info
sh: sh7724: pinmux: Use driver-provided pinmux info
sh: sh7723: pinmux: Use driver-provided pinmux info
sh: sh7722: pinmux: Use driver-provided pinmux info
sh: sh7720: pinmux: Use driver-provided pinmux info
sh: sh7269: pinmux: Use driver-provided pinmux info
sh: sh7264: pinmux: Use driver-provided pinmux info
sh: sh7203: pinmux: Use driver-provided pinmux info
ARM: shmobile: sh73a0: Use driver-provided pinmux info
ARM: shmobile: sh7372: Use driver-provided pinmux info
ARM: shmobile: r8a7779: Use driver-provided pinmux info
ARM: shmobile: r8a7740: Use driver-provided pinmux info
sh-pfc: Add shx3 pinmux support
...
Signed-off-by: Olof Johansson <olof@lixom.net>
The DAC found on the last chip select requires a word length of 12 bits,
which is not supported by the SSP controller of the iMX28. Use
bitbanging for that bus to support such a length.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch removes custom way of adding spi dma channels and
adds according to new generic DMA DT bindings.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Add the basic device tree based lookup.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Add AUXDATA entries for i2s controller driver so as to set the device
name for clock lookups
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Add device nodes for the three instances of i2s controllers in Exynos5
platforms. Enable instance i2s 0 for exynos5250 board and disable all
other i2s instances.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This patch make the dma dev request operation compatible for both
DT and non-DT cases. It takes the all the arguments required for
dma_request_slave_channel and dma_request_channel. If the driver
is initiated via DT or non-DT the corresponding call will be made.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Only mx508 based board is mach-mx50_rdp and it has been marked as BROKEN
for several releases.
mx508 currently lacks clock support.
In case someone needs to add mx508 support back, then the recommended approach
is to use device tree.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
mach-mx51_3ds only supports old silicon version of MX51 and was replaced
with mx51 babbage, which is the official MX51 development board.
No need to maintain it anymore.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Use debug_ll_io_init() to map low level debug port for imx6q, so that
arch/arm/mach-imx/lluart.c can be removed.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
imx6q_clock_map_io() becomes an empty function since imx6q clock driver
is moved to common clock framework. It's used nowhere now. Remove it.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The soft-reset control register is located in the XMU controller space.
Map this controller space before writing to the soft-reset controller
register.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Girish K S <ks.giri@samsung.com>
Signed-off-by: Kukjin <kgene.kim@samsung.com>
The interrupts for RTC tick and alarm interrupt were swapped.
Has been fixed here.
Signed-off-by: Giridhar Maruthy <giridhar.m@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Fix the incorrect compatible property value of pinctrl for EXYNOS4 SoCs.
Cc: Thomas Abraham <thomas.ab@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Fix the incorrect compatible property value of pin-controller module
EXYNOS5440 SoC.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
[kgene.kim@samsung.com: fixed it in gpio together for exynos5440]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This was only used from the core machine, source it into the machine
file and delete, also convert all direct references using the
physical-to-virtual macros in this file to ioremap() and only
default-remap the 4K used by the debug UART.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Device Tree support on Nomadik can do everything the old board
files could do, so delete the old board files and make the nomadik
select CONFIG_OF.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This moves over the MMC/SD card support to the device tree probe
path. The special GPIO to bias the card detect line is kept,
but the pin property is moved to the device tree as part of
the MMC/SD card node.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This converts the SMSC91x ethernet controller to use device
tree. The existing solution from the board file, to request the
GPIO triggering the ethernet IRQ from the board file is kept
for the time being, but the GPIO number assignment is moved
over to the device tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This moves the instances of the Nomadik pin controller and the
Nomadik GPIO blocks (also handled by the GPIO driver) over to
the device tree. A new compatible string is added to the
pin control driver in the process.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the FSMC NAND driver and flash partitions to the Nomadik
device tree.
The only compatible string accepted by this driver is currently
"st,spear600-fsmc-nand" which is inappropriate for this system, so
this patch adds the compatible value "stericsson,fsmc-nand" as
well.
Cc: linux-mtd@vger.kernel.org
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Artem Bityutskiy <dedekind1@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The two remaining PrimeCells, RNG and RTC, are migrated to the
device tree for device tree boot.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Move the pinctrl maps over to the CPU file and register them
right before the pin controller itself. This way the pinmaps
will also benefit the device tree boot.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Support basic device tree boot on the Nomadik. Implement the
support in the cpu file with the intent of deleting the board
files later. At this stage IRQ controllers, system timer,
l2x0 cache, UARTs and thus console boot is fully functional.
Patch out the code adding devices by initcalls for now so
as not to disturb the boot.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
- Configure out the yet instable battery management driver
- Adjust cache initilization per SoC family
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iQIcBAABAgAGBQJRAW4TAAoJEEEQszewGV1zF/0QAIUzPjigasRFmqCdaGylkpT7
iaYRzrr0zEKajDwtK/vNLTGJhR5IGPuy+f5lCIGXKYGtUkEh8RHs1tQAqBw7UzDi
Spijsg59n1bk7Gu/t1Wo3OGaPLM0/mR1zMbdw50gxcD6kHCrXI72aTKyu5D2uZlK
+ZlAJfTjUXNKHfXQraJ7U7CbR21XktfeluAZbQIgmtG0bH6SnZqFeP6u/9M67+Am
sQcrQ41TdcpE3i+cksEZgW8ji7JPEBdD7yHSlRBn3nufs85NQ43zZAsHan2Losns
5k1+mMqIC5H55dA6Ufuhos/+O2kEWfCm+28bRwKEm0ykyjbbw9Df33tpJM+Ftuvs
39JrHhznLD0YgYMEjvOoatQpFoKtZ4vz8ASK82zzw7JR+0lmpavEx8XeNsO5KsOH
T4oa+jN3COksqZDNOjYRXjxk5CU8bVYHqypalYXNffvGYubycAhCmG3sQj2Nww3o
vyi8eNX/pLIWwiOHtKiny3JMyDPk294Uv1Cs0SI3WnMYKKtKzzaNPfRQ8BiLJwBt
edxWQ68Uqu8Iloq8Zvg908rcrNi1uJDLXjEUIEQY1NacWEXQJC4zmnDfeSRztOmK
xOfr6NTtAkBtNcpGfUJI0RRxwQYheT1Fs25NEYqFOHru34lAzVs2UDeFzhw6Wylv
qMBucplW4pjm4Q3E25YD
=kja1
-----END PGP SIGNATURE-----
Merge tag 'ux500-fixes-for-v3.8' of http://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into fixes
From Linus Walleij:
- U9540 boot regression fix due to new clock framework
- Configure out the yet instable battery management driver
- Adjust cache initilization per SoC family
* tag 'ux500-fixes-for-v3.8' of http://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Fix u9540 booting issues
ARM: ux500: add spin_unlock(&master_lock).
ARM: ux500: Disable Power Supply and Battery Management by default
Signed-off-by: Olof Johansson <olof@lixom.net>
Commit 38669e045d ("ARM: vexpress: Start
using new Versatile Express infrastructure") introduces a hard
dependency to GPIOLIB for the multi_v7_defconfig:
ARCH_MULTI_V7 -> ARCH_VEXPRESS -> ARCH_REQUIRE_GPIOLIB -> GPIOLIB
Remove unnecessary explicit CONFIG_GPIOLIB=y from multi_v7_defconfig.
Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The I2C pins were still set up using custom nmk_* calls, move
these to use the pinctrl mapping table instead. There was also
a remaining call to turn the Ethernet pin to GPIO, and this is
now done implicitly by the GPIO-to-pinctrl range translation
calls.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
DMA controller down into the driver and cleans up in
the <mach/*> namespace for the U300 platform.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iQIcBAABAgAGBQJQ/pQaAAoJEEEQszewGV1z80kP/joeZo37gp+TfkjL5X+BZDb5
O05Q+Ic70t7u80WjACX6vl7YzeRoK8Z9aiNYpDbHT40RuRKTiGH8DLOmYsjxqXg0
LpqTm+RoLlgrrrOw4nwdN7nE/2eUF5SuidhCUfueZlkTQJLdPWDO0n/fBHR05CGM
WovRiNtqJSS9X5JrNjQT19oZDpqsY/mvygAV0usiiWC4qxUQFo0ZaT4jis/UeKCF
RD/UsILTRe86Q2UGr+XPp45UihqZ4qH187cZMPWr6FZyeIu24vGo7ew+R4KEjVEz
xE6NGkqnYl4LiW+K2Y0TYyN4TnhaaIi4/iSVZxiLKsTvE+LWxrv+4cIU4AUQsoY+
XllWkX1aS+zWaeFOwc6EPuhZFxdkmlGRsz8oqOh0kqswtIiM9wCRgWGCuFcns//A
N1+OAC5kK9QlrLWoJnnND/SYsl97GhwySqMLL1FgIjTw3CtseqNfv3LjeyNRKIVT
jNX6b6Gc/EOOzZFrAMMvinpaFzgnsWp5xohb7EclKevfArsttrlm80fBnbSnq5lA
FzFH/9fi8ca2Lu9hoakNHnTFtx9d5qBU8gPDCwsRGb1gHfmlCQsqrVxSvTVyKOjN
ZQfeGNfPdddeKvvo/1l1tTuWzMOMY+AIhfWJGrkUvhlykjDsD4M0m4gKnfMnZeUY
zWQv3rJU9L76oGhEtmKZ
=IGqm
-----END PGP SIGNATURE-----
Merge tag 'coh901318-for-arm-soc' of http://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/drivers
This pushes the platform data for the U300 COH901318
DMA controller down into the driver and cleans up in
the <mach/*> namespace for the U300 platform.
* tag 'coh901318-for-arm-soc' of http://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
dma: coh901318: cut down on platform data abstraction
dma: coh901318: merge header files
dma: coh901318: push definitions into driver
dma: coh901318: push header down into the DMA subsystem
dma: coh901318: skip hard-coded addresses
dma: coh901318: remove hardcoded target addresses
dma: coh901318: push platform data into driver
dma: coh901318: create a proper platform data file
Signed-off-by: Olof Johansson <olof@lixom.net>
Conflicts:
arch/arm/mach-u300/core.c
As reset GPIO information is PHY specific detail, adding
it to PHY DT node.
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
No Tegra30 Platform is running PLL_P at another rate than 408MHz, nor is
any using any other PLL as UART source clock. Move attribute into SoC
level dtsi file to slim down board DT files.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This adds the device tree for the Toradex Iris carrier board used
together with a Colibri T20 512MB COM.
The Iris has the following features, in brackets the current status:
- DVI and VGA output through DVI-I connector (DVI-D enabled and tested)
- LVDS output
- 1 USB host port (enabled and tested)
- 1 USB OTG port (enabled)
- 100 MBit Ethernet (enabled and tested)
- 5 UART ports (2 on 10way headers enabled and tested)
- 1 MicroSD Slot (enabled and tested)
- Audio connectors (enabled, only HP out and Line-in tested)
- i2c RTC
- GPIO connector (enabled, only sparsely tested)
- external i2c bus
- 4 PWM out
- analog in
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This adds the device tree include file for the Toradex Colibri T20
Computer on Module (COM). It's only valid for the 512MB RAM version of
the module, as the 256MB version needs different EMC tables and flash
configuration. To make this clear the suffix -512 was added to the board
compatible string.
The Colibri T20 uses a Tegra20 SoC and has onboard USB Ethernet and AC97
sound.
Still some things like onboard NAND support missing, but should be a
good base for further development.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
No Tegra20 Platform is running PLL_P at another rate than 216MHz, nor is
any using any other PLL as UART source clock. Move attribute into SoC
level dtsi file to slim down board DT files.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Enable Tegra based keyboard interfacing for keys and provide
all key mapping through DTS file.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Enable Tegra based keyboard controller and populate the key mapping
for Whistler.
With this patch, HOME, BACK, POWER and MENU keys will work.
Still other keys which are in ROW3 and ROW4 will not work as it
conflicts with KBC pins on SDIO2 pinmux.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
UARTC is used for the interfacing with bluetooth device.
Register this UART channel as high speed serial channel
so that it can use the APB DMA for data transfer.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Enable Tegra based keyboard controller and populate the key matrix for
seaboard. The key matrix was originally on driver code which is removed
to have clean driver. The key mapping is now passed through dts file.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
NVIDIA's Tegra SoCs have the matrix keyboard controller which
supports 16x8 type of matrix. The number of rows and columns
are configurable.
Add DT entry for KBC controller.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: added clocks property]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This ensures nodes are sorted in order of reg address. This makes it
easier to compare against e.g. the U-Boot device trees, and is simply
consistent and clean.
While we're at it, remove the unit address from the cache-controller
node name, since it's unique without it.
Reported-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This patch adds support for Tegra30 Beaver board in upstream kernel.
Beaver board is a Tegra30 SoC based development board, it has
following features:
- T30 or T33 SoC (Qual core ARM Cortex A9)
- 2 GB DDR3L
- 16 GB EMMC
- 1 SD slot
- 1 USB Standart A port and 1 USB micro AB port
- PCI-E Gig Ethernet
- Audio input/output
- SATA port
- HDMI output
- UART and JTAG
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add APB DMA requestor and serial aliases for serial controller.
There will be two serial driver i.e. 8250 based simple serial driver
and APB DMA based serial driver for higher baudrate and performace.
The simple serial driver get enabled with compatible nvidia,tegra20-uart
and APB DMA based driver will get enabled with compatible
nvidia,tegra20-hsuart.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
tegra30 gpio controller is not compatible with the tegra20 due to
their bank stride i.e. Tegra20 bank stride is 0x80 where Tegra30
bank stride is 0x100.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: fixed typo syntax error]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add a new evaluation board, Pluto for Tegra 114 family.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add a new evaluation board, Dalmore for Tegra 114 family.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Initial support for Tegra 114 SoC. This is expected to be included in
the board DTS files, Tegra 114 SoC based evaluation board family.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The "powered-down" cpuidle mode of Tegra20 needs the CPU0 be the last one
core to go into this mode before other core. The coupled cpuidle framework
can help to sync the MPCore to coupled state then go into "powered-down"
idle mode together. The driver can just assume the MPCore come into
"powered-down" mode at the same time. No need to take care if the CPU_0
goes into this mode along and only can put it into safe idle mode (WFI).
The powered-down state of Tegra20 requires power gating both CPU cores.
When the secondary CPU requests to enter powered-down state, it saves
its own contexts and then enters WFI for waiting CPU0 in the same state.
When the CPU0 requests powered-down state, it attempts to put the secondary
CPU into reset to prevent it from waking up. Then power down both CPUs
together and power off the cpu rail.
Be aware of that, you may see the legacy power state "LP2" in the code
which is exactly the same meaning of "CPU power down".
Based on the work by:
Colin Cross <ccross@android.com>
Gary King <gking@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Colin Cross <ccross@android.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The flow controller can help CPU to go into suspend mode (powered-down
state). When CPU go into powered-down state, it needs some careful
settings before getting into and after leaving. The enter and exit
functions do that by configuring appropriate mode for flow controller.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The powered-down state of Tegra20 requires power gating both CPU cores.
When the secondary CPU requests to enter powered-down state, it saves
its own contexts and then enters WFI. The Tegra20 had a limition to
power down both CPU cores. The secondary CPU must waits for CPU0 in
powered-down state too. If the secondary CPU be woken up before CPU0
entering powered-down state, then it needs to restore its CPU states
and waits for next chance.
Be aware of that, you may see the legacy power state "LP2" in the code
which is exactly the same meaning of "CPU power down".
Based on the work by:
Colin Cross <ccross@android.com>
Gary King <gking@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The "powered-down" CPU idle mode of Tegra cut off the vdd_cpu rail, it
include the power of GIC. That caused the SGI (Software Generated
Interrupt) been lost. Because the SGI can't wake up the CPU that in
the "powered-down" CPU idle mode. We need to check if there is any
pending SGI when go into "powered-down" CPU idle mode. This is important
especially when applying the coupled cpuidle framework into "power-down"
cpuidle dirver. Because the coupled cpuidle framework may have the
chance that misses IPI_SINGLE_FUNC handling sometimes.
For the PPI or SPI, something like the legacy peripheral interrupt. It
still can be maintained by Tegra legacy interrupt controller. If there
is any pending PPI or SPI when CPU in "powered-down" CPU idle mode. The
CPU can be woken up immediately. So we don't need to take care the same
situation for PPI or SPI.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The patch to add USB PHY nodes to device tree was written before Tegra
supported the clocks property in device tree. Now that it does, add the
required clocks properties to these nodes.
This will allow all clk_get_sys() calls in tegra_usb_phy.c to be replaced
by clk_get(phy->dev, clock_name), as part of converting the PHY driver to
a platform driver.
Acked-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add DT nodes for Tegra USB PHY along with related documentation.
Also added a phandle property to controller DT node, for referring
to connected PHY instance.
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
As Tegra USB host driver is using instance number for resetting
PORT0 twice, adding a new DT property for handling this.
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
USB register base address and sizes defined in iomap.h
are not used in any files other than board-dt-tegra20.c.
Hence removed those defines from header file and using
the absolute values in board files.
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Remove AUXDATA as clocks are initialized from device node.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Remove AUXDATA as clock are initialized from device node.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add clock information to device nodes.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: added second clock to 3d node]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
