1. Enable HDMI on Arndale Octa board.
2. Update list of clocks for FIMC-IS block on Exynos4x12.
3. Remove skeleton.dtsi thus fixing DT compiler warning:
"Node /memory has a reg or ranges property, but no unit name"
This is a tree-wide effort by various people. Javier Martinez Canillas did
it for Exynos and S5PV210.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJX3r7xAAoJEME3ZuaGi4PXBhAQAINQXD3iOkN8bLI6t29uZYgz
JMaOw+uIowZnOsREj/MnqN3b2GbuTl4ubPshKoPmZZPJSW5z+ekE1pBq4rsd5seh
M4FNUZShyhpu8UeMXbn1xzXXBc1/iOYVRSbfwUnlfHeZ0yMdPd6/GliR6ecvq2Mo
vMbdQsqrLNWZEXbSzifOtDKBAuCM8Nedz90arKn1BieYP3cRSs14PQ+l31m6U7n8
6JQ5/1C8Gd23xFArzETLmWHJqBIDry8LrtswmYJ4tbZEvP+zoFEpNTvQxpNWgIW5
NOMnr/IPGajY4n+UACoX6QMTOV98GWwequb4RFVc02nQkyIlfK7jStPQ8O6uYJcL
IGNStOIrJhhrh4vejwlL6VA8xzSXligfDVpNUWWxrELBIMU1LqNTY1gMMjljn1i8
/RHip+5RBnpKc0JIebRLFeSQ7lE3WhxMTiGCdf01taXOpzYpw0tgcGQMqb1052ol
Fse2uICYBV9GJC5dAzSMSLOGERaZBvqyA5uD7WeGq8yeHnM5ORzXmHhVNc3ohpYv
Vjnww1LHBzwFFbQyelygp9CpHi/5YALgkhe+Eh3v11qrrKrJUus0Sb14eNb1aKDz
qo3+G+b9l/o6Aq2Zs4iIhjOPhnk1q5TTIIdzBffgDf6WShd7/VtZnB0xVTlzG/f9
7dGXx1DKq4bJEREdW8xs
=gG35
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-4.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Pull "Samsung DeviceTree update for v4.9, second round" from Krzysztof Kozłowski:
1. Enable HDMI on Arndale Octa board.
2. Update list of clocks for FIMC-IS block on Exynos4x12.
3. Remove skeleton.dtsi thus fixing DT compiler warning:
"Node /memory has a reg or ranges property, but no unit name"
This is a tree-wide effort by various people. Javier Martinez Canillas did
it for Exynos and S5PV210.
* tag 'samsung-dt-4.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: s5p: Add missing unit name to memory nodes for S5PV210 boards
ARM: dts: s5p: Remove skeleton.dtsi inclusion for S5PV210
ARM: dts: exynos: Add missing unit name to memory nodes in Exynos5 DTS
ARM: dts: exynos: Add missing unit name to memory nodes in Exynos4 DTS
ARM: dts: exynos: Add missing unit name to memory nodes in Exynos3 DTS
ARM: dts: exynos: Remove skeleton.dtsi usage for Exynos5
ARM: dts: exynos: Remove skeleton.dtsi usage for Exynos4
ARM: dts: exynos: Remove skeleton.dtsi usage for Exynos3
ARM: dts: exynos: Add missing memory node for Exynos5440 boards
ARM: dts: exynos: Add all required FIMC-IS clocks to exynos4x12
ARM: dts: exynos: Enable HDMI for Arndale Octa board
is mostly usability and non-critical fixes except for the addition of
beagleboard-x15 rev B1 support:
- Fix omap4 pandaboard SDIO WLAN latencies in idle mode by enabling wakeirq
- Usability fixes for WLAN, USB, LEDs and power button on omap5 boards
- Remove am57xx beagleboard-x15 pinmux configuration as the processor requires
that it's done in IO isolation in bootloader except for MMC and DCAN
- Add support for beagleboard-x15 rev B1 by moving most of the
configuration to am57xx-beagle-x15-common.dtsi
- Enable support for more than 2GB of memory for omap5 with LPAE with
#address-cells
- Fix omap3-gta04 backlight PWM frequency until the PWM driver
- Revert am335x dts changes related to cpufreq as the driver changes
still have not merged and the dts changes broke cpufreq
-----BEGIN PGP SIGNATURE-----
iQIuBAABCAAYBQJX2tgCERx0b255QGF0b21pZGUuY29tAAoJEBvUPslcq6VzUg8Q
ANdFJ1HyqD0fUkIiNb1DCM4oq3dTNiIaTbrDxoUcUJgaf7/IGPDhKjP4Os/14cQf
F929u90B/ZKx1gVgcdUCUSMzBoTc2bQr4SvtvyJd7irz9sVH+Q0aIleGjPnXxRBS
qn7IbzeIy054wYU0NkNb3YefCdI1DN96FRhYJXPey1F9FD+tfbFFLKtzyEJvKn7M
35Y4wvwZcUqGBAbIhkK6BfQIEi2VSZL93xe/d2c5EfGpiXUlH6TshiDk+QxS+lx2
DqErsJwb+NZ0T8n/GsWaX3YQTH+X1P1aa+W94ZjJswo2buiuLxhrsRxB8Y6gJQ1r
hPKc9RnoqcxMLEbur0MSHVfYXHWU8kpt4vWwCaJfip5i/xQHpyxuyEeMGif/RtFN
2V6L3gDgRQ+/S34dVw486cCcGStTicC+xPU011tvNCRuPZ/cwv6nV7nzlA2dchOg
izd6Y/SVUbOZjPtBNzx/Cq3FZFK5vF3sAQ0/swnJpbl8VaHpjLzHOfG7/+4aQVGH
VB6zC413y+F3A0vzY640jQ4/enUWlJ5mZ59rO7PQfXhmuvFtZgK/mlCYnGtbI/Nn
lNV9+WsQ4/n/qIR+SVHpfLKU1NGRf1B/bWsCpeRPCeONktl9V7dpuDRiHZXyAVxZ
xDAsoscWtT77FWUQryc2hMLP1L+ED9rMnBuObXQRxFoZ
=HYYB
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.9/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Pull "omap dts updates for v4.9 merge window, part 2" from Tony Lindgren:
Part two of device tree changes for omaps for v4.9 merge window. This
is mostly usability and non-critical fixes except for the addition of
beagleboard-x15 rev B1 support:
- Fix omap4 pandaboard SDIO WLAN latencies in idle mode by enabling wakeirq
- Usability fixes for WLAN, USB, LEDs and power button on omap5 boards
- Remove am57xx beagleboard-x15 pinmux configuration as the processor requires
that it's done in IO isolation in bootloader except for MMC and DCAN
- Add support for beagleboard-x15 rev B1 by moving most of the
configuration to am57xx-beagle-x15-common.dtsi
- Enable support for more than 2GB of memory for omap5 with LPAE with
#address-cells
- Fix omap3-gta04 backlight PWM frequency until the PWM driver
- Revert am335x dts changes related to cpufreq as the driver changes
still have not merged and the dts changes broke cpufreq
* tag 'omap-for-v4.9/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
Revert "ARM: dts: dra7: Move to operating-points-v2 table"
Revert "ARM: dts: am33xx: Move to operating-points-v2 table and ti-cpufreq driver"
Revert "ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu"
ARM: dts: omap3-gta04: reduce panel backlight PWM frequency to 83Hz
ARM: dts: Add support for more than 2GB of memory for omap5
ARM: dts: am57xx-beagle-x15: Add support for rev B1
ARM: dts: am57xx-beagle-x15: Remove pinmux configurations for erratum i869
ARM: dts: Fix LEDs for igepv5
ARM: dts: Add power button support for igepv5
ARM: dts: Configure omap5 OTG ID pin
ARM: dts: ARM: dts: Fix omap5 SDIO dat1 interrupt
ARM: dts: Configure panda SDIO WLAN wakeirq
This serie allows to increase video resolutions and make audio
adjustment during a video playback for STiH407 family socs.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJX26QJAAoJEMrHeC97M/+mtRQP+gP+BR2LnphlBgEr8AuEZ9ef
n2mZrU2VQE2Ck6jyvL8+i7ppa+KMtxzYUutdMYvLmgxnWfAXti8D8Kdk83Zao0HD
UsFLFQEBYIDmOHjqNIeZELatDxrkk3iogn05/GFyTkBoZptOrRrcKxQpaDehNAiK
Fg7UYT83Xx/j/F1XlGyGtOoV7qQ090yUCooCOFX0aD9B0Z+jRIQiJAswes1Pcwf3
HzsvnWXyKgKa2NR+I4gSGTmgynh7P+xOCm0GHgqBJdRjc8RfLofwQhHKu3e2P03q
N6FvvwAerR3xuyTnAAC7XZutwNSJCHltNeyI+vb88xElEBMuxSx8eGJHrg8yUYHV
S6r7fFNBxs3V2pD2aMeR3DvAJ69S+cH8h+m1uXWAvyVYrOKCxP1+S9rexbHGIN4l
fOxRMOQT2jOUPdLUT8A4aKPQmVrRgqWGVc4vcHp4uBYjcf6bIvi99vYS1yvi4bAd
XS9tNm+nND/N1R1msiHGLUGL05zfsqKpEGw6qiEd7NRXGoCEI1hR4M5Kq+XaBvQ6
6uqnoenrubODVwBmj9YtazRPhOVDhWJu4val3RV+3WyLY95KxQuk1mpH124IVXza
QMU+ZmhAylQ+sKnHxrgKvKScfS/EEk+9r45ABMtubjpKmtwrnPOrC776gJ6XEv6H
yE2mlonaOVunEi7w/59i
=Fw1N
-----END PGP SIGNATURE-----
Merge tag 'sti-dt-for-v4.9-3' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into next/dt
Pull "STi clock improvement for video playback" from Patrice Chotard:
This serie allows to increase video resolutions and make audio
adjustment during a video playback for STiH407 family socs.
* tag 'sti-dt-for-v4.9-3' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti:
ARM: dts: STiH410: clock configuration to address 720p and 1080p
ARM: dts: STi: STiH407: clock configuration to address 720p and 1080p
ARM: dts: STiH418: Enable synchronous clock mode for video clocks
ARM: dts: STiH410: Enable synchronous clock mode for video clocks
ARM: dts: STiH407: Enable synchronous clock mode for video clocks
ARM: dts: STiH418: Enable clock propagation for audio clocks
ARM: dts: STiH410: Enable clock propagation for audio clocks
ARM: dts: STiH407: Enable clock propagation for audio clocks
ARM: dts: STiH4xx: Simplify clock binding of STiH4xx platforms
Update gpio-cells and gpio specifier for STiH415/416
Add PWM capture support for STiH416 and STiH407 family
Add USB3 support for B2260
Add HVA support for STiH410
Add clk_ignore_unused in bootargs of B2260
Add Flexible Direct Memory Access (FDMA) support for STiH407 family
Add internal audio codec IP spport for STiH407 family
Add uniperif player/reader IP blocks for STiH407 family
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJX2T7MAAoJEMrHeC97M/+m6/8P/0mKaMV/p+9P942A3fJEwJsR
STpES7YBOOvwYE+xhTErz/zjQhaw92Kq/5DFBIcjBRDq7f1G6WTbiDumV/1qaPva
HOJeaa7aZOYjD0JbFqXZr9t68U/RmRDd2v16EUnhE3WSKe3Vw+vNrLw9oPDlqOKD
gJ6USjc5C9OTiJ1CMtnDpooBbc/fPNQ8E9VIDD7cCDRNkzt/mu+ceLhgjL4v45ag
GNPpTALTjMSMlmxy+um+BsAIuAKFNiPMrvq3fwlgKygnrnqwcYloD2Aamo9Rb4F8
X9yTAlC1X6T1PPsQF+DrU+q2fBF0kyRLenXZAeQNM/N1gR/SmA3P8HZbLYOOhFd0
HASOPFeZiBwbHGnq4TXCpBganw0tEdap9K2YIulXqKVN51Oc3KUaHgxVS+CJoSVv
1DjEuwCC3/+7qoiMeK52hZ1k8HgO7+T40Afdq0bE64lE2w/aOvTSe+Ckg1PAGEgm
/loE+ri79T3S6zXd+guPPZ8xoGsKmNILAfBBCG2D1MNQKEm7nT9Fwc+uvXh962XI
eAIwZe6OrbENnD4FAou+nSsmzSkPMnPxYYKg5fq3K7txRrQ0/KbIBHkJY+1Jkv1t
eUwRSfRYU58ln2hUroKeX5+J0Iu0EOhSrKmDiCD5f3e/u9qyb6rVX6MLjdxXj0cv
3h85baoQfZGahEmpg6rE
=zoto
-----END PGP SIGNATURE-----
Merge tag 'sti-dt-for-v4.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into next/dt
Pull "STi dts update" from Patrice Chotard:
Update gpio-cells and gpio specifier for STiH415/416
Add PWM capture support for STiH416 and STiH407 family
Add USB3 support for B2260
Add HVA support for STiH410
Add clk_ignore_unused in bootargs of B2260
Add Flexible Direct Memory Access (FDMA) support for STiH407 family
Add internal audio codec IP spport for STiH407 family
Add uniperif player/reader IP blocks for STiH407 family
* tag 'sti-dt-for-v4.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti: (22 commits)
ARM: DT: STi: stihxxx-b2120: Add DT nodes for STi audio card
ARM: STi: DT: STiH407: Add uniperif reader dt nodes
ARM: STi: DT: STiH407: Add uniperif player dt nodes
ARM: STi: DT: STiH407: Add sti-sasg-codec dt node
ARM: DT: STiH407: Add spdif_out pinctrl config
ARM: DT: STiH407: Add i2s_in pinctrl configuration
ARM: DT: STiH407: Add i2s_out pinctrl configuration
ARM: STi: DT: STiH407: Add FDMA driver dt nodes.
ARM: dts: STiH410: Add hva dt nodes
ARM: dts: STiH410-b2260: add clk_ignore_unused in bootargs
ARM: dts: STiH410-b2260: add USB3 node
ARM: dts: STiH416: Define the number of PWM Capture channels
ARM: dts: STiH416: Define PWM Capture clock
ARM: dts: STiH416: Declare PWM Capture data lines via Pinctrl
ARM: dts: STiH416: Supply PWM Capture IRQs
ARM: dts: STiH407: Declare PWM Capture data lines via Pinctrl
ARM: dts: STiH407: Supply PWM Capture IRQ
ARM: dts: STiH416-b2020e: update gpio specifier
ARM: dts: STiH41x-b2000: update gpio specifier
ARM: dts: STiHxxx-b2120: update gpio specifier
...
This enables CONFIG_EFI for multi_v7_defconfig, which adds support for
booting via EFI, and for the EFI framebuffer as builtin options. It
also enables the EFI rtc, the EFI variable pseudo-filesystem and the
EFI capsule loader as modules.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Set INT_MEM_CLK_LPM bit to get proper WAIT mode support on i.MX6SX.
This is a workaround for i.MX6SX WAIT mode hardware issue.
- Enable cpuidle support with 3 low-power states (WFI, WAIT, POWER-OFF)
for i.MX6UL.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJX1lGaAAoJEFBXWFqHsHzOEckH/RBAAm7WTxFJTvBC0qy7IR6r
WN47hMMs4Nx5YxLqix7QJW4g5QP97pKgnX4CX7MOn+AC0SB/BBl5jjQqp32nniF4
jZpi6PsHk41Zr2XX4tdS80FShs1pUFlH6COJSKGWr9fOxF4b144KPLzFSYHJOh7O
1wA+awsVE/c3o6UPOLm10vo0ApdvYm6/uhXS0JpQtH9nKtL++Bon+o4ruq49pawg
YtZ1OqRu+FFC5l1jijGdeRD+uLpiqJsfzUDXoJgvGcuTColGVil2M0qzcrIveoF5
ByAbeoVRxV2wUObRrr4pJpOrD4zJ3lc7e4YU1NJY2pPeayDYEwvpgISa+aeZGXA=
=QOfe
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
Pull "i.MX SoC updates for 4.9" from Shawn Guo:
- Set INT_MEM_CLK_LPM bit to get proper WAIT mode support on i.MX6SX.
This is a workaround for i.MX6SX WAIT mode hardware issue.
- Enable cpuidle support with 3 low-power states (WFI, WAIT, POWER-OFF)
for i.MX6UL.
* tag 'imx-soc-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: build cpuidle-imx6sx.o for imx6ul
ARM: imx: add cpuidle support for i.mx6ul
ARM: imx: enable WAIT mode hardware workaround for imx6sx
ARM: imx: rename imx6q_set_int_mem_clk_lpm() function
- Drop i.MX1 board files and make i.MX1 a DT only platform.
- Remove obsolete ENET initialization code for TX28 board, since FEC
driver handles those setup well now.
- A couple of cleanups on i.MX31 IOMUX headers to drop duplications
- A few other random and trivial cleanups
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJX1k9/AAoJEFBXWFqHsHzOcXoH/1OqY6dSOI7MrzwocYhXE+mI
eqgQ/5/N3EsaA01NQpdreffGfa1FlNwIwZ6+9XY4EateQt2U/dPKWX0xDkMpo8c+
CNOciiZ4bZ811w+7NfYiEZ0BTIm2ouFuNJLbadPb6tl+0ssUGvEEelH/UbMjT331
DkzMWaqOv6W2ldKT++UF+IrDCGVUI55leqM5WrQDK8qFkBn6KdnYeFG3+4P58hZ3
XhXuv00UJUxB1L1E3TPG+1MVxDD8G5ge4ZXtIxzECgyAbAbQboyNkXai+qcr4dN9
XIleT0YCYtXSEsvEkfWoU3GjZC9pSZmUFhmlWtWmkuFh9H2zAalRZKNVEBNGpQQ=
=qHgE
-----END PGP SIGNATURE-----
Merge tag 'imx-cleanup-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/cleanup
Pull "i.MX cleanup for 4.9" from Shawn Guo:
- Drop i.MX1 board files and make i.MX1 a DT only platform.
- Remove obsolete ENET initialization code for TX28 board, since FEC
driver handles those setup well now.
- A couple of cleanups on i.MX31 IOMUX headers to drop duplications
- A few other random and trivial cleanups
* tag 'imx-cleanup-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: (trivial) fix typo and grammar
ARM: imx: use IS_ENABLED() instead of checking for built-in or module
ARM: imx: remove platform-mxc_rnga
ARM: imx: no need to select SMP_ON_UP explicitly
ARM: i.MX: Move SOC_IMX1 into 'Device tree only'
ARM: i.MX: Remove i.MX1 non-DT support
ARM: i.MX: Remove i.MX1 Synertronixx SCB9328 board support
ARM: i.MX: Remove i.MX1 Armadeus APF9328 board support
ARM: mxs: remove obsolete startup code for TX28
ARM: i.MX31 iomux: remove duplicates with alternate name
ARM: i.MX31 iomux: remove plain duplicates
Here are a couple of bugfixes for v4.8-rc. Most of them have
actually been around for a while this time but for some reason
didn't get applied early on. The shmobile regulator fix is the
only one that isn't completely obvious.
device tree changes:
- archtimer interrupts must be level triggered (multiple platforms)
- fix for USB and MMC clocks on STiH410
- fix split DT repository in case of raspberry-pi 3
- A new use of skeleton.dtsi on arm64 has crept in after that
was removed.
defconfig updates:
- xilinx vdma has a new Kconfig symbol name
- keystone requires CONFIG_NOP_USB_XCEIV since v4.8-rc1
code fixes:
- fix regulator quirk on shmobile
- suspend-to-ram regression on EXYNOS
maintainer updates:
- Javier Martinez Canillas is now a reviewer for Samsung EXYNOS
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAV9wHNGCrR//JCVInAQKPBhAA4HWz5YoE1FwatmrZ7LyLgl+SD7ezDuGC
w/oo01kGYSq9vN8E7rTWqTW/lylTgt7adX3E6wNPIIfVg9dx9TnJ0HofH3TjHku4
K7HeqapNqqqWh3VF8xFZO6YkKi09uhsX+j8NOAGlhd50A4OrOA1xh1NtpIakLX7z
TYBpbjW1TB3SwNiq7CbC1PJUKzTfP49hQmf6dUdKajLZ2Wova4H0bonyo45DhanZ
JiZyZlR9NnieVcftAP+kGFskM8q2hyZPqtoCar/mWrmerWMUG3n1MWj9LyDTVsVc
zd7wBcX9dLOe26qGW88MUnbUBC/R2nZ+VDzMwyoYoIHlHALDcn2ldDotLDVIRp6A
xGMejt06Q2qG8zX4SCjyq9hu2LeyBRWHkRTaoAD2tsT5SD4KNMi3GeYnq9Su+iYw
hXrCOrua1pMDhWsU5RMGrfPXKbZSkkcvvt1MAoUn5h7xTqLQ1+PKLIUVOPnAR6Ns
lHR86oo1kAoXDPbKZRnMbHSQ76kW+nWF+vDOJ7ozXNwZtcmXZiqfKxs/RDVecqFL
kJMPJBPUGW5FAakarLb68f8XVsiHQr3ujofTyA77cUACqLBidbhxbfq+5NMWyck/
zXPLk4HEGBlg9v8g17g1MxdttS+Na9pzNVfE23CuGKc147QIh1M3DeLjoIZ9gSfH
p8cxVpe5gBs=
=tYAb
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"Here are a couple of bugfixes for v4.8-rc.
Most of them have actually been around for a while this time but for
some reason didn't get applied early on. The shmobile regulator fix
is the only one that isn't completely obvious.
Device tree changes:
- archtimer interrupts must be level triggered (multiple platforms)
- fix for USB and MMC clocks on STiH410
- fix split DT repository in case of raspberry-pi 3
- a new use of skeleton.dtsi on arm64 has crept in after that was
removed.
defconfig updates:
- xilinx vdma has a new Kconfig symbol name
- keystone requires CONFIG_NOP_USB_XCEIV since v4.8-rc1
Code fixes:
- fix regulator quirk on shmobile
- suspend-to-ram regression on EXYNOS
Maintainer updates:
- Javier Martinez Canillas is now a reviewer for Samsung EXYNOS"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: keystone: defconfig: Fix USB configuration
arm64: dts: Fix broken architected timer interrupt trigger
ARM: multi_v7_defconfig: update XILINX_VDMA
ARM64: dts: bcm: Use a symlink to R-Pi dtsi files from arch=arm
ARM: dts: Remove use of skeleton.dtsi from bcm283x.dtsi
ARM: dts: STiH407-family: Provide interconnect clock for consumption in ST SDHCI
ARM: dts: STiH410: Handle interconnect clock required by EHCI/OHCI (USB)
ARM: shmobile: fix regulator quirk for Gen2
ARM: EXYNOS: Clear OF_POPULATED flag from PMU node in IRQ init callback
MAINTAINERS: Add myself as reviewer for Samsung Exynos support
Pull ARM fixes from Russell King:
"Most of this update are fixes primarily discovered from testing on the
older StrongARM 1110 and PXA systems, as a result of recent interest
from several people in these platforms:
- Locomo interrupt handling incorrectly stores the handler data in
the chip's private data slot: when Locomo is combined with an
interrupt controller who's chip uses the chip private data, this
leads to an oops.
- SA1111 was missing a call to clk_disable() to clean up after a
failed probe.
- SA1111 and PCMCIA suspend/resume was broken:
The PCMCIA "ds" layer was using the legacy bus suspend/resume
methods, which the core PM code is no longer calling as a result of
device_pm_check_callbacks() introduced in commit aa8e54b559
("PM / sleep: Go direct_complete if driver has no callbacks").
SA1111 was broken due to changes to PCMCIA which makes PCMCIA
suspend itself later than the SA1111 code expects, and resume
before the SA1111 code has initialised access to the pcmcia
sub-device.
- the default SA1111 interrupt mask polarity got messed up when it
was converted to use a dynamic interrupt base number for its
interrupts.
- fix platform_get_irq() error code propagation, which was causing
problems on platforms where the interrupt may not be available at
probe time in DT setups.
- fix the lack of clock to PCMCIA code on PXA platforms, which was
omitted in conversions of PXA to CCF.
- fix an oops in the PXA PCMCIA code caused by a previous commit not
realising that Lubbock is different from the rest of the PXA PCMCIA
drivers.
- ensure that SA1111 low-level PCMCIA drivers propagate their error
codes to the main probe function, rather than the driver silently
accepting a failure.
- fix the sa11xx debugfs reporting of timing information, which
always indicated zero due to the clock being a factor of 1000 out.
- fix the polarity of the status change signal reported from the
sockets.
Lastly, one ARM specific commit from Stefan Agner fixing the LPAE
cache attributes"
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: pxa/lubbock: add pcmcia clock
ARM: locomo: fix locomo irq handling
ARM: 8612/1: LPAE: initialize cache policy correctly
ARM: sa1111: fix missing clk_disable()
ARM: sa1111: fix pcmcia suspend/resume
ARM: sa1111: fix pcmcia interrupt mask polarity
ARM: sa1111: fix error code propagation in sa1111_probe()
pcmcia: lubbock: fix sockets configuration
pcmcia: sa1111: fix propagation of lowlevel board init return code
pcmcia: soc_common: fix SS_STSCHG polarity
pcmcia: sa11xx_base: add units to the timing information
pcmcia: sa11xx_base: fix reporting of timing information
pcmcia: ds: fix suspend/resume
Two stubs are added:
o kvm_arch_has_vcpu_debugfs(): must return true if the arch
supports creating debugfs entries in the vcpu debugfs dir
(which will be implemented by the next commit)
o kvm_arch_create_vcpu_debugfs(): code that creates debugfs
entries in the vcpu debugfs dir
For x86, this commit introduces a new file to avoid growing
arch/x86/kvm/x86.c even more.
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
broke Suspend to RAM on Exynos boards due to lack of probing of
PMU (Power Management Unit) driver. Multiple drivers attach to
the PMU's DT node: irqchip, clock controller and PMU platform
driver for handling suspend. The new irqchip code marked the
PMU's DT node as OF_POPULATED but we need to attach to this
node also PMU platform driver.
2. Add Javier as additional reviewer for Exynos patches.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJX25oaAAoJEME3ZuaGi4PXDa4P/0KG/BAzf++1/43zP9I3PAhM
od3QOLDrnR16ly2AL8QbJWq574ZvNa8ssZ5m3QrWgt4JEGVudc97OpByupTrgm51
xlfceTcsyG95OV1Psm20NJrIK2o1FEDIr4Bdh0/ixjOs/zajLyzUtx0qQ2rHa8mQ
hzJeJGbk4yu50jsaUDWBH2p9n2EHuCqWfvRroE/fEbGL6G120OkFpiP3AExEycnD
U3gUMm+QorEWavf9cMtAzJcnFNKDjaT4iStgTAeCrvcJ4ttwX4x1z5PJV9M/zbs4
XtGoE7mGfGdajhXXnFPPinUB+1MffJdttI6jHEuTWBc/Znfdgr796HnAUYp2bcPp
WQT/OcnFN0WUeYY4dONBI5/mIuHcj1p5esOttjEvIJNOVdoHevnl5KUhaAajy9DV
0alKU9DQ49Z5j+e2lxTJ749Lj1+FfnX63EDQik95hrDZc8QKbbIe3F4/OuR6xm4L
mPUaMSP2OazSpMVNiFoWL/qyB5ukSP0fyLR9cRggUbBUoq8A0WWT0QRMYaaATnQS
fzEeEoerHIxuqU2LKUBJJ7m3VUl0VbWt7VBU2jI73RQ13IzeH92eMh6ssMjO3k0d
R2OAU6R8H6oaCb9qsYajzRjMxm4zEalkUqNTXB4GMM7tsGckqibdgRqF/4fI/4D4
TtUkGN+FCEJOLzAgAntK
=Ljgr
-----END PGP SIGNATURE-----
Merge tag 'samsung-fixes-4.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into fixes
Pull "ARM: exynos: Fixes for v4.8, secound round" from Krzysztof Kozłowski:
1. A recent change in populating irqchip devices from Device Tree
broke Suspend to RAM on Exynos boards due to lack of probing of
PMU (Power Management Unit) driver. Multiple drivers attach to
the PMU's DT node: irqchip, clock controller and PMU platform
driver for handling suspend. The new irqchip code marked the
PMU's DT node as OF_POPULATED but we need to attach to this
node also PMU platform driver.
2. Add Javier as additional reviewer for Exynos patches.
* tag 'samsung-fixes-4.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: EXYNOS: Clear OF_POPULATED flag from PMU node in IRQ init callback
MAINTAINERS: Add myself as reviewer for Samsung Exynos support
Usage of DTS macros instead of hard-coded numbers makes code easier
to read. One does not have to remember which value means pull-up/down
or specific driver strength.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Usage of DTS macros instead of hard-coded numbers makes code easier
to read. One does not have to remember which value means pull-up/down
or specific driver strength.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Usage of DTS macros instead of hard-coded numbers makes code easier
to read. One does not have to remember which value means pull-up/down
or specific driver strength.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Replace duplicated macros in each DTSI file with a common macro coming
from header. Include the header in each pinctrl DTSI so further changes
could use it.
Although PIN_FUNC_SPC_2 does not bring much information about the
function itself, it still is more descriptive then hard-coded
number <2>.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
The pinctrl drive strength register on exynos4415 is 2-bit wide for each
pin. The pins for SD2 were configured with value of 4. The driver does
not validate the value so this overflow effectively set a bit 1 in
adjacent pins thus configuring them to drive strength 2x.
The author's intention was probably to set drive strength of 4x.
All other SD pins are configured with drive strength of 4x. Fix these
with same pattern.
Fixes: 9246e7ff24 ("ARM: dts: Add dts files for exynos4415 SoC")
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
The pinctrl pull up/down register on exynos4210 is 2-bit wide for each
pin and it accepts only values of 0, 1 and 3. The pins sd4-bus-width8
were configured with value of 4. The driver does not validate the value
so this overflow effectively set a bit 1 in adjacent pins thus
configuring them to pull down.
The author's intention was probably to set drive strength of 4x. All
other bus-widths pins are configured with pull up and drive strength of
4x. Fix this one with same pattern.
Fixes: 87711d8c7c ("ARM: dts: Add pinctrl node entries for SAMSUNG EXYNOS4210 SoC")
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Usage of DTS macros instead of hard-coded numbers makes code easier to
read. One does not have to remember which value means pull-up/down or
specific driver strength.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Usage of DTS macros instead of hard-coded numbers makes code easier to
read. One does not have to remember which value means pull-up/down or
specific driver strength.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Usage of DTS macros instead of hard-coded numbers makes code easier to
read. One does not have to remember which value means pull-up/down or
specific driver strength.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Usage of DTS macros instead of hard-coded numbers makes code easier to
read. One does not have to remember which value means pull-up/down or
specific driver strength.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Usage of DTS macros instead of hard-coded numbers makes code easier to
read. One does not have to remember which value means pull-up/down or
specific driver strength.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Usage of DTS macros instead of hard-coded numbers makes code easier to
read. One does not have to remember which value means pull-up/down or
specific driver strength.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Usage of DTS macros instead of hard-coded numbers makes code easier to
read. One does not have to remember which value means pull-up/down or
specific driver strength.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Usage of DTS macros instead of hard-coded numbers makes code easier to
read. One does not have to remember which value means pull-up/down or
specific driver strength.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Replace duplicated macros in each DTSI file with a common macro coming
from header. Include the header in each pinctrl DTSI so further changes
could use it.
Although PIN_FUNC_SPC_2 does not bring much information about the
function itself, it still is more descriptive then hard-coded
number <2>.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
It is necessary to properly configure these clocks in order
to address 720p and 1080p HDMI resolution.
Signed-off-by: Vincent Abriou <vincent.abriou@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
It is necessary to properly configure these clocks in order
to address 720p and 1080p HDMI resolution.
Signed-off-by: Vincent Abriou <vincent.abriou@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
This patch enables the synchronous clock mode for video clocks
on STiH418 board.
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
This patch enables the synchronous clock mode for video clocks
on STiH410 board.
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
This patch enables the synchronous clock mode for video clocks
on STiH407 board.
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
This patch is used in the clock driver to apply a clock propagation
flag on the audio clocks of STiH418
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
This patch is used in the clock driver to apply a clock propagation
flag on the audio clocks of STiH410
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
This patch is used in the clock driver to apply a clock propagation
flag on the audio clocks of STiH407
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Commit d20f997b4d ("ARM: dts: am57xx-beagle-x15: Remove pinmux
configurations for erratum i869") fat fingered a change in which
basically replaced mmc2_pinctrl_default with mmc1_pinctrl_default. And
kernel dutifully reports conflict of usage.
[...]
pinctrl-single 4a003400.pinmux: pin 4a00376c.0 already requested by
4809c000.mmc; cannot claim for 480b4000.mmc
pinctrl-single 4a003400.pinmux: pin-219 (480b4000.mmc) status -22
pinctrl-single 4a003400.pinmux: could not request pin 219 (4a00376c.0)
from group mmc1_pins_default on device pinctrl-single
omap_hsmmc 480b4000.mmc: Error applying setting, reverse things back
omap_hsmmc 480b4000.mmc: could not initialize pin control state
[...]
But, thanks to the fact that we were in fact setting all the muxes in
U-Boot, all the MMC devices were still properly detected.
Fix the typo.
Fixes: d20f997b4d ("ARM: dts: am57xx-beagle-x15: Remove pinmux
configurations for erratum i869")
Reported-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
[tony@atomide.com: removed timestamps and wrapped description]
Signed-off-by: Tony Lindgren <tony@atomide.com>
This adds DT support for the NAND connected to the SoC AEMIF.
Passed torture hashing a 40MB file on top of UBIFS using subpages.
Signed-off-by: Karl Beldan <kbeldan@baylibre.com>
[khilman: add back default partitions from an earlier patch]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Simply enabling CONFIG_KEYSTONE_USB_PHY doesn't work anymore
as it depends on CONFIG_NOP_USB_XCEIV. We need to enable
that as well.
This fixes USB on Keystone boards from v4.8-rc1 onwards.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Support for new board OMAP-L138 LCDK
- Add AEMIF node on DA850 EVM and use it for NAND
- Audio support for LCDK
- Cleanups for PWM and UART
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXvXfSAAoJEGFBu2jqvgRNo74QAITQIwuUdqadN2MLRSZt85rh
39TpFTgaX6Uw+KgYDILs6ct6+uF7rGMtJqJ5JzkDdNfY9K4gT46K/qpEO57qNW9C
7tkhhVrrXtGVj4xMC8d+KBCNI+AetlIzb+fGv/D9ICiHPD6ArrIAkfTYvvYUh4+Y
QMMkWHhnvD63Ssaukrpe3C2GrP/WiJBonTXkL72SExIdaplj+AUeme3re9cFdpU2
Uibibeq7GjLt7gY3ZzsohvDzD/zVrR0yOqk1EWobAi+Q0xJnJ3zUHUHoEGabUJfG
hqdcJKR6Z3lgMBKvVNi0/0SEirKQhlRO8+bMaBklfarR+GKNM/1HCbgTSU4BaeDC
djvhaQejLP2xqrH3H/vUMIYfE5R5f+PJKkYMs+URaYEQArWCoR8LBBBgUid1PB1R
cWGtGln9p5077PrYa1BfC5m6GFcwkkR8Uxz4pZP+ts1STP/kU2xa/r8TE0/IPDpa
WsnfrIeJeLQ24YM3LlF0QaRdp0Q6/s/JTwGuusOaE+IRoXuClybg2f9mJQ7MYopL
n5D6mLf0jhJ9Ai01+KAzgahIEgbK9J7zZTb7n08k78GMKWsugAES2xpS0B8OMpgj
ooBvNaNNFqmcWd7apoyTFwj/hpTYbd9Z3Yna8nxaH9VdU6QUujI13WIrLb/WewWt
g+sPlXSN2QWGfNLg2Kti
=7UMP
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v4.9/dts' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt
Pull "DaVinci DA850 device-tree enhancements include" from Sekhar Nori:
- Support for new board OMAP-L138 LCDK
- Add AEMIF node on DA850 EVM and use it for NAND
- Audio support for LCDK
- Cleanups for PWM and UART
* tag 'davinci-for-v4.9/dts' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: da850-lcdk: Audio support via simple-card
ARM: dts: da850,da850-evm: Add an aemif node and use it for the NAND
ARM: dts: da850: Add basic DTS for the LCDK
ARM: dts: da850: Add missing pin muxing for the UARTs
ARM: dts: da850: Add new ECAP and EPWM bindings
Make the clocks visible options that can be selected by anyone. This
avoids the problems of:
1) Select is a reverse dependency and is hard for people to understand
and can sometimes be a pain to track down
2) Build coverage goes down because configs are hidden
3) Code bloat
Patch suggested by Stephen Boyd
Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This reverts commit f80bc97fd0.
The original commit updated the cpufreq operating points tables for
dra7xx but was merged before the driver making use of the node was
merged, which breaks the existing cpufreq implementation on the system,
so revert the patch until the ti-cpufreq driver is merged.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This reverts commit 4317be1162.
The original commit updated the cpufreq operating points tables for
am33xx but was merged before the driver making use of the node was
merged, which breaks the existing cpufreq implementation on the system,
so revert the patch until the ti-cpufreq driver is merged.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This reverts commit c36e6ec904.
The original commit updated the cpufreq operating points tables for
am335x-boneblack but was merged before the driver making use of the node
was merged, which breaks the existing cpufreq implementation on the
system, so revert the patch until the ti-cpufreq driver is merged.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
please pull the following:
- Jon adds support for the Ethernet MAC DT nodes (AMAC) and provides the
following updates for Broadcom references boards:
* New Northstar Plus reference boards added: BCM958525er, BCM958522er,
BCM988312hr, BCM958623hr and BCM958622hr
* Add SATA nodes to the BCM958625hr and XMC boards
* Add I2C nodes to the XMC board
* Fixes the amount of RAM on BCM958625HR, BCM958625K and BCM958525XMC boards
* Add the GPIO reboot method for BCM958625hr and XMC boards
- Dhanajay adds PWM nodes for the Northstar Plus SoCs
- Rafal adds the USB 2.0 PHY to the BCM5301x Device Tree file include
- Stefan adds a missing USB clock to the BCM283x DT files, adds a DTSI file for
the USB host mode on BCM283x and finally documents and adds support for the
Raspberry Pi Zero
- Florian adds support for the Northstar Plus Switch Register Access block which
enables the integrated switch on these SoCs and enables the switch ports on the
BCM958625HR reference board
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXz3PkAAoJEIfQlpxEBwcExYEP/26vqP/IMQJjrNqumONwGPeS
xh347uZzIWoUFBfbwNxrny+lBcLBctxckKD5U1yC70b/5MQHY4AVLAmSAN2rIANg
l8A+K0X86U0+QABfIqTdqDH80dyyvcr37dIJCWrz12yoPzLxdBsFkpK2KFS9R4vy
5Bo01aZuc4WItzwGTzC7mikL5s0MB7uDyauoI+wqL5nvSGrOYiqC7INP2Lz/GfAB
k3odhD8Ud7Z0Mkcj60ZGLP1MfZtU9iXHmbYU5FsQGgZPKJDfFESKHJas418Vq+hF
pJi0bu0TM5VV4affaUvmrC+tQc0UQ071ZxwyTrui6HyTuTxXyA1j4bId/5kKIdhW
6LNWyeUqCCA3ZxSXtoqpDv2Zc/e6DyNeupZypT93NNWHUQUFLpCYYtnCdxShgiGS
eXauhb05iuuATqbk3RXb8o7e0z1waDJJCYAuv7EfGewHKJberbbyXz4HJkFQEf3k
pQz5nWyT9nlqGMGam+u4CpPZQ/68J7aslzn3hFBdZkWaGPo/mNMQ2rckaELms6sO
BKpBVdYPg25MkUI30gC7WiVktcBz+YcbrozEvykRqn3LpBFECzs5tHABC0duTghL
PAusDq9kE6aRNB++1vhABmI41dm/TmRJ34gLUFaoGwY3lHrpLLdzjWoh3Ozndob1
sKcXKXMFbA3JN72rdkTY
=j84Q
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.9/devicetree' of http://github.com/Broadcom/stblinux into next/dt
Pull "Broadcom devicetree changes for 4.9" from Florian Fainelli:
This pull request contains Broadcom ARM-based Device Tree changes for v4.9,
please pull the following:
- Jon adds support for the Ethernet MAC DT nodes (AMAC) and provides the
following updates for Broadcom references boards:
* New Northstar Plus reference boards added: BCM958525er, BCM958522er,
BCM988312hr, BCM958623hr and BCM958622hr
* Add SATA nodes to the BCM958625hr and XMC boards
* Add I2C nodes to the XMC board
* Fixes the amount of RAM on BCM958625HR, BCM958625K and BCM958525XMC boards
* Add the GPIO reboot method for BCM958625hr and XMC boards
- Dhanajay adds PWM nodes for the Northstar Plus SoCs
- Rafal adds the USB 2.0 PHY to the BCM5301x Device Tree file include
- Stefan adds a missing USB clock to the BCM283x DT files, adds a DTSI file for
the USB host mode on BCM283x and finally documents and adds support for the
Raspberry Pi Zero
- Florian adds support for the Northstar Plus Switch Register Access block which
enables the integrated switch on these SoCs and enables the switch ports on the
BCM958625HR reference board
* tag 'arm-soc/for-4.9/devicetree' of http://github.com/Broadcom/stblinux: (22 commits)
ARM: dts: bcm2835: Add Raspberry Pi Zero
DT: bindings: bcm: Add Raspberry Pi Zero
ARM: dts: bcm283x: Add dtsi for USB host mode
ARM: dts: bcm283x: Add missing USB clock
ARM: dts: NSP: Add new DT file for bcm958622hr
ARM: dts: NSP: Add new DT file for bcm958623hr
ARM: dts: NSP: Add new DT file for bcm988312hr
ARM: dts: NSP: Add new DT file for bcm958522er
ARM: dts: NSP: Add new DT file for bcm958525er
ARM: dts: NSP: Add GPIO reboot method to bcm958625xmc DTS file
ARM: dts: NSP: Add GPIO reboot method to bcm958625hr DTS file
ARM: dts: NSP: Specify RAM amount for BCM958525XMC board
ARM: dts: NSP: Specify RAM amount for BCM958625K board
ARM: dts: NSP: Enable SATA and add i2c devices on XMC
ARM: dts: NSP: Enable SATA on bcm958625hr
ARM: dts: NSP: Correct RAM amount for BCM958625HR board
ARM: dts: NSP: Add PWM Support to DT
ARM: BCM5301X: Specify PHY of USB 2.0 in DT
ARM: dts: NSP: Add BCM958625HR switch ports
ARM: dts: NSP: Add Switch Register Access Block node
...
Add support for big endian on the Allwinner A20, and the Nextthing GR8 SoC
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJX1cfXAAoJEBx+YmzsjxAgQ9wQAIIxnsNUmgNF4JmS/IXNOXRC
Qb++IMkIEFVb5vv0NyBLHqZKF74u5wsbg7raFyMzePoj3Hq4iYiYdm0LB9w8nq+m
V3PfvArjMKsBbS4ZZDHvDmrffGirQaycG2NCkkoe38abMCJgBt4TlvO3/6rZHV8E
qLrM2BkHRbQfC8QISBPgFJolE1LYoge6FOLbL9HV4blzhnQdNrSMoAjLutIs1RiL
964sVovCUwX5iAELpTnwmOBhGA904ptg/NAZZltbQthOBSESZcnSA6OhlAwVkIbN
efCEXaNSsixntpGNd5nczFJV9KE5nUQudgPHK+boMXhDQ3xjmDJI+zeBSa2EWgUk
kpLXKLfBo/0EG+9j8or0I8CzoN59qFPVlIE5eaSPdSDFUHX3N5zllrNND59sGkLy
amodTEyT/ZnZKJJLsTge8leMMV/jYr95cDOv5tCKJEL8D8PrOnqu12wJJzWMT8dN
sxZrw4fhBWrE9cntL7xqaiB4sZmX21yybm3PT4Zooa1IG5JwE9F4bMCdXdIxbwC0
O1MdTM1U3rmT76RAYdayb7SUus8o5ypnsAKntPeOKdEwld9zjGgOGnmqIvcdo407
fW8O2D0CQ4cVckJ5MVh0fN/BZAtBVBnPkRo6dnQiaT3AzAOCTQyQUX1h+A0TUs0w
EEAQ4v/8DzjyOkDCfR5G
=uNAt
-----END PGP SIGNATURE-----
Merge tag 'sunxi-core-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/soc
Pull "Allwinner core changes for 4.9" from Maxime Ripard:
Add support for big endian on the Allwinner A20, and the Nextthing GR8 SoC
* tag 'sunxi-core-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: sunxi: Support the Nextthing GR8
ARM: sunxi: enable big-endian
This cycle is covering :
- the removal of the legacy DMA API
This is the major contributor to the negative diffstat, as dmaengine
have taken over in this area.
- IDE subsystem defconfig fixes
- preparation for pxa25x to be device-tree compliant
- various irq related fixes
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJX0ucrAAoJEAP2et0duMsSdsUP/j+HOYv8tqnJ4/Wl0byLPj7o
IrEWe3Ul+ZGisiN6u5umRANVHUbgNCrPmTMNVa/u3UA2yfffrV1pn6oiJVsNWIt2
/f6Kbd+czy+r745DEx/zcHYqOp43KOPslzzYxJpRNVcuiEOQ2ljSdSZgmgwy9blv
9/l7BIlAQn/XgXwOPj7C8j/mOkYmxXh2BdHz7pVhIAqofj0CrqXYhvgOPxvEOOqk
jD8dWDlvFb0yTvP2RcxhUbUo6aOYf9OpBuNOctKqwKzxFpTloP/D/hQ5doBabalM
GBzw4835+69qnMtrF/9JPKj9+cR/qHEhGLgHaKRAIKcaMMP0ksiDOYWpfjpq2BOj
q/uSoIKPN5I5s2i78o97jDWWofF5iO3tioeLqavn8O91ptWb4EFCRdBvmX3PLvAb
fy0dbF5qKJgowgYaO+Oe54ZKWWZ9wJ1GFxV4y+dXWy8def4KdNXu2AV7YqwS8JeA
ifmxrQrqPj8j21X7bVYwvD4mplSPkmviO1c734BL1zAd3V8PdP27V5gNR5DYWAyP
Bppv6HM9JGGHLjXTXaw+MIJJis1Pqe6Ou4XAt1K9vbj5cFNMt4NJx9B5eJRmqPkj
Bt6FPLYPpUgwGIK4CZ6vJ+s4G9eAnV/OiPNrrmtm0stiRRMcPBWFFaPZSKj0+1wc
2TbuaO393CcyoCyC5bKY
=kAKB
-----END PGP SIGNATURE-----
Merge tag 'pxa-for-4.9' of https://github.com/rjarzmik/linux into next/soc
Pull "This is the pxa changes for v4.9 cycle" from Robert Jarzmik:
This cycle is covering :
- the removal of the legacy DMA API
This is the major contributor to the negative diffstat, as dmaengine
have taken over in this area.
- IDE subsystem defconfig fixes
- preparation for pxa25x to be device-tree compliant
- various irq related fixes
* tag 'pxa-for-4.9' of https://github.com/rjarzmik/linux:
ARM: pxa: pxa_cplds: fix interrupt handling
ARM: pxa: remove irq init from dt machines
ARM: pxa: Use kmalloc_array() in pxa_pm_init()
ARM: pxa: magician: Remove duplicated I2C pins declaration
ARM: pxa: fix GPIO double shifts
arm: trizeps4_defconfig: disable IDE subsystem
arm: pxa255-idp_defconfig: disable IDE subsystem
arm: lpda270_defconfig: disable IDE subsystem
arm: colibri_pxa270_defconfig: disable IDE subsystem
ARM: pxa: add pxa25x device-tree support
ARM: pxa: prepare pxa25x interrupts for device-tree platforms
ARM: pxa: remove platform dma code
ARM: pxa: remove devicetree boards from pxa_defconfig
Clean-up:
* Only use smp_init when SMP is selected
Enablement:
* Add debug-ll support for r8a7992
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXz8Q6AAoJENfPZGlqN0++mNgQAKxv/KqBfxtX3rpZ6dqrjCK3
zIP8VtsWD7R12kdHizmYZKXqpRK2K7UzRhebEinIXcu2jXgqZROFRizxrDoYGUXL
nQJVPnc4PrMASowZuwzVBMYMD8mWUjCIVG6/YMmPXJMNj7+DXAFdWC267mAavRhJ
jxvSr0NAmPQBd8AQR1tLCkuZQ6Ms1xzG/lb4Prjc1uPuJH5gNwPfdZNzueFbcvtG
OvB+SH9c7RjRu9pIm7nnWryJh7pBAULTdRDjq/BscQLBOCoS2XhUDFnsvKOwUmxs
DlKdDSXEjsrMvzrVKAehK6VNGCFwJkn2RvF+wyIz1dnggVipP8PBrkXXQBuI+ky/
MFrhKBV/qFkLjoJaC36DSW6asjyHfKT2ZnECueVjhW5oLWEEXJVBLEtveSHL0JYv
Z/FNoXGZ9zWkr/7xf8pzYYJ1YqxXmzTWvpNLim8poVOTWNfH2vsAaa8rwGhlCbR/
g2J3+7jVCpwVHFd6yAOCmHad3LXAU2wWzTwKUVAJ2jwIyvgxyrKWUeLkow98sBw3
apTQBmSLMRwQ/nui3nBaPxG1gcOt76N2kW4VsmW8JgHwHEb9c/xKIPTNhz+fYwIn
AsySm9UswhPfg/fE3QK/xU9o6CIFDQ9mtFteUqcXqOKklt0qRIFpstgBIqo0yKxL
MiXIw1Z63Nd6Rin3MeY7
=7Opm
-----END PGP SIGNATURE-----
Merge tag 'renesas-soc-for-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Pull "Renesas ARM Based SoC Updates for v4.9" from Simon Horman:
Clean-up:
* Only use smp_init when SMP is selected
Enablement:
* Add debug-ll support for r8a7992
* tag 'renesas-soc-for-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7791: only use smp_init when SMP is selected
ARM: shmobile: r8a7790: only use smp_init when SMP is selected
ARM: debug-ll: Add support for r8a7992
the following:
- Rafal adds preliminary support for the new BCM53573 Wi-Fi SoC based on a
single core Cortex A7 and re-using a bunch of iProc peripherals
- Florian adds support for earlyprintk on Broadcom STB/CM ARM-based chips by
reading the chip family_id value from a known location and deriving the UART
based address
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXz3EeAAoJEIfQlpxEBwcEhOMQAIR2/o8vsxo58mH2DD9Zx6b7
DuIqw5w7zL85bKeSm8o9puhmF9MyVeNDeAaWgO5Ck1pKw2pycm2K4bOsfHCYlijS
I+U85MnwZC9Gnr59UiGXFrhA4cpQ1Vd03s2FqMYhjGxD+05Xn/RK6aCPJGwcsnsE
QAonT40RU/uR05a7XBLY/DT0jLxYrDib9xInkImtPmcjaQuuercsFfjL+Fx0/EhO
JnY4Xw5KeJGZEwu4mpoLkupbzm7wCTP2vSoqXMMHEwPP79GLXVolqIAErIV9mcBr
hSLbtng6LG5xfZ1Z70VtNRYfEOYl8jkik/F7R2VcR0JmJtATr//Yy7oN8JxmsCc5
494VrsThlgO0F8r8l7VpNi9qz3Yb1N31OHS/v5ZswyWzqvjYB6oOE8L4Z4MKZjec
kEuYQPbvjKNsGX960B3LYcE8qe8TPF3ih+5E/UoNAkO5yYj6Q5G4H9WJSx0gSQYw
q7lXlsKE+W39Mw0Pztp+HExcaJAudDJ6gy617HEw1+ZDQEpQAGG4Lipge6/hAVbA
kDvoIIle2RLLlydibf1qz1PQKFqDXscWNcvaRd2wYTX+xIE4i26JiWMYboPLXXz1
VXkiPRB3agGGtzKuq2elOc1zOPPEosdud5JhQlW632qy6rkIoVy0bSMTivfO2rBO
/z71QLuHPWjjTISNrBud
=8KXa
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.9/soc' of http://github.com/Broadcom/stblinux into next/soc
Pull "Broadcom soc changes for 4.9" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoC changes for 4.9, please pull
the following:
- Rafal adds preliminary support for the new BCM53573 Wi-Fi SoC based on a
single core Cortex A7 and re-using a bunch of iProc peripherals
- Florian adds support for earlyprintk on Broadcom STB/CM ARM-based chips by
reading the chip family_id value from a known location and deriving the UART
based address
* tag 'arm-soc/for-4.9/soc' of http://github.com/Broadcom/stblinux:
ARM: BCM53573: Initial support for Broadcom BCM53573 SoCs
ARM: brcmstb: Add earlyprintk support using run-time checks
- Enable i.MX6 SATA and cpufreq driver support in multi_v7_defconfig.
- Enable MPL3115, Etnaviv GPU, WM8960 Codec driver and more USB
functions support in imx_v6_v7_defconfig.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJX1lztAAoJEFBXWFqHsHzOIdcIALyc4nkJXR1XYYTfL7h+KkgC
YozZ7dX2JyU4n+lYtRz1wLc9SANUu3Of6Ecipk+Y7Djnen0G5Qet6rP5NXzFwmVM
gy5OwctXUaWv7muynLf3SIFyFZ5b+mKwO2n2b/88E5mbSEUXskD/b8lYm/i4XHeJ
Ev3NfAaKo5eDCA39VNsNuD8XkC9wz5CaHbQNCR3hBmHUo9Fjh2eMcloy7/zcbXE9
tVIrZrIzge7l9s5UE1gMYvChQKPE/3tQRhS7NlqFAM4zQfbhQYN1UjibZfoizlMi
jWQxpjZo5VsVOZ1uHPPjdMbjOVHfnUWkSV/l6AAmo4Mnftt83Y3fFxQ+jPHIWgY=
=/Z7R
-----END PGP SIGNATURE-----
Merge tag 'imx-defconfig-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/defconfig
Merge "i.MX defconfig updates for 4.9" from Shawn Guo:
- Enable i.MX6 SATA and cpufreq driver support in multi_v7_defconfig.
- Enable MPL3115, Etnaviv GPU, WM8960 Codec driver and more USB
functions support in imx_v6_v7_defconfig.
* tag 'imx-defconfig-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx_v6_v7_defconfig: Select the wm8960 codec driver
ARM: imx_v6_v7_defconfig: Add CONFIG_MPL3115
ARM: imx_v6_v7_defconfig: Enable GPU support
ARM: imx_v6_v7_defconfig: enable more USB configurations
ARM: multi_v7_defconfig: Enable ARM_IMX6Q_CPUFREQ
ARM: multi_v7_defconfig: Enable AHCI_IMX
- update dsa config with new symbol
- add flash related config for mvebu v7
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlfMQVUACgkQCwYYjhRyO9XsjwCfXdMXmR+QEF+zFB/K/Z5E2BWO
RFYAnRWBOjELgMuH1Q14Sw8ANEj1H5/A
=ZV+v
-----END PGP SIGNATURE-----
Merge tag 'mvebu-defconfig-4.9-1' of git://git.infradead.org/linux-mvebu into next/defconfig
Pull "mvebu defconfig for 4.9 (part 1)" from Gregory CLEMENT:
- update dsa config with new symbol
- add flash related config for mvebu v7
* tag 'mvebu-defconfig-4.9-1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu_v5_defconfig: use MV88E6XXX
ARM: mvebu: enable UBI and UBIFS in mvebu_v7_defconfig
ARM: mvebu: enable MTD command line partition table in mvebu_v7_defconfig
Keystone usb phy needs CONFIG_NOP_USB_XCEIV to be enabled.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXx15hAAoJEHJsHOdBp5c/4i4P/iOGMsKUNltw1qiqN5nihF0V
GWaaVk/vz1oXjm98CyfPOPK9+u5SioRrm04nzhQdSTUmqZNtGJg1PKWjtJcyKuQZ
ajZpD+1QdviFJw+/Gffdxsw38W5nQ6X5//IzSYR68CWXet11zrujBJA4GK7Mxs3Y
fFkehrBIgcgeIdwIRx8HuZWu1+xtVDWwXIc5f/LxoIATffaSMTMapW8QTiPvvWxk
HB+p8LshwPAS71vnzC4GUHPinEVLawesPLUDxq56e+DCKspq20UsOWezc/JEvUNL
X2IXvODFx+9WyIdgErdt0+00ljiVw4KWEGexAaYqVUmmbSARA45/vULUkoOZ6qIY
u8vy3L58A2E7KvLi2U5ma5mHzRs7bSOuoFO9hhjSLG1nbjyz3HcPmYgTXyP9hCPR
L16nwlrcAsc4M+u7HD7RR7vuUteQcqhYo8cLsDJjwJcwyicmIGRewBQI3to1s5sJ
h8iu1atoJC4yPvTEpI8iflpuqkCMfvntkvOlmiyVJ0EyEPxBNli8QKOo2tq1MfSZ
J4rHWQq8DB8EWoqkrEC8hnRof2Sa//0B44AXffujwzdng+LiYVBYbbSmQ8Q/L86T
l7WN2a+mqfYfJPrxB7lF9WzH14fy7SVCOuuxmJqdAYImw4/QBm6ecBkkH6JhGXdL
+OAXb4QFg7YC7+c7BtBn
=jzCV
-----END PGP SIGNATURE-----
Merge tag 'keystone_config_for_4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/defconfig
Pull "ARM: config: Add CONFIG_NOP_USB_XCEIV" from Santosh Shilimkar:
Keystone usb phy needs CONFIG_NOP_USB_XCEIV to be enabled.
* tag 'keystone_config_for_4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ARM: keystone: defconfig: Fix USB configuration
This helps to get 100% intensity closer to "always on".
It compensates for an effect of dmtimer which at 100% still emits short
"off" impulses and the startup-time of the DC/DC converter makes
backlight intensity not reach full scale. The lower the PWM frequency
is, the smaller is this effect.
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
- Add and fix a bunch of clocks in the DTS corresponding
to the new clock support merged into the clk tree.
- Move the CLCD display configuration from boardfile to
device tree using the new CLCD support merged into the
fbdev tree.
- Cut some auxdata.
- Cut some static remappings.
- Move the sched_clock() counter to use syscon+regmap.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXxogwAAoJEEEQszewGV1z2WoQAIpNj8akj2qHWfaZKUa5HTVH
YN2ukEkhpY8qXDw8ZjQVGMQ2VrHUCFWkwcYat8RPe7yfeZcEEkFMTgfTkq9h3P3g
15a+a4PuX2Prli/gzH3gq9VayHBOrUe+YAiy6qRbtVM6K7qwd9fBDWGYUBgC4i9p
7Y8lsyNTXXthtOnajlYVAxfFGTq67F2kZjHiCEagsWB6aLfT5Ixi/ZmCTs/GTfEf
Lon7XG8RQFo/3xatM/k4kjv/Bd8GzIW8UR/iZ5qnEOBIbcFSBWey9N0saiagZ8M1
vMmYjClMlunvX8L22EoC8ZOHcfF+YFeKpqbKehDmobY5qdi40yTse0CoVcFPaX7o
JZWZThOirsEb6q0iFH/Imno8dGWnWRG++h3ONx4KYbyJ8dOxJOwjbGtM23iT+SbF
JnceDpQ/oo5D84UEZhdonY0bemhkKhd9TADHlg0IHPo94dtD2VCsZalfLk7RyDyx
9fOZFBZv5y8khh9nX5BhBkDexw0LXXmSyzrkjVOKsuImsBaLFueZe8kTDHFHbRCm
MjYwLGRdmQIBCubdbjj1lxWk+xVDtvSonrT57a/A3+luAJutGbOdAeCUGtF3IzIY
uSgGVaExxD+ax/E9dWP6N1kPvBAtB7+jqQXOsX6kO39irFxoUBE6OhdyT4RsrSEN
J1FRkiDG5EH1rXiVpD8h
=kkO1
-----END PGP SIGNATURE-----
Merge tag 'integrator-armsoc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/late
Pull "This is a bunch of Integrator changes for v4.9" Linus Walleij:
- Add and fix a bunch of clocks in the DTS corresponding
to the new clock support merged into the clk tree.
- Move the CLCD display configuration from boardfile to
device tree using the new CLCD support merged into the
fbdev tree.
- Cut some auxdata.
- Cut some static remappings.
- Move the sched_clock() counter to use syscon+regmap.
* tag 'integrator-armsoc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: integrator: read counter using syscon/regmap
ARM: integrator: cut down on static maps
ARM: integrator: delete some auxdata
ARM: integrator: move CP CLCD display to DTS
ARM: dts: add the core module clocks to Integrator/CP
ARM: dts: Add the core module clocks to Integrator/AP
ARM: dts: add the Integrator/AP baseboard clocks
ARM: dts: set the 24MHz xtal as parent of the UART clock
The default PHY configuration disables most of the LEDs. The following
configures the ethernet activity LEDs as Netgear intended.
[gregory.clement@free-electrons.com: fix commit title]
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This is a router based on the mv88f5181 chipset.
http://www.netgear.com/support/product/WNR854T.aspxhttp://wiki.openwrt.org/toh/netgear/wnr854t
[gregory.clement@free-electrons.com:
- extract dt part from "arm: orion5x: Add DT-based support for Netgear
WNR854T"
- squashed "arm: orion5x: Alias uart0 to serial0 for all orion5x" into
this commit and move serial0 alias from dtsi to dts]
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
rd88f6183ap-ge passes NO_IRQ as the interrupt line for its m25p80
NOR flash. However, this device never uses an interrupt and the
driver doesn't care, so we can simply remove the deprecated constant
here.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
One of the last users of NO_IRQ on ARM is the switch initialization
code on orion5x, which sometimes passes a GPIO based IRQ number.
However, the driver doesn't actually use this number, and according
to Andrew Lunn never will do it for non-DT based machines, so
we can simply drop the irq argument.
Simplifying it further, we can also drop the static platform_device
and instead call platform_device_register_data(), which in turn
lets us mark the platform_data structures as __initdata and slightly
reduce the memory consumption.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
For most devices, we know in advance whether they have an
interrupt line or not, so we can avoid passing NO_IRQ and
instead split fill_resources() into two interfaces, with
only the new fill_resources_irq() function taking an irq
argument, which it then can use unconditionally.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Out of the four ethernet devices on mv78xx0, only the first one
has an error interrupt line, for the other ones we pass NO_IRQ
and then ignore the argument.
In order to get closer to complete remove of NO_IRQ, this simply
drops the unused function arguments.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Common definitions for the SoC for board definitions to use.
[gregory.clement@free-electrons.com: fix commit title]
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
orion-wdt refuses to start without these properties defined, so lift
definitions out of kirkwood/dove.dtsi
[gregory.clement@free-electrons.com: fix commit title]
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Commit 88e957d6e4 ("xen: introduce xen_vcpu_id mapping") broke SMP
ARM guests on Xen. When FIFO-based event channels are in use (this is
the default), evtchn_fifo_alloc_control_block() is called on
CPU_UP_PREPARE event and this happens before we set up xen_vcpu_id
mapping in xen_starting_cpu. Temporary fix the issue by setting direct
Linux CPU id <-> Xen vCPU id mapping for all possible CPUs at boot. We
don't currently support kexec/kdump on Xen/ARM so these ids always
match.
In future, we have several ways to solve the issue, e.g.:
- Eliminate all hypercalls from CPU_UP_PREPARE, do them from the
starting CPU. This can probably be done for both x86 and ARM and, if
done, will allow us to get Xen's idea of vCPU id from CPUID/MPIDR on
the starting CPU directly, no messing with ACPI/device tree
required.
- Save vCPU id information from ACPI/device tree on ARM and use it to
initialize xen_vcpu_id mapping. This is the same trick we currently
do on x86.
Reported-by: Julien Grall <julien.grall@arm.com>
Tested-by: Wei Chen <Wei.Chen@arm.com>
Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
This patch enables the uniperif players 2 & 3 for b2120 boards
and also adds the "simple-audio-card" device node to interconnect
the SoC sound device and the codec.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
This patch adds the DT node for the uniperif reader
IP block found on STiH407 family silicon.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
This patch adds the DT nodes for the uniperif player
IP blocks found on STiH407 family silicon.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
This patch adds the dt node for the internal audio
codec IP.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
This patch adds the pinctrl config for the spidf out
pins used by the sasg codec IP.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
This patch adds the pinctrl config for the i2s_in pins
used by the uniperif reader IP.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
This patch adds the pinctrl config for the i2s_out pins
used by the uniperif player IP.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
These nodes are required to get the fdma driver working
on STiH407 based silicon.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Some omap5 variants have more than 2GB of memory available as
optional models. Let's update the dts files to use two address
cells similar to what dra7 is using with commit dae320ec31
("ARM: dts: DRA7: change address-cells and size-cells").
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Latest update to the BeagleBoard-X15 platform (revision B1)[1] updates
for allowing UHS SD cards to function with the split of supply to SD
card from a dedicated LDO.
As a result of this, AM57xx BeagleBoard-X15 now uses gpio2_30 instead
of gpio6_28 for HDMI because HDMI_LS_OE should now be switched from
GPIO6_28(Y9) to GPIO2_30 (AG8) to avoid a 1.8V GPIO toggling a 3.3V
SoC input when the SD card is in UHS 1.8V mode.
NOTE: For UHS mode to function, we need full fledged IODelay support
in kernel to be functional. IODelay support is yet to be added.
Further, It does not make much sense to spin off a new board
compatible flag since there is no real functional benefit for the
same.
Note: Even though production version is supposed to be B1, there is
over ~200 boards of previous version (A2)[2] out there which continue
to get supported with the existing dts file (to maintain compatibility
with existing bootloaders for A2) and the production board is now
supported as revb1.
[1] https://github.com/beagleboard/beagleboard-x15/blob/master/BEAGLEBOARD_X15_REV_B1.pdf
[2] http://marc.info/?l=linux-arm-kernel&m=147273929820708&w=2
Tested-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Pinmuxing for DRA7x/AM57x family of processors need to be done in IO
isolation as part of initial bootloader executed from SRAM. This is
done as part of iodelay configuration sequence and is required due
to the limitations introduced by erratum ID: i869[1] (IO Glitches
can occur when changing IO settings) and elaborated in the Technical
Reference Manual[2] 18.4.6.1.7 Isolation Requirements.
Only peripheral that is permitted for dynamic pin mux configuration
is MMC and DCAN. MMC is permitted to change to accommodate the
requirements for varied speeds (which require IO-delay support in
kernel as well). DCAN is a result of i893[1] (DCAN initialization
sequence). However, since we don't use DCAN on X15, with the exception
of MMC, all other pin mux configurations are removed from the dts.
[1] http://www.ti.com/lit/pdf/sprz429
[2] http://www.ti.com/lit/pdf/sprui30
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The LEDs on igepv5 are on the GPIO expander unlike on omap5-uevm.
Configuration copied from git.isee.biz git tree except fixed for
red and blue mapping.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add power button support for igepv5.
Cc: Agustí Fontquerni i Gorchs <afontquerni@iseebcn.com>
Cc: Enric Balletbo Serra <eballetbo@gmail.com>
Cc: Javier Martinez Canillas <javier@osg.samsung.com>
Cc: Pau Pajuel <ppajuel@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The ID pin GPIO comes from the PMIC. Let's configure it as a GPIO
for the driver to use, and also make sure the PMIC GPIO pin muxing
is correct. The PMIC pad1 and 2 values for omap5-uevm and igepv5 are
0x5a and 0x1b, we only need to clear bit 2 in pad1 register to make
the ID pin GPIO work.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Few changes to fix issues I've noticed while debugging omap5-uevm
wl18xx issues:
1. Move wlcore irq pin muxing under wlcore. This irq could be
different from gpio_wk14 on some board variants
2. Don't configure pull on wlcore irq pin. There is a 10k
pull up resistor R105 on the device to VDDS_1v8_MAIN
3. The padconf register for wlsdio_data1 is wrong, it's really
at 0x1a8 + 2 - 0x40 = 0x16a offset, not at 0x168 as that's
for wlsdio_data0
4. Mark the omap5-uevm wlan as compatible with ti,wl1837 as
that's what the TDK R078 part seems to be
5. The MMC interrupt for WLAN musb be wakeupgen, not gic
Looks like omap5-uevm WLAN behaves better now, but I still seem
to have issues with some access points.
Signed-off-by: Tony Lindgren <tony@atomide.com>
A second set of device tree changes, this time switching a few SoCs to the
new sunxi-ng clock framework. We also added the support for a new SoC
(NextThing GR8 and its evaluation board), and the support for the DRM
driver in the A33.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJX1b4yAAoJEBx+YmzsjxAg630P/i4++5Q3TWkkM8x0H375Hu/w
S2rsA4Tg3979rB8R32yQqquy05ngYB/iKsp+vnx9UDMwPwD7D09+pFm5eQTTpI3o
L+5O27VhaaFY1G3ZNvyfatw75dk733oA0hYQV4NNQXIzocTrOkFSuAES/LOvdeN5
T5H4aREySzUBCGkqlq92fz0eSc5l/RDkkxvVjD5Qz2kf7jyWVLlbP96m58cmdKQG
tiVL+Sn6tDKPumYB8Ab/nt4n7Vni45/D4HAvWQPWxnQD3ImY2d6N0M3bXbttckYU
XUVhMLczQeuBtyO5XRCRZR2T7dQmqbvNdPGg/R2HTDyMSuUc+RQUE1CcTUxZKsTE
mhm5UD/qZD2l4sKooNSDqXGplQaExmoJercsTyZ856uPhFY+WwtTh0JgHpSO8hX8
OC7YVuS4TP4AmBklO39VIMjeA+yDbG5gpkHMH5GFiJG3bDEWUD2NyCgkSn8+CUMF
QBe5E4tBk5SPoB6LylnVFDyS7BBmqBoBWddYOepAV0QRk/mJCGigIiHExhrd7fAp
scVvkliScSlUyLhOKJ4vpga3vXLKStEuCEjMsL0hbeaLBSRcXHNDBw70DQx8QJMu
nBjhyNIF5TdX875IJskd0YSAdLfrjuyuxpecdn+0YyOq9/9Y0SgbPN+vNE3Kj544
15378EMLv7oCPuFaCPJ5
=uy/t
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-4.9-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/late
Merge "Allwinner DT changes for 4.9, take 2" from Maxime Ripard:
A second set of device tree changes, this time switching a few SoCs to the
new sunxi-ng clock framework. We also added the support for a new SoC
(NextThing GR8 and its evaluation board), and the support for the DRM
driver in the A33.
To maintain bisectability, while avoiding some un-trivial merge
conflicts, I had to merge the clk branch that I've sent a PR to Mike
and Stephen. This branch will of course be stable.
* tag 'sunxi-dt-for-4.9-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (53 commits)
ARM: dts: gr8: Add support for the GR8 evaluation board
ARM: dts: Add NextThing GR8 dtsi
ARM: dts: sun8i: Move A23/A33 usbphy and usb_otg nodes to common dtsi
ARM: sun8i: a23/a33: Add RGB666 pins
ARM: sun8i: a33: Add display pipeline
ARM: sun8i: Convert the A23 and A33 to the CCU
ARM: dts: sun6i: switch A31/A31s to new CCU clock bindings
clk: sunxi-ng: Add hardware dependency
clk: sunxi-ng: Add A23 CCU
clk: sunxi-ng: Add A33 CCU support
clk: sunxi-ng: Add N-class clocks support
clk: sunxi-ng: mux: Add mux table macro
clk: sunxi-ng: div: Allow to set a maximum
clk: sunxi-ng: div: Add kerneldoc for the _ccu_div structure
clk: sunxi-ng: div: Add mux table macros
devicetree: Add vendor prefix for FriendlyARM
ARM: dts: sun8i: Add dts file for the NanoPi NEO SBC
ARM: dts: sun8i-q8-common: Add support for SDIO wifi controllers
ARM: dts: sun8i: Add dts file for the Orange Pi Plus2E SBC
ARM: dts: sun8i: Orange Pi Plus dts is for the Plus and Plus 2
...
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJX1xA0AAoJEEEQszewGV1z6X4QAMcgpRoBZu1sImOxzslHBO7e
MAqpbKczZwXVWxBLurQttIlIFL64jccLrmFNQ8Jurxkh/tKBlxNngtj0AlpSCiX8
qxfHhXymnIR3BRXvbXaGO7ddmPv3BXcThvKEAyKPBV7BBbHpWpBxgKbLiNG+ykrA
4kiJCtgmbKgUrdj2u5T7U5Ne+fHcspP4HFjzLPoVVapSkG21llOZK/GIj/lVZ63o
pNIMf95ut/+t9Vw5Wd+lCtAI3L2hYeK5K259mIo97yv1mDXVFuPZGcNFIK7F8UWF
pM6e3IftHQm/ALDgzBr3r+bI3CXGS8FySDeS5ds/Gwfp48fSkjIDh0R0wVmJZBJj
7FYGLnTESYQuQrF9D0cPJUemMu/lS2kqvxobiqqgPDoOy+RoWCeTXbhWeiokrVph
hWXfWm2VdvBsF3I/7/HuhttTekPosZ8XfUliw4XDSAc5Qvbf19AMckGtZ7KFPL8R
5s5oZBrLT2OADYboeIJgvnGydyym/JEBJ4vCHK6oy447mS/PgQGZh6Kie3eZIVkZ
wPddp3XQtz2Af2P9PqtpadBWOqn4xHiTUPF+4lrMvruXkURPzdcQdsLyOIKnVDge
P+Sbt0LHMzh776EdIp7mipQOaz3vlAKXFSW79eV+vwaG7LKbF48TajcjaGl6Ccmu
tJUB2mgz6LmkLVQnf+Jh
=C78b
-----END PGP SIGNATURE-----
Merge tag 'clcd-nomadik' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt
Pull "CLCD graphics on the Nomadik NHK15" from Linus Walleij:
* tag 'clcd-nomadik' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: add the CLCD LCD display to the NHK15
ARM: dts: add PMU to the NHK15 device tree
ARM: nomadik: select MFD_SYSCON
dt-bindings: Add TPO TPG110 binding
dt-bindings: add vendor TPO
ARM: dts: add STMPE PWM to the NHK15 device tree
- Add SoC support for i.MX7 Solo which is a reduced version of i.MX7
Dual.
- New board support: Gateworks Ventana i.MX6Q/DL GW553x, Inverse Path
i.MX53 USB armory, i.MX6Q/DL TS-4900 from Technologic Systems,
i.MX6UL GEA M6UL modules from Engicam, i.MX7 Solo Warp7 board.
- Add DMA and IPU CSI devices for i.MX53 SoC support.
- Refine i.MX7 Dual SoC DTS as a preparation of i.MX7 Solo support.
- Use of_graph dt nodes to describe the panel for vf610-colibri and
ls1021a-twr boards.
- Add gpio-ranges property to i.MX6 GPIO controllers, which will be
useful when GPIO driver is changed to request pad configuration as
GPIO function.
- Random device additions or small changes for various board support.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJX1lb5AAoJEFBXWFqHsHzOBI0H/1ynv4DnmCds1eBS8yjqYJnH
bM02BSwV2gwVQaDljTJCDNoDFMGM3aNjnWge1v4UsfIyDPploMCFi4ympPNsCx3w
VYB+TRQFG6WHIyd6lHBd+VqeTNgPz+LAhpdrNloZecUUIBlpD8i+8WpDw45ufE7b
A7jRIaFWnBjMEsUsG/To5PQDI17YwtkRaht2gq+3rwRdk2hbeVlg05JUcwn1+eBB
DnccJUTy4zZd09W7MRMRM2FejYCququCCfH4is8+1iVLVixwpjEKBHA2w8GatLtn
e8T+ie/FWIizlnK4Jadba1tcRmW8PlX6UAzgWjGia27G6deHQ1x/0YL9eqDsAP0=
=CNTd
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Pull "i.MX device tree changes for 4.9" from Shawn Guo:
- Add SoC support for i.MX7 Solo which is a reduced version of i.MX7
Dual.
- New board support: Gateworks Ventana i.MX6Q/DL GW553x, Inverse Path
i.MX53 USB armory, i.MX6Q/DL TS-4900 from Technologic Systems,
i.MX6UL GEA M6UL modules from Engicam, i.MX7 Solo Warp7 board.
- Add DMA and IPU CSI devices for i.MX53 SoC support.
- Refine i.MX7 Dual SoC DTS as a preparation of i.MX7 Solo support.
- Use of_graph dt nodes to describe the panel for vf610-colibri and
ls1021a-twr boards.
- Add gpio-ranges property to i.MX6 GPIO controllers, which will be
useful when GPIO driver is changed to request pad configuration as
GPIO function.
- Random device additions or small changes for various board support.
* tag 'imx-dt-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (41 commits)
ARM: dts: add gpio-ranges property to iMX GPIO controllers
ARM: dts: imx35: add iim module to imx35.dtsi
ARM: dts: vf610-colibri: use of_graph dt nodes to describe the panel
ARM: dts: ls1021a: Add of_graph dt nodes to describe the panel
ARM: dts: imx53: add support for USB armory board
devicetree: Add vendor prefix for Inverse Path
ARM: dts: imx7s-warp: Add Bluetooth support
ARM: dts: imx7s-warp: Add User Button support
ARM: dts: imx7s-warp: Enable I2C2 device support
ARM: dts: imx6ul-geam: Add Engicam IMX6UL GEA M6UL initial support
ARM: dts: imx6ul iomuxc syscon is compatible to imx6q
ARM: dts: imx7-colibri: add Audio support
ARM: dts: imx7-colibri: add basic supply regulators
ARM: dts: imx7-colibri: move SD-card to module level
ARM: dts: imx6sx: Add GPU bindings
ARM: dts: imx7s-warp: Let the codec control MCLK pinctrl
ARM: dts: imx6ul-pico-hobbit: Use WDOG_B pin reset
ARM: dts: imx6q-bx50v3: configure unused pca953x pins
ARM: dts: imx6sx: document SION necessity of ENET1_REF_CLK1
ARM: dts: imx7s-warp: Use WDOG_B pin reset
...
Split the DTS files in per-revision variants
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJX0rCKAAoJEEEQszewGV1zfxkQAKYtCbDqM84kQjk6ac4iUGVQ
/04ZFQ/GDa8M2KycEe5Zh1UzEdwX0ErKZpjdHVujZwC5TS+eDvzrqnvdmtq/Ef5F
NwbI+17tQTqgW+/uSL5u0E7b00Jd9XqEeQILlZxwAn8fl2iy5DYBVHmgx8/cGNzr
MRf+Kd+kJuC5PwSIuIP+yEGePZAVrAwcz5oHHuPUWSnT//VvM7vF49wO249TJXIq
wOa/u2cQclIPl58jCHd0LL7mfst/3bHTT+erjoGmEwRuKCFopYE/sgrkoVbI0vuL
oFI/MsXUP5y5IIziNL5PPhQPiZFO4fjnzdFda4EFj1r69uv50pIEztAK45o410Us
1ES/aEEWvYDiVY9wnUsZXjkQY0NUIxASvNkeBrzNrqR/XGLxNL5JcwsLEJJMUr35
bIhMKfoLEGjLsTcctDZJon15fp+eNnbS+usGNat2n94/Rmdaxl7OvorRhgpPyx37
T90gw0b9BmAUXlR8C4V6eY2z5LnD5NipcPXN2SZk8pASP/PAdM2Zwi8URUPmTEIG
M4R8LJKWHUleALmR1L67wQ+U/WwgfVpBpKKFaguYIcXsWirs2QHwfpEPDo0ppMhw
m3wA4bEErblRuMy0kEMMBXim1zxt3K9rvZmafHvHpIyHstcZPQL/SFeHdDVk5XV9
DsgQnyN5zcuCt3ditKlx
=BnYS
-----END PGP SIGNATURE-----
Merge tag 'realview-dts-split' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/dt
Pull "RealView DTS file fixup and split" from Linus Walleij:
Fix the ethernet issue on revision D of the RealView EB
Split the DTS files in per-revision variants
* tag 'realview-dts-split' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: dts: add RealView EB rev D A9 MPCore variant
ARM: dts: split RealView EB 11MPCore variants
ARM: dts: add device tree for the RealView EB Rev D
ARM: dts: fix RealView EB SMSC ethernet version
Contains a couple of cleanups for Tegra114 device trees.
-----BEGIN PGP SIGNATURE-----
iQIwBAABCAAaBQJX0tEvExx0cmVkaW5nQG52aWRpYS5jb20ACgkQ3SOs138+s6EL
oxAApNxkPaZJdkbJ5W1NE/laLuXANEV2KCGIqY0li7/WBDwvypjcPb851/ZsFqJG
pcLej2bZ6hvMUztAikiO0Re2fnlLwujPY0grbQbLUkkUDeekh+iqbLC57a7ENo+N
sag7avHlMBSzx2tUFCII+Wy+TLdSNd2S6zlh7DRWYYeCticjWTI9BL6oAqwQ0fG4
2AM2JbHZwSo3cqb3UJnHQFpwyuwx6aiuJpsx+R3o1AR2uyfMJjW5KqCF0ujG2RDU
FKf354FP2d86B40q+3c8ipWMjtER3aP5AUJHpYtIiC+HVJJnEgo/hVrc88PvfHcb
dm55mM/eZyA5hRKUfDBF2hFU2oQx5m9t8+weAX82YQYMArQF1TEbhPGWNv+rPQZh
eTxTxKGgkDN7sWwsd51jgJXt+cIlJOwbI2xcTINKpBOJKrQcaRr7YsF1jwcXSKzw
BUAUxhzHho4oOiuP63ZwHrHU5DG9vw8AB+eySrbQ8O7BTKqq2MrKFiO/NR1zz0ea
nyMwjmduqYKT6nmeyRLe1F4BbwteMO82dCSCEyE7wRXOnAbFHwHFvQ/gRImQgMpY
TsxA929hNiqZKjMEpj35sazbRAo/VHkeBD/B5VvZcNbvzGGtqYc/5dPNB2ttf7Qt
FG7At8GEiLuNBe5JRceCIXaNSqrfChel7T6RqvQfkUKP+Po=
=K9Kg
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.9-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Pull "ARM: tegra: Device tree changes for v4.9-rc1" from Thierry Reding:
Contains a couple of cleanups for Tegra114 device trees.
* tag 'tegra-for-4.9-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Correct polarity for Tegra114 PMIC interrupt
ARM: tegra: Fix Tegra114 USB compatible values
and Firefly-reload), display support for the rk3288-evb, support for the
recently added firmware reboot-flag support and some housekeeping cleanups.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJX0WScAAoJEPOmecmc0R2BEycIAK7/5hV5kyeEA3vx1VaLoRH0
lFHMQyaucbqQCuAu6U6NBwyVGnirvd5HG+KRA34RncLfVT5Fnv81u43byKkaUI/I
8NH6l4FvcND76J1IIR6XZl8cGxaRCT1bkUgII4MFaMaQBxY19gbLCDuBVLVJEhK7
lUy7lG/6j/DvIwU0UevGdB/bdCPZ0WZ6n9InF4xIMJ6PJYI5/BctSpxfJr47hTjQ
a0z637dqXv08L7LRqVtXn+1tJZ6QJdHrtsEavGFOQEzl+n2rRFuBC63+v98h7WCc
1gnyfWbR+NMZOH13imBiOiK7Ap/F5Qm1uF5bfJhoJGbGazv5NcZqPlZ0CocrAXY=
=gktZ
-----END PGP SIGNATURE-----
Merge tag 'v4.9-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Pull "Rockchip dts32 changes for 4.9" from Heiko Stübner:
32bit Rockchip devicetree changes containing two new rk3288 boards (Fennec
and Firefly-reload), display support for the rk3288-evb, support for the
recently added firmware reboot-flag support and some housekeeping cleanups.
* tag 'v4.9-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Add sensor-supplies on PopMetal-RK3288 board
ARM: dts: rockchip: fix L3G4200D i2c address on PopMetal-RK3288 board
ARM: dts: rockchip: enable usbotg for Popemtal-rk3288 board
ARM: dts: rockchip: add missing regulators for firefly reload board
ARM: dts: rockchip: remove excess sd properties from firefly reload
ARM: dts: rockchip: add syscon-reboot-mode DT node
soc: rockchip: add reboot-mode header
ARM: dts: rockchip: move rk3288 usbphy under the GRF node
ARM: dts: rockchip: add rk3288-firefly-reload
ARM: dts: rockchip: add dts for RK3288-Fennec boards
ARM: dts: rockchip: add the panel power supply for rk3288-evb board with rk808 pmu
ARM: dts: rockchip: add the panel power supply for rk3288-evb board with act8846 pmu
ARM: dts: rockchip: add eDP/panel display device nodes for rk3288-evb
Business as usual on our side, with a mix of new boards and new IPs enabled
on boards:
- Support for the GPIO found on the AXP PMIC
- ESP8089 on the relevant boards
- More boards converted to the reference design and q8 designs
- New boards: Orange Pi PC Plus, Orange Pi 2, Orange Pi Plus 2E, Orange
Pi Lite, Olimex A33-Olinuxino, Empire Electronix M712, inet-d978_rev2,
Nano Pi Neo
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJX0G1eAAoJEBx+YmzsjxAglB8P/j3Z9WDnNVh5MFuvJpPvT5Sc
E4KiVmL5L5cHRAdJLS3sUTBCHzhv3iJZaHHmPVzRpDYwYL+XMieNpS7CknkD8Sct
h5LtPk4ukazsrx86TEeBQ1CCBkI2CqXVnD/v68FY8rbIKGPOk52lUrI3lhbuHT1w
XCSJj4SAMnHfmQWYE+eQpEYndWnMQCijdr3X2OuWl7WG+N+7d0h43QfA2GgR4Thv
jP/s43LBgMf+GnVLn8hMgI2XZCv/TK+9ZWiDrDDNRS1dwlDrkcKfS+gMOM0sMzON
tOs3OK4pLB37SQ4+7V3x8Vne7xWVmPXCr8gVYh1AZGLCpSGDNImNVDv9lvNiJiya
PxbAgGx5eEJ1J4oZ9httT0vp4IGmGew1ZeRIij35+bOECAvNJ09bjMFguaVv3Mv5
6vKXmbqW2j07TrneKZJMP5L9vheto1Z5AwWDAYDCmxHnkzXCyFNJ5oeo+lvg6EV5
YWme3WdmLZtcLDIuffa1mlZ5CrtkV+QPdv/SqE/LBhXTSWiPwTaQaqlr57/+/e4Y
fu2ECKBOP7Y3tanBHHJOMovX8rQ259TadmGOZWDh4bR/9CJ6J/OUWmYwvutBwVOc
n17g3erYtNQm6/buGpqFTRsT9/EL5zQESJt2x2/DZwOOUipBRkm23Jd0kz/q7juw
APAzF3rtbo20wld0ueMF
=3Q+E
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Pull "Allwinner DT changes for 4.9" from Maxime Ripard:
Business as usual on our side, with a mix of new boards and new IPs enabled
on boards:
- Support for the GPIO found on the AXP PMIC
- ESP8089 on the relevant boards
- More boards converted to the reference design and q8 designs
- New boards: Orange Pi PC Plus, Orange Pi 2, Orange Pi Plus 2E, Orange
Pi Lite, Olimex A33-Olinuxino, Empire Electronix M712, inet-d978_rev2,
Nano Pi Neo
* tag 'sunxi-dt-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (31 commits)
devicetree: Add vendor prefix for FriendlyARM
ARM: dts: sun8i: Add dts file for the NanoPi NEO SBC
ARM: dts: sun8i-q8-common: Add support for SDIO wifi controllers
ARM: dts: sun8i: Add dts file for the Orange Pi Plus2E SBC
ARM: dts: sun8i: Orange Pi Plus dts is for the Plus and Plus 2
ARM: dts: sun8i: Add PWM controller node in H3
ARM: dts: sun8i: Add dts file for inet-d978_rev2 tablets
ARM: dts: sun9i: Add missing #interrupt-cells to R_PIO pinctrl device node
ARM: dts: sun8i: Rename reference-design-tablet touchscreen node
ARM: dts: sun5i: Add dts file for the Empire Electronix M712 tablet
ARM: dts: sun5i: Convert inet-98v-rev2 dts to use reference-design-tablet.dtsi
ARM: dts: sun4i: Disable ohci1 on ba10-tv-box
ARM: dts: sun8i: Add dt node for esp8089 wifi chip on polaroid-mid2809
ARM: dts: sun8i: Add dt node for esp8089 wifi chip on polaroid-mid2407
ARM: dts: sun8i: add NAND controller node for A23/A33
ARM: dts: sun6i: Add new dts file for tablets using the inet-q972 PCB
ARM: dts: sun6i: Add sun6i-reference-design-tablet.dtsi
ARM: dts: sun6i: colorfly-e708-q1: Remove unused mma8452_int_e708_q1 node
ARM: dts: sun9i: Switch to the AC100 RTC clock outputs for osc32k
ARM: dts: sun9i: cubieboard4: Add device node for AC100
...
* Removal of skeleton.dtsi from the common armv7-m dtsi together
with lpc18xx and efm32 platforms.
* Fix for unit address warnings from the dtc on lpc18xx/efm32.
That is made possible with skeleton.dtsi gone.
-----BEGIN PGP SIGNATURE-----
iQEwBAABCAAaBQJXzyBlExxtYW5hYmlhbkBnbWFpbC5jb20ACgkQXnNIfj7+P9rV
UwgAvfI2Lv75gqxfLhbIeKeY5Mxms8KGTmGJFX/xAIb9vUynAuVPhDnoie+bvDtA
9lvJCAwL2pyrb5cyeofjq1lMscX8Ng6mSyrUZ+nhzZNXgNzPK0Z169gcLhugnNW5
mk4TACKstfiCVQxlB1xa4JHa4/8r8EJ2ouB3Fwd6Zi1OJfC9bU9FFIgjOxfIRhWn
W8swy5c1sufbUHnQbZeVCweCN4P6tAQN+bxaKgKawmWaVpCz/6jF/dRsD0zj8UHb
J2nBSjo1Vac25ET9bz5K0jjNOK9BdOcvgbxD/EDDYTwQCbouRpnv+uQctVSyY98n
2GIiX1Bk1W02NmKvXXQ/6RRz7g==
=uht9
-----END PGP SIGNATURE-----
Merge tag 'lpc18xx_dts_for_4.9_part2' of https://github.com/manabian/linux-lpc into next/dt
Pull "Device Tree clean up for LPC18xx platform" from Joachim Eastwood:
* Removal of skeleton.dtsi from the common armv7-m dtsi together
with lpc18xx and efm32 platforms.
* Fix for unit address warnings from the dtc on lpc18xx/efm32.
That is made possible with skeleton.dtsi gone.
* tag 'lpc18xx_dts_for_4.9_part2' of https://github.com/manabian/linux-lpc:
ARM: dts: efm32: remove skeleton.dtsi include and fix unit address warnings
ARM: dts: lpc18xx: remove skeleton.dtsi include and fix unit address warnings
ARM: dts: armv7-m: remove skeleton.dtsi include
- update for Armada XP/38x allowing using direct access SPI
- various improvement for Armada 39x platforms
- add pinctrl information for NANd on Armada 38x
- fix the kirkwood based Openblock A6 external GPIO pins
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlfMQ0gACgkQCwYYjhRyO9XZQgCfVtygCoGhhk2ou4huuBcWlutL
It0An1jM4iRF4RwgWtikxEV00Ovg4dJw
=LoDw
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-4.9-1' of git://git.infradead.org/linux-mvebu into next/dt
Pull "mvebu dt for 4.9 (part 1)" from Gregory CLEMENT:
- update for Armada XP/38x allowing using direct access SPI
- various improvement for Armada 39x platforms
- add pinctrl information for NANd on Armada 38x
- fix the kirkwood based Openblock A6 external GPIO pins
* tag 'mvebu-dt-4.9-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: mvebu: fix reference to a390 spi controller
ARM: dts: armada-38x: Add NAND pinctrl information
ARM: dts: kirkwood: Fix Openblock A6 external GPIO pins
ARM: dts: mvebu: armada-395-gp: add support for the Armada 395 GP Board
ARM: dts: mvebu: armada-390-db: add support for the Armada 390 DB board
ARM: dts: mvebu: armada-398-db: enable supported usb interfaces
ARM: dts: mvebu: armada-398: update the dtsi about missing interfaces
ARM: dts: mvebu: armada-395: add support for the Armada 395 SoC family
ARM: dts: mvebu: armada-39x: enable rtc for all Armada-39x SoCs
ARM: dts: mvebu: armada-39x: add missing nodes describing GPIO's
ARM: dts: mvebu: armada-39x: enable watchdog for all Armada-39x SoCs
ARM: dts: mvebu: armada-39x: enable the thermal sensor in Armada-39x SoCs
ARM: dts: mvebu: armada-39x: enable PMU, CA9 SoC Controller and Coherency fabric
ARM: dts: mvebu: armada-39x: update the SDHCI node on Armada 39x
ARM: dts: mvebu: armada-390: add missing compatibility string and bracket
ARM: dts: mvebu: a385-db-ap: add default partition description for NAND
ARM: dts: mvebu: a385-db-ap: enable USB (orion-ehci) port
ARM: dts: mvebu: armada-370-xp: Add MBus mappings for all SPI devices
ARM: dts: mvebu: A37x/XP/38x/39x: Move SPI controller nodes into 'soc' node
ARM: dts: mvebu: Add SPI1 pinctrl defines for Armada XP
As noted in commit 3ebee5a2e1 ("arm64: dts: kill skeleton.dtsi"),
there are a number of problems with skeleton.dtsi, and it would be
prefereable to remove it entirely. As there are a large number of
existing users, fixing these up will take a while.
This patch adds a note to arm's skeleton.dtsi noting that this is the
case, to make this more obvious and hopefully minimize new uptake of
skeleton.dtsi in the mean time.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Update elm phandle for am335x
- Fix overo NAND gpmc ranges, this has always been broken so it can
wait for the merge window
- Fix NAND and use NAND ready pin for logicpd gpmc, this can wait too
as it's been using the older configration since the dts got added
- A series of dtc warning fixes for unit names
- Keep dcdc3, 5 and 6 enabled during suspend on am347x boards
- Disable DDR regulator during rtc-only/poweroff mode for am437x boards
- Remove redundant regulator compatibles for am437x boards
- Increas QSPI max frequency for dra7 boards
- Enable QSPI for am57xx-idk-common
- Enable am335x-wega audio support
- Workaround for i845 for dra7
- Update binding for logicpd boards
- Add gpio-decoder nodes for am335x-icev2 board
- Add linux,pci-domain property for dra7
- Fix dra7 clock data gmac_gmii_ref_clk_div and related clock tree
entries, these can wait for merge window as Ethernet works on dra7
- A series of changes to drop skeleton.dtsi because of dtc warnings
-----BEGIN PGP SIGNATURE-----
iQIuBAABCAAYBQJXyErxERx0b255QGF0b21pZGUuY29tAAoJEBvUPslcq6VzEU0Q
ALfYnZ2/cNZ8ZkQ0jDLSxAOgb6SrXM5L6iUIYCyVuO6JP+lU88Zn0iQlB1wcD+e8
Gx87pnexDmPHznwrwWDyXqP6U89vJM9eBdUHoGIt8fr0On7DGQXAN1yrHN+N2kxa
y7DDePdu1InQM0oXeVqrKdSDNwnCMJpsdHOjmlB1bH83arrMOsG1bZZG3b5LgSTT
zJss1l3ipw2YJhkGheHCai6bClrko9z8OcbmSF4qogMDs19+QiC9AZ2lIwAF8czG
ll+/0Mwb9v0K4R/u+KZ9wC8tjz+Skitt0ffDSBpmP7ZBVJRRr5s3PxYDH6vSs+tM
zVNH2jy1SvnSpxJ3lpIis1WzMi2hr9X9iM3qTzRX5JE+wBGuas1CDVy5duQXtb4d
QRZWeHdQAX+x5MIRuVgYks6uDPHd6J6uXTlLNjASw5MRDSAGqnYv65BxYc+v5wyW
v0kj+yQk9ewiwIL3z0T4mJg04mO/hFh+G/B868Un/uafuxvoxEGH1TaSEz3j1Ow3
o1OGkxVWJj4N/tc7EP1EIqjFid6wAeu1eJdFkqv3zJjphOfKhToFg2T/5bUjbrFD
mlRyx3aOBxwbrkTUcSC5Qxy/q9DFT7kYm4RESk03zID2QTJmcTpwqNaYX6/jmVFT
xK7mWB4kyTkl/wC+/XJgLztsm79cDY0cWLDQd0zskyqU
=k+4W
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.9/dt-pt1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "DTS related changes for omaps for v4.9 merge window" from Tony Lindgren:
- Update elm phandle for am335x
- Fix overo NAND gpmc ranges, this has always been broken so it can
wait for the merge window
- Fix NAND and use NAND ready pin for logicpd gpmc, this can wait too
as it's been using the older configration since the dts got added
- A series of dtc warning fixes for unit names
- Keep dcdc3, 5 and 6 enabled during suspend on am347x boards
- Disable DDR regulator during rtc-only/poweroff mode for am437x boards
- Remove redundant regulator compatibles for am437x boards
- Increas QSPI max frequency for dra7 boards
- Enable QSPI for am57xx-idk-common
- Enable am335x-wega audio support
- Workaround for i845 for dra7
- Update binding for logicpd boards
- Add gpio-decoder nodes for am335x-icev2 board
- Add linux,pci-domain property for dra7
- Fix dra7 clock data gmac_gmii_ref_clk_div and related clock tree
entries, these can wait for merge window as Ethernet works on dra7
- A series of changes to drop skeleton.dtsi because of dtc warnings
* tag 'omap-for-v4.9/dt-pt1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (54 commits)
ARM: dts: dra7: Add missing unit name to memory nodes
ARM: dts: dra62x: Add missing unit name to memory nodes
ARM: dts: dm8168: Add missing unit name to memory nodes
ARM: dts: dm8148: Add missing unit name to memory nodes
ARM: dts: am572x: Add missing unit name to memory nodes
ARM: dts: am4372: Add missing unit name to memory nodes
ARM: dts: am3517: Add missing unit name to memory nodes
ARM: dts: am335x: Add missing unit name to memory nodes
ARM: dts: omap5: Add missing unit name to memory nodes
ARM: dts: omap4: Add missing unit name to memory nodes
ARM: dts: omap3: Add missing unit name to memory nodes
ARM: dts: omap2: Add missing unit name to memory nodes
ARM: dts: am4372: Remove skeleton.dtsi usage
ARM: dts: dra7: Remove skeleton.dtsi usage
ARM: dts: dm816x: Remove skeleton.dtsi usage
ARM: dts: dm814x: Remove skeleton.dtsi usage
ARM: dts: am33xx: Remove skeleton.dtsi usage
ARM: dts: omap5: Remove skeleton.dtsi usage
ARM: dts: omap4: Remove skeleton.dtsi usage
ARM: dts: omap3: Remove skeleton.dtsi usage
...
* Match DT names other projects and documents
* Switch over to PSCI
* Use clock/reset drivers
* Misc
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXxfueAAoJED2LAQed4NsGc5kP/ije++q5nQTiI3rQuvCx2SVW
XJmPY23UDMUpL/lArgJ+MFpTPMPLGfr7qGp+Dhqpdnfx84FJTO+KWtzF8bmz6t7k
DifWvpR453pmCJDKBp+IhQf/x6cY6oMz7xxbumydZRpGTJlM/ARq4taQEQ3ucEJm
nMAgwyo9yck5ZyzHsxs/eOW6Bw7W0YbvaBJhA5aqyCKK90d2Lc4yZ5D3z6eT9SvR
d3OdSm/epo1rI3XiCZbHJ+ZvmE28jG+RUxAzqEEXR/NfnZNN+pzAx/Eraz25XtZF
w6yA1CH3GBsve9T9DAy/xj8UFYQTq0nSENEctt+1AEXpP9Fk4QKdHEIRgf3pbpUs
BnOr/qZeDaI2yanxJ5sD5LTfXtrllxMQhXF+xL7DSUK7Ii85d+HFlC4Y/DWoGprG
3BEGJPLTMk7qaQ6XX6w+tRMFa9IjEyzedQzD/5OkZxBBBoUHOFvDwEJQOJOvlD+Q
nMkt/100ciXsP9GRbL3+fVjvGUQP7P4rEY7Qm/6XKBkE3vyE3VTB6MgxQO38LIhZ
XFGYwev/10VESRKp2Bk2YScLnyb/J5MZK5iM//MXoBULlRw4Gm5UO8xlZ92NL7ag
cPAufLP+fgjZrxwDy52tJ/gBIANORsUyevI044apKquvynUg63+uJp1mcD720REz
UzRZNQNSmULeBFPB3JvN
=E7B0
-----END PGP SIGNATURE-----
Merge tag 'uniphier-dt-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt
Merge "UniPhier ARM SoC DT updates for v4.9" from Masahiro Yamada:
* Match DT names other projects and documents
* Switch over to PSCI
* Use clock/reset drivers
* Misc
* tag 'uniphier-dt-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
ARM: dts: uniphier: add specific compatible to SoC-Glue node
ARM: dts: uniphier: use clock/reset controllers
ARM: dts: uniphier: switch over to PSCI
ARM: dts: uniphier: match DT names to other projects and documents
ARM: dts: uniphier: remove a whitespace after tabs
1. Set chosen serial bitrate which allows proper serial output when
bootloader does pass all the data in command line.
2. Cleanup.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXxUu4AAoJEME3ZuaGi4PXvHEP/jtgqI3x2AKqSeHZ67JVetvV
9mmRFcyOHavz7D0kutUnKxuHMAM6j/0CBVVJblbDrDz1MTtQc2O1q6aCqambwi8y
RW9Uckbn0WtA3VNKp+FlIe3nB7VBpBYwwdjCx9az5Z7SAO4S2eMKg3HAPNJPjphd
Dhu27NpwQlFOvmKkVvKRpJtXbLRL77ustSbQEGeKyVuT1flzKXe8rkwJI642V1Ur
lCcgIv8Hf5L5kREg9qvbRMVpFk5hIDTLIuPz9ToM5H3hjU7jGHz2DiAx/Ec9K5GJ
RihGgVFE4pQxQil9mlF8SDc8D326zgs760f8TbqVpdf1uT6FvbSWm75IbkZAlXZ3
Pyq5j+2Trx5fA3phi7L0Jz8yq04tXBRbHC15bTXE2X9d8l/djZopTtLCAUZkewFd
Mv2UicPMGDwkA5/QMvz38U2rhiAiNTgSBvj9Py5DmpyIfuwbJr+xZkKDedX5Vvc7
bDOPOg/+XOA6AOcmsK1Fsu2i9M6SZL9MuRtKq9hMsGmuZ8OB1TFqWiAHy/AusG2r
+/mKjXV2Xi/zF8tVJhfgKDNF+k9vsUT2v91TLH3gKO7FXEpdvXSoh5fCfid9GiSC
QznTz+t62e4r1utMzl37hf2lDtxOKH9/7xNM/1O2wPhVgw9pWP+slYqZLYNkSaLB
1PA1vrrYEGZ9grucSYE8
=8Yu8
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Merge "Samsung DeviceTree update for v4.9" from Krzysztof Kozlowski:
1. Set chosen serial bitrate which allows proper serial output when
bootloader does pass all the data in command line.
2. Cleanup.
* tag 'samsung-dt-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Use 'hpd-gpios' instead of 'hpd-gpio'
ARM: dts: exynos: Use stdout non-deprecated property and add serial options to Odroid XU/XU3/XU4
Small fix for the compatible string for the NXP SE97 I2C chip on the
Hitex Eval board from Guenter and a couple of additional DT properties
for the DWMAC that is need for correct operation.
-----BEGIN PGP SIGNATURE-----
iQEwBAABCAAaBQJXwaK1ExxtYW5hYmlhbkBnbWFpbC5jb20ACgkQXnNIfj7+P9pm
QggAtv1kaNAQoEliCaHtHOdBhpgTNZJoYUnUWUUuhl8fwpin3/b/c6NJyupACbJB
YN9zj4Ijus6veqdKSG/SyyLeiouJcNvL2azj2r7zlpt0qXeqBzmZx9iBRcLB4vK+
/mlTmdUVYAcnOINnasC5A007m8PbUKSIulDOFuER+IpR54gI5uYv8KaQpJ0POzJO
LcIlMr0HnzniRWNL5XniGmaILo5HUTNuKNvpZc1FW2TFaz+ICMQw7GfK+bM76dhD
ezegetPT+kjxYamQAl/JduWQ+PAmzW3vucy0c1wYr1NvHYEObHe8DKpWDJmjQMdz
coGmSgWNoXjFmg4wbQ2l1sqYSw==
=QuiX
-----END PGP SIGNATURE-----
Merge tag 'lpc18xx_dts_for_4.9' of https://github.com/manabian/linux-lpc into next/dt
Merge "Device Tree additions for LPC18xx platform" from Joachim Eastwood:
Small fix for the compatible string for the NXP SE97 I2C chip on the
Hitex Eval board from Guenter and a couple of additional DT properties
for the DWMAC that is need for correct operation.
* tag 'lpc18xx_dts_for_4.9' of https://github.com/manabian/linux-lpc:
ARM: dts: lpc18xx: configure dwmac properly
ARM: dts: lpc4350-hitex-eval: fix binding for SE97 i2c device
Use the cache settings that were determined to give best performance
on artpec-6 typical workloads.
Signed-off-by: Lars Persson <larper@axis.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Paul Mackerras writes:
The highlights are:
* Reduced latency for interrupts from PCI pass-through devices, from
Suresh Warrier and me.
* Halt-polling implementation from Suraj Jitindar Singh.
* 64-bit VCPU statistics, also from Suraj.
* Various other minor fixes and improvements.
The AES-CTR glue code avoids calling into the blkcipher API for the
tail portion of the walk, by comparing the remainder of walk.nbytes
modulo AES_BLOCK_SIZE with the residual nbytes, and jumping straight
into the tail processing block if they are equal. This tail processing
block checks whether nbytes != 0, and does nothing otherwise.
However, in case of an allocation failure in the blkcipher layer, we
may enter this code with walk.nbytes == 0, while nbytes > 0. In this
case, we should not dereference the source and destination pointers,
since they may be NULL. So instead of checking for nbytes != 0, check
for (walk.nbytes % AES_BLOCK_SIZE) != 0, which implies the former in
non-error conditions.
Fixes: 86464859cc ("crypto: arm - AES in ECB/CBC/CTR/XTS modes using ARMv8 Crypto Extensions")
Cc: stable@vger.kernel.org
Reported-by: xiakaixu <xiakaixu@huawei.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
defconfigs.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXvSdgAAoJEME3ZuaGi4PXnb0P/AzhZPDeMXtsZzXJXa30IM9E
Ha0/FWOYmYMNDUrQesndFJ1tgb766/8T6uZwHNUjgp1a4fdmgmFsgVVN3UPIhJgh
MjUu7qWymbTRYuQ3fyJ82zK7Dg9pREYA1hNFp+qHlUEeYSeGELqynHArXyy/ykLN
UkGhfkBvbwkuIgrlNQSqaIareieg4yx9oviCmJD91ea0yWSKLdazkH6BvhHo3t7d
oyAcT8p3s9/CDMJXpPZ4J0KrDvbTfS37pwzOr42bLeYIBjH7JAP/ti6y6HJoJXw7
d+YkuBkYkpC9RWxYaWiZzgkVJVdYvUC2b6a78hJElWPRwI/s9jO+DcVT7hHMZpLy
XkFavo+gBiE5Cvw9L2ikuHY1Y6+VT0/OB6X930Nq+nSDa6Xg09gJFp84oNm+xSSr
TQiB1uqZEYIQc8S5+dWehpZHAqtQKOD9EO8tEAT+R7OkA6wKjxUPV7ekpAVCbjai
Og72V6HoRNnnYra3nNJ9WwXuPAh04yZCMsL0zP9N5qxsUiGr3fFSqcKMYTpb1U8b
/0pYZWQ7dmab8EkyQByO71iGehrBp86zMRi5tfJokqzqfzbW7H+17KYUzH6D1pXY
FSYhps6x9SjG0bmr83LGtzlFWdErLKoymPoke/xdu2tlhu0mlgnj5Tm36yJag9AR
gmPg1VshohG2WVGHz6dE
=So6k
-----END PGP SIGNATURE-----
Merge tag 'samsung-defconfig-schedutil-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into pm-cpufreq-sched
The schedutil cpufreq governor will be switched from tristate to bool. Fix
defconfigs.
* tag 'samsung-defconfig-schedutil-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: multi_v7_defconfig: Don't attempt to enable schedutil governor as module
ARM: exynos_defconfig: Don't attempt to enable schedutil governor as module
Currently, when running on FVP, CPU 0 boots up with its BPR changed from
the reset value. This renders it impossible to (preemptively) prioritize
interrupts on CPU 0.
This is harmless on normal systems since Linux typically does not
support preemptive interrupts. It does however cause problems in
systems with additional changes (such as patches for NMI simulation).
Many thanks to Andrew Thoelke for suggesting the BPR as having the
potential to harm preemption.
Suggested-by: Andrew Thoelke <andrew.thoelke@arm.com>
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
is invoked at module load time, to get rid of the O(n^2) algorithm
that results in pathological load times of 10 seconds or more for
large modules on certain STB platforms
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQF8BAABCgBmBQJXxbknXxSAAAAAAC4AKGlzc3Vlci1mcHJAbm90YXRpb25zLm9w
ZW5wZ3AuZmlmdGhob3JzZW1hbi5uZXQ5Q0QyQTBEQTZBRDhGNzMzMDE3NUUyQkJD
MjM3MjA3RTk1NzRGQTdEAAoJEMI3IH6VdPp9Q7cH/jg3kSsKl/tt07AIUtQdW99/
mCCG8NXExi5sUi9L/0GXmQVSpOlitm2Cf6U3kOGoWA6uGyNr0mfAqtulMLIwerYN
r344ZZ6/SgKhIhpIHerteDFeeSJKGVsNmMsrqoStqKUa7/SV6waAnq38m2DYB8KX
iKhuPnsE0vOAypnf4MYtf8LARP1gSRNS5bfcO+S7+ySQDg3M02WEfkr/0n8jHwqT
tkuWxI3yspt3SrYLGCMFN+X4TFUueRWO+wv+hp2Y4yuFxoIKiOqauDmnZ8uyWAhO
GSAI9dhhEW4X2Wo8EpSAuM8B+TxVzYfy2wS0ziwVrPuulRvxkSvpmAyIu2wgGcw=
=kOZH
-----END PGP SIGNATURE-----
Merge tag 'arm-plt-optimizations-for-v4.9' of git://git.linaro.org/people/ard.biesheuvel/linux-arm into devel-stable
This series of 4 patches optimizes the ARM PLT generation code that
is invoked at module load time, to get rid of the O(n^2) algorithm
that results in pathological load times of 10 seconds or more for
large modules on certain STB platforms
Add the required PCMCIA clock for the SA1111 "1800" device. This clock
is used to compute timing information for the PCMCIA interface in the
SoC device, rather than the SA1111. Hence, the provision of this clock
is a convenience for the driver and does not reflect the hardware, so
this must not be copied into DT.
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Accidentally booting Collie on Assabet reveals that the locomo driver
incorrectly overwrites gpio-sa1100's chip data for its parent interrupt,
leading to oops in sa1100_gpio_unmask() and sa1100_update_edge_regs()
when "gpio: sa1100: convert to use IO accessors" is applied. Fix locomo
to use the handler data rather than chip data for its parent interrupt.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The cachepolicy variable gets initialized using a masked pmd
value. So far, the pmd has been masked with flags valid for the
2-page table format, but the 3-page table format requires a
different mask. On LPAE, this lead to a wrong assumption of what
initial cache policy has been used. Later a check forces the
cache policy to writealloc and prints the following warning:
Forcing write-allocate cache policy for SMP
This patch introduces a new definition PMD_SECT_CACHE_MASK for
both page table formats which masks in all cache flags in both
cases.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
SA1111 PCMCIA was broken when PCMCIA switched to using dev_pm_ops for
the PCMCIA socket class. PCMCIA used to handle suspend/resume via the
socket hosting device, which happened at normal device suspend/resume
time.
However, the referenced commit changed this: much of the resume now
happens much earlier, in the noirq resume handler of dev_pm_ops.
However, on SA1111, the PCMCIA device is not accessible as the SA1111
has not been resumed at _noirq time. It's slightly worse than that,
because the SA1111 has already been put to sleep at _noirq time, so
suspend doesn't work properly.
Fix this by converting the core SA1111 code to use dev_pm_ops as well,
and performing its own suspend/resume at noirq time.
This fixes these errors in the kernel log:
pcmcia_socket pcmcia_socket0: time out after reset
pcmcia_socket pcmcia_socket1: time out after reset
and the resulting lack of PCMCIA cards after a S2RAM cycle.
Fixes: d7646f7632 ("pcmcia: use dev_pm_ops for class pcmcia_socket_class")
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The polarity of the high IRQs was being calculated using
SA1111_IRQMASK_HI(), but this assumes a Linux interrupt number, not a
hardware interrupt number. Hence, the resulting mask was incorrect.
Fix this.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Ensure that we propagate the platform_get_irq() error code out of the
probe function. This allows probe deferrals to work correctly should
platform_get_irq() not be able to resolve the interrupt in a DT
environment at probe time.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The GR8-EVB is a small board with an NextThing GR8, an Hynix MLC NAND,
an AXP209 PMIC, USB host and OTG, an SPDIF output and a connectors for CSI,
I2S and LCD.
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The GR8 is an SoC made by Nextthing loosely based on the sun5i family.
Since it's not clear yet what we can factor out and merge with the A10s and
A13 support, let's keep it out of the sun5i.dtsi include tree. We will
figure out what can be shared when things settle down.
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Switch the jornada720 touchscreen driver to obtain its gpio from
the platform device via gpiolib and derive the interrupt from the
GPIO, rather than via a hard-coded interrupt number obtained from
the mach/irqs.h and mach/hardware.h headers.
Tested-by: Adam Wysocki <armlinux@chmurka.net>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
The usbphy and usb_otg nodes in the A23 and A33 dts files only differ
by compatible, and for the usbphy, the size of one of its register
regions.
Move all the common bits to the A23/A33 common dtsi file.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The LCD output needs to be muxed. Add the proper pinctrl node.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Now that we have support for the CCU driver in sunxi-ng, convert the A23
and A33 DTs to that driver.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Now that we have a different clock representation, switch to it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This adds the TPG110 TDO43MTEA2 24-bit RGB LCD panel and sets
up the Nomadik device tree to activate the CLCD and connect it
to this panel.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The so-called Nomadik Power Mangament Unit is actually a set
of some power management registers and some miscellaneous
system control stuff like muxing of entire hardware units.
Add this as a system controller.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Since the Power Management Unit is using syscon to access a
set of necessary hardware muxing, let's select MFD_SYSCON for
the Nomadik subarchitecture.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Since its initial commit, the driver is buggy for multiple interrupts
handling. The translation from the former lubbock.c file was not
complete, and might stall all interrupt handling when multiple
interrupts occur.
This is especially true when inside the interrupt handler and if a new
interrupt comes and is not handled, leaving the output line still held,
and not creating a transition as the GPIO block behind would expect to
trigger another cplds_irq_handler() call.
For the record, the hardware is working as follows.
The interrupt mechanism relies on :
- one status register
- one mask register
Let's suppose the input irq lines are called :
- i_sa1111
- i_lan91x
- i_mmc_cd
Let's suppose the status register for each irq line is called :
- status_sa1111
- status_lan91x
- status_mmc_cd
Let's suppose the interrupt mask for each irq line is called :
- irqen_sa1111
- irqen_lan91x
- irqen_mmc_cd
Let's suppose the output irq line, connected to GPIO0 is called :
- o_gpio0
The behavior is as follows :
- o_gpio0 = not((status_sa1111 & irqen_sa1111) |
(status_lan91x & irqen_lan91x) |
(status_mmc_cd & irqen_mmc_cd))
=> this is a N-to-1 NOR gate and multiple AND gates
- irqen_* is exactly as programmed by a write to the FPGA
- status_* behavior is governed by a bi-stable D flip-flop
=> on next FPGA clock :
- if i_xxx is high, status_xxx becomes 1
- if i_xxx is low, status_xxx remains as it is
- if software sets status_xxx to 0, the D flip-flop is reset
=> status_xxx becomes 0
=> on next FPGA clock cycle, if i_xxx is high, status_xxx becomes
1 again
Fixes: fc9e38c0f4 ("ARM: pxa: lubbock: use new pxa_cplds driver")
Reported-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
The init_irq and handle_irq can be declared through standard irqchip
declaration and are not necessary in machine descriptions.
This is another step towards the generic kernel for the pxa
architecture.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Arnd Bergmann <arnd@arndb.de>
* A multiplication for the size determination of a memory allocation
indicated that an array data structure should be processed.
Thus use the corresponding function "kmalloc_array".
This issue was detected by using the Coccinelle software.
* Replace the specification of a data type by a pointer dereference
to make the corresponding size determination a bit safer according to
the Linux coding style convention.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Magician has GPIO117_I2C_SCL and GPIO118_I2C_SDA pins declared twice.
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
The commit 9bf448c66d ("ARM: pxa: use generic gpio operation instead of
gpio register") from Oct 17, 2011, leads to the following static checker
warning:
arch/arm/mach-pxa/spitz_pm.c:172 spitz_charger_wakeup()
warn: double left shift '!gpio_get_value(SPITZ_GPIO_KEY_INT)
<< (1 << ((SPITZ_GPIO_KEY_INT) & 31))'
As Dan reported, the value is shifted three times :
- once by gpio_get_value(), which returns either 0 or BIT(gpio)
- once by the shift operation '<<'
- a last time by GPIO_bit(gpio) which is BIT(gpio)
Therefore the calculation lead to a chained or operator of :
- (1 << gpio) << (1 << gpio) = (2^gpio)^gpio = 2 ^ (gpio * gpio)
It is be sheer luck the former statement works, only because each gpio
used is strictly smaller than 6, and therefore 2^(gpio^2) never
overflows a 32 bits value, and because it is used as a boolean value to
check a gpio activation.
As the xxx_charger_wakeup() functions are used as a true/false detection
mechanism, take that opportunity to change their prototypes from integer
return value to boolean one.
Fixes: 9bf448c66d ("ARM: pxa: use generic gpio operation instead of
gpio register")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Cc: Joe Perches <joe@perches.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
With the introduction of critical-clock support in v4.8, our developers'
default configuration is to run with 'clk_ignore_unused' removed. This
patch-set ensures they can achieve successful boot when a) booting from
an SD Card and when b) booting using USB->Eth adaptors for NFS booting.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJX0XH9AAoJEMrHeC97M/+mKo4QAJLsI+dcHn5vAhX8wqL0r2HJ
n2T0g8zCUZ+WkDybdgicRTfvhC59GZJ7x6T6i9I9iTNOzAifXGFnagdxzf9crUJ4
bMKP6RKNVNFWzaKE1Xt/gMGCGneLIv63ALhxNxcC8eDT49ws0qXqfP21NTXH1AVi
lFf238pEHpOV324lnziN879cpz/T8ZlYa61KCx+d5Od+xkzm5XBzLH8ZxzOAAKFY
WjgER1j3BZwDZhbsT03Z6F3TiiLrDwBKiARe7ccHnIwfdt0Mk4kjSznMZw4ZIH4d
2V/Rj0Id/MqBrODiw2EXyjA6YPCqJfr3y4wh+15AI+XUCfWEEWsrRfJvBxabFduJ
1pK3WjvEqZXCUE1ow6fUZ9bsVPNiGxSGKcdhI10CgEAuOBgbzBqQyTIty4hCGdn3
4k6Jpk1tXeOZC4Uzq9B28eL1viipyo0uOJdKNHEzXaah9QnwGQgD0spIhvKV4/TY
C3Ov+3eON0sUET4f/XCziNGi+1gF4YUOw0V6iX3rHT1UtDtRvGDznjS125wew1Xp
OXFINmYU3J6o8InF+SvPwfTbeZZBXlqJ/Q5EPFDHGe5q/cYF8wDvU4yTWeNzqjNj
ZOCcKakLZtiq4HfsbeUKX8m64hi+bFmsTIfTj99EgyB/PeCnoWnmHLM/cf94nDTf
Ltjajd2G8NPvzfeyp/Ys
=lGFr
-----END PGP SIGNATURE-----
Merge tag 'sti-dt-fixes-for-v4.8-rcs' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into fixes
Pull "Handle STiH410 interconnect clock required for EHCI/OHCI and SDHCI" from Patrice Chotard:
With the introduction of critical-clock support in v4.8, our developers'
default configuration is to run with 'clk_ignore_unused' removed. This
patch-set ensures they can achieve successful boot when a) booting from
an SD Card and when b) booting using USB->Eth adaptors for NFS booting.
* tag 'sti-dt-fixes-for-v4.8-rcs' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti:
ARM: dts: STiH407-family: Provide interconnect clock for consumption in ST SDHCI
ARM: dts: STiH410: Handle interconnect clock required by EHCI/OHCI (USB)
This file is included from DTS files under arch/arm64 too (via
broadcom/bcm2837-rpi-3-b.dts and broadcom/bcm2837.dtsi). There is a desire
not to have skeleton.dtsi for ARM64. See commit 3ebee5a2e1 ("arm64: dts:
kill skeleton.dtsi") for rationale for its removal.
As well as the addition of #*-cells also requires adding the device_type to
the rpi memory node explicitly.
Note that this change results in the removal of an empty /aliases node from
bcm2835-rpi-a.dtb and bcm2835-rpi-a-plus.dtb. I have no hardware to check
if this is a problem or not.
It also results in some reordering of the nodes in the DTBs (the /aliases
and /memory nodes come later). This isn't supposed to matter but, again,
I've no hardware to check if it is true in this particular case.
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Frank Rowand <frowand.list@gmail.com>
Cc: Eric Anholt <eric@anholt.net>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Lee Jones <lee@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-rpi-kernel@lists.infradead.org
Cc: arm@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull ARM fixes from Russell King:
"A few ARM fixes:
- Robin Murphy noticed that the non-secure privileged entry was
relying on undefined behaviour, which needed to be fixed.
- Vladimir Murzin noticed that prov-v7 fails to build for MMUless
configurations because a required header file wasn't included.
- A bunch of fixes for StrongARM regressions found while testing
4.8-rc on such platforms"
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: sa1100: clear reset status prior to reboot
ARM: 8600/1: Enforce some NS-SVC initialisation
ARM: 8599/1: mm: pull asm/memory.h explicitly
ARM: sa1100: register clocks early
ARM: sa1100: fix 3.6864MHz clock
By using a common attr_groups array, the common arm_pmu code can set up
common files (e.g. cpumask) for us in subsequent patches.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
The Cortex A9 MPCore tile can be mounted on top of the revision
D variant of the RealView EB, so create another variant of the
DTS file for this.
arm-realview-eb-a9mp = mounted on pre-revision D baseboard
arm-realview-eb-a9mp-bbrevd = mounted on the revision D baseboard
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
There used to be two versions of the RealView EB 11MPCore:
- arm-realview-eb-11mp.dts: the most common variant supported by
QEMU with the revision C core tile
- arm-realview-eb-revb.dts: for the variant with the elder revision
B core tile.
As it turns out that there are also a few variants of the
baseboard, unrelated to the coretile, and that these can of
course be mounted on top of each other in all permutations, we
create:
- arm-realview-eb-11mp.dts: the most common variant supported by
QEMU with the pre-revision D baseboard and the revision C core
tile.
- arm-realview-eb-11mp-bbrevd.dts: the revision D baseboard
with the common revision C core tile.
- arm-realview-eb-11mp-ctrevb.dts: the pre-revision D baseboard
with the revision B core tile.
- arm-realview-eb-11mp-bbrevd-ctrevb.dts: the revision D baseboard
with the revision B core time.
Or as a table:
| Core tile: C | Core tile: B
-----------+----------------------------+-----------------------------------
Baseboard: | |
pre-D |arm-realvie-eb-11mp | arm-realview-eb-11mp-ctrevb
-----------+----------------------------+-----------------------------------
Baseboard: | |
D |arm-realview-eb-11mp-bbrevd | arm-realview-eb-11mp-bbrevd-ctrevb
-----------+----------------------------+-----------------------------------
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The RealView EB baseboard revision D is a special case as it appears
to be undocumented in ARM official documents, while the Linux kernel
still contains special code for handling it.
commit be4f3c8691
"Add RealView/EB support for the LAN9118 Ethernet chip"
adds support for the SMSC LAN9118 chip used on the D revision of
the baseboard, but no other traces of hardware deviations for this
variant can be found.
This creates a separate top-level .dts file especially for this
board version, so that it gets registered with the right type
of ethernet controller. The ethernet controller modifications
are then put into a separate .dtsi file so it can be overlaid
on other EB variants using the revision D baseboard.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The ethernet version in the earlier RealView EB variants is
LAN91C111 and not LAN9118 according to ARM DUI 0303E
"RealView Emulation Baseboard User Guide" page 3-57.
Make sure that this is used for the base variant of the board.
As the DT bindings for LAN91C111 does not specify any power
supplies, these need to be deleted from the DTS file.
Fixes: 2440d29d2a ("ARM: dts: realview: support all the RealView EB board variants")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
On arm/arm64, we depend on the kvm_unmap_hva* callbacks (via
mmu_notifiers::invalidate_*) to unmap the stage2 pagetables when
the userspace buffer gets unmapped. However, when the Hypervisor
process exits without explicit unmap of the guest buffers, the only
notifier we get is kvm_arch_flush_shadow_all() (via mmu_notifier::release
) which does nothing on arm. Later this causes us to access pages that
were already released [via exit_mmap() -> unmap_vmas()] when we actually
get to unmap the stage2 pagetable [via kvm_arch_destroy_vm() ->
kvm_free_stage2_pgd()]. This triggers crashes with CONFIG_DEBUG_PAGEALLOC,
which unmaps any free'd pages from the linear map.
[ 757.644120] Unable to handle kernel paging request at virtual address
ffff800661e00000
[ 757.652046] pgd = ffff20000b1a2000
[ 757.655471] [ffff800661e00000] *pgd=00000047fffe3003, *pud=00000047fcd8c003,
*pmd=00000047fcc7c003, *pte=00e8004661e00712
[ 757.666492] Internal error: Oops: 96000147 [#3] PREEMPT SMP
[ 757.672041] Modules linked in:
[ 757.675100] CPU: 7 PID: 3630 Comm: qemu-system-aar Tainted: G D
4.8.0-rc1 #3
[ 757.683240] Hardware name: AppliedMicro X-Gene Mustang Board/X-Gene Mustang Board,
BIOS 3.06.15 Aug 19 2016
[ 757.692938] task: ffff80069cdd3580 task.stack: ffff8006adb7c000
[ 757.698840] PC is at __flush_dcache_area+0x1c/0x40
[ 757.703613] LR is at kvm_flush_dcache_pmd+0x60/0x70
[ 757.708469] pc : [<ffff20000809dbdc>] lr : [<ffff2000080b4a70>] pstate: 20000145
...
[ 758.357249] [<ffff20000809dbdc>] __flush_dcache_area+0x1c/0x40
[ 758.363059] [<ffff2000080b6748>] unmap_stage2_range+0x458/0x5f0
[ 758.368954] [<ffff2000080b708c>] kvm_free_stage2_pgd+0x34/0x60
[ 758.374761] [<ffff2000080b2280>] kvm_arch_destroy_vm+0x20/0x68
[ 758.380570] [<ffff2000080aa330>] kvm_put_kvm+0x210/0x358
[ 758.385860] [<ffff2000080aa524>] kvm_vm_release+0x2c/0x40
[ 758.391239] [<ffff2000082ad234>] __fput+0x114/0x2e8
[ 758.396096] [<ffff2000082ad46c>] ____fput+0xc/0x18
[ 758.400869] [<ffff200008104658>] task_work_run+0x108/0x138
[ 758.406332] [<ffff2000080dc8ec>] do_exit+0x48c/0x10e8
[ 758.411363] [<ffff2000080dd5fc>] do_group_exit+0x6c/0x130
[ 758.416739] [<ffff2000080ed924>] get_signal+0x284/0xa18
[ 758.421943] [<ffff20000808a098>] do_signal+0x158/0x860
[ 758.427060] [<ffff20000808aad4>] do_notify_resume+0x6c/0x88
[ 758.432608] [<ffff200008083624>] work_pending+0x10/0x14
[ 758.437812] Code: 9ac32042 8b010001 d1000443 8a230000 (d50b7e20)
This patch fixes the issue by moving the kvm_free_stage2_pgd() to
kvm_arch_flush_shadow_all().
Cc: <stable@vger.kernel.org> # 3.9+
Tested-by: Itaru Kitayama <itaru.kitayama@riken.jp>
Reported-by: Itaru Kitayama <itaru.kitayama@riken.jp>
Reported-by: James Morse <james.morse@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Add the hva (multi-format video encoder for STMicroelectronics SoC)
dt nodes for the hva device, defining register address, interrupt
and clock.
Signed-off-by: Jean-Christophe TROTIN <jean-christophe.trotin@st.com>
To establish a connection between GPIO controllers and pin multiplexor
controller add gpio-ranges properties to all GPIO controllers found
on iMX50, iMX6Q/D, iMX6DL/S, iMX6SL, iMX6SX, iMX6UL and iMX7D/S
SoCs. The change was done after human parsing of output from
% gawk -n '{ sub(/.*__/, ""); if ($1 ~ "^GPIO") print $1, $2/4}' imxXX-pinfunc.h | sort -n
Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This is a prerequisite to remove the static mappings for imx35 devicetree
based machines.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This is a slightly larger batch of fixes that we've been sitting on a few
-rcs. Most of them are simple oneliners, but there are two sets that are
slightly larger and worth pointing out:
- A set of patches to OMAP to deal with hwmod for RTC on am33xx (beaglebone
SoC, among others). It's the only clock that ever has a valid offset of 0,
so a new flag needed introduction once this problem was discovered.
- A collection of CCI fixes for performance counters discovered once people
started using it on X-Gene CPUs.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJX0OnNAAoJEIwa5zzehBx3C80P/3Adca+87uQPI57AWJL7TIU3
i9YAf1povBg/u5PHn2XiNj2gBeYtDL6vKTbca9zDX/ezSPaGFAp1nPsUG3m4yKLG
0FjkNRan+FvFoi195TxANrBeYE39/ZNWJCsPn01+2Q2EsYnlCn9wsFglxTQGObsN
MI2rgYVxabdJC8TO5WuGUdJEa9TynU65fdqdD+KR+DfA8yOyu9wZEmE1JuHprUCQ
H2MYYHHFZD5Y41/Y/SvdDVprCOd8lq8Syt7Vk1O6pQKQSGgojgGn36YJeBIapnOy
4y1/FFqoRe5FwSbt934q/4P/QpHwnGvIFi0edS+Reb6/3gUWRchQ8Dt1I1C/2QoJ
J+7KQKR4SBSiu6LnsP8gNOAqulpyGzwE2aHBVD1mpbPIynA7G5MfI1pEJw4nVvFQ
rAlBmuVzjaysuhKAdM32fd34dVwQljDiqh4qWtk0hbgjyPpdxT7QjIwSCR6vfbzo
toOKQ2eiIqF+syOAnXbpPSmtaURavxvBim4DEXQfVHUbFHVErZ5zHmwGWjDc5vLT
WixQ62hilHc08pcalY31RF3k21GwBXBVDf6clQ/9TDCErlCAlpjyN0/4ZrRpcYwz
NHpFdbBNLzW0VJ0gHtwb+Xz4qgcUneTxXDUTaU46MYRquML/uqXMFrkJUQEOq1h5
nPGe55ItupK8REaMCJv/
=8pPd
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"This is a slightly larger batch of fixes that we've been sitting on a
few -rcs. Most of them are simple oneliners, but there are two sets
that are slightly larger and worth pointing out:
- A set of patches to OMAP to deal with hwmod for RTC on am33xx
(beaglebone SoC, among others). It's the only clock that ever has
a valid offset of 0, so a new flag needed introduction once this
problem was discovered.
- A collection of CCI fixes for performance counters discovered once
people started using it on X-Gene CPUs"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (37 commits)
arm-cci: pmu: Fix typo in event name
Revert "ARM: tegra: fix erroneous address in dts"
ARM: dts: imx6qdl: Fix SPDIF regression
ARM: imx6: add missing BM_CLPCR_BYPASS_PMIC_READY setting for imx6sx
ARM: dts: imx7d-sdb: fix ti,x-plate-ohms property name
ARM: dts: kirkwood: Fix PCIe label on OpenRD
ARM: kirkwood: ib62x0: fix size of u-boot environment partition
bus: arm-ccn: make event groups reliable
bus: arm-ccn: fix hrtimer registration
bus: arm-ccn: fix PMU interrupt flags
ARM: tegra: Correct polarity for Tegra114 PMIC interrupt
MAINTAINERS: add tree entry for ARM/UniPhier architecture
ARM: sun5i: Fix typo in trip point temperature
MAINTAINERS: Switch to kernel.org account for Krzysztof Kozlowski
ARM: imx6ul: populates platform device at .init_machine
bus: arm-ccn: Add missing event attribute exclusions for host/guest
bus: arm-ccn: Correct required arguments for XP PMU events
bus: arm-ccn: Fix XP watchpoint settings bitmask
bus: arm-ccn: Do not attempt to configure XPs for cycle counter
bus: arm-ccn: Fix PMU handling of MN
...
The fsl,panel property is deprecated and we should use the new
of_graph dt bindings to describe the relationship between the DCU
controller and the panel.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx6ul soc code gained support for cpuidle, but that causes
a link failure if CONFIG_SOC_IMX6SX is disabled:
arch/arm/mach-imx/mach-imx6ul.o: In function `imx6ul_init_late':
mach-imx6ul.c:(.init.text+0xc): undefined reference to `imx6sx_cpuidle_init'
This adds the file containing the imx6sx_cpuidle_init function
to the kernel for 6ul-only configurations.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 547e8f5269 ("ARM: imx: add cpuidle support for i.mx6ul")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
add of_graph dt nodes to describe the panel, and removed
"fsl,panel" property
Signed-off-by: Meng Yi <meng.yi@nxp.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The STiH4{07,10} platform contains some interconnect clocks which are used
by various IPs. If this clock isn't handled correctly by ST's EHCI/OHCI
drivers, their hub won't be found, the following error be shown and the
result will be non-working USB:
[ 97.221963] hub 2-1:1.0: hub_ext_port_status failed (err = -110)
Cc: stable@vger.kernel.org
Tested-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
- lazy enablement of runtime instrumentation
- up to 255 CPUs for nested guests
- rework of machine check deliver
- cleanups/fixes
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.14 (GNU/Linux)
iQIcBAABAgAGBQJX0VHHAAoJEBF7vIC1phx88QwP/ir7L15bHPLUtdqwQn95yjzK
wlMTSekOrvbXImEKMh7nizMN76WI2nee1NvRe3pNf6Uc0Ntwiyzr7d2wQwX6L8Fn
D+28Crx3v/X3wGSLWdCf/17tuOUjVVMLhRHAIX4K+bl88L6NoMN2lsuXSAq7Fp7I
/CiXTGjHnF2eVL41e6p5oIRJvNaIfX3DlvRgfYc3TVrJum4tXcfCCMGWaXASarIW
g/q/q7s3iNbaLPrgb5rhQ2XY6puTTrot4whW7hXWsNWEW0r3MuwjOtxoy1VCMBeI
5PiCSqByYf7c6O5hqu4VClhalB76q43LQLY55/WLnuljJfru7Koiy9zxpnE0zTii
VnesQZv7emI1HYd4UbZkwo1LdE0o67I1dWucQx2yrqRpRvx6K/0VvvWH/Z4Y8N1Z
B6DQdvn0tRAnpFxsJLZ51WaEwtZuaXYirXwE6wMDcxhbmCorXvPTUdu4mLPhMkp7
nLfbA8fyXeU7HwzH90v/dvKY38jU6O0yzFAKHySowlSb6Kzmbuhym5Hgd2N91BUK
bbE4uW4mOjUpByGNGKcOJ+5typN2hfotriayWwgKKiROYQR19HpFNR4VFiE4Gwgy
yGxkbDgr11tHZ9flEMJT1c7k6sDDY+Dg2xgc1AxQQ9aZCXeH4Fe70uvgQzrTKjX3
XRER04mHV5yXpze7lumg
=99TB
-----END PGP SIGNATURE-----
Merge tag 'kvm-s390-next-4.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux into HEAD
KVM: s390: features and fixes for 4.9
- lazy enablement of runtime instrumentation
- up to 255 CPUs for nested guests
- rework of machine check deliver
- cleanups/fixes
Add support for Inverse Path USB armory board, an open source
flash-drive sized computer based on NXP i.MX53 SoC.
https://inversepath.com/usbarmory
Signed-off-by: Andrej Rosano <andrej@inversepath.com>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The GR8 is an SoC made by Nextthing Co, loosely based on the sun5i family.
It has a number of new controllers compared to the A10s and A13 (SPDIF, I2S),
but some controllers missing too (Ethernet, less I2C, less UARTs).
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
As we know handle external aborts pretty early, we can get rid of
its handling in the MMIO code (which was a bit odd to begin with...).
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
If we spot a data abort bearing the ESR_EL2.EA bit set, we know that
this is an external abort, and that should be punished by the injection
of an abort.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Both data and prefetch aborts occuring in HYP lead to a well
deserved panic. Let's get rid of these silly handlers.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
If we have caught an Abort whilst exiting, we've tagged the
exit code with the pending information. In that case, let's
re-inject the error into the guest, after having adjusted
the PC if required.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Just like for arm64, we can handle asynchronous aborts being
delivered at HYP while being caused by the guest. We use
the exact same method to catch such an abort, and soldier on.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
An asynchronous abort can also be triggered whilst running at EL2.
But instead of making that a new error code, we need to communicate
it to the rest of KVM together with the exit reason.
So let's hijack a single bit that allows the exception code to be
tagged with a "pending Abort" information.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
If we've exited the guest because it has triggered an asynchronous
abort, a possible course of action is to let it know it screwed up
by giving it a Virtual Abort to chew on.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Now that we're able to context switch the HCR.VA bit, let's
introduce a helper that injects an Abort into a vcpu.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
The HCR.VA bit is used to signal an Abort to a guest, and has
the peculiar feature of getting cleared when the guest has taken
the abort (this is the only bit that behaves as such in this register).
This means that if we signal such an abort, we must leave it in
the guest context until it disappears from HCR, and at which point
it must be cleared from the context.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Add the bit of glue and const-ification that is required to use
the code inherited from the arm64 port, and move over to it.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
It would make some sense to share the conditional execution code
between 32 and 64bit. In order to achieve this, let's move that
code to virt/kvm/arm/aarch32.c. While we're at it, drop a
superfluous BUG_ON() that wasn't that useful.
Following patches will migrate the 32bit port to that code base.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
When rewriting the assembly code to C code, it was useful to have
exported aliases or static functions so that we could keep the existing
common C code unmodified and at the same time rewrite arm64 from
assembly to C code, and later do the arm part.
Now when both are done, we really don't need this level of indirection
anymore, and it's time to save a few lines and brain cells.
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
When modifying Stage-2 page tables, we perform cache maintenance to
account for non-coherent page table walks. However, this is unnecessary,
as page table walks are guaranteed to be coherent in the presence of the
virtualization extensions.
Per ARM DDI 0406C.c, section B1.7 ("The Virtualization Extensions"), the
virtualization extensions mandate the multiprocessing extensions.
Per ARM DDI 0406C.c, section B3.10.1 ("General TLB maintenance
requirements"), as described in the sub-section titled "TLB maintenance
operations and the memory order model", this maintenance is not required
in the presence of the multiprocessing extensions.
Hence, we need not perform this cache maintenance when modifying Stage-2
entries.
This patch removes the logic for performing the redundant maintenance.
To ensure visibility and ordering of updates, a dsb(ishst) that was
otherwise implicit in the maintenance is folded into kvm_set_pmd() and
kvm_set_pte().
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: kvmarm@lists.cs.columbia.edu
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
This allows to make the board boot even if clock handling
by all drivers is not properly done.
Reported-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
A single patch fixing a typo in the temperature trip points in the A13
DTSI.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIbBAABAgAGBQJX0GviAAoJEBx+YmzsjxAgpV0P9Rsn4KpUj7UpTdaJEJ9BILaS
ox1+cxia9kYI3xWA2aYK2vUW+eqvzbngDzrX7dr2RvEKA8H4SJttasPmYxFmpUun
GeW5/YKDZDWrvPr7ZA+1ooqF6zamqX5iXvpW0JaTm/LWkVRFTbt4Strm6u0VMcAK
Ys2Qa1zzzthuNe4x3aFinAfg05S4igIv+oQQSQna/hH8MPo39cLeai5KDN0F+KFU
jZi0JFUhdZcwlFOTfnIg0Ma2PPaVmLszDlhlUHlveGb/UhgATegDmB1Uq1Sj8yrl
c42207sO+r3Xwqyq4Tbe5oYGmDJQu8HREaZfa3kXijhOr6r0reE6ftiJs8WzSzN3
7HqoUpCCNfJfz697WlClPvYd0gHi4GxAxIQMQs43sQlo9UiLIF/m1gyaY/FvBqIx
zurUKStlR1MLiKsG0ATbbgORBvZFToDjf6AIGiplC4Ph6VZmiPgTCmFnelZYIqoL
1gPow2uNRGeT0m7XZHbi9g02Q5IPY77Ubpe5SGuXAjM9UukWHe9eS5vVzsvLtS2G
uCi0iCTisuZiFnNgt0NzsSYpRIIHgb4r1TiZKiwwXoMG2bw1pDof0LBe1Qrk2cuE
k+i6/oNj2XwRdfR8CGSZZzC/Hqh90AL1wHd+fkuXqqYekkqmwTjCe442Bt7mkZFT
4vkNrHixc+ALBEAMmRc=
=4ztu
-----END PGP SIGNATURE-----
Merge tag 'sunxi-fixes-for-4.8' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into fixes
Allwinner fixes for 4.8
A single patch fixing a typo in the temperature trip points in the A13
DTSI.
* tag 'sunxi-fixes-for-4.8' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: sun5i: Fix typo in trip point temperature
Signed-off-by: Olof Johansson <olof@lixom.net>
- Fix misspelled "ti,x-plate-ohms" property name of touchscreen
controller for imx7d-sdb DTS.
- Add missing BM_CLPCR_BYPASS_PMIC_READY setting for i.MX6SX to get
suspend/resume work properly.
- Fix SPDIF regression on imx6qdl which caused by a clock update on
spdif device node.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJXzN18AAoJEFBXWFqHsHzODGYH/Akf3taKILH/8awa78R8CdNA
hPmV1ga/t0QVTe6E/EYRyQv3D9qGEqMfluItcG+gLlhKPfqrE7iOmqdxwg6PtZSk
oqM+gPDP//DGBh3yjZRJ1jK+68i0Nf7weh59iLqEW6WkWWxBWTaPNUBYm7MXJa9f
AUYCWDNf0MUdoxIXy/sUJKZTHOozSPmJf9tp92qKsW4+EX28t65YqlGZeWyztJ5i
nmsnFHzfM3mY3qpA+RH1QerC8sAqqUCXMwfB6AO83hLUvcaFwLt3O6UgiOxhDJbZ
L9q4E5IBOvYK+zVn/GT+FBWMFE1q0WeF0GWp3oez2B6i7n21g6st9wmCDwDU3JE=
=zotz
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-4.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
i.MX fixes for 4.8, 2nd round:
- Fix misspelled "ti,x-plate-ohms" property name of touchscreen
controller for imx7d-sdb DTS.
- Add missing BM_CLPCR_BYPASS_PMIC_READY setting for i.MX6SX to get
suspend/resume work properly.
- Fix SPDIF regression on imx6qdl which caused by a clock update on
spdif device node.
* tag 'imx-fixes-4.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx6qdl: Fix SPDIF regression
ARM: imx6: add missing BM_CLPCR_BYPASS_PMIC_READY setting for imx6sx
ARM: dts: imx7d-sdb: fix ti,x-plate-ohms property name
Signed-off-by: Olof Johansson <olof@lixom.net>
This reverts commit b5c86b7496.
This is no longer needed due to other changes going into 4.8 to rename
the unit addresses on a large number of device nodes. So it was picked up
for v4.8-rc1 in error.
Reported-by: Ralf Ramsauer <ralf@ramses-pyramidenbau.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
vms and vcpus have statistics associated with them which can be viewed
within the debugfs. Currently it is assumed within the vcpu_stat_get() and
vm_stat_get() functions that all of these statistics are represented as
u32s, however the next patch adds some u64 vcpu statistics.
Change all vcpu statistics to u64 and modify vcpu_stat_get() accordingly.
Since vcpu statistics are per vcpu, they will only be updated by a single
vcpu at a time so this shouldn't present a problem on 32-bit machines
which can't atomically increment 64-bit numbers. However vm statistics
could potentially be updated by multiple vcpus from that vm at a time.
To avoid the overhead of atomics make all vm statistics ulong such that
they are 64-bit on 64-bit systems where they can be atomically incremented
and are 32-bit on 32-bit systems which may not be able to atomically
increment 64-bit numbers. Modify vm_stat_get() to expect ulongs.
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Reviewed-by: David Matlack <dmatlack@google.com>
Acked-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
The fact that the internal synchrous hash implementation is called
"ghash" like the publicly visible one is causing the testmgr code
to misidentify it as an algorithm that requires testing at boottime.
So rename it to "__ghash" to prevent this.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Since commit 8996eafdcb ("crypto: ahash - ensure statesize is non-zero"),
all ahash drivers are required to implement import()/export(), and must have
a non-zero statesize. Fix this for the ARM Crypto Extensions GHASH
implementation.
Fixes: 8996eafdcb ("crypto: ahash - ensure statesize is non-zero")
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
The ARMv7 NEON module is explicitly built in ARM mode, which is not
supported by the Thumb2 kernel. So remove the explicit override, and
leave it up to the build environment to decide whether the core SHA1
routines are assembled as ARM or as Thumb2 code.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Add HDMI audio support. Adds mcasp0_pins, clk_mcasp0_fixed,
clk_mcasp0, mcasp0, sound node, and updates the tda19988 node to
follow the new binding.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Add support for the tactile switches SW2/3 (on the debug board) as a
virtual keyboard like it was done with the Blanche board).
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the Wheat board dependent part of the QSPI device node.
Add device nodes for Spansion S25FL512S SPI flash and MTD partitions on it.
Based on the original (and large) patch by Vladimir Barinov
<vladimir.barinov@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Removale of skeleton.dtsi allows us also to fix the following
warning from the dts compiler:
Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
by adding proper unit addresses to the memory nodes. Also add missing
device_type to the memory node while at it.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Removale of skeleton.dtsi allows us also to fix the following
warning from the dts compiler:
Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
by adding proper unit addresses to the memory nodes.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Remove skeleton.dtsi from the common ARM Cortex-M dtsi. This will allow
us to remove skeleton.dtsi on a per platform basis and get rid of the
unit address warning on the memory nodes without getting duplicate memory
nodes.
See 3ebee5a2e1 ("arm64: dts: kill skeleton.dtsi") for additional
reasons not to use the skeleton.dtsi.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Vladimir Murzin <vladimir.murzin@arm.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
The L2C-220 (AKA L220) and L2C-310 (AKA PL310) cache controllers feature
a Performance Monitoring Unit (PMU), which can be useful for tuning
and/or debugging. This hardware is always present and the relevant
registers are accessible to non-secure accesses. Thus, no special
firmware interface is necessary.
This patch adds support for the PMU, plugging into the usual perf
infrastructure. The overflow interrupt is not always available (e.g. on
RealView PBX A9 it is not wired up at all), and the hardware counters
saturate, so the driver does not make use of this. Instead, the driver
periodically polls and reset counters as required to avoid losing
events due to saturation.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Pawel Moll <pawel.moll@arm.com>
Tested-by: Kim Phillips <kim.phillips@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
According to ARM AN321 (section 4.12):
"If the vector table is in writable memory such as SRAM, either relocated
by VTOR or a device dependent memory remapping mechanism, then
architecturally a memory barrier instruction is required after the vector
table entry is updated, and if the exception is to be activated
immediately"
Reviewed-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Cortex-M7 is a new member of the V7M processor family that adds, among
other things, caches over the features available in Cortex-M4.
This patch adds support for recognising the processor at boot time, and
make use of recently introduced cache functions.
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Tested-by: Andras Szemzo <sza@esh.hu>
Tested-by: Joachim Eastwood <manabian@gmail.com>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch copies the method used for V7A/R CPUs to specify differing
processor info for different cores.
This patch differentiates Cortex-M3 and Cortex-M4 and leaves a fallback case
for any other V7M processors.
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Tested-by: Andras Szemzo <sza@esh.hu>
Tested-by: Joachim Eastwood <manabian@gmail.com>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch does the plumbing required to invoke the V7M cache code added
in earlier patches in this series, although there is no users for that
yet.
In order to honour the I/D cache disable config options, this patch changes
the mechanism by which the CCR is set on boot, to be more like V7A/R.
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Tested-by: Andras Szemzo <sza@esh.hu>
Tested-by: Joachim Eastwood <manabian@gmail.com>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit implements the cache operation for V7M.
It is based on V7 counterpart and differs as follows:
- cache operations are memory mapped
- only Thumb instruction set is supported
- we don't handle user access faults
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Tested-by: Andras Szemzo <sza@esh.hu>
Tested-by: Joachim Eastwood <manabian@gmail.com>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
