Commit Graph

857523 Commits

Author SHA1 Message Date
Qingqing Zhuo
1c0e2f4357 drm/amd/display: remove unused function
[Why]
This function is not being used, it was left in
when introducing DCN2

[How]
Remove the function

Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23 11:41:45 -05:00
Martin Leung
75a543347c drm/amd/display: cleaned up coding error in init_hw
[why]
during a refactor a redundant code that has unknown behaviour was added.

[how]
removed old bad code

Fixes: 8a31820b12 ("drm/amd/display: Make init_hw and init_pipes generic for seamless boot")
Signed-off-by: Martin Leung <martin.leung@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23 11:40:11 -05:00
Jaehyun Chung
ee80de548b drm/amd/display: Add VM page fault handle implementation
[How] Allocate memory for default page and program memory block addr
into default page addr register.

Signed-off-by: Jaehyun Chung <jaehyun.chung@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23 11:40:04 -05:00
Qingqing Zhuo
df3b7e32ed drm/amd/display: refactor Device ID for external chips
IEEE OUI will now be used while referring to certain vendors.
instead of normal index

Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23 11:39:57 -05:00
Nikola Cornij
7f6e7186f9 drm/amd/display: Zero-out dsc init regs
[why]
Before a statically allocated PPS data structure, that did
get zeroed-out at startup, had been re-used for making packed PPS
SDP. With S3 fix, using a non-initialized PPS data structure was
introduced, while wrongly assuming it'd get initialized before it's
populated. As a consequence 'vbr_enable' and perhaps some other
fields are left uninitialized when making packed PPS SDP. This can
affect 'simple_422' as well because of the way PPS SDP packing is
done (the fields are not masked first, only shifted). The behavior
will be different, depending on the content of uninitialized data.

[how]
Zero-out PPS data structure at initialization time before it's
populated

Fixes: 1a9e3d4569 ("drm/amd/display: Set DSC before DIG front-end is connected to its back-end")
Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23 11:38:01 -05:00
Joseph Gravenor
387ad34cb7 drm/amd/display: Implement voltage limitation stub
add new function to get the voltage at the end of
dcn_validate_bandwidth, to check against the
highest voltage we allow.

Created a stub to allow for optimizations

Signed-off-by: Joseph Gravenor <joseph.gravenor@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: Sun peng Li <Sunpeng.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23 11:37:54 -05:00
Wyatt Wood
ddef02de0d drm/amd/display: add null checks before logging
Adding NULL checks to various parameters in log_tf, to avoid
nullptr errors

Signed-off-by: Wyatt Wood <wyatt.wood@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: Nikola Cornij <Nikola.Cornij@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23 11:37:47 -05:00
Ilya Bakoulin
43d4baab52 drm/amd/display: set Hratio and VRatio in dml
Set the writeback Hratio and Vratio in dml.

Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23 11:37:39 -05:00
Dmytro Laktyushkin
1f3324603e drm/amd/display: fix dp stream enable
A previous odm change broke stream enable by always setting
n_multiply as if odm was on.

This fixes the check for odm by making sure opp count is >1
rather than not 0.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23 11:37:31 -05:00
Josip Pavic
361c61f47a drm/amd/display: load iram for abm 2.3
[Why]
ABM 2.3 firmware expects information in iRAM that differs from previous
versions of ABM, so a mechanism is required to provide it with that
information.

[How]
Extend the existing iRAM definition to include parameters added by
ABM 2.3, and load it if DMCU is running ABM 2.3.

Signed-off-by: Josip Pavic <Josip.Pavic@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23 11:37:24 -05:00
Zi Yu Liao
89cb561473 drm/amd/display: fix MPO HUBP underflow with Scatter Gather
[why]
With Scatter Gather enabled, HUBP underflows during MPO enabled video
playback. hubp_init has a register write that fixes this problem, but
the register is cleared when HUBP gets power gated.

[how]
Make a call to hubp_init during enable_plane, so that the fix can
be applied after HUBP powers back on again.

Signed-off-by: Zi Yu Liao <ziyu.liao@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23 11:37:18 -05:00
Su Sung Chung
574304041b drm/amd/display: fix audio endpoint not getting disabled issue
[Why]
Disable_audio_stream gets enum option as a paramenter which will decide
if we free acquired resources or not. However checks for the option is
guarded by the other condition which check if audio stream is getting
diabled more than once. With both conditions combined, if we attempt to
disable audio stream twice in a row, first with keep and second with
free as an option, we will never free any resources, which will make
system think there is audio endpoint connected even after we plug out
the device

[How]
Get rid of option as parameter to disable_audio_stream and move the part
of the code that free acquired resources to outside where to keep or to
free resources is actually determined

Signed-off-by: Su Sung Chung <Su.Chung@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23 11:37:11 -05:00
Julian Parkin
67427d4f10 drm/amd/display: Delete dead code in command_table_helper
[Why]
dig_encoder_sel_to_atom will always return zero on any ASIC version
past DCE80 since programming of the FE selection is handled by
driver, but the translation code was left in the function, making
it look like a coding error.

[How]
Remove code that has no effect, and replace with a comment describing
why it returns zero.

Signed-off-by: Julian Parkin <julian.parkin@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23 11:37:04 -05:00
Dmytro Laktyushkin
b1f6d01c4a drm/amd/display: re structure odm to allow 4 to 1 support
Currently odm is handled using top_bottom pipe by special casing
the differing opps to differentiate from mpc combine.

Since top/bottom pipe list was made to track mpc muxing this creates
difficulties in adding a 4 pipe odm case support.

Rather than continue using mpc combine list, this change reworks odm
to use it's own linked list to keep track of odm combine pipes. This
also opens up options for using mpo with odm, if a practical use case
is ever found.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23 11:36:50 -05:00
Alex Deucher
bad4c3e665 drm/amdgpu: set adev->num_vmhubs for gmc6,7,8
So that we properly handle them on older asics.

Fixes: 3ff985485b ("drm/amdgpu: Export function to flush TLB of specific vm hub")
Tested-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23 11:35:25 -05:00
Alex Deucher
d99f38aed1 drm/amdgpu/display: add flag for multi-display mclk switching
Add a dcfeaturemask flag for mclk switching.  Disable by default;
enable once the feature has seen more testing.

Set amdgpu.dcfeaturemask=2 on the kernel command line in grub
to enable this.

Acked-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23 11:33:00 -05:00
Alex Deucher
8b2608f1cf drm/amd/display: update bw_calcs to take pipe sync into account (v3)
Properly set all_displays_in_sync so that when the data is
propagated to powerplay, it's set properly and we can enable
mclk switching when all monitors are in sync.

v2: fix logic, clean up
v3: check for blending chains, simplify logic

Acked-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23 11:32:37 -05:00
Alex Deucher
55b852069d drm/amdgpu/powerplay/vega10: enable mclk switching if monitors are synced
If DC has synced the displays, we can enable mclk switching to
save power.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23 11:31:45 -05:00
Alex Deucher
bb6897f1c5 drm/amdgpu/powerplay/smu7: enable mclk switching if monitors are synced
If DC has synced the displays, we can enable mclk switching to
save power.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23 11:31:31 -05:00
Kent Russell
951e15c2b5 drm/powerplay: Fix Vega20 power reading again
For the 40.46 SMU release, they changed CurrSocketPower to
AverageSocketPower, but this was changed back in 40.47 so just check if
it's 40.46 and make the appropriate change

Tested with 40.45, 40.46 and 40.47 successfully

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23 11:31:16 -05:00
Frank.Min
b313bbebd7 amd/amdkfd: add Arcturus vf DID support
Add the virtual function PCI device id.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Frank.Min <Frank.Min@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23 11:30:52 -05:00
Kevin Wang
706feb26f8 drm/amd/powerpaly: fix navi series custom peak level value error
fix other navi asic set peak performance level error.
because the navi10_ppt.c will handle navi12 14 asic,
it will use navi10 peak value to set other asic, it is not correct.

after patch:
only navi10 use custom peak value, other asic will used default value.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23 11:30:45 -05:00
Guchun Chen
64cc5414fb drm/amdgpu: correct ras error count type
Use unsigned long type for the same ras count variable.
This will avoid overflow on 64 bit system.

Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23 11:30:32 -05:00
Dmytro Laktyushkin
789d027ec8 drm/amd/display: fix calc_pll_max_vco_construct
This was broken by a previous change switching to cached fw_info.
Fixed by inverting a valid bool check.

Bug: https://bugs.freedesktop.org/show_bug.cgi?id=111432
Fixes: 9adc8050bf ("drm/amd/display: make firmware info only load once during dc_bios create")
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:48:47 -05:00
Thong Thai
8540098492 drm/amdgpu: enable VCN DPG for Renoir
This will enable indirect SRAM loading for VCN DPG mode initialization.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:48:46 -05:00
Thong Thai
134b1461ea Revert "drm/amdgpu: use direct loading on renoir vcn for the moment"
This reverts commit 444a0fea51.

We are ready to enable it now.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:48:46 -05:00
Aaron Liu
f13580a947 drm/amdgpu: update gc/sdma goldensetting for rn
This patch updates gc/sdma goldensetting for renoir

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:48:46 -05:00
Prike Liang
51b9121af0 drm/amd/powerplay: Disable renoir smu feature retrieve for the moment
To avoid the dpm frequence range get failed when DPM enabled and it
will be enabled later once handle well the feature bit map struct.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:48:23 -05:00
Prike Liang
d237e0974b drm/amd/powerplay: enable renoir dpm feature
enable the dpm feature for the renoir.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
9a868d8bbb drm/amdgpu: enable SDMA power gating for rn
Enable SDMA PG flag during device ip early init.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
91c5b6b326 drm/amdgpu/sdma4: set sdma clock gating for rn
Add support for SDMA clockgating on RN.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
2f47d6492b drm/amdgpu/mmhub1: set mmhub clock gating for rn
setup mmhub clockgating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
8db63b7c38 drm/amdgpu: enable DF clock gating for rn
Enable DF clock gating during DF IP early init.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
e2ef3b70e8 drm/amdgpu: enable athub clock gating for rn
Enable athub MG and LS clock gating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
91ec8bbb88 drm/amdgpu: enable IH clock gating for rn
Enable IH clock gating during IH block initialized.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
753c929cc7 drm/amdgpu: enable vcn clock gating for rn
Enable VCN middle grain clock gating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
de273070c5 drm/amdgpu: enable rom clock gating for rn
Enable rom light sleep clock gating.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
9deac0a415 drm/amdgpu: enable HDP clock gating for rn
Enable HDP light sleep clock gating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
d98930f52e drm/amdgpu: enable BIF clock gating for rn
Enable BIF light sleep clock gating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
ef0e7d08a5 drm/amdgpu: enable sdma clock gating for rn
Enable sdma middle grain and light sleep clock gating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
a2d15255ea drm/amdgpu: enable mmhub clock gating for rn
Enable mmhub midle grain and light sleep clock gating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
ec3636a53a drm/amdgpu: enable gfx clock gating for rn
Enable gfx cg/mg/cp etc clock gating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Aaron Liu
723d473537 drm/amd/powerplay: add DPMCLOCKS table implementation
This patch adds add DPMCLOCKS table implementation
Rename smu_populate_smc_pptable to smu_populate_smc_tables

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:38:05 -05:00
Aaron Liu
049284bd52 drm/amd/powerplay: init smu tables for rn
Initialize smu tables for renoir:
WATERMARKS/DPMCLOCKS/SMU_METRICS

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:38:01 -05:00
Aaron Liu
1405ac8f92 drm/amd/powerplay: add smu tables for rn
add and map smu tables for renoir

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:37:57 -05:00
Aaron Liu
b560451208 drm/amd/powerplay: using valid mapping check for rn
Check whether the message mapping is valid

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:37:53 -05:00
Aaron Liu
a31b059b03 drm/amd/powerplay: fix checking gfxoff status for rn
For renoir, it should use mmSMUIO_GFX_MISC_CNTL to check
gfxoff status. For the first time to enter gfxoff status,
it maybe takes about one second more. So just set the max
timeout to 5s.

GFXOFF_STATUS(bits 2:1)'s description is below:
0=GFXOFF(default).
1=Transition out of GFX State.
2=Not in GFXOFF.
3=Transition into GFXOFF.

Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:37:42 -05:00
Aaron Liu
9f21e9ee7f drm/amdgpu: add and enable gfxoff feature
This patch updates gfxoff feature.

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:37:39 -05:00
Aaron Liu
1268795511 drm/amdgpu: add set_gfx_cgpg implement (v2)
add set_gfx_cgpg implement

v2: check if using sw_smu (Alex)

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:37:36 -05:00
Aaron Liu
0a3c84243d drm/amd/powerplay: udpate smu_v12_0_check_fw_version (v2)
This interface support SMU_MSG_GetDriverIfVersion
and SMU_MSG_GetSmuVersion checking.

v2: squash in driver_if changes (Alex)

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:37:23 -05:00