- add syscon property to sound nodes
- add more ethernet pin groups
- add ethernet support for PXs3 SoC
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Merge tag 'uniphier-dt-v4.17-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt
Pull "UniPhier ARM SoC DT updates for v4.17 (2nd)" from Masahiro Yamada:
- add syscon property to sound nodes
- add more ethernet pin groups
- add ethernet support for PXs3 SoC
* tag 'uniphier-dt-v4.17-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
arm64: dts: uniphier: add ethernet node for PXs3
ARM: dts: uniphier: add pinctrl groups of ethernet for second instance
ARM: dts: uniphier: add syscon property for UniPhier sound system
arm64: dts: uniphier: add syscon property for UniPhier sound system
compatible set. Other than that there are some board-specific changes
like the Rock2 getting its otg port, recovery and power keys enabled.
The vyasa board gained an enabled emmc node and the phyCORE boards
got UHS speeds in their sd card and a fixed sd-card power supply.
Finally the veyron boards dropped a nonstandard and unused property.
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Merge tag 'v4.17-rockchip-dts32-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Pull "Rockchip dts32 changes for 4.17" from Heiko Stübner:
For general soc-specific changes the rk322x socs got their correct grf
compatible set. Other than that there are some board-specific changes
like the Rock2 getting its otg port, recovery and power keys enabled.
The vyasa board gained an enabled emmc node and the phyCORE boards
got UHS speeds in their sd card and a fixed sd-card power supply.
Finally the veyron boards dropped a nonstandard and unused property.
* tag 'v4.17-rockchip-dts32-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: enable USB-OTG port on Radxa Rock2 Square
ARM: dts: rockchip: add recovery button for Rock2 Square
ARM: dts: rockchip: add power key for Rock2 Square
ARM: dts: rockchip: Add eMMC node for rk3288-vyasa
ARM: dts: rockchip: Support UHS mode for SD card on phyCORE-RK3288 RDK
ARM: dts: rockchip: Fix supply node for card's power on phycore som
ARM: dts: rockchip: add "rockchip,rk3228-grf" compatible for rk322x grf node
ARM: dts: rockchip: drop veyron's nonstandard 'backlight-boot-off'
and therefore not create a dummy* entry in debugfs.
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Merge tag 'v4.17-rockchip-soc32-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc
Pull "Rockchip soc32 changes for 4.17" from Heiko Stübner:
Fix for the legacy pmu-regmap in the smp-code to have a real name
and therefore not create a dummy* entry in debugfs.
* tag 'v4.17-rockchip-soc32-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: rockchip: Set name of pmu regmap_config in smp code
Pull ARM fixes from Russell King:
"A small number of small fixes for ARM, mostly for some build issues.
One fix for a regression caused by the cpu hotplug conversion from a
few kernel versions ago"
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: 8750/1: deflate_xip_data.sh: minor fixes
ARM: 8748/1: mm: Define vdso_start, vdso_end as array
ARM: 8747/1: make CONFIG_DEBUG_WX depend on MMU
ARM: 8746/1: vfp: Go back to clearing vfp_current_hw_state[]
Add pinctrl groups of ethernet, such as "ether1_rgmii" and "ether1_rmii".
These are used for second ethernet instance.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
convert to the SPDX-License-Identifier for the Kirkwood and the Armada
based device tree files.
Compared to the series submitted most of the patch have been squashed:
the result is grouped by SoC, boards, type of licenses and the patches
that were explicitly acked on the mailing list.
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Merge tag 'mvebu-dt-4.17-spdx' of git://git.infradead.org/linux-mvebu into next/dt
Pull "mvebu SPDX dt for 4.17: from Gregory CLEMENT:
convert to the SPDX-License-Identifier for the Kirkwood and the Armada
based device tree files.
Compared to the series submitted most of the patch have been squashed:
the result is grouped by SoC, boards, type of licenses and the patches
that were explicitly acked on the mailing list.
* tag 'mvebu-dt-4.17-spdx' of git://git.infradead.org/linux-mvebu:
arm: dts: kirkwood*.dts: use SPDX-License-Identifier for board using GPL-2.0+
arm: dts: kirkwood*.dts: use SPDX-License-Identifier for boards using GPL-2.0+/MIT
arm: dts: kirkwood*.dts: use SPDX-License-Identifier for boards using GPL-2.0
arm: dts: armada-385-turris-omnia: use SPDX-License-Identifier
arm: dts: armada-385-db-ap: use SPDX-License-Identifier
arm: dts: armada-388-rd: use SPDX-License-Identifier
arm: dts: armada-xp-db-xc3-24g4xg: use SPDX-License-Identifier
arm: dts: armada-xp-db-dxbc2: use SPDX-License-Identifier
arm: dts: armada-370-db: use SPDX-License-Identifier
arm: dts: armada-*.dts: use SPDX-License-Identifier for most of the Armada based board
arm: dts: armada-xp-98dx: use SPDX-License-Identifier for prestara 98d SoCs
arm: dts: armada-*.dtsi: use SPDX-License-Identifier for most of the Armada SoCs
- add SFP module support on the clearfog (Armada 388 based board)
- disable internal RTC node for Linksys boards (Armada 38x based
boards)
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Merge tag 'mvebu-dt-4.17-2' of git://git.infradead.org/linux-mvebu into next/dt
Pull "mvebu dt for 4.17 (part 2)" from Gregory CLEMENT:
- add SFP module support on the clearfog (Armada 388 based board)
- disable internal RTC node for Linksys boards (Armada 38x based
boards)
* tag 'mvebu-dt-4.17-2' of git://git.infradead.org/linux-mvebu:
ARM: dts: armada388-clearfog: add SFP module support
ARM: dts: armada-385-linksys: Disable internal RTC
On omap5 there is an aux control module that we are not handling
currently for clocks, so let's add support for it.
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Merge tag 'omap-for-v4.17/soc-pt2-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Pull "Two omap5 specific aux control module patches for v4.17" from Tony Lindgren:
On omap5 there is an aux control module that we are not handling
currently for clocks, so let's add support for it.
* tag 'omap-for-v4.17/soc-pt2-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP5: control: add support for control module wkup pad config
ARM: omap2+: control: add support for auxiliary control module instances
1. Fix coupled CPU idle freeze on Exynos4210.
2. Simplify hot-path in coupled CPU idle.
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Merge tag 'samsung-soc-4.17-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc
Pull "Samsung mach/soc changes for v4.17, part two" from Krzysztof Kozłowski:
1. Fix coupled CPU idle freeze on Exynos4210.
2. Simplify hot-path in coupled CPU idle.
* tag 'samsung-soc-4.17-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: EXYNOS: Simplify code in coupled CPU idle hot path
ARM: EXYNOS: Fix coupled CPU idle freeze on Exynos4210
01d675f159 ARM: shmobile: rcar-gen2: Add watchdog support
58adf1ba0d ARM: shmobile: Add watchdog support
* SoC
- Identify R-Car V3H (r8a77980) and M3N (r8a77965)
- Enable R-Car Gen2 regulator quirk for Stout board with H3 (r8a7790) SoC
Marek Vaust says "Regulator setup is suboptimal on H2 Stout too. The
Stout newly has two DA9210 regulators, so the quirk is extended to
handle another DA9210 at i2c address 0x70."
- Add watchdog support
This is the SoC portion of the following solution. It is not yet
enabled in DT as it is not functional without clock dependencies
in place.
Fabrizio Castro says "this series has been around for some time as RFC,
and it has collected useful comments from the community along the way.
The solution proposed by this patch set works for most R-Car Gen2 and
RZ/G1 devices, but not all of them. We now know that for some R-Car
Gen2 early revisions there is no proper software fix. Anyway, no
product has been built around early revisions, but development boards
mounting early revisions (basically prototypes) are still out there.
As a result, this series isn't enabling the internal watchdog on R-Car
Gen2 boards, developers may enable it in board specific device trees if
needed. This series has been tested by me on the iwg20d, iwg22d,
Lager, Alt, and Koelsch boards.
The problem
===========
To deal with SMP on R-Car Gen2 and RZ/G1, we install a reset vector to
ICRAM1 and we program the [S]BAR registers so that when we turn ON the
non-boot CPUs they are redirected to the reset vector installed by Linux
in ICRAM1, and eventually they continue the execution to RAM, where the
SMP bring-up code will take care of the rest. The content of the [S]BAR
registers survives a watchdog triggered reset, and as such after the
watchdog fires the boot core will try and execute the SMP bring-up code
instead of jumping to the bootrom code.
The fix
=======
The main strategy for the solution is to let the reset vector decide if
it needs to jump to shmobile_boot_fn or to the bootrom code. In a
watchdog triggered reset scenario, since the [S]BAR registers keep their
values, the boot CPU will jump into the newly designed reset vector, the
assembly routine will eventually test WOVF (a bit in register RWTCSRA
that indicates if the watchdog counter has overflown, the value of this
bit gets retained in this scenario), and jump to the bootrom code which
will in turn load up the bootloader, etc. When bringing up SMP or using
CPU hotplug, the reset vector will jump to shmobile_boot_fn instead."
* R-Car Rst
- Add support for R-Car V3H (r8a77980) and V3H (r8a77980)
* R-Car SYSC
- Mark rcar_sysc_matches[] __initconst
Geert Uytterhoeven says "This frees another 1764 bytes
(arm32/shmobile_defconfig) or 1000 bytes (arm64/renesas_defconfig) of
memory after kernel init."
- Fix power area parents
Sergei Shtylyov says "According to the figure 9.2(b) of the R-Car
Series, 3rd Generation User’s Manual: Hardware Rev. 0.80 the A2IRn and
A2SCn power areas in R8A77970 have the A3IR area as a parent, thus the
SYSC driver has those parents wrong.."
- Add support for R-Car V3H (r8a77980) and V3H (r8a77980)
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Merge tag 'renesas-soc-for-v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Pull "Renesas ARM Based SoC Updates for v4.17" from Simon Horman:
01d675f159 ARM: shmobile: rcar-gen2: Add watchdog support
58adf1ba0d ARM: shmobile: Add watchdog support
* SoC
- Identify R-Car V3H (r8a77980) and M3N (r8a77965)
- Enable R-Car Gen2 regulator quirk for Stout board with H3 (r8a7790) SoC
Marek Vaust says "Regulator setup is suboptimal on H2 Stout too. The
Stout newly has two DA9210 regulators, so the quirk is extended to
handle another DA9210 at i2c address 0x70."
- Add watchdog support
This is the SoC portion of the following solution. It is not yet
enabled in DT as it is not functional without clock dependencies
in place.
Fabrizio Castro says "this series has been around for some time as RFC,
and it has collected useful comments from the community along the way.
The solution proposed by this patch set works for most R-Car Gen2 and
RZ/G1 devices, but not all of them. We now know that for some R-Car
Gen2 early revisions there is no proper software fix. Anyway, no
product has been built around early revisions, but development boards
mounting early revisions (basically prototypes) are still out there.
As a result, this series isn't enabling the internal watchdog on R-Car
Gen2 boards, developers may enable it in board specific device trees if
needed. This series has been tested by me on the iwg20d, iwg22d,
Lager, Alt, and Koelsch boards.
The problem
===========
To deal with SMP on R-Car Gen2 and RZ/G1, we install a reset vector to
ICRAM1 and we program the [S]BAR registers so that when we turn ON the
non-boot CPUs they are redirected to the reset vector installed by Linux
in ICRAM1, and eventually they continue the execution to RAM, where the
SMP bring-up code will take care of the rest. The content of the [S]BAR
registers survives a watchdog triggered reset, and as such after the
watchdog fires the boot core will try and execute the SMP bring-up code
instead of jumping to the bootrom code.
The fix
=======
The main strategy for the solution is to let the reset vector decide if
it needs to jump to shmobile_boot_fn or to the bootrom code. In a
watchdog triggered reset scenario, since the [S]BAR registers keep their
values, the boot CPU will jump into the newly designed reset vector, the
assembly routine will eventually test WOVF (a bit in register RWTCSRA
that indicates if the watchdog counter has overflown, the value of this
bit gets retained in this scenario), and jump to the bootrom code which
will in turn load up the bootloader, etc. When bringing up SMP or using
CPU hotplug, the reset vector will jump to shmobile_boot_fn instead."
* R-Car Rst
- Add support for R-Car V3H (r8a77980) and V3H (r8a77980)
* R-Car SYSC
- Mark rcar_sysc_matches[] __initconst
Geert Uytterhoeven says "This frees another 1764 bytes
(arm32/shmobile_defconfig) or 1000 bytes (arm64/renesas_defconfig) of
memory after kernel init."
- Fix power area parents
Sergei Shtylyov says "According to the figure 9.2(b) of the R-Car
Series, 3rd Generation User’s Manual: Hardware Rev. 0.80 the A2IRn and
A2SCn power areas in R8A77970 have the A3IR area as a parent, thus the
SYSC driver has those parents wrong.."
- Add support for R-Car V3H (r8a77980) and V3H (r8a77980)
* tag 'renesas-soc-for-v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: rcar-gen2: Add watchdog support
ARM: shmobile: Add watchdog support
ARM: shmobile: rcar-gen2: Fix error check in regulator quirk
soc: renesas: rcar-rst: Add support for R-Car M3-N
ARM: shmobile: stout: enable R-Car Gen2 regulator quirk
soc: renesas: rcar-sysc: Add R-Car M3-N support
soc: renesas: Identify R-Car M3-N
soc: renesas: rcar-sysc: add R8A77980 support
dt-bindings: power: add R8A77980 SYSC power domain definitions
soc: renesas: r8a77970-sysc: fix power area parents
soc: renesas: rcar-rst: Enable watchdog as reset trigger for Gen2
soc: renesas: rcar-rst: add R8A77980 support
soc: renesas: identify R-Car V3H
soc: renesas: rcar-sysc: Mark rcar_sysc_matches[] __initconst
Follow the recent trend for the license description
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.
As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Follow the recent trend for the license description
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Here is our bunch of changes for mach-sunxi for this release cycle. This is
basically only about bringing the SMP support to the A80, which has a bug
in hardware and cannot use PSCI like the other SoCs we have.
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Merge tag 'sunxi-core-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/soc
Pull "Allwinner core changes for 4.17" from Maxime Ripard:
Here is our bunch of changes for mach-sunxi for this release cycle. This is
basically only about bringing the SMP support to the A80, which has a bug
in hardware and cannot use PSCI like the other SoCs we have.
* tag 'sunxi-core-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: sunxi: mc-smp: Split out SoC-specific device node lookup sequence
ARM: sunxi: mc-smp: Use DT enable-method for sun9i A80 SMP
ARM: sunxi: mc-smp: Fix "lookback" typo
ARM: sun9i: smp: Support cpu0 hotplug
dt-bindings: ARM: sunxi: Document A80 SoC secure SRAM usage by SMP hotplug
ARM: sun9i: smp: Support CPU/cluster power down and hotplugging for cpu1~7
ARM: sun9i: Support SMP bring-up on A80
Enable FlexCAN support as module by default. FlexCAN can be found
on various NXP designs such as the i.MX and Vybrid SoC family.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This allows to successfully boot Colibri iMX7 which is using
the Ricoh RN5T567 PMIC.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add GPMI NAND controller support as required by some NXP i.MX6/7
based boards.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable on-chip OTP NVMEM support for NXP i.MX and VF610 SoCs.
Since OTP values might be required by drivers required during
boot, make sure the driver is built-in (e.g. i.MX thermal
driver).
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
PMIC often require the I2C bus, and the PMIC regulators might be
necessary to power on eMMC/SD-card or other supplies required
for successful boot. Make sure I2C driver for i.MX devices is
built-in.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This series enables more devices working on droid4 to make it easier
for people and distros to use out of the box.
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Merge tag 'omap-for-v4.17/defconfig-pt2-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Pull "Second set of defconfig changes for omap variants for v4.17" from Tony Lindgren:
This series enables more devices working on droid4 to make it easier
for people and distros to use out of the box.
* tag 'omap-for-v4.17/defconfig-pt2-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: multi_v7_defconfig: Enable CPCAP related options mostly as loadable modules
ARM: omap2plus_defconfig: Add UINPUT
ARM: omap2plus_defconfig: Enable MDM6600 USB PHY
ARM: omap2plus_defconfig: Add AUDIO_GRAPH_CARD
ARM: omap2plus_defconfig: Enable PWM_VIBRA
DRM driver rather than the old fbdev driver.
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Merge tag 'armsoc-versatile-drm-defconfig' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/soc
Pull "defconfig changes for Versatile DRM" from Linus Walleij:
This augments the RealView and Versatile defconfig to use the PL111
DRM driver rather than the old fbdev driver.
* tag 'armsoc-versatile-drm-defconfig' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: defconfig: Configure Versatile boards to use PL111 DRM
ARM: defconfig: Update Versatile defconfig
ARM: defconfig: Switch RealView boards to use P111 DRM
ARM: defconfig: Update RealView defconfig
Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.
As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Cc: Uwe Kleine-König <uwe@kleine-koenig.org>
Acked-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.
As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Cc: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.
As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.
As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.
As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.
As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.
As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
We need to enable MMC_SDHCI option in both omap2plus_defconfig and
multi_v7_defconfig so systems are able to mount root when the dts files
get updated for sdhci.
Then let's update omap2plus_defconfig so we can patch it easier. And as
Arnd noticed earlier, just running make savedefconfig will accidentally
drop few Kconfig options. This is happening because some options are no
longer available as loadable modules like LIRC. Or new dependencies have
been added such as SND_OSSEMUL for selecting SOUND_OSS_CORE.
So we first move the unchanged options around to their make savedefconfig
suggested place, then update the options to prevent make savedefconfig
dropping some options accidentally, and then finally drop the unused
options.
And after that we enable options DRM_OMAP and 8250_OMAP. These both have
been around for years now. And we do have 8250_OMAP warn about console
being redirected with SERIAL_8250_OMAP_TTYO_FIXUP option that is enabled
by default. Some users may need to update their inittab to use ttyS*
instead of ttyO* though. If this turns out to be a problem, we may want
to introduce a separate compatible for 8250-omap. But I think we're good
to go with the SERIAL_8250_OMAP_TTYO_FIXUP warning now. Let's not update
multi_v7_defconfig yet though and first see how 8250_OMAP change plays
out.
We also enable few new options for PM on am335x and am437x, and CEC in
omap2plus_defconfig. Naturally similar options can be later on added to
multi_v7_defconfig, but in this series we only enable OTG, MUSB and the
related PHYs in multi_v7_defconfig to make it more usable for distros.
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Merge tag 'omap-for-v4.17/defconfig-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Pull "Defconfig updates for omap variants for v4.17 merge window"
from Tony Lindgren:
We need to enable MMC_SDHCI option in both omap2plus_defconfig and
multi_v7_defconfig so systems are able to mount root when the dts files
get updated for sdhci.
Then let's update omap2plus_defconfig so we can patch it easier. And as
Arnd noticed earlier, just running make savedefconfig will accidentally
drop few Kconfig options. This is happening because some options are no
longer available as loadable modules like LIRC. Or new dependencies have
been added such as SND_OSSEMUL for selecting SOUND_OSS_CORE.
So we first move the unchanged options around to their make savedefconfig
suggested place, then update the options to prevent make savedefconfig
dropping some options accidentally, and then finally drop the unused
options.
And after that we enable options DRM_OMAP and 8250_OMAP. These both have
been around for years now. And we do have 8250_OMAP warn about console
being redirected with SERIAL_8250_OMAP_TTYO_FIXUP option that is enabled
by default. Some users may need to update their inittab to use ttyS*
instead of ttyO* though. If this turns out to be a problem, we may want
to introduce a separate compatible for 8250-omap. But I think we're good
to go with the SERIAL_8250_OMAP_TTYO_FIXUP warning now. Let's not update
multi_v7_defconfig yet though and first see how 8250_OMAP change plays
out.
We also enable few new options for PM on am335x and am437x, and CEC in
omap2plus_defconfig. Naturally similar options can be later on added to
multi_v7_defconfig, but in this series we only enable OTG, MUSB and the
related PHYs in multi_v7_defconfig to make it more usable for distros.
* tag 'omap-for-v4.17/defconfig-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: multi_v7_defconfig: Enable USB gadget configfs as loadable module
ARM: multi_v7_defconfig: Enable various USB PHYs found on omap variants
ARM: multi_v7_defconfig: Enable OTG and MUSB as loadable modules
ARM: omap2plus_defconfig: Enable 8250_OMAP
ARM: omap2plus_defconfig: Switch to use omapdrm by default
ARM: omap2plus_defconfig: Enable CEC
ARM: omap2plus_defconfig: Enable am335x and am437x PM options
ARM: omap2plus_defconfig: Drop unneeded options
ARM: omap2plus_defconfig: Add SND_OSSEMUL
ARM: omap2plus_defconfig: Update LIRC options
ARM: omap2plus_defconfig: Select MFD_TI_LMU
ARM: omap2plus_defconfig: Add SERIAL_DEV for bluetooth
ARM: omap2plus_defconfig: Update for moved options
ARM: omap2plus_defconfig: Enable CONFIG_MMC_SDHCI_OMAP
ARM: multi_v7_defconfig: Enable CONFIG_MMC_SDHCI_OMAP
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Updates to shmobile defconfig:
* Redresh defconfig to ease future maintenence overhead
* Disable CONFIG_EMBEDDED
Geert Uytterhoeven says "CONFIG_EXPERT exposes too many config options
that do not matter for development. E.g. it prohibits using the default
values for the various SH_SCI options. However, CONFIG_EMBEDDED selects
CONFIG_EXPERT, so it cannot be disabled.
Hence disable CONFIG_EMBEDDED, and compensate for the loss of
CONFIG_DEBUG_KERNEL by enabling the latter.
Actual impact, all harmless:
- CONFIG_NAMESPACES=y (plus a few related CONFIG_*_NS options),
- CONFIG_SYSCTL_SYSCALL=n,
- CONFIG_SERIAL_SH_SCI_NR_UARTS changed from 20 to 18,
- Some HID support became enabled,
- CONFIG_DEBUG_MEMORY_INIT=y,"
* Enable RZA1 pin controller
This allows the Genmai board with RZ/A1 (r7s72100) SoC to once
again boot using the shmobile defconfig.
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Merge tag 'renesas-defconfig-for-v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Pull "Renesas ARM Based SoC Defconfig Updates for v4.17" from Simon Horman:
Updates to shmobile defconfig:
* Redresh defconfig to ease future maintenence overhead
* Disable CONFIG_EMBEDDED
Geert Uytterhoeven says "CONFIG_EXPERT exposes too many config options
that do not matter for development. E.g. it prohibits using the default
values for the various SH_SCI options. However, CONFIG_EMBEDDED selects
CONFIG_EXPERT, so it cannot be disabled.
Hence disable CONFIG_EMBEDDED, and compensate for the loss of
CONFIG_DEBUG_KERNEL by enabling the latter.
Actual impact, all harmless:
- CONFIG_NAMESPACES=y (plus a few related CONFIG_*_NS options),
- CONFIG_SYSCTL_SYSCALL=n,
- CONFIG_SERIAL_SH_SCI_NR_UARTS changed from 20 to 18,
- Some HID support became enabled,
- CONFIG_DEBUG_MEMORY_INIT=y,"
* Enable RZA1 pin controller
This allows the Genmai board with RZ/A1 (r7s72100) SoC to once
again boot using the shmobile defconfig.
* tag 'renesas-defconfig-for-v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: defconfig: Disable CONFIG_EMBEDDED
ARM: shmobile: defconfig: Refresh
ARM: shmobile: Enable RZA1 pin controller
When selecting SOC_IMX6SLL but not SOC_IMX6SL, we get a link error:
arch/arm/mach-imx/mach-imx6sl.o: In function `imx6sl_init_late':
mach-imx6sl.c:(.init.text+0x14): undefined reference to `imx6sl_cpuidle_init'
This adds the missing line to the Makefile to also build the cpuidle
support that we need here.
Fixes: dee5dee2a5 ("ARM: imx: Add basic msl support for imx6sll")
Acked-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The cpuidle support calls cpu_suspend(), which is compiled conditionally,
and fails to link unless something selects CONFIG_ARM_CPU_SUSPEND.
arch/arm/mach-imx/cpuidle-imx6sx.o: In function `imx6sx_enter_wait':
cpuidle-imx6sx.c:(.text+0x6c): undefined reference to `cpu_suspend'
This adds an explicit select statement here.
Acked-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.
As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.
As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Add SFP module support for Clearfog using the SFP phylink support.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The internal RTC does not work correctly on these Linksys boards based
on Marvell SoCs. For me it only shows Wed Dec 31 23:59:59 1969 and for
others it is off by 3 minutes in 10 minutes running, this was reported
by multiple users. On the Linksys Mamba device the device tree comment
says that no crystal is connected to the internal RTC, this is probably
also true for the other devices.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This series of patches configures few new drivers and adds
omap5 specific nodes:
- Enable USB OTG mode for xhci on am437x
- A series of changes to configure aux control module instance
on omap5 mostly to get the audio clocks configured
- A series of changes to update droid4 for MDM6600 modem USB PHY
and UART1 pinctrl
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Merge tag 'omap-for-v4.17/dt-pt2-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Pull "Second set of dts changes for omap variants for v4.17" from Tony Lindgren:
This series of patches configures few new drivers and adds
omap5 specific nodes:
- Enable USB OTG mode for xhci on am437x
- A series of changes to configure aux control module instance
on omap5 mostly to get the audio clocks configured
- A series of changes to update droid4 for MDM6600 modem USB PHY
and UART1 pinctrl
* tag 'omap-for-v4.17/dt-pt2-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap4-droid4: Configure uart1 pins
ARM: dts: omap4-droid4: Configure MDM6600 USB PHY
ARM: dts: omap4-droid4: Fix USB PHY port naming
ARM: dts: omap5-board-common: Add phandle for mclk clock for twl6040
ARM: dts: omap5: add fref_xtal_ck support
ARM: dts: omap5: add support for control module wkup pad config
dt-bindings: omap5: ctrl: Support for control module wkup pad config
ARM: dts: am43xx: Enable dual-role mode for USB1
Here is our usual bunch of changes to the common DTSI shared between arm
and arm64, and their associated device trees.
Even though the diffstat is quite big, it's been mostly just cleanups. The
big feature is that the HDMI is now suported on H3 and H5 boards.
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Merge tag 'sunxi-h3-h5-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Pull "Allwinner H3/H5 changes for 4.17" from Maxime Ripard:
Here is our usual bunch of changes to the common DTSI shared between arm
and arm64, and their associated device trees.
Even though the diffstat is quite big, it's been mostly just cleanups. The
big feature is that the HDMI is now suported on H3 and H5 boards.
* tag 'sunxi-h3-h5-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: allwinner: H5: Add Xunlong Orange Pi Zero Plus
ARM: dts: sun8i-h3: Add Mali node
ARM64: dts: sun50i: h5: Enable HDMI output on H5 boards
ARM: dts: sun8i: h3: Enable HDMI output on H3 boards
ARM: dts: sunxi: h3/h5: Add HDMI pipeline
ARM: dts: sun8i: h2-plus: remove unnecessary mmc1_pins node
ARM: dts: sunxi: h3-h5: rename mmc0_pins_a and mmc1_pins_a
ARM: dts: sunxi: h3-h5: Move pinctrl of mmc1 from dts to dtsi
ARM: dts: sunxi: h3-h5: Move pinctrl of mmc0 from dts to dtsi
ARM: dts: sunxi: h3-h5: remove mmc0 card detection pin from pinctrl
ARM: dts: sun8i: h2+: add support for Banana Pi M2 Zero board
ARM: dts: sunxi: Switch MMC nodes away from cd-inverted property
ARM: dts: nanopi-neo-air: Add WiFi / eMMC
There is a bunch of significant additions for this release cycle:
- The A83t now has HDMI support
- The A80 finally has SMP support (without PSCI, unfortunately)
- The A80 has preliminary display support
And also:
- a number of boards based on old (A10, A20) SoCs now have the HDMI
support enabled.
- The display frontend is enabled on the A33, allowing to use it for
hardware display scaling
- New boards: Olimex A20-SOM204 variants
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Merge tag 'sunxi-dt-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Pull "Allwinner DT changes for 4.17" from Maxime Ripard:
There is a bunch of significant additions for this release cycle:
- The A83t now has HDMI support
- The A80 finally has SMP support (without PSCI, unfortunately)
- The A80 has preliminary display support
And also:
- a number of boards based on old (A10, A20) SoCs now have the HDMI
support enabled.
- The display frontend is enabled on the A33, allowing to use it for
hardware display scaling
- New boards: Olimex A20-SOM204 variants
* tag 'sunxi-dt-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (39 commits)
ARM: dts: sun9i: cubieboard4: Enable VGA display output
ARM: dts: sun9i: Add pinmux settings for LCD0 RGB888 output.
ARM: dts: sun9i: Add device nodes for documented display pipelines for A80
ARM: dts: sun8i: reference tablet design: Enable PMIC power supplies
ARM: dts: sun8i: a33: Enable A33 internal audio codec on A33-OLinuXino
ARM: dts: sun8i: a33: Enable PMIC power supplies on A33-OLinuXino
ARM: dts: sun8i: a33: Drop sunxi-common-regulators.dtsi for A33-OLinuXino
ARM: dts: sun8i: a33: Drop GPIO pinmux settings for A33-OLinuXino
ARM: dts: sun9i: Add enable-method for SMP support for the A80 SoC
ARM: dts: sun8i: h3: Add eMMC for NanoPi M1 Plus
ARM: dts: sun8i: a711: set regulator for each cluster of CPUs
ARM: dts: sun8i: a83t: add stable OPP tables and CPUfreq
ARM: dts: sun8i: a83t: add cpu0 and cpu100 labels
ARM: dtsi: axp81x: remove IP name from DT node name
ARM: dtsi: sun8i: a711: enable battery power supply subnode
ARM: dtsi: axp81x: add battery power supply subnode
ARM: dtsi: axp81x: add node for ADC
ARM: dtsi: axp22x: add node for ADC
ARM: dtsi: axp209: add node for ADC
ARM: dts: sun7i: Enable HDMI support on the Orange Pi mini
...
Pinctrl fixes, the UART pullups were discussed back in 2016.
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Merge tag 'at91-ab-4.17-dt2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/dt
Pull "AT91 DT for 4.17 #2" from Alexandre Belloni:
Pinctrl fixes, the UART pullups were discussed back in 2016.
* tag 'at91-ab-4.17-dt2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
ARM: dts: at91sam9260: pullup rx on usart0
ARM: dts: at91rm9200: pullup rx on uart0
ARM: dts: at91: fixes uart pinctrl, set pullup on rx, clear pullup on tx
ARM: dts: at91: at91sam9g25: fix mux-mask pinctrl property
The "cooling-min-level" and "cooling-max-level" properties are not
parsed by any part of the kernel currently and the max cooling state of
gpio-fan cooling device is found by referring to the
"gpio-fan,speed-map" instead.
Remove the unused properties from the gpio-fan node.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
define the VGA and panel connectors in preparation for DRM.
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Merge tag 'armsoc-versatile-drm-dts' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/dt
Pull "DTS changes for RealView+Versatile" from Linus Walleij:
This augments the RealView and Versatile device trees to properly
define the VGA and panel connectors in preparation for DRM.
* tag 'armsoc-versatile-drm-dts' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: dts: Augment panel setting for Versatile
ARM: dts: Add Versatile IB2 device tree
ARM: dts: Augment VGA connector bridge on Realview PBX
ARM: dts: Augment VGA connector bridge on Realview EB
ARM: dts: Augment VGA connector bridge on PB1176
ARM: dts: Augment VGA connector bridge on PB11MPcore
* Silk board with R-Car E2 (r8a7794) SoC
- Add r1ex24002 EEPROM to DT
Magnus Damm says "Extend the Silk board support to include U14 which is
an I2C based EEPROM hooked up to the I2C1 bus."
- Add GPIO keys to DT
Magnus Damm says "Extend the Silk board support to include SW3, SW4,
SW6 and SW12. They are all connected via GPIO lines and handled by the
gpio-keys driver"
* Marzen board with R-Car H1 (r7a7779) SoC
- Add SDHI0 VCCQ Regulator
Magnus Damm says "Add support for the on-board voltage regulator hooked
up to GPIO3_20 on r8a7779 Marzen. The board schematics describes the
regulator as U4 TPS2110A. Input wise, U4 has D0 fixed to ground, D1
tied to GPIO3_20 while IN1 is fixed to 3.3V and IN2 is fixed to 1.8V.
OUT goes to the pull-ups for the data pins of SDHI0."
* Porter board with R-Car M3W (r8a7791) SoC
- Fix HDMI output routing
Laurent Pinchart says "The HDMI encoder is connected to the RGB output
of the DU, which is port@0, not port@1."
* iWave Systems RZ/G1E SODIMM System On Module (iW-RainboW-G22M-SM) and
iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven)
- Enable cmt0
* Stout board with R-Car H2 (r8a7790) SoC
- Initial support
* Lager board with R-Car H2 (r8a7790) SoC
- Add CEC clock for HDMI transmitter
Niklas Söderlund says "The adv7511 on the Lager board has a 12 MHz
fixed clock for the CEC block. Specify this in the dts to enable CEC
support."
- Move cec_clock to root node
By definition nodes without a bus address do not belong on the bus
* kzm9d board with EMMA Mobile EV2 (EMEV2) SoC
- Fix "debounce-interval" property misspelling
* RZ/G1M (r8a7743) and RZ/G1H (r8a7745) SoCs
- Add IPMMU DT nodes
- Add VSP support
* R-Car Gen2 boards
- Use I2C demuxer for
This allows run-time switching between alternate I2C IP blocks
* R-Car Gen2 and RZ/G1 SoCs
- Clean up DT files to ease future maintenance
+ add soc node for IP attached to the bus
+ sort subnodes of soc and root node
+ consistently use single space after =
* R-Car H2 (r8a7790), M3-W (r8a7791) and M3-N (r7a7793) SoCs
- Reduce size of thermal registers
According to the "User's Manual: Hardware" v2.00 the registers at base
0xe61f0000 extend to an offset of 0x10, rather than 0x14 which is the
case on the r8a73a4 (R-Mobile APE6).
This should not have any runtime affect as mapping granularity is
PAGE_SIZE.
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Merge tag 'renesas-dt-for-v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Renesas ARM Based SoC DT Updates for v4.17" from Simon Horman:
* Silk board with R-Car E2 (r8a7794) SoC
- Add r1ex24002 EEPROM to DT
Magnus Damm says "Extend the Silk board support to include U14 which is
an I2C based EEPROM hooked up to the I2C1 bus."
- Add GPIO keys to DT
Magnus Damm says "Extend the Silk board support to include SW3, SW4,
SW6 and SW12. They are all connected via GPIO lines and handled by the
gpio-keys driver"
* Marzen board with R-Car H1 (r7a7779) SoC
- Add SDHI0 VCCQ Regulator
Magnus Damm says "Add support for the on-board voltage regulator hooked
up to GPIO3_20 on r8a7779 Marzen. The board schematics describes the
regulator as U4 TPS2110A. Input wise, U4 has D0 fixed to ground, D1
tied to GPIO3_20 while IN1 is fixed to 3.3V and IN2 is fixed to 1.8V.
OUT goes to the pull-ups for the data pins of SDHI0."
* Porter board with R-Car M3W (r8a7791) SoC
- Fix HDMI output routing
Laurent Pinchart says "The HDMI encoder is connected to the RGB output
of the DU, which is port@0, not port@1."
* iWave Systems RZ/G1E SODIMM System On Module (iW-RainboW-G22M-SM) and
iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven)
- Enable cmt0
* Stout board with R-Car H2 (r8a7790) SoC
- Initial support
* Lager board with R-Car H2 (r8a7790) SoC
- Add CEC clock for HDMI transmitter
Niklas Söderlund says "The adv7511 on the Lager board has a 12 MHz
fixed clock for the CEC block. Specify this in the dts to enable CEC
support."
- Move cec_clock to root node
By definition nodes without a bus address do not belong on the bus
* kzm9d board with EMMA Mobile EV2 (EMEV2) SoC
- Fix "debounce-interval" property misspelling
* RZ/G1M (r8a7743) and RZ/G1H (r8a7745) SoCs
- Add IPMMU DT nodes
- Add VSP support
* R-Car Gen2 boards
- Use I2C demuxer for
This allows run-time switching between alternate I2C IP blocks
* R-Car Gen2 and RZ/G1 SoCs
- Clean up DT files to ease future maintenance
+ add soc node for IP attached to the bus
+ sort subnodes of soc and root node
+ consistently use single space after =
* R-Car H2 (r8a7790), M3-W (r8a7791) and M3-N (r7a7793) SoCs
- Reduce size of thermal registers
According to the "User's Manual: Hardware" v2.00 the registers at base
0xe61f0000 extend to an offset of 0x10, rather than 0x14 which is the
case on the r8a73a4 (R-Mobile APE6).
This should not have any runtime affect as mapping granularity is
PAGE_SIZE.
* tag 'renesas-dt-for-v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (47 commits)
ARM: dts: silk: Add GPIO keys to DT
ARM: dts: silk: Add r1ex24002 EEPROM to DT
ARM: dts: marzen: Add SDHI0 VCCQ Regulator
ARM: dts: stout: Initial r8a7790 Stout board support
ARM: dts: lager: Move cec_clock to root node
ARM: dts: kzm9d: Fix "debounce-interval" property misspelling
ARM: dts: gose: use demuxer for I2C4
ARM: dts: gose: use demuxer for I2C2
ARM: dts: silk: use demuxer for I2C1
ARM: dts: alt: use demuxer for I2C1
ARM: dts: porter: use demuxer for I2C2
ARM: dts: koelsch: use demuxer for I2C4
ARM: dts: koelsch: use demuxer for I2C2
ARM: dts: lager: use demuxer for IIC3/I2C3
ARM: dts: lager: use demuxer for IIC2/I2C2
ARM: dts: r8a7745: Add VSP support
ARM: dts: r8a7743: Add VSP support
ARM: dts: r8a7745: Add IPMMU DT nodes
ARM: dts: r8a7743: Add IPMMU DT nodes
ARM: dts: r8a7745: sort subnodes of soc node
...
Support for the VDE is added on Tegra30 along with some general cleanup
and some improvements to the various Toradex boards.
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Merge tag 'tegra-for-4.17-arm-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Pull "ARM: tegra: Device tree changes for v4.17-rc1" from Thierry Reding:
Support for the VDE is added on Tegra30 along with some general cleanup
and some improvements to the various Toradex boards.
* tag 'tegra-for-4.17-arm-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: apalis-tk1: Support v1.2 hardware revision
ARM: tegra: apalis-tk1: Copyright period, spurious newlines
ARM: tegra: apalis-tk1: Hog group for ethernet, PCIe, reset GPIOs
ARM: tegra: apalis-tk1: Add missing as3722 gpio0 configuration
ARM: tegra: apalis-tk1: Activate PWM pin muxing for pwm3
ARM: tegra: apalis-tk1: Set critical trips
ARM: tegra: apalis/colibri: Remove unneeded reg property
ARM: tegra: apalis/colibri: Use correct compatible for RTC
ARM: tegra: Fix I2C bus frequencies on Apalis/Colibri
ARM: tegra: venice2: Remove duplicate pcie-1 node
ARM: tegra: beaver: Remove invalid uses of rsvd1
ARM: tegra: Use proper IRQ type definitions
ARM: tegra: Fix ULPI regression on Tegra20
ARM: tegra: Add unit address to VDE IRAM area
ARM: tegra: Add video decoder node on Tegra30
ARM: tegra: Add IRAM node on Tegra30
The first and second patches fix the regulator support for the Bananapi M2
board.
The last one updates my email address in MAINTAINERS.
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Merge tag 'sunxi-fixes-for-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into fixes
Pull "Allwinner Fixes for 4.16" from Maxime Ripard:
The first and second patches fix the regulator support for the Bananapi M2
board.
The last one updates my email address in MAINTAINERS.
* tag 'sunxi-fixes-for-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
MAINTAINERS: update email address for Maxime Ripard
ARM: dts: sun6i: a31s: bpi-m2: add missing regulators
ARM: dts: sun6i: a31s: bpi-m2: improve pmic properties
Fix insecure W+X mapping warning for SRAM for omaps that
don't yet use drivers/misc/*sram*.c code. An earlier attempt
at fixing this turned out to cause problems with PM on omap3,
this version works with PM on omap3.
Also fix dmtimer probe for omap16xx devices that was noticed
with the pending dmtimer move to drivers. It seems this has
been broken for a while and is a non-critical for booting.
It is needed for PM on omap16xx though.
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Merge tag 'omap-for-v4.16/sram-fix-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Pull "Two fixes for omap variants for v4.16-rc cycle" from Tony Lindgren:
Fix insecure W+X mapping warning for SRAM for omaps that
don't yet use drivers/misc/*sram*.c code. An earlier attempt
at fixing this turned out to cause problems with PM on omap3,
this version works with PM on omap3.
Also fix dmtimer probe for omap16xx devices that was noticed
with the pending dmtimer move to drivers. It seems this has
been broken for a while and is a non-critical for booting.
It is needed for PM on omap16xx though.
* tag 'omap-for-v4.16/sram-fix-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP: Fix SRAM W+X mapping
ARM: OMAP: Fix dmtimer init for omap1
Re-sync the defconfig by doing:
make savedefconfig
cp defconfig arch/arm/configs/mxs_defconfig
So keep it in sync to help further changes in defconfig.
The explanation for removing the Kconfig symbols:
CONFIG_FHANDLE=y: verified that it is still selected
selected
CONFIG_DEVPTS_MULTIPLE_INSTANCES=y: does not exist anymore
CONFIG_NVMEM=y: verified that it is still selected
CONFIG_LOCKUP_DETECTOR=y: need to select CONFIG_SOFTLOCKUP_DETECTOR now
CONFIG_TIMER_STATS=y: does not exist anymore
Boot tested on a imx28evk.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
fsl-asoc-card machine driver also supports sgtl5000, so use it favor
of the imx-sgtl5000 machine driver, which will be probably be removed
in the future.
Tested on a imx25-pdk board.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Re-sync the defconfig by doing:
make savedefconfig
cp defconfig arch/arm/configs/imx_v4_v5_defconfig
So keep it in sync to help further changes in defconfig.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
stat(1) is not standardized and different implementations have their own
(conflicting) flags for querying the size of a file.
ls(1) provides the same information (value of st.st_size) in the 5th
column, except when the file is a character or block device. This output
is standardized[0]. The -n option turns on -l, which writes lines
formatted like
"%s %u %s %s %u %s %s\n", <file mode>, <number of links>,
<owner name>, <group name>, <size>, <date and time>,
<pathname>
but instead of writing the <owner name> and <group name>, it writes the
numeric owner and group IDs (this avoids /etc/passwd and /etc/group
lookups as well as potential field splitting issues).
The <size> field is specified as "the value that would be returned for
the file in the st_size field of struct stat".
To avoid duplicating logic in several locations in the tree, create
scripts/file-size.sh and update callers to use that instead of stat(1).
[0] http://pubs.opengroup.org/onlinepubs/9699919799/utilities/ls.html#tag_20_73_10
Signed-off-by: Michael Forney <forney@google.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Send nm complaints about broken pipe (when sed exits early) to /dev/null.
All errors should be printed to stderr.
Don't trap on normal exit so the trap can return an error code.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Define vdso_start, vdso_end as array to avoid compile-time analysis error
for the case of built with CONFIG_FORTIFY_SOURCE.
and, since vdso_start, vdso_end are used in vdso.c only,
move extern-declaration from vdso.h to vdso.c.
If kernel is built with CONFIG_FORTIFY_SOURCE,
compile-time error happens at this code.
- if (memcmp(&vdso_start, "177ELF", 4))
The size of "&vdso_start" is recognized as 1 byte, but n is 4,
So that compile-time error is reported.
Acked-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Jinbum Park <jinb.park7@gmail.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Without CONFIG_MMU, this results in a build failure:
./arch/arm/include/asm/memory.h:92:23: error: initializer element is not constant
#define VECTORS_BASE vectors_base
arch/arm/mm/dump.c:32:4: note: in expansion of macro 'VECTORS_BASE'
{ VECTORS_BASE, "Vectors" },
arch/arm/mm/dump.c:71:11: error: 'L_PTE_USER' undeclared here (not in a function); did you mean 'VTIME_USER'?
.mask = L_PTE_USER,
^~~~~~~~~~
Obviously the feature only makes sense with an MMU, so let's add the
dependency here.
Fixes: a8e53c151f ("ARM: 8737/1: mm: dump: add checking for writable and executable")
Acked-by: Laura Abbott <labbott@redhat.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Commit 384b38b669 ("ARM: 7873/1: vfp: clear vfp_current_hw_state
for dying cpu") fixed the cpu dying notifier by clearing
vfp_current_hw_state[]. However commit e5b61bafe7 ("arm: Convert VFP
hotplug notifiers to state machine") incorrectly used the original
vfp_force_reload() function in the cpu dying notifier.
Fix it by going back to clearing vfp_current_hw_state[].
Fixes: e5b61bafe7 ("arm: Convert VFP hotplug notifiers to state machine")
Cc: linux-stable <stable@vger.kernel.org>
Reported-by: Kohji Okuno <okuno.kohji@jp.panasonic.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The decision to rebuild .S_shipped is made based on the relative
timestamps of .S_shipped and .pl files but git makes this essentially
random. This means that the perl script might run anyway (usually at
most once per checkout), defeating the whole purpose of _shipped.
Fix by skipping the rule unless explicit make variables are provided:
REGENERATE_ARM_CRYPTO or REGENERATE_ARM64_CRYPTO.
This can produce nasty occasional build failures downstream, for example
for toolchains with broken perl. The solution is minimally intrusive to
make it easier to push into stable.
Another report on a similar issue here: https://lkml.org/lkml/2018/3/8/1379
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Cc: <stable@vger.kernel.org>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Fixes the warning "GIC: PPI13 is secure or misconfigured" by
changing the interrupt type from level_low to edge_raising
Signed-off-by: Philipp Puschmann <pp@emlix.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
We would like to reset the Group-0 Active Priority Registers
at boot time if they are available to us. They would be available
if SCR_EL3.FIQ was not set, but we cannot directly probe this bit,
and short of checking, we may end-up trapping to EL3, and the
firmware may not be please to get such an exception. Yes, this
is dumb.
Instead, let's use PMR to find out if its value gets affected by
SCR_EL3.FIQ being set. We use the fact that when SCR_EL3.FIQ is
set, the LSB of the priority is lost due to the shifting back and
forth of the actual priority. If we read back a 0, we know that
Group0 is unavailable. In case we read a non-zero value, we can
safely reset the AP0Rn register.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
For consistency with all other serial pins, add this pullup. It also
prevents the signal from floating and so consuming a useless extra amount
of power in crowbarred state if nothing is connected to RX.
Signed-off-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
For consistency with all other serial pins, add this pullup. It also
prevents the signal from floating and so consuming a useless extra amount
of power in crowbarred state if nothing is connected to RX.
Signed-off-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Remove pullup on uart TX signals, they are push-pull outputs thus
pullups are pointless.
Add pullup on uart RX signals, they prevent the RX signals to be left
floating and so consuming a useless extra amount of power in crowbarred
state if nothing is connected to RX.
Signed-off-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
exynos_enter_aftr() is called by coupled CPU idle code every time CPU
enters idle state, what can be considered as a hot path. Replace
of_machine_is_compatible() call with a simple SoC revision check.
of_machine_is_compatible() function performs a dozen of string comparisons
during the full device tree walk, while soc_is_exynos4412() is a simple
integer check on SoC revision variable.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Since commit 04c8b0f82c ("irqchip/gic: Make locking a BL_SWITCHER only
feature") coupled CPU idle freezes from time to time on Exynos4210. Later
commit 313c8c16ee ("PM / CPU: replace raw_notifier with atomic_notifier")
changed the context in which the CPU idle code is executed, what results
in fully reproducible freeze all the time. However, almost the same coupled
CPU idle code works fine on Exynos3250 regardless of the changes made in
the mentioned commits.
It turned out that the IPI call used on Exynos4210 is conflicting with the
change done in the first mentioned commit in GIC. Fix this by using the
same code path as for Exynos3250, instead of the IPI call for
synchronization with second CPU core, call dsb_sev() directly.
Tested on Exynos4210-based Trats and Origen boards.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
CC: <stable@vger.kernel.org> # v4.13+
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
There are only 19 PIOB pins having primary names PB0-PB18. Not all of them
have a 'C' function. So the pinctrl property mask ends up being the same as the
other SoC of the at91sam9x5 series.
Reported-by: Marek Sieranski <marek.sieranski@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: <stable@vger.kernel.org> # v3.8+
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
We are still using custom SRAM code for some SoCs and are not marking
the PM code mapped to SRAM as read-only and executable after we're
done. With CONFIG_DEBUG_WX=y, we will get "Found insecure W+X mapping
at address" warning.
Let's fix this issue the same way as commit 728bbe75c8 ("misc: sram:
Introduce support code for protect-exec sram type") is doing for
drivers/misc/sram-exec.c.
On omap3, we need to restore SRAM when returning from off mode after
idle, so init time configuration is not enough.
And as we no longer have users for omap_sram_push_address() we can
make it static while at it.
Note that eventually we should be using sram-exec.c for all SoCs.
Cc: stable@vger.kernel.org # v4.12+
Cc: Dave Gerlach <d-gerlach@ti.com>
Reported-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Update the "gpio-ranges" property of the CBUS GPIO controller on Meson8b
because it only provides 83 GPIOs.
The GPIO definitions in include/dt-bindings/gpio/meson8b-gpio.h
inherited all GPIOs from Meson8 until recently. However, Meson8b does
not support all GPIOs which are supported by Meson8 (Meson8b doesn't
have a GPIOZ bank, most of the pins from the GPIODV bank are missing on
Meson8b - just to name a few differences).
The actual number of GPIOs is only 83, instead of 120 from Meson8 plus
the 10 GPIOs from the DIF bank on Meson8b.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Odroid C1 features a microSD slot. This patch adds the necessary
DT bindings to support it.
Signed-off-by: Linus Lüssing <linus.luessing@c0d3.blue>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
These are needed to use the n_gsm driver for TS 27.010 UART
multiplexing. Note that support for the OOB wake gpio is still
missing so the UART is not yet usable for n_gsm.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Configure MDM6600 USB PHY.
Cc: Marcel Partap <mpartap@gmx.net>
Cc: Michael Scott <michael.scott@linaro.org>
Cc: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We have a USB OCHI PHY on port 1 for mdm6600. Port 2 is using transceiverless
logic (TLL) for USB EHCI for w3glte modem.
Let's also fix the node name to use usb-phy while at it.
Cc: Marcel Partap <mpartap@gmx.net>
Cc: Michael Scott <michael.scott@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds syscon property for specifying soc-glue core into
device-tree of PXs2 SoC.
Currently, soc-glue core is used for changing the state of S/PDIF
signal output pin to signal output state or Hi-Z state.
Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Match the new compatible string in the control module driver. The base
infra maps the required syscon ranges and clock registers if available.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Control module can have multiple instances in a system, each with separate
address space and features. Add base support for these auxiliary instances,
with support for syscon and clock mappings under them.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The xref_xtal clock is used by twl6040 as mclk. It is needed for the HPPLL
internally.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clock is directly sourced from sys_clkin, and provides an external
output clock for (typically) TWL6040 chip.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The pad configuration area under control module wkup has some miscellaneous
config registers, that are not pinmux related. Add a separate area for
these, and add support for syscon / clocks under this new area.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
USB1 port is micro-AB type and can function as peripheral
as well as host. Enable dual-role mode for USB1.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We need the CPCAP MFD and regulator built-in for UART console to work,
the rest can be loadable modules. Note that users probably want to also
enable serial 8250_OMAP that is not yet enabled by default.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Give the basic phys_to_dma() and dma_to_phys() helpers a __-prefix and add
the memory encryption mask to the non-prefixed versions. Use the
__-prefixed versions directly instead of clearing the mask again in
various places.
Tested-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: Jon Mason <jdmason@kudzu.us>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Muli Ben-Yehuda <mulix@mulix.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: iommu@lists.linux-foundation.org
Link: http://lkml.kernel.org/r/20180319103826.12853-13-hch@lst.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
The DRM driver is now finalized for the Versatile board family,
so switch the defconfig to use this driver instead of the old
fbdev driver.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This updates the Versatile defconfig to the latest savedefconfig
results reflecting changes in Kconfig. We add in the Flash memory
support that has been available upstream for a while now.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The DRM driver is now finalized for the RealView board family,
so switch the defconfig to use this driver instead of the old
fbdev driver.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Just update with some new results from savedefconfig so we are
in sync with what has happened in Kconfig upstream.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the actual VGA DAC bridge that is used in the
Versatile AB, and sets the mode to 640x480 VGA.
The "clcd" clock was incorrectly named, the proper name
(from bindings) is "clcdclk". So far drivers survived
by just getting the first clock, but future drivers will
use named clocks.
We add the panel connector to the
"arm,versatile-tft-panel" as well, the signals actually
fork on the board, reaching both the VGA DAC and the
display connector.
Cc: Mali DP Maintainers <malidp@foss.arm.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Versatile board can be equipped with a interface board
just named "IB2". This was created in the early 2000s for
prototyping GSM candybar phone form factor products.
The IB2 board contains:
- Cascaded interrupt controller
- Enfora Enabler GSM0308 quad-band module with antenna and
separate audio jack
- Keypad with joystick
- Sanyo 2.5" color display
- A 28-pin connector for mounting a camera
This adds a DTS file for the combination of the Versatile AB
with an IB2 daughterboard mounted, making the LED blink and
making the system controller available for drivers, such as
the panel driver.
The device tree bindings already exist in
Documentation/devicetree/bindings/arm/arm-boards.
Cc: Mali DP Maintainers <malidp@foss.arm.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The PL111 in the ARM reference platforms are connected to
"panels" that are actually dumb VGA DAC connector bridges.
Now that we can support the proper bridges in the DRM driver,
fix this up.
Cc: Mali DP Maintainers <malidp@foss.arm.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The PL111 in the ARM reference platforms are connected to
"panels" that are actually dumb VGA DAC connector bridges.
Now that we can support the proper bridges in the DRM driver,
fix this up.
Cc: Mali DP Maintainers <malidp@foss.arm.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The PL111 in the ARM reference platforms are connected to
"panels" that are actually dumb VGA DAC connector bridges.
Now that we can support the proper bridges in the DRM driver,
fix this up.
Cc: Mali DP Maintainers <malidp@foss.arm.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The PL111 in the ARM reference platforms are connected to
"panels" that are actually dumb VGA DAC connector bridges.
Now that we can support the proper bridges in the DRM driver,
fix this up.
Cc: Mali DP Maintainers <malidp@foss.arm.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Cubieboard4 has a dumb VGA DAC connected to the output of LCD0,
providing VGA output through the onboard VGA connector. The DDC lines
are connected to i2c3.
The VGA DAC is a GM7123, which is compatible with Analog Devices'
ADV7123, except it only takes 3.3V power, and has a lower standby power
consumption. The datasheet found online lists "Chengdu GoldTel Electronical
Technology Co., Ltd." as its designer. The company changed its name in
2014 to "Chengdu Corpro Technology Co., Ltd.". Their website lists similar
ICs, but not actually the GM7123.
Enable the display pipeline with the VGA DAC and connector, and i2c3
for DDC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The A80 supports RGB888 with H/V sync from LCD0. Add a pinmux setting
for the needed pins.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
We have a KVM_REG_ARM encoding that we use to expose KVM guest registers
to userspace. Define that bit 28 in this encoding indicates secure vs
nonsecure, so we can distinguish the secure and nonsecure banked versions
of a banked AArch32 register.
For KVM currently, all guest registers are nonsecure, but defining
the bit is useful for userspace. In particular, QEMU uses this
encoding as part of its on-the-wire migration format, and needs to be
able to describe secure-bank registers when it is migrating (fully
emulated) EL3-enabled CPUs.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
- Peace of mind locking fix in vgic_mmio_read_pending
- Allow hw-mapped interrupts to be reset when the VM resets
- Fix GICv2 multi-source SGI injection
- Fix MMIO synchronization for GICv2 on v3 emulation
- Remove excess verbosity on the console
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Merge tag 'kvm-arm-fixes-for-v4.16-2' into HEAD
Resolve conflicts with current mainline
Until now, all EL2 executable mappings were derived from their
EL1 VA. Since we want to decouple the vectors mapping from
the rest of the hypervisor, we need to be able to map some
text somewhere else.
The "idmap" region (for lack of a better name) is ideally suited
for this, as we have a huge range that hardly has anything in it.
Let's extend the IO allocator to also deal with executable mappings,
thus providing the required feature.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
We so far mapped our HYP IO (which is essentially the GICv2 control
registers) using the same method as for memory. It recently appeared
that is a bit unsafe:
We compute the HYP VA using the kern_hyp_va helper, but that helper
is only designed to deal with kernel VAs coming from the linear map,
and not from the vmalloc region... This could in turn cause some bad
aliasing between the two, amplified by the upcoming VA randomisation.
A solution is to come up with our very own basic VA allocator for
MMIO. Since half of the HYP address space only contains a single
page (the idmap), we have plenty to borrow from. Let's use the idmap
as a base, and allocate downwards from it. GICv2 now lives on the
other side of the great VA barrier.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
As we're about to change the way we map devices at HYP, we need
to move away from kern_hyp_va on an IO address.
One way of achieving this is to store the VAs in kvm_vgic_global_state,
and use that directly from the HYP code. This requires a small change
to create_hyp_io_mappings so that it can also return a HYP VA.
We take this opportunity to nuke the vctrl_base field in the emulated
distributor, as it is not used anymore.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Both HYP io mappings call ioremap, followed by create_hyp_io_mappings.
Let's move the ioremap call into create_hyp_io_mappings itself, which
simplifies the code a bit and allows for further refactoring.
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
kvm_vgic_global_state is part of the read-only section, and is
usually accessed using a PC-relative address generation (adrp + add).
It is thus useless to use kern_hyp_va() on it, and actively problematic
if kern_hyp_va() becomes non-idempotent. On the other hand, there is
no way that the compiler is going to guarantee that such access is
always PC relative.
So let's bite the bullet and provide our own accessor.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: James Morse <james.morse@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
We can finally get completely rid of any calls to the VGICv3
save/restore functions when the AP lists are empty on VHE systems. This
requires carefully factoring out trap configuration from saving and
restoring state, and carefully choosing what to do on the VHE and
non-VHE path.
One of the challenges is that we cannot save/restore the VMCR lazily
because we can only write the VMCR when ICC_SRE_EL1.SRE is cleared when
emulating a GICv2-on-GICv3, since otherwise all Group-0 interrupts end
up being delivered as FIQ.
To solve this problem, and still provide fast performance in the fast
path of exiting a VM when no interrupts are pending (which also
optimized the latency for actually delivering virtual interrupts coming
from physical interrupts), we orchestrate a dance of only doing the
activate/deactivate traps in vgic load/put for VHE systems (which can
have ICC_SRE_EL1.SRE cleared when running in the host), and doing the
configuration on every round-trip on non-VHE systems.
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
The APRs can only have bits set when the guest acknowledges an interrupt
in the LR and can only have a bit cleared when the guest EOIs an
interrupt in the LR. Therefore, if we have no LRs with any
pending/active interrupts, the APR cannot change value and there is no
need to clear it on every exit from the VM (hint: it will have already
been cleared when we exited the guest the last time with the LRs all
EOIed).
The only case we need to take care of is when we migrate the VCPU away
from a CPU or migrate a new VCPU onto a CPU, or when we return to
userspace to capture the state of the VCPU for migration. To make sure
this works, factor out the APR save/restore functionality into separate
functions called from the VCPU (and by extension VGIC) put/load hooks.
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
The vgic-v2-sr.c file now only contains the logic to replay unaligned
accesses to the virtual CPU interface on 16K and 64K page systems, which
is only relevant on 64-bit platforms. Therefore move this file to the
arm64 KVM tree, remove the compile directive from the 32-bit side
makefile, and remove the ifdef in the C file.
Since this file also no longer saves/restores anything, rename the file
to vgic-v2-cpuif-proxy.c to more accurately describe the logic in this
file.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
We can program the GICv2 hypervisor control interface logic directly
from the core vgic code and can instead do the save/restore directly
from the flush/sync functions, which can lead to a number of future
optimizations.
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
SPSR_EL1 is not used by a VHE host kernel and can be deferred, but we
need to rework the accesses to this register to access the latest value
depending on whether or not guest system registers are loaded on the CPU
or only reside in memory.
The handling of accessing the various banked SPSRs for 32-bit VMs is a
bit clunky, but this will be improved in following patches which will
first prepare and subsequently implement deferred save/restore of the
32-bit registers, including the 32-bit SPSRs.
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
So far this is mostly (see below) a copy of the legacy non-VHE switch
function, but we will start reworking these functions in separate
directions to work on VHE and non-VHE in the most optimal way in later
patches.
The only difference after this patch between the VHE and non-VHE run
functions is that we omit the branch-predictor variant-2 hardening for
QC Falkor CPUs, because this workaround is specific to a series of
non-VHE ARMv8.0 CPUs.
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
As we are about to move a bunch of save/restore logic for VHE kernels to
the load and put functions, we need some infrastructure to do this.
Reviewed-by: Andrew Jones <drjones@redhat.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
We currently have a separate read-modify-write of the HCR_EL2 on entry
to the guest for the sole purpose of setting the VF and VI bits, if set.
Since this is most rarely the case (only when using userspace IRQ chip
and interrupts are in flight), let's get rid of this operation and
instead modify the bits in the vcpu->arch.hcr[_el2] directly when
needed.
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Julien Thierry <julien.thierry@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This patch adds some device nodes for the PCIe function block and updates
related pinmux.
Moreover, we add interrupt-map properties in both parent and children as
the chip only has one IRQ per slot that is connected to all INTx and get
propagated through the bridges and it also represents the root ports own
interrupts.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The H3 has an ARM Mali 400 GPU, so add binding to our DT.
Signed-off-by: Giulio Benetti <giulio.benetti@micronovasrl.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
It should be good that no use "_" is in DT node name. Consequently,
those nodes in certain files which have an inappropriate name containing
"_" are all being replaced with "-".
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The property pinctrl-names is totally superfluous. It would be good to
remove the property to keep the node neatness. There is actually
unnecessary to set up any pins for data path TRGMII between main SoC and
MT7530. Furthermore, it's more reasonable for the pin setup of control
path MDIO bus is being placed inside the node of ethernet controller.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
On bpi-r2 board, totally there're four UARTs which we usually called
uart[0-3] helpful to extend slow-I/O devices. Among those ones, uart2 has
dedicated pin slot which is used to console log. uart[0-1] appear at the
40-pins connector and uart3 has no pinout, but just has test points (TP47
for TX and TP48 for RX, respectively) nearby uart2, but we don't enable
uart3 in the patch. The missing pinctrl is also being supplemented for
those newly added devices.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Both mmc devices on bananapi-r2 board should all use the fixed regulators
as their power source instead of PMIC MT6323 exports.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Extend the Silk board support to include SW3, SW4, SW6 and SW12. They
are all connected via GPIO lines and handled by the gpio-keys driver.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Extend the Silk board support to include U14 which is an I2C based EEPROM
hooked up to the I2C1 bus.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add support for the on-board voltage regulator hooked up to GPIO3_20
on r8a7779 Marzen. The board schematics describes the regulator as U4
TPS2110A. Input wise, U4 has D0 fixed to ground, D1 tied to GPIO3_20
while IN1 is fixed to 3.3V and IN2 is fixed to 1.8V. OUT goes to the
pull-ups for the data pins of SDHI0.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Stout base board support making use of 1 GiB of memory,
the Renesas H2 r8a7790 SoC with the SCIFA0 serial port
and CA15 with ARM architected timer.
Furthermore, this device tree contains entries for:
- 4x LEDs
- SDHI SD/MMC controller
- Display unit with HDMI output
- SH fast ethernet controller
- QSPI controller with S25FL512S attached to it
- I2C controller with DA9210 and DA 9063 PMICs
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
cec-clock is a fixed clock generator that is not controlled by i2c-12
and thus should not be a child of the i2c-12 bus node. Rather, it should
be a child of the root node of the DT.
Fixes: c5aa879776 ("ARM: dts: lager: Add CEC clock for HDMI transmitter")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
"debounce_interval" was never supported.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
DTC now warns about missing #sound-dai-cells:
/sound/simple-audio-card,codec: Missing property '#sound-dai-cells' in
node /soc/aips-bus@2100000/i2c@21a0000/codec@a or bad phandle
(referred from sound-dai[0])
Pass the required '#sound-dai-cells' property to fix it.
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Use the standard 'stdout-path' property to fix the following DTC warnings:
arch/arm/boot/dts/imx6dl-phytec-mira-rdk-nand.dtb: Warning
(chosen_node_stdout_path): /chosen:linux,stdout-path: Use
'stdout-path' instead
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
dtc now gives the following warnings:
arch/arm/boot/dts/stih410-b2120.dtb: Warning (sound_dai_property): /soc/sound/simple-audio-card,dai-link@0/codec: Missing property '#sound-dai-cells' in node /soc/sti-display-subsystem/sti-hdmi@8d04000 or bad phandle (referred from sound-dai[0])
arch/arm/boot/dts/stih407-b2120.dtb: Warning (sound_dai_property): /soc/sound/simple-audio-card,dai-link@0/codec: Missing property '#sound-dai-cells' in node /soc/sti-display-subsystem/sti-hdmi@8d04000 or bad phandle (referred from sound-dai[0])
arch/arm/boot/dts/stih410-b2260.dtb: Warning (sound_dai_property): /soc/sound/simple-audio-card,dai-link@0/codec: Missing property '#sound-dai-cells' in node /soc/sti-display-subsystem/sti-hdmi@8d04000 or bad phandle (referred from sound-dai[0])
Add the missing #sound-dai-cells property.
Cc: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add i.MX 6SoloLiteLite (i.MX6SLL) SoC support on top of the existing
i.MX6SL platform code.
- Improve the SoC revision mapping by utilizing the MAJOR field of
ANATOP DIGPROG register.
- Add CPUIDLE_FLAG_TIMER_STOP flag for cpuidle ARM power off state,
so that we can use ARM generic timer for some i.MX6 SoC.
- Set low-power interrupt mask for i.MX25 to support STOP mode.
- Drop EPIT driver as there is no user of it.
- Simplify the error path of imx6_pm_get_base() a bit.
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Merge tag 'imx-soc-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
Pull "i.MX SoC changes for 4.17" from Shawn Guo:
- Add i.MX 6SoloLiteLite (i.MX6SLL) SoC support on top of the existing
i.MX6SL platform code.
- Improve the SoC revision mapping by utilizing the MAJOR field of
ANATOP DIGPROG register.
- Add CPUIDLE_FLAG_TIMER_STOP flag for cpuidle ARM power off state,
so that we can use ARM generic timer for some i.MX6 SoC.
- Set low-power interrupt mask for i.MX25 to support STOP mode.
- Drop EPIT driver as there is no user of it.
- Simplify the error path of imx6_pm_get_base() a bit.
* tag 'imx-soc-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: Add basic msl support for imx6sll
ARM: imx: pm-imx6: Return the error directly
ARM: imx: avic: set low-power interrupt mask for imx25
ARM: imx: Improve the soc revision calculation flow
ARM: imx: add timer stop flag to ARM power off state
ARM: imx: Remove epit support
This patchs adds the minimal defconfig for the OXNAS ARMv6 SoCs
including the OX820 SoC and needed minimal configurations.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Updates to OpenPower BMC systems:
A number of updates to use recently merged drivers, including moving to
upstreamed IPMI BT nodes, a temp sensor for Romulus, and adding
simple-reset for UARTs.
This includes more of Palmetto's device tree, so that it's ever so
close to booting the host with an upstream kernel.
New machines:
Add Qualcomm Centriq ARM64 server reference platform, which will run
OpenBMC on an AST2500.
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Merge tag 'aspeed-4.17-devicetree' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into next/dt
Pull "ASPEED device tree updates for 4.17" from Joel Stanley:
Updates to OpenPower BMC systems:
A number of updates to use recently merged drivers, including moving to
upstreamed IPMI BT nodes, a temp sensor for Romulus, and adding
simple-reset for UARTs.
This includes more of Palmetto's device tree, so that it's ever so
close to booting the host with an upstream kernel.
New machines:
Add Qualcomm Centriq ARM64 server reference platform, which will run
OpenBMC on an AST2500.
* tag 'aspeed-4.17-devicetree' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: dts: aspeed: Add Qualcomm Centriq 2400 REP BMC
ARM: dts: aspeed: romulus: Add w83773g temp sensor
ARM: dts: aspeed: romulus: hog GPIOS7
ARM: dts: romulus: Remove MAX31785 device
ARM: dts: palmetto: Request mux as per strapping configuration
ARM: dts: palmetto: Enable rear UART
ARM: dts: aspeed: Add LPC reset controller node
ARM: dts: aspeed: Add Palmetto GPIO hogs
ARM: dts: palmetto: Add LEDs and GPIO keys
ARM: dts: aspeed: Add LPC clock phandles
ARM: dts: aspeed-g5: Update LPC node
ARM: dts: aspeed: Enable IPMI BT node on OpenPower machines
ARM: dts: aspeed: Add IPMI BT node
