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For general soc-specific changes the rk322x socs got their correct grf

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compatible set. Other than that there are some board-specific changes
 like the Rock2 getting its otg port, recovery and power keys enabled.
 
 The vyasa board gained an enabled emmc node and the phyCORE boards
 got UHS speeds in their sd card and a fixed sd-card power supply.
 
 Finally the veyron boards dropped a nonstandard and unused property.
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Merge tag 'v4.17-rockchip-dts32-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Pull "Rockchip dts32 changes for 4.17" from Heiko Stübner:

For general soc-specific changes the rk322x socs got their correct grf
compatible set. Other than that there are some board-specific changes
like the Rock2 getting its otg port, recovery and power keys enabled.

The vyasa board gained an enabled emmc node and the phyCORE boards
got UHS speeds in their sd card and a fixed sd-card power supply.

Finally the veyron boards dropped a nonstandard and unused property.

* tag 'v4.17-rockchip-dts32-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: enable USB-OTG port on Radxa Rock2 Square
  ARM: dts: rockchip: add recovery button for Rock2 Square
  ARM: dts: rockchip: add power key for Rock2 Square
  ARM: dts: rockchip: Add eMMC node for rk3288-vyasa
  ARM: dts: rockchip: Support UHS mode for SD card on phyCORE-RK3288 RDK
  ARM: dts: rockchip: Fix supply node for card's power on phycore som
  ARM: dts: rockchip: add "rockchip,rk3228-grf" compatible for rk322x grf node
  ARM: dts: rockchip: drop veyron's nonstandard 'backlight-boot-off'
This commit is contained in:
Arnd Bergmann 2018-03-28 17:15:43 +02:00
commit 3eb8d21ac6
7 changed files with 64 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/rk322x.dtsi
View File

@ -233,7 +233,7 @@ i2s2: i2s2@100e0000 {
};
grf: syscon@11000000 {
compatible = "syscon", "simple-mfd";
compatible = "rockchip,rk3228-grf", "syscon", "simple-mfd";
reg = <0x11000000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;

6
arch/arm/boot/dts/rk3288-phycore-rdk.dts
View File

@ -265,7 +265,11 @@ &sdmmc {
disable-wp;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
vmmc-supply = <&vdd_io_sd>;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-sdr104;
vmmc-supply = <&vdd_sd>;
vqmmc-supply = <&vdd_io_sd>;
status = "okay";
};

5
arch/arm/boot/dts/rk3288-phycore-som.dtsi
View File

@ -336,11 +336,10 @@ vdd_io_sd: LDO_REG9 {
regulator-name = "vdd_io_sd";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
regulator-off-in-suspend;
};
};
};

4
arch/arm/boot/dts/rk3288-rock2-som.dtsi
View File

@ -280,6 +280,10 @@ phy_rst: phy-rst {
};
};
&saradc {
vref-supply = <&vcc_18>;
};
&tsadc {
rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */

41
arch/arm/boot/dts/rk3288-rock2-square.dts
View File

@ -39,6 +39,7 @@
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include "rk3288-rock2-som.dtsi"
/ {
@ -49,6 +50,32 @@ chosen {
stdout-path = "serial2:115200n8";
};
adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 1>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
button-recovery {
label = "Recovery";
linux,code = <KEY_VENDOR>;
press-threshold-microvolt = <0>;
};
};
gpio-keys {
compatible = "gpio-keys";
power {
gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
label = "GPIO Power";
linux,code = <KEY_POWER>;
pinctrl-names = "default";
pinctrl-0 = <&pwr_key>;
wakeup-source;
};
};
gpio-leds {
compatible = "gpio-leds";
@ -220,6 +247,12 @@ ir_int: ir-int {
};
};
keys {
pwr_key: pwr-key {
rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
pmic {
pmic_int: pmic-int {
rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_up>;
@ -261,6 +294,10 @@ wifi_enable: wifi-enable {
};
};
&saradc {
status = "okay";
};
&spdif {
status = "okay";
};
@ -284,3 +321,7 @@ &usb_host0_ehci {
&usb_host1 {
status = "okay";
};
&usb_otg {
status = "okay";
};

1
arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
View File

@ -92,7 +92,6 @@ backlight: backlight {
248 249 250 251 252 253 254 255>;
default-brightness-level = <128>;
enable-gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
backlight-boot-off;
pinctrl-names = "default";
pinctrl-0 = <&bl_en>;
pwms = <&pwm0 0 1000000 0>;

11
arch/arm/boot/dts/rk3288-vyasa.dts
View File

@ -155,6 +155,17 @@ &cpu0 {
cpu0-supply = <&vdd_cpu>;
};
&emmc {
bus-width = <8>;
cap-mmc-highspeed;
disable-wp;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
vmmc-supply = <&vcc_io>;
status = "okay";
};
&gmac {
assigned-clocks = <&cru SCLK_MAC>;
assigned-clock-parents = <&ext_gmac>;