Commit Graph

433 Commits

Author SHA1 Message Date
Kent Russell
673b366b41 drm/amdgpu: Add replay counter defines to NBIO headers
Add the PCIE_RX_NUM_NACK and PCIE_RX_NUM_NACK_GENERATED values to the
NBIO SMN headers in preparation for exposing the number of PCIe replays
via sysfs

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24 12:20:48 -05:00
Evan Quan
1846e3f9e7 drm/amd/powerplay: expose Vega20 realtime memory utilization
Enable realtime memory utilization report on Vega20.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24 12:20:48 -05:00
Oak Zeng
d8e408a827 drm/amdkfd: Expose HDP registers to user space
Introduce a new memory type (KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) and
expose mmio page of HDP registers to user space through this new
memory type.

v2: moved remapped hdp regs to adev struct
v3: rename the new memory type to ALLOC_MEM_FLAGS_MMIO_REMAP
v4: use more generic function name
v5: Fail remapped mmio allocation for asics before gfx9

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24 12:20:47 -05:00
Evan Quan
2adc11564c drm/amd/powerplay: support hwmon temperature channel labels V2
Expose temp[1-3]_label hwmon interfaces. While temp2_label
and temp3_label are visible for SOC15 dGPUs only.

- V2: correct temp1_label as "edge"

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24 12:20:47 -05:00
Evan Quan
a34d1166b4 drm/amd/powerplay: expose current hotspot and memory temperatures V2
Two new hwmon interfaces(temp2_input and temp3_input) are added.
They are supported on SOC15 dGPUs only.

- V2: correct thermal sensor output

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24 12:20:47 -05:00
Leo Li
3b8cea6f64 drm/amd/include: Add HUBPREQ_DEBUG register offsets
They will be used by DC when runing ASIC-specific HUBP initialization.

Signed-off-by: Leo Li <sunpeng.li@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-23 17:27:08 -05:00
Leo Li
20299a8812 drm/amd/include: Add USB_C_TYPE to atom_encoder_cap_defs
This is needed by DC to support EDID emulation on USB-C ports.

CC: Samson Tam <Samson.Tam@amd.com>
CC: Harry Wentland <harry.wentland@amd.com>
CC: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-19 11:32:48 -05:00
Amber Lin
0da8b10e36 drm/amdgpu: get_fw_version isn't ASIC specific
Method of getting firmware version is the same across ASICs, so remove
them from ASIC-specific files and create one in amdgpu_amdkfd.c. This new
created get_fw_version simply reads fw_version from adev->gfx than parsing
the ucode header.

Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-19 11:32:40 -05:00
Christian König
04ed8459f3 drm/amdgpu: remove chash
Remove the chash implementation for now since it isn't used any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-03-19 15:36:58 -05:00
Hawking Zhang
ed606ca3d3 drm/amdgpu: update atomfirmware header with ecc related members
add new umc_info structures and new firmware_capability defines

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-03-19 15:36:51 -05:00
Tom St Denis
054d282d17 drm/amd/amdgpu: Add ENGINE_CNTL register to vcn10 headers
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-03-19 15:36:48 -05:00
Chengming Gui
49d27e91cf drm/amd/powerplay: add enable_umd_pstate functions for SMU11
add enable_umd_pstate to support sys interface for SMU11.

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-03-19 15:03:59 -05:00
Huang Rui
eaf02a4d92 drm/amdgpu: update atomfirmware header for smu11
This patch updates atomfirmware header on smu11 for future use.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Kevin Wang <Kevin1.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-03-19 15:03:55 -05:00
Yong Zhao
234441dd49 drm/amdkfd: Optimize out sdma doorbell array in kgd2kfd_shared_resources
We can directly calculate sdma doorbell indexes in the process doorbell
pages through the doorbell_index structure in amdgpu_device, so no need
to cache them in kgd2kfd_shared_resources any more. This alleviates the
adaptation needs when new SDMA configurations are introduced.

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-02-18 18:00:50 -05:00
Yong Zhao
1f86805adc drm/amdkfd: Fix bugs regarding CP queue doorbell mask on SOC15
Reserved doorbells for SDMA IH and VCN were not properly masked out
when allocating doorbells for CP user queues. This patch fixed that.

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-02-18 18:00:41 -05:00
Evan Quan
d7e28e2d6b drm/amd/powerplay: support retrieving and adjusting dcefclock power levels V2
User can use "pp_dpm_dcefclk" to retrieve and adjust dcefclock power
levels.

V2: expose this interface for Vega10 and later ASICs only

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25 16:15:34 -05:00
Evan Quan
828e37efe8 drm/amd/powerplay: support retrieving and adjusting fclock power levels V2
User can use "pp_dpm_fclk" to retrieve and adjust fclock power
levels.

V2: expose this interface for Vega20 and later ASICs only

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25 16:15:34 -05:00
Evan Quan
d7337ca264 drm/amd/powerplay: support retrieving and adjusting SOC clock power levels V2
User can use "pp_dpm_socclk" to retrieve and adjust SOC clock power
levels.

V2: expose this interface for Vega10 and later ASICs only

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25 16:15:34 -05:00
Evan Quan
7ca881a865 drm/amd/powerplay: support enabled ppfeatures retrieving and setting V3
User can use "ppfeatures" sysfs interface to retrieve and set enabled
powerplay features.

V2: expose this feature for Vega10 and later dGPUs
V3: squash in removal of unused variable (Alex)

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25 16:15:34 -05:00
Matteo Croce
229f7b1d63 drm/amd: fix typo
Fix spelling mistake: "lenght" -> "length"

Signed-off-by: Matteo Croce <mcroce@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25 16:15:34 -05:00
Jim Qu
6a789aa8d5 drm/amdgpu: update THM IP register header to support BACO
Signed-off-by: Jim Qu <Jim.Qu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25 16:15:33 -05:00
Jim Qu
f5d9e9b9c1 drm/amdgpu: update NBIO v7.4 to support BACO
Signed-off-by: Jim Qu <Jim.Qu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25 16:15:33 -05:00
Jim Qu
7451ca88d5 drm/amdgpu: add BACO interfaces in pm and hwmgr function table
Signed-off-by: Jim Qu <Jim.Qu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:43:01 -05:00
Jim Qu
58a50420aa drm/amdgpu: update nbio v6.1 register/master to support BACO
Signed-off-by: Jim Qu <Jim.Qu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:42:51 -05:00
Kent Russell
a0bb79e255 drm/amdgpu: Add NBIO SMN headers v2
We need these offsets for PCIE perf counters, so include them as well as
the the previously-used defines from the nbio_*.c files

v2: Return NBIF definitions back to previous files

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:53 -05:00
Amber Lin
308176d6f6 drm/amdgpu: Remove kgd2kfd function pointers
kgd2kfd function pointers and global kgd2kfd pointer are no longer in use.

Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:29 -05:00
Amber Lin
2d3d25b616 drm/amdgpu: Relocate kgd2kfd function declaration
Since amdkfd is merged into amdgpu module and amdgpu can access amdkfd
directly, move declaration of kgd2kfd functions from kfd_priv.h to
amdgpu_amdkfd.h

Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:28 -05:00
Evan Quan
c27c9778a1 drm/amd/powerplay: support BOOTUP_DEFAULT power profile mode
This can avoid unexpected profile mode change after running
compute workload.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:23 -05:00
Felix Kuehling
b408a54884 drm/amdkfd: Add support for doorbell BOs
This allows user mode to map doorbell pages into GPUVM address space.
That way GPUs can submit to user mode queues (self-dispatch).

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-07 18:14:00 -05:00
hersen wu
9ed9203c3e drm/amd/powerplay: rv dal-pplib interface refactor powerplay part
[WHY] clarify dal input parameters to pplib interface, remove
un-used parameters. dal knows exactly which parameters needed
and their effects at pplib and smu sides.

current dal sequence for dcn1_update_clock to pplib:

1.smu10_display_clock_voltage_request for dcefclk
2.smu10_display_clock_voltage_request for fclk
3.phm_store_dal_configuration_data {
  set_min_deep_sleep_dcfclk
  set_active_display_count
  store_cc6_data --- this data never be referenced

new sequence will be:

1. set_display_count  --- need add new pplib interface
2. set_min_deep_sleep_dcfclk -- new pplib interface
3. set_hard_min_dcfclk_by_freq
4. set_hard_min_fclk_by_freq

after this code refactor, smu10_display_clock_voltage_request,
phm_store_dal_configuration_data will not be needed for rv.

[HOW] step 1: add new functions at pplib interface
      step 2: add new functions at amdgpu dm and dc

Signed-off-by: hersen wu <hersenxs.wu@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-07 17:53:47 -05:00
Leo Li
d4295e1279 drm/amd/include: Add mmhub 9.4 reg offsets and shift-mask
In particular, we need the mmMC_VM_XGMI_LFB_CNTL register, for
determining if xGMI is enabled on VG20. This will be used by DC to
determine the correct spread spectrum adjustment for display and audio
clocks.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-05 17:49:50 -05:00
David Francis
206bbafe00 drm/amd: Query and use ACPI backlight caps
ACPI ATIF has a function called query
backlight transfer characteristics.  Among the
information returned by this function is
the minimum and maximum input signals for the
backlight

Call that function on ACPI init.  When DM
backlight device is updated, copy over the
backlight caps into DM, but only once.  Use
the backlight caps in the backlight-to-dc
calculation

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-26 15:54:39 -05:00
David Francis
7349a3afaa drm/amd: update ATIF functions in AMD ACPI header
The ACPI interface in AMD was a few years out of date
and contained some unused and deprecated functions

Remove functions: Select Active Displays, Get Lid State,
Get TV Standard, Set TV Standard, Get Panel Expansion Mode,
Set Panel Expansion Mode, Get Graphics Device Types

Add functions: Query Backlight Transfer Characteristics,
Ready To Undock Notification

Changed functions: Get System Parameters,
Get System BIOS Requests

All changes are right from the standard
ATI ACPI Control Methods V0.44

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-26 15:54:38 -05:00
Alex Deucher
79d197f31b drm/amdgpu: add DC feature mask module parameter
Similar to ppfeaturemask.  Allows you to selectively enable/disable
DC features.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-07 17:05:58 -05:00
Leo Li
45cf8c23f3 drm/amd: Update atom_smu_info_v3_3 structure
Mainly adding the WAFL spread spectrum info, for adjusting display
clocks when XGMI is enabled.

Signed-off-by: Leo Li <sunpeng.li@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-06 14:00:55 -05:00
Amber Lin
dfcbe6d5f4 drm/amdgpu: Remove unused function pointers
Remove unused function pointers in kfd2kgd structure.

Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:21:08 -05:00
Evan Quan
d579fd8270 drm/amd/powerplay: added I2C controller configuration
PPTABLE structure is stretched to add I2C controller
configuration. Hold on the PPTABLE_V20_SMU_VERSION bump
until the VBIOS is ready.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-16 15:08:54 -05:00
James Zhu
b53d3049d2 drm/amdgpu/vcn:Add new register offset/mask for VCN
Add new register offset/mask for VCN to support
latest VCN implementation.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:53:52 -05:00
Tao Zhou
04e7580f89 drm/amdgpu: add CP_DEBUG register definition for GC9.0
Add CP_DEBUG register definition.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-10 14:47:32 -05:00
Rex Zhu
c2870527f7 drm/amdgpu: Add fan RPM setting via sysfs
Add fan1_target for get/set fan speed in RPM unit
Add fan1_min/fan1_max for get min, max fan speed in RPM unit
Add fan1_enable to enable/disable the fan1 sensor

v3: drop the hardcode value of min/max rpm in comments pointed
    out by Alex.
v2: query the min/max rpm gpu support instand of hardcode value.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-09 17:04:59 -05:00
Rex Zhu
862cd98029 drm/amdgpu: Add new AMDGPU_PP_SENSOR_MIN/MAX_FAN_RPM sensor
For getting the min/max fan speed in RPM units.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-09 17:04:46 -05:00
Evan Quan
b55c9e7a11 drm/amd/powerplay: helper interfaces for MGPU fan boost feature
MGPU fan boost feature is enabled only when two or more dGPUs
in the system.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-09 16:59:56 -05:00
Evan Quan
031db09017 drm/amd/powerplay/vega20: enable fan RPM and pwm settings V2
Manual fan RPM and pwm setting on vega20 are
available now.

V2: correct the register for fan speed setting and
    avoid divide-by-zero

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-09 16:45:58 -05:00
Evan Quan
42fae99520 drm/amd/powerplay/vega20: tell the correct gfx voltage V2
Export the correct gfx voltage by hwmon interface.

V2: update the register naming for consistency

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-09 16:45:58 -05:00
James Zhu
f28ff06210 drm/amdgpu:Add DPG support flag
Add DPG support flag for VCN DPG mode.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26 21:09:23 -05:00
James Zhu
b604545b92 drm/amdgpu:Add new register offset/mask to support VCN DPG mode
New register offset/mask need to be added to support VCN DPG mode.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26 21:09:23 -05:00
Shaoyun Liu
e715c6d0ea drm/amd: Interface change to support 64 bit page_table_base
amdgpu_gpuvm_get_process_page_dir should return the page table address
in the format expected by the pm4_map_process packet for all ASIC
generations.

Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26 21:09:17 -05:00
Shaoyun Liu
c5892230d9 drm/amdgpu: Doorbell assignment for 8 sdma user queue per engine
Change doorbell assignments to allow routing doorbells for 8 user
mode SDMA queues per engine.

Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26 21:09:16 -05:00
Alex Deucher
e0c3d04747 drm/amdgpu: add new AMDGPU_PP_SENSOR_ENABLED_SMC_FEATURES_MASK sensor
For getting the 64 bit enabled smc feature mask from vega parts.

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26 21:09:10 -05:00
Dave Airlie
bf78296ab1 This is the 4.19-rc5 stable release
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BackMerge v4.19-rc5 into drm-next

Sean Paul requested an -rc5 backmerge from some sun4i fixes.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-09-27 11:06:46 +10:00